Path: blob/main/contrib/llvm-project/llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.h
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//=- LoongArchISelDAGToDAG.h - A dag to dag inst selector for LoongArch ---===//1//2// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.3// See https://llvm.org/LICENSE.txt for license information.4// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception5//6//===----------------------------------------------------------------------===//7//8// This file defines an instruction selector for the LoongArch target.9//10//===----------------------------------------------------------------------===//1112#ifndef LLVM_LIB_TARGET_LOONGARCH_LOONGARCHISELDAGTODAG_H13#define LLVM_LIB_TARGET_LOONGARCH_LOONGARCHISELDAGTODAG_H1415#include "LoongArch.h"16#include "LoongArchTargetMachine.h"17#include "llvm/CodeGen/SelectionDAGISel.h"1819// LoongArch-specific code to select LoongArch machine instructions for20// SelectionDAG operations.21namespace llvm {22class LoongArchDAGToDAGISel : public SelectionDAGISel {23const LoongArchSubtarget *Subtarget = nullptr;2425public:26LoongArchDAGToDAGISel() = delete;2728explicit LoongArchDAGToDAGISel(LoongArchTargetMachine &TM)29: SelectionDAGISel(TM) {}3031bool runOnMachineFunction(MachineFunction &MF) override {32Subtarget = &MF.getSubtarget<LoongArchSubtarget>();33return SelectionDAGISel::runOnMachineFunction(MF);34}3536void Select(SDNode *Node) override;3738bool SelectInlineAsmMemoryOperand(const SDValue &Op,39InlineAsm::ConstraintCode ConstraintID,40std::vector<SDValue> &OutOps) override;4142bool SelectBaseAddr(SDValue Addr, SDValue &Base);43bool SelectAddrConstant(SDValue Addr, SDValue &Base, SDValue &Offset);44bool selectNonFIBaseAddr(SDValue Addr, SDValue &Base);4546bool selectShiftMask(SDValue N, unsigned ShiftWidth, SDValue &ShAmt);47bool selectShiftMaskGRLen(SDValue N, SDValue &ShAmt) {48return selectShiftMask(N, Subtarget->getGRLen(), ShAmt);49}50bool selectShiftMask32(SDValue N, SDValue &ShAmt) {51return selectShiftMask(N, 32, ShAmt);52}5354bool selectSExti32(SDValue N, SDValue &Val);55bool selectZExti32(SDValue N, SDValue &Val);5657bool selectVSplat(SDNode *N, APInt &Imm, unsigned MinSizeInBits) const;5859template <unsigned ImmSize, bool IsSigned = false>60bool selectVSplatImm(SDValue N, SDValue &SplatVal);6162bool selectVSplatUimmInvPow2(SDValue N, SDValue &SplatImm) const;63bool selectVSplatUimmPow2(SDValue N, SDValue &SplatImm) const;6465// Include the pieces autogenerated from the target description.66#include "LoongArchGenDAGISel.inc"67};6869class LoongArchDAGToDAGISelLegacy : public SelectionDAGISelLegacy {70public:71static char ID;72explicit LoongArchDAGToDAGISelLegacy(LoongArchTargetMachine &TM);73};7475} // end namespace llvm7677#endif // LLVM_LIB_TARGET_LOONGARCH_LOONGARCHISELDAGTODAG_H787980