Path: blob/main/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/MipsABIFlagsSection.h
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//===- MipsABIFlagsSection.h - Mips ELF ABI Flags Section -------*- C++ -*-===//1//2// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.3// See https://llvm.org/LICENSE.txt for license information.4// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception5//6//===----------------------------------------------------------------------===//78#ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSABIFLAGSSECTION_H9#define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSABIFLAGSSECTION_H1011#include "llvm/Support/ErrorHandling.h"12#include "llvm/Support/MipsABIFlags.h"13#include <cstdint>1415namespace llvm {1617class MCStreamer;18class StringRef;1920struct MipsABIFlagsSection {21// Internal representation of the fp_abi related values used in .module.22enum class FpABIKind { ANY, XX, S32, S64, SOFT };2324// Version of flags structure.25uint16_t Version = 0;26// The level of the ISA: 1-5, 32, 64.27uint8_t ISALevel = 0;28// The revision of ISA: 0 for MIPS V and below, 1-n otherwise.29uint8_t ISARevision = 0;30// The size of general purpose registers.31Mips::AFL_REG GPRSize = Mips::AFL_REG_NONE;32// The size of co-processor 1 registers.33Mips::AFL_REG CPR1Size = Mips::AFL_REG_NONE;34// The size of co-processor 2 registers.35Mips::AFL_REG CPR2Size = Mips::AFL_REG_NONE;36// Processor-specific extension.37Mips::AFL_EXT ISAExtension = Mips::AFL_EXT_NONE;38// Mask of ASEs used.39uint32_t ASESet = 0;4041bool OddSPReg = false;4243bool Is32BitABI = false;4445protected:46// The floating-point ABI.47FpABIKind FpABI = FpABIKind::ANY;4849public:50MipsABIFlagsSection() = default;5152uint16_t getVersionValue() { return (uint16_t)Version; }53uint8_t getISALevelValue() { return (uint8_t)ISALevel; }54uint8_t getISARevisionValue() { return (uint8_t)ISARevision; }55uint8_t getGPRSizeValue() { return (uint8_t)GPRSize; }56uint8_t getCPR1SizeValue();57uint8_t getCPR2SizeValue() { return (uint8_t)CPR2Size; }58uint8_t getFpABIValue();59uint32_t getISAExtensionValue() { return (uint32_t)ISAExtension; }60uint32_t getASESetValue() { return (uint32_t)ASESet; }6162uint32_t getFlags1Value() {63uint32_t Value = 0;6465if (OddSPReg)66Value |= (uint32_t)Mips::AFL_FLAGS1_ODDSPREG;6768return Value;69}7071uint32_t getFlags2Value() { return 0; }7273FpABIKind getFpABI() { return FpABI; }74void setFpABI(FpABIKind Value, bool IsABI32Bit) {75FpABI = Value;76Is32BitABI = IsABI32Bit;77}7879StringRef getFpABIString(FpABIKind Value);8081template <class PredicateLibrary>82void setISALevelAndRevisionFromPredicates(const PredicateLibrary &P) {83if (P.hasMips64()) {84ISALevel = 64;85if (P.hasMips64r6())86ISARevision = 6;87else if (P.hasMips64r5())88ISARevision = 5;89else if (P.hasMips64r3())90ISARevision = 3;91else if (P.hasMips64r2())92ISARevision = 2;93else94ISARevision = 1;95} else if (P.hasMips32()) {96ISALevel = 32;97if (P.hasMips32r6())98ISARevision = 6;99else if (P.hasMips32r5())100ISARevision = 5;101else if (P.hasMips32r3())102ISARevision = 3;103else if (P.hasMips32r2())104ISARevision = 2;105else106ISARevision = 1;107} else {108ISARevision = 0;109if (P.hasMips5())110ISALevel = 5;111else if (P.hasMips4())112ISALevel = 4;113else if (P.hasMips3())114ISALevel = 3;115else if (P.hasMips2())116ISALevel = 2;117else if (P.hasMips1())118ISALevel = 1;119else120llvm_unreachable("Unknown ISA level!");121}122}123124template <class PredicateLibrary>125void setGPRSizeFromPredicates(const PredicateLibrary &P) {126GPRSize = P.isGP64bit() ? Mips::AFL_REG_64 : Mips::AFL_REG_32;127}128129template <class PredicateLibrary>130void setCPR1SizeFromPredicates(const PredicateLibrary &P) {131if (P.useSoftFloat())132CPR1Size = Mips::AFL_REG_NONE;133else if (P.hasMSA())134CPR1Size = Mips::AFL_REG_128;135else136CPR1Size = P.isFP64bit() ? Mips::AFL_REG_64 : Mips::AFL_REG_32;137}138139template <class PredicateLibrary>140void setISAExtensionFromPredicates(const PredicateLibrary &P) {141if (P.hasCnMipsP())142ISAExtension = Mips::AFL_EXT_OCTEONP;143else if (P.hasCnMips())144ISAExtension = Mips::AFL_EXT_OCTEON;145else146ISAExtension = Mips::AFL_EXT_NONE;147}148149template <class PredicateLibrary>150void setASESetFromPredicates(const PredicateLibrary &P) {151ASESet = 0;152if (P.hasDSP())153ASESet |= Mips::AFL_ASE_DSP;154if (P.hasDSPR2())155ASESet |= Mips::AFL_ASE_DSPR2;156if (P.hasMSA())157ASESet |= Mips::AFL_ASE_MSA;158if (P.inMicroMipsMode())159ASESet |= Mips::AFL_ASE_MICROMIPS;160if (P.inMips16Mode())161ASESet |= Mips::AFL_ASE_MIPS16;162if (P.hasMT())163ASESet |= Mips::AFL_ASE_MT;164if (P.hasCRC())165ASESet |= Mips::AFL_ASE_CRC;166if (P.hasVirt())167ASESet |= Mips::AFL_ASE_VIRT;168if (P.hasGINV())169ASESet |= Mips::AFL_ASE_GINV;170}171172template <class PredicateLibrary>173void setFpAbiFromPredicates(const PredicateLibrary &P) {174Is32BitABI = P.isABI_O32();175176FpABI = FpABIKind::ANY;177if (P.useSoftFloat())178FpABI = FpABIKind::SOFT;179else if (P.isABI_N32() || P.isABI_N64())180FpABI = FpABIKind::S64;181else if (P.isABI_O32()) {182if (P.isABI_FPXX())183FpABI = FpABIKind::XX;184else if (P.isFP64bit())185FpABI = FpABIKind::S64;186else187FpABI = FpABIKind::S32;188}189}190191template <class PredicateLibrary>192void setAllFromPredicates(const PredicateLibrary &P) {193setISALevelAndRevisionFromPredicates(P);194setGPRSizeFromPredicates(P);195setCPR1SizeFromPredicates(P);196setISAExtensionFromPredicates(P);197setASESetFromPredicates(P);198setFpAbiFromPredicates(P);199OddSPReg = P.useOddSPReg();200}201};202203MCStreamer &operator<<(MCStreamer &OS, MipsABIFlagsSection &ABIFlagsSection);204205} // end namespace llvm206207#endif // LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSABIFLAGSSECTION_H208209210