Path: blob/main/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.h
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//===-- PPCMCCodeEmitter.h - Convert PPC code to machine code -------------===//1//2// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.3// See https://llvm.org/LICENSE.txt for license information.4// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception5//6//===----------------------------------------------------------------------===//7//8// This file implements the PPCMCCodeEmitter class.9//10//===----------------------------------------------------------------------===//1112#ifndef LLVM_LIB_TARGET_PPC_MCCODEEMITTER_PPCCODEEMITTER_H13#define LLVM_LIB_TARGET_PPC_MCCODEEMITTER_PPCCODEEMITTER_H1415#include "llvm/MC/MCAsmInfo.h"16#include "llvm/MC/MCCodeEmitter.h"17#include "llvm/MC/MCSubtargetInfo.h"18#include "llvm/MC/MCInstrInfo.h"19#include "llvm/MC/MCContext.h"20#include "llvm/MC/MCInst.h"2122namespace llvm {2324class PPCMCCodeEmitter : public MCCodeEmitter {25const MCInstrInfo &MCII;26const MCContext &CTX;27bool IsLittleEndian;2829public:30PPCMCCodeEmitter(const MCInstrInfo &mcii, MCContext &ctx)31: MCII(mcii), CTX(ctx),32IsLittleEndian(ctx.getAsmInfo()->isLittleEndian()) {}33PPCMCCodeEmitter(const PPCMCCodeEmitter &) = delete;34void operator=(const PPCMCCodeEmitter &) = delete;35~PPCMCCodeEmitter() override = default;3637unsigned getDirectBrEncoding(const MCInst &MI, unsigned OpNo,38SmallVectorImpl<MCFixup> &Fixups,39const MCSubtargetInfo &STI) const;40unsigned getCondBrEncoding(const MCInst &MI, unsigned OpNo,41SmallVectorImpl<MCFixup> &Fixups,42const MCSubtargetInfo &STI) const;43unsigned getAbsDirectBrEncoding(const MCInst &MI, unsigned OpNo,44SmallVectorImpl<MCFixup> &Fixups,45const MCSubtargetInfo &STI) const;46unsigned getAbsCondBrEncoding(const MCInst &MI, unsigned OpNo,47SmallVectorImpl<MCFixup> &Fixups,48const MCSubtargetInfo &STI) const;49unsigned getImm16Encoding(const MCInst &MI, unsigned OpNo,50SmallVectorImpl<MCFixup> &Fixups,51const MCSubtargetInfo &STI) const;52uint64_t getImm34Encoding(const MCInst &MI, unsigned OpNo,53SmallVectorImpl<MCFixup> &Fixups,54const MCSubtargetInfo &STI,55MCFixupKind Fixup) const;56uint64_t getImm34EncodingNoPCRel(const MCInst &MI, unsigned OpNo,57SmallVectorImpl<MCFixup> &Fixups,58const MCSubtargetInfo &STI) const;59uint64_t getImm34EncodingPCRel(const MCInst &MI, unsigned OpNo,60SmallVectorImpl<MCFixup> &Fixups,61const MCSubtargetInfo &STI) const;62unsigned getDispRIEncoding(const MCInst &MI, unsigned OpNo,63SmallVectorImpl<MCFixup> &Fixups,64const MCSubtargetInfo &STI) const;65unsigned getDispRIXEncoding(const MCInst &MI, unsigned OpNo,66SmallVectorImpl<MCFixup> &Fixups,67const MCSubtargetInfo &STI) const;68unsigned getDispRIX16Encoding(const MCInst &MI, unsigned OpNo,69SmallVectorImpl<MCFixup> &Fixups,70const MCSubtargetInfo &STI) const;71unsigned getDispRIHashEncoding(const MCInst &MI, unsigned OpNo,72SmallVectorImpl<MCFixup> &Fixups,73const MCSubtargetInfo &STI) const;74uint64_t getDispRI34PCRelEncoding(const MCInst &MI, unsigned OpNo,75SmallVectorImpl<MCFixup> &Fixups,76const MCSubtargetInfo &STI) const;77uint64_t getDispRI34Encoding(const MCInst &MI, unsigned OpNo,78SmallVectorImpl<MCFixup> &Fixups,79const MCSubtargetInfo &STI) const;80unsigned getDispSPE8Encoding(const MCInst &MI, unsigned OpNo,81SmallVectorImpl<MCFixup> &Fixups,82const MCSubtargetInfo &STI) const;83unsigned getDispSPE4Encoding(const MCInst &MI, unsigned OpNo,84SmallVectorImpl<MCFixup> &Fixups,85const MCSubtargetInfo &STI) const;86unsigned getDispSPE2Encoding(const MCInst &MI, unsigned OpNo,87SmallVectorImpl<MCFixup> &Fixups,88const MCSubtargetInfo &STI) const;89unsigned getTLSRegEncoding(const MCInst &MI, unsigned OpNo,90SmallVectorImpl<MCFixup> &Fixups,91const MCSubtargetInfo &STI) const;92unsigned getTLSCallEncoding(const MCInst &MI, unsigned OpNo,93SmallVectorImpl<MCFixup> &Fixups,94const MCSubtargetInfo &STI) const;95unsigned get_crbitm_encoding(const MCInst &MI, unsigned OpNo,96SmallVectorImpl<MCFixup> &Fixups,97const MCSubtargetInfo &STI) const;98unsigned getVSRpEvenEncoding(const MCInst &MI, unsigned OpNo,99SmallVectorImpl<MCFixup> &Fixups,100const MCSubtargetInfo &STI) const;101102/// getMachineOpValue - Return binary encoding of operand. If the machine103/// operand requires relocation, record the relocation and return zero.104uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,105SmallVectorImpl<MCFixup> &Fixups,106const MCSubtargetInfo &STI) const;107108// getBinaryCodeForInstr - TableGen'erated function for getting the109// binary encoding for an instruction.110uint64_t getBinaryCodeForInstr(const MCInst &MI,111SmallVectorImpl<MCFixup> &Fixups,112const MCSubtargetInfo &STI) const;113114void encodeInstruction(const MCInst &MI, SmallVectorImpl<char> &CB,115SmallVectorImpl<MCFixup> &Fixups,116const MCSubtargetInfo &STI) const override;117118// Get the number of bytes used to encode the given MCInst.119unsigned getInstSizeInBytes(const MCInst &MI) const;120121// Is this instruction a prefixed instruction.122bool isPrefixedInstruction(const MCInst &MI) const;123124/// Check if Opcode corresponds to a call instruction that should be marked125/// with the NOTOC relocation.126bool isNoTOCCallInstr(const MCInst &MI) const;127};128129} // namespace llvm130131#endif // LLVM_LIB_TARGET_PPC_MCCODEEMITTER_PPCCODEEMITTER_H132133134