Path: blob/main/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
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//===-- RISCVInstPrinter.h - Convert RISC-V MCInst to asm syntax --*- C++ -*--//1//2// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.3// See https://llvm.org/LICENSE.txt for license information.4// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception5//6//===----------------------------------------------------------------------===//7//8// This class prints a RISC-V MCInst to a .s file.9//10//===----------------------------------------------------------------------===//1112#ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVINSTPRINTER_H13#define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVINSTPRINTER_H1415#include "MCTargetDesc/RISCVMCTargetDesc.h"16#include "llvm/MC/MCInstPrinter.h"1718namespace llvm {1920class RISCVInstPrinter : public MCInstPrinter {21public:22RISCVInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,23const MCRegisterInfo &MRI)24: MCInstPrinter(MAI, MII, MRI) {}2526bool applyTargetSpecificCLOption(StringRef Opt) override;2728void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,29const MCSubtargetInfo &STI, raw_ostream &O) override;30void printRegName(raw_ostream &O, MCRegister Reg) const override;3132void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,33raw_ostream &O, const char *Modifier = nullptr);34void printBranchOperand(const MCInst *MI, uint64_t Address, unsigned OpNo,35const MCSubtargetInfo &STI, raw_ostream &O);36void printCSRSystemRegister(const MCInst *MI, unsigned OpNo,37const MCSubtargetInfo &STI, raw_ostream &O);38void printFenceArg(const MCInst *MI, unsigned OpNo,39const MCSubtargetInfo &STI, raw_ostream &O);40void printFRMArg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,41raw_ostream &O);42void printFRMArgLegacy(const MCInst *MI, unsigned OpNo,43const MCSubtargetInfo &STI, raw_ostream &O);44void printFPImmOperand(const MCInst *MI, unsigned OpNo,45const MCSubtargetInfo &STI, raw_ostream &O);46void printZeroOffsetMemOp(const MCInst *MI, unsigned OpNo,47const MCSubtargetInfo &STI, raw_ostream &O);48void printVTypeI(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,49raw_ostream &O);50void printVMaskReg(const MCInst *MI, unsigned OpNo,51const MCSubtargetInfo &STI, raw_ostream &O);52void printRlist(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,53raw_ostream &O);54void printStackAdj(const MCInst *MI, unsigned OpNo,55const MCSubtargetInfo &STI, raw_ostream &O,56bool Negate = false);57void printNegStackAdj(const MCInst *MI, unsigned OpNo,58const MCSubtargetInfo &STI, raw_ostream &O) {59return printStackAdj(MI, OpNo, STI, O, /*Negate*/ true);60}61void printRegReg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,62raw_ostream &O);63// Autogenerated by tblgen.64std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;65void printInstruction(const MCInst *MI, uint64_t Address,66const MCSubtargetInfo &STI, raw_ostream &O);67bool printAliasInstr(const MCInst *MI, uint64_t Address,68const MCSubtargetInfo &STI, raw_ostream &O);69void printCustomAliasOperand(const MCInst *MI, uint64_t Address,70unsigned OpIdx, unsigned PrintMethodIdx,71const MCSubtargetInfo &STI, raw_ostream &O);72static const char *getRegisterName(MCRegister Reg);73static const char *getRegisterName(MCRegister Reg, unsigned AltIdx);74};75} // namespace llvm7677#endif787980