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GitHub Repository: freebsd/freebsd-src
Path: blob/main/contrib/llvm-project/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
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//===-- SPIRVGlobalRegistry.h - SPIR-V Global Registry ----------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// SPIRVGlobalRegistry is used to maintain rich type information required for
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// SPIR-V even after lowering from LLVM IR to GMIR. It can convert an llvm::Type
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// into an OpTypeXXX instruction, and map it to a virtual register. Also it
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// builds and supports consistency of constants and global variables.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_SPIRV_SPIRVTYPEMANAGER_H
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#define LLVM_LIB_TARGET_SPIRV_SPIRVTYPEMANAGER_H
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#include "MCTargetDesc/SPIRVBaseInfo.h"
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#include "SPIRVDuplicatesTracker.h"
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#include "SPIRVInstrInfo.h"
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#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
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#include "llvm/IR/Constant.h"
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#include "llvm/IR/TypedPointerType.h"
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namespace llvm {
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class SPIRVSubtarget;
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using SPIRVType = const MachineInstr;
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class SPIRVGlobalRegistry {
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// Registers holding values which have types associated with them.
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// Initialized upon VReg definition in IRTranslator.
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// Do not confuse this with DuplicatesTracker as DT maps Type* to <MF, Reg>
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// where Reg = OpType...
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// while VRegToTypeMap tracks SPIR-V type assigned to other regs (i.e. not
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// type-declaring ones).
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DenseMap<const MachineFunction *, DenseMap<Register, SPIRVType *>>
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VRegToTypeMap;
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// Map LLVM Type* to <MF, Reg>
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SPIRVGeneralDuplicatesTracker DT;
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DenseMap<SPIRVType *, const Type *> SPIRVToLLVMType;
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// map a Function to its definition (as a machine instruction operand)
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DenseMap<const Function *, const MachineOperand *> FunctionToInstr;
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DenseMap<const MachineInstr *, const Function *> FunctionToInstrRev;
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// map function pointer (as a machine instruction operand) to the used
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// Function
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DenseMap<const MachineOperand *, const Function *> InstrToFunction;
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// Maps Functions to their calls (in a form of the machine instruction,
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// OpFunctionCall) that happened before the definition is available
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DenseMap<const Function *, SmallPtrSet<MachineInstr *, 8>> ForwardCalls;
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// map a Function to its original return type before the clone function was
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// created during substitution of aggregate arguments
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// (see `SPIRVPrepareFunctions::removeAggregateTypesFromSignature()`)
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DenseMap<Value *, Type *> MutatedAggRet;
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// Look for an equivalent of the newType in the map. Return the equivalent
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// if it's found, otherwise insert newType to the map and return the type.
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const MachineInstr *checkSpecialInstr(const SPIRV::SpecialTypeDescriptor &TD,
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MachineIRBuilder &MIRBuilder);
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SmallPtrSet<const Type *, 4> TypesInProcessing;
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DenseMap<const Type *, SPIRVType *> ForwardPointerTypes;
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// if a function returns a pointer, this is to map it into TypedPointerType
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DenseMap<const Function *, TypedPointerType *> FunResPointerTypes;
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// Number of bits pointers and size_t integers require.
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const unsigned PointerSize;
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// Holds the maximum ID we have in the module.
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unsigned Bound;
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// Maps values associated with untyped pointers into deduced element types of
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// untyped pointers.
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DenseMap<Value *, Type *> DeducedElTys;
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// Maps composite values to deduced types where untyped pointers are replaced
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// with typed ones.
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DenseMap<Value *, Type *> DeducedNestedTys;
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// Maps values to "assign type" calls, thus being a registry of created
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// Intrinsic::spv_assign_ptr_type instructions.
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DenseMap<Value *, CallInst *> AssignPtrTypeInstr;
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// Add a new OpTypeXXX instruction without checking for duplicates.
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SPIRVType *createSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder,
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SPIRV::AccessQualifier::AccessQualifier AQ =
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SPIRV::AccessQualifier::ReadWrite,
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bool EmitIR = true);
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SPIRVType *findSPIRVType(const Type *Ty, MachineIRBuilder &MIRBuilder,
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SPIRV::AccessQualifier::AccessQualifier accessQual =
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SPIRV::AccessQualifier::ReadWrite,
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bool EmitIR = true);
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SPIRVType *
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restOfCreateSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder,
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SPIRV::AccessQualifier::AccessQualifier AccessQual,
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bool EmitIR);
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public:
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SPIRVGlobalRegistry(unsigned PointerSize);
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MachineFunction *CurMF;
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void add(const Constant *C, MachineFunction *MF, Register R) {
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DT.add(C, MF, R);
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}
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void add(const GlobalVariable *GV, MachineFunction *MF, Register R) {
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DT.add(GV, MF, R);
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}
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void add(const Function *F, MachineFunction *MF, Register R) {
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DT.add(F, MF, R);
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}
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void add(const Argument *Arg, MachineFunction *MF, Register R) {
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DT.add(Arg, MF, R);
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}
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void add(const MachineInstr *MI, MachineFunction *MF, Register R) {
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DT.add(MI, MF, R);
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}
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Register find(const MachineInstr *MI, MachineFunction *MF) {
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return DT.find(MI, MF);
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}
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Register find(const Constant *C, MachineFunction *MF) {
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return DT.find(C, MF);
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}
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Register find(const GlobalVariable *GV, MachineFunction *MF) {
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return DT.find(GV, MF);
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}
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Register find(const Function *F, MachineFunction *MF) {
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return DT.find(F, MF);
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}
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void buildDepsGraph(std::vector<SPIRV::DTSortableEntry *> &Graph,
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MachineModuleInfo *MMI = nullptr) {
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DT.buildDepsGraph(Graph, MMI);
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}
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void setBound(unsigned V) { Bound = V; }
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unsigned getBound() { return Bound; }
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// Add a record to the map of function return pointer types.
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void addReturnType(const Function *ArgF, TypedPointerType *DerivedTy) {
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FunResPointerTypes[ArgF] = DerivedTy;
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}
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// Find a record in the map of function return pointer types.
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const TypedPointerType *findReturnType(const Function *ArgF) {
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auto It = FunResPointerTypes.find(ArgF);
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return It == FunResPointerTypes.end() ? nullptr : It->second;
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}
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// A registry of "assign type" records:
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// - Add a record.
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void addAssignPtrTypeInstr(Value *Val, CallInst *AssignPtrTyCI) {
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AssignPtrTypeInstr[Val] = AssignPtrTyCI;
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}
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// - Find a record.
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CallInst *findAssignPtrTypeInstr(const Value *Val) {
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auto It = AssignPtrTypeInstr.find(Val);
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return It == AssignPtrTypeInstr.end() ? nullptr : It->second;
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}
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// A registry of mutated values
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// (see `SPIRVPrepareFunctions::removeAggregateTypesFromSignature()`):
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// - Add a record.
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void addMutated(Value *Val, Type *Ty) { MutatedAggRet[Val] = Ty; }
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// - Find a record.
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Type *findMutated(const Value *Val) {
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auto It = MutatedAggRet.find(Val);
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return It == MutatedAggRet.end() ? nullptr : It->second;
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}
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// Deduced element types of untyped pointers and composites:
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// - Add a record to the map of deduced element types.
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void addDeducedElementType(Value *Val, Type *Ty) { DeducedElTys[Val] = Ty; }
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// - Find a record in the map of deduced element types.
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Type *findDeducedElementType(const Value *Val) {
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auto It = DeducedElTys.find(Val);
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return It == DeducedElTys.end() ? nullptr : It->second;
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}
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// - Add a record to the map of deduced composite types.
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void addDeducedCompositeType(Value *Val, Type *Ty) {
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DeducedNestedTys[Val] = Ty;
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}
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// - Find a record in the map of deduced composite types.
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Type *findDeducedCompositeType(const Value *Val) {
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auto It = DeducedNestedTys.find(Val);
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return It == DeducedNestedTys.end() ? nullptr : It->second;
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}
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// - Find a type of the given Global value
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Type *getDeducedGlobalValueType(const GlobalValue *Global) {
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// we may know element type if it was deduced earlier
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Type *ElementTy = findDeducedElementType(Global);
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if (!ElementTy) {
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// or we may know element type if it's associated with a composite
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// value
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if (Value *GlobalElem =
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Global->getNumOperands() > 0 ? Global->getOperand(0) : nullptr)
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ElementTy = findDeducedCompositeType(GlobalElem);
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}
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return ElementTy ? ElementTy : Global->getValueType();
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}
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// Map a machine operand that represents a use of a function via function
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// pointer to a machine operand that represents the function definition.
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// Return either the register or invalid value, because we have no context for
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// a good diagnostic message in case of unexpectedly missing references.
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const MachineOperand *getFunctionDefinitionByUse(const MachineOperand *Use) {
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auto ResF = InstrToFunction.find(Use);
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if (ResF == InstrToFunction.end())
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return nullptr;
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auto ResReg = FunctionToInstr.find(ResF->second);
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return ResReg == FunctionToInstr.end() ? nullptr : ResReg->second;
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}
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// Map a Function to a machine instruction that represents the function
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// definition.
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const MachineInstr *getFunctionDefinition(const Function *F) {
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if (!F)
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return nullptr;
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auto MOIt = FunctionToInstr.find(F);
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return MOIt == FunctionToInstr.end() ? nullptr : MOIt->second->getParent();
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}
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// Map a Function to a machine instruction that represents the function
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// definition.
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const Function *getFunctionByDefinition(const MachineInstr *MI) {
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if (!MI)
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return nullptr;
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auto FIt = FunctionToInstrRev.find(MI);
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return FIt == FunctionToInstrRev.end() ? nullptr : FIt->second;
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}
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// map function pointer (as a machine instruction operand) to the used
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// Function
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void recordFunctionPointer(const MachineOperand *MO, const Function *F) {
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InstrToFunction[MO] = F;
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}
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// map a Function to its definition (as a machine instruction)
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void recordFunctionDefinition(const Function *F, const MachineOperand *MO) {
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FunctionToInstr[F] = MO;
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FunctionToInstrRev[MO->getParent()] = F;
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}
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// Return true if any OpConstantFunctionPointerINTEL were generated
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bool hasConstFunPtr() { return !InstrToFunction.empty(); }
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// Add a record about forward function call.
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void addForwardCall(const Function *F, MachineInstr *MI) {
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auto It = ForwardCalls.find(F);
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if (It == ForwardCalls.end())
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ForwardCalls[F] = {MI};
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else
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It->second.insert(MI);
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}
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// Map a Function to the vector of machine instructions that represents
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// forward function calls or to nullptr if not found.
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SmallPtrSet<MachineInstr *, 8> *getForwardCalls(const Function *F) {
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auto It = ForwardCalls.find(F);
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return It == ForwardCalls.end() ? nullptr : &It->second;
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}
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// Get or create a SPIR-V type corresponding the given LLVM IR type,
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// and map it to the given VReg by creating an ASSIGN_TYPE instruction.
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SPIRVType *assignTypeToVReg(const Type *Type, Register VReg,
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MachineIRBuilder &MIRBuilder,
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SPIRV::AccessQualifier::AccessQualifier AQ =
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SPIRV::AccessQualifier::ReadWrite,
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bool EmitIR = true);
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SPIRVType *assignIntTypeToVReg(unsigned BitWidth, Register VReg,
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MachineInstr &I, const SPIRVInstrInfo &TII);
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SPIRVType *assignFloatTypeToVReg(unsigned BitWidth, Register VReg,
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MachineInstr &I, const SPIRVInstrInfo &TII);
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SPIRVType *assignVectTypeToVReg(SPIRVType *BaseType, unsigned NumElements,
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Register VReg, MachineInstr &I,
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const SPIRVInstrInfo &TII);
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// In cases where the SPIR-V type is already known, this function can be
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// used to map it to the given VReg via an ASSIGN_TYPE instruction.
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void assignSPIRVTypeToVReg(SPIRVType *Type, Register VReg,
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MachineFunction &MF);
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// Either generate a new OpTypeXXX instruction or return an existing one
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// corresponding to the given LLVM IR type.
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// EmitIR controls if we emit GMIR or SPV constants (e.g. for array sizes)
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// because this method may be called from InstructionSelector and we don't
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// want to emit extra IR instructions there.
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SPIRVType *getOrCreateSPIRVType(const Type *Type,
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MachineIRBuilder &MIRBuilder,
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SPIRV::AccessQualifier::AccessQualifier AQ =
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SPIRV::AccessQualifier::ReadWrite,
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bool EmitIR = true);
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const Type *getTypeForSPIRVType(const SPIRVType *Ty) const {
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auto Res = SPIRVToLLVMType.find(Ty);
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assert(Res != SPIRVToLLVMType.end());
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return Res->second;
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}
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// Return a pointee's type, or nullptr otherwise.
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SPIRVType *getPointeeType(SPIRVType *PtrType);
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// Return a pointee's type op code, or 0 otherwise.
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unsigned getPointeeTypeOp(Register PtrReg);
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// Either generate a new OpTypeXXX instruction or return an existing one
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// corresponding to the given string containing the name of the builtin type.
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// Return nullptr if unable to recognize SPIRV type name from `TypeStr`.
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SPIRVType *getOrCreateSPIRVTypeByName(
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StringRef TypeStr, MachineIRBuilder &MIRBuilder,
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SPIRV::StorageClass::StorageClass SC = SPIRV::StorageClass::Function,
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SPIRV::AccessQualifier::AccessQualifier AQ =
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SPIRV::AccessQualifier::ReadWrite);
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// Return the SPIR-V type instruction corresponding to the given VReg, or
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// nullptr if no such type instruction exists. The second argument MF
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// allows to search for the association in a context of the machine functions
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// than the current one, without switching between different "current" machine
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// functions.
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SPIRVType *getSPIRVTypeForVReg(Register VReg,
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const MachineFunction *MF = nullptr) const;
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// Whether the given VReg has a SPIR-V type mapped to it yet.
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bool hasSPIRVTypeForVReg(Register VReg) const {
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return getSPIRVTypeForVReg(VReg) != nullptr;
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}
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// Return the VReg holding the result of the given OpTypeXXX instruction.
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Register getSPIRVTypeID(const SPIRVType *SpirvType) const;
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// Return previous value of the current machine function
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MachineFunction *setCurrentFunc(MachineFunction &MF) {
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MachineFunction *Ret = CurMF;
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CurMF = &MF;
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return Ret;
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}
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// Return true if the type is an aggregate type.
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bool isAggregateType(SPIRVType *Type) const {
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return Type && (Type->getOpcode() == SPIRV::OpTypeStruct &&
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Type->getOpcode() == SPIRV::OpTypeArray);
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}
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// Whether the given VReg has an OpTypeXXX instruction mapped to it with the
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// given opcode (e.g. OpTypeFloat).
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bool isScalarOfType(Register VReg, unsigned TypeOpcode) const;
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// Return true if the given VReg's assigned SPIR-V type is either a scalar
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// matching the given opcode, or a vector with an element type matching that
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// opcode (e.g. OpTypeBool, or OpTypeVector %x 4, where %x is OpTypeBool).
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bool isScalarOrVectorOfType(Register VReg, unsigned TypeOpcode) const;
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// Return number of elements in a vector if the argument is associated with
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// a vector type. Return 1 for a scalar type, and 0 for a missing type.
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unsigned getScalarOrVectorComponentCount(Register VReg) const;
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unsigned getScalarOrVectorComponentCount(SPIRVType *Type) const;
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// For vectors or scalars of booleans, integers and floats, return the scalar
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// type's bitwidth. Otherwise calls llvm_unreachable().
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unsigned getScalarOrVectorBitWidth(const SPIRVType *Type) const;
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// For vectors or scalars of integers and floats, return total bitwidth of the
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// argument. Otherwise returns 0.
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unsigned getNumScalarOrVectorTotalBitWidth(const SPIRVType *Type) const;
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// Returns either pointer to integer type, that may be a type of vector
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// elements or an original type, or nullptr if the argument is niether
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// an integer scalar, nor an integer vector
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const SPIRVType *retrieveScalarOrVectorIntType(const SPIRVType *Type) const;
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// For integer vectors or scalars, return whether the integers are signed.
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bool isScalarOrVectorSigned(const SPIRVType *Type) const;
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// Gets the storage class of the pointer type assigned to this vreg.
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SPIRV::StorageClass::StorageClass getPointerStorageClass(Register VReg) const;
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// Return the number of bits SPIR-V pointers and size_t variables require.
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unsigned getPointerSize() const { return PointerSize; }
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// Returns true if two types are defined and are compatible in a sense of
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// OpBitcast instruction
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bool isBitcastCompatible(const SPIRVType *Type1,
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const SPIRVType *Type2) const;
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private:
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SPIRVType *getOpTypeBool(MachineIRBuilder &MIRBuilder);
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const Type *adjustIntTypeByWidth(const Type *Ty) const;
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unsigned adjustOpTypeIntWidth(unsigned Width) const;
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SPIRVType *getOpTypeInt(unsigned Width, MachineIRBuilder &MIRBuilder,
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bool IsSigned = false);
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SPIRVType *getOpTypeFloat(uint32_t Width, MachineIRBuilder &MIRBuilder);
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SPIRVType *getOpTypeVoid(MachineIRBuilder &MIRBuilder);
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SPIRVType *getOpTypeVector(uint32_t NumElems, SPIRVType *ElemType,
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MachineIRBuilder &MIRBuilder);
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SPIRVType *getOpTypeArray(uint32_t NumElems, SPIRVType *ElemType,
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MachineIRBuilder &MIRBuilder, bool EmitIR = true);
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SPIRVType *getOpTypeOpaque(const StructType *Ty,
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MachineIRBuilder &MIRBuilder);
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SPIRVType *getOpTypeStruct(const StructType *Ty, MachineIRBuilder &MIRBuilder,
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bool EmitIR = true);
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SPIRVType *getOpTypePointer(SPIRV::StorageClass::StorageClass SC,
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SPIRVType *ElemType, MachineIRBuilder &MIRBuilder,
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Register Reg);
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SPIRVType *getOpTypeForwardPointer(SPIRV::StorageClass::StorageClass SC,
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MachineIRBuilder &MIRBuilder);
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SPIRVType *getOpTypeFunction(SPIRVType *RetType,
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const SmallVectorImpl<SPIRVType *> &ArgTypes,
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MachineIRBuilder &MIRBuilder);
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SPIRVType *
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getOrCreateSpecialType(const Type *Ty, MachineIRBuilder &MIRBuilder,
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SPIRV::AccessQualifier::AccessQualifier AccQual);
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std::tuple<Register, ConstantInt *, bool> getOrCreateConstIntReg(
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uint64_t Val, SPIRVType *SpvType, MachineIRBuilder *MIRBuilder,
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MachineInstr *I = nullptr, const SPIRVInstrInfo *TII = nullptr);
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std::tuple<Register, ConstantFP *, bool, unsigned> getOrCreateConstFloatReg(
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APFloat Val, SPIRVType *SpvType, MachineIRBuilder *MIRBuilder,
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MachineInstr *I = nullptr, const SPIRVInstrInfo *TII = nullptr);
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SPIRVType *finishCreatingSPIRVType(const Type *LLVMTy, SPIRVType *SpirvType);
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Register getOrCreateBaseRegister(Constant *Val, MachineInstr &I,
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SPIRVType *SpvType,
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const SPIRVInstrInfo &TII,
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unsigned BitWidth);
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Register getOrCreateCompositeOrNull(Constant *Val, MachineInstr &I,
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SPIRVType *SpvType,
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const SPIRVInstrInfo &TII, Constant *CA,
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unsigned BitWidth, unsigned ElemCnt,
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bool ZeroAsNull = true);
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Register getOrCreateIntCompositeOrNull(uint64_t Val,
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MachineIRBuilder &MIRBuilder,
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SPIRVType *SpvType, bool EmitIR,
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Constant *CA, unsigned BitWidth,
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unsigned ElemCnt);
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public:
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Register buildConstantInt(uint64_t Val, MachineIRBuilder &MIRBuilder,
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SPIRVType *SpvType = nullptr, bool EmitIR = true);
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Register getOrCreateConstInt(uint64_t Val, MachineInstr &I,
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SPIRVType *SpvType, const SPIRVInstrInfo &TII,
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bool ZeroAsNull = true);
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Register getOrCreateConstFP(APFloat Val, MachineInstr &I, SPIRVType *SpvType,
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const SPIRVInstrInfo &TII,
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bool ZeroAsNull = true);
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Register buildConstantFP(APFloat Val, MachineIRBuilder &MIRBuilder,
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SPIRVType *SpvType = nullptr);
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Register getOrCreateConstVector(uint64_t Val, MachineInstr &I,
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SPIRVType *SpvType, const SPIRVInstrInfo &TII,
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bool ZeroAsNull = true);
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Register getOrCreateConstVector(APFloat Val, MachineInstr &I,
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SPIRVType *SpvType, const SPIRVInstrInfo &TII,
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bool ZeroAsNull = true);
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Register getOrCreateConstIntArray(uint64_t Val, size_t Num, MachineInstr &I,
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SPIRVType *SpvType,
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const SPIRVInstrInfo &TII);
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Register getOrCreateConsIntVector(uint64_t Val, MachineIRBuilder &MIRBuilder,
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SPIRVType *SpvType, bool EmitIR = true);
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Register getOrCreateConstNullPtr(MachineIRBuilder &MIRBuilder,
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SPIRVType *SpvType);
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Register buildConstantSampler(Register Res, unsigned AddrMode, unsigned Param,
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unsigned FilerMode,
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MachineIRBuilder &MIRBuilder,
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SPIRVType *SpvType);
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Register getOrCreateUndef(MachineInstr &I, SPIRVType *SpvType,
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const SPIRVInstrInfo &TII);
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Register buildGlobalVariable(Register Reg, SPIRVType *BaseType,
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StringRef Name, const GlobalValue *GV,
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SPIRV::StorageClass::StorageClass Storage,
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const MachineInstr *Init, bool IsConst,
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bool HasLinkageTy,
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SPIRV::LinkageType::LinkageType LinkageType,
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MachineIRBuilder &MIRBuilder,
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bool IsInstSelector);
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// Convenient helpers for getting types with check for duplicates.
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SPIRVType *getOrCreateSPIRVIntegerType(unsigned BitWidth,
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MachineIRBuilder &MIRBuilder);
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SPIRVType *getOrCreateSPIRVIntegerType(unsigned BitWidth, MachineInstr &I,
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const SPIRVInstrInfo &TII);
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SPIRVType *getOrCreateSPIRVType(unsigned BitWidth, MachineInstr &I,
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const SPIRVInstrInfo &TII,
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unsigned SPIRVOPcode, Type *LLVMTy);
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SPIRVType *getOrCreateSPIRVFloatType(unsigned BitWidth, MachineInstr &I,
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const SPIRVInstrInfo &TII);
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SPIRVType *getOrCreateSPIRVBoolType(MachineIRBuilder &MIRBuilder);
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SPIRVType *getOrCreateSPIRVBoolType(MachineInstr &I,
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const SPIRVInstrInfo &TII);
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SPIRVType *getOrCreateSPIRVVectorType(SPIRVType *BaseType,
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unsigned NumElements,
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MachineIRBuilder &MIRBuilder);
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SPIRVType *getOrCreateSPIRVVectorType(SPIRVType *BaseType,
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unsigned NumElements, MachineInstr &I,
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const SPIRVInstrInfo &TII);
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SPIRVType *getOrCreateSPIRVArrayType(SPIRVType *BaseType,
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unsigned NumElements, MachineInstr &I,
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const SPIRVInstrInfo &TII);
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SPIRVType *getOrCreateSPIRVPointerType(
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SPIRVType *BaseType, MachineIRBuilder &MIRBuilder,
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SPIRV::StorageClass::StorageClass SClass = SPIRV::StorageClass::Function);
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SPIRVType *getOrCreateSPIRVPointerType(
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SPIRVType *BaseType, MachineInstr &I, const SPIRVInstrInfo &TII,
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SPIRV::StorageClass::StorageClass SClass = SPIRV::StorageClass::Function);
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SPIRVType *
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getOrCreateOpTypeImage(MachineIRBuilder &MIRBuilder, SPIRVType *SampledType,
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SPIRV::Dim::Dim Dim, uint32_t Depth, uint32_t Arrayed,
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uint32_t Multisampled, uint32_t Sampled,
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SPIRV::ImageFormat::ImageFormat ImageFormat,
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SPIRV::AccessQualifier::AccessQualifier AccQual);
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SPIRVType *getOrCreateOpTypeSampler(MachineIRBuilder &MIRBuilder);
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SPIRVType *getOrCreateOpTypeSampledImage(SPIRVType *ImageType,
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MachineIRBuilder &MIRBuilder);
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SPIRVType *getOrCreateOpTypeCoopMatr(MachineIRBuilder &MIRBuilder,
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const TargetExtType *ExtensionType,
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const SPIRVType *ElemType,
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uint32_t Scope, uint32_t Rows,
541
uint32_t Columns, uint32_t Use);
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SPIRVType *
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getOrCreateOpTypePipe(MachineIRBuilder &MIRBuilder,
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SPIRV::AccessQualifier::AccessQualifier AccQual);
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SPIRVType *getOrCreateOpTypeDeviceEvent(MachineIRBuilder &MIRBuilder);
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SPIRVType *getOrCreateOpTypeFunctionWithArgs(
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const Type *Ty, SPIRVType *RetType,
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const SmallVectorImpl<SPIRVType *> &ArgTypes,
549
MachineIRBuilder &MIRBuilder);
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SPIRVType *getOrCreateOpTypeByOpcode(const Type *Ty,
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MachineIRBuilder &MIRBuilder,
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unsigned Opcode);
553
};
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} // end namespace llvm
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#endif // LLLVM_LIB_TARGET_SPIRV_SPIRVTYPEMANAGER_H
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