Path: blob/main/contrib/llvm-project/llvm/lib/Target/SPIRV/SPIRVInstrInfo.h
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//===-- SPIRVInstrInfo.h - SPIR-V Instruction Information -------*- C++ -*-===//1//2// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.3// See https://llvm.org/LICENSE.txt for license information.4// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception5//6//===----------------------------------------------------------------------===//7//8// This file contains the SPIR-V implementation of the TargetInstrInfo class.9//10//===----------------------------------------------------------------------===//1112#ifndef LLVM_LIB_TARGET_SPIRV_SPIRVINSTRINFO_H13#define LLVM_LIB_TARGET_SPIRV_SPIRVINSTRINFO_H1415#include "SPIRVRegisterInfo.h"16#include "llvm/CodeGen/TargetInstrInfo.h"1718#define GET_INSTRINFO_HEADER19#include "SPIRVGenInstrInfo.inc"2021namespace llvm {2223class SPIRVInstrInfo : public SPIRVGenInstrInfo {24const SPIRVRegisterInfo RI;2526public:27SPIRVInstrInfo();2829const SPIRVRegisterInfo &getRegisterInfo() const { return RI; }30bool isHeaderInstr(const MachineInstr &MI) const;31bool isConstantInstr(const MachineInstr &MI) const;32bool isInlineAsmDefInstr(const MachineInstr &MI) const;33bool isTypeDeclInstr(const MachineInstr &MI) const;34bool isDecorationInstr(const MachineInstr &MI) const;35bool canUseFastMathFlags(const MachineInstr &MI) const;36bool canUseNSW(const MachineInstr &MI) const;37bool canUseNUW(const MachineInstr &MI) const;3839bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,40MachineBasicBlock *&FBB,41SmallVectorImpl<MachineOperand> &Cond,42bool AllowModify = false) const override;4344unsigned removeBranch(MachineBasicBlock &MBB,45int *BytesRemoved = nullptr) const override;4647unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,48MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,49const DebugLoc &DL,50int *BytesAdded = nullptr) const override;51void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,52const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg,53bool KillSrc) const override;54bool expandPostRAPseudo(MachineInstr &MI) const override;55};5657namespace SPIRV {58enum AsmComments {59// It is a half type60ASM_PRINTER_WIDTH16 = MachineInstr::TAsmComments61};62} // namespace SPIRV6364} // namespace llvm6566#endif // LLVM_LIB_TARGET_SPIRV_SPIRVINSTRINFO_H676869