Path: blob/main/contrib/llvm-project/llvm/lib/Target/Sparc/Sparc.h
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//===-- Sparc.h - Top-level interface for Sparc representation --*- C++ -*-===//1//2// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.3// See https://llvm.org/LICENSE.txt for license information.4// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception5//6//===----------------------------------------------------------------------===//7//8// This file contains the entry points for global functions defined in the LLVM9// Sparc back-end.10//11//===----------------------------------------------------------------------===//1213#ifndef LLVM_LIB_TARGET_SPARC_SPARC_H14#define LLVM_LIB_TARGET_SPARC_SPARC_H1516#include "MCTargetDesc/SparcMCTargetDesc.h"17#include "llvm/Support/ErrorHandling.h"18#include "llvm/Target/TargetMachine.h"1920namespace llvm {21class AsmPrinter;22class FunctionPass;23class MCInst;24class MachineInstr;25class PassRegistry;26class SparcTargetMachine;2728FunctionPass *createSparcISelDag(SparcTargetMachine &TM);29FunctionPass *createSparcDelaySlotFillerPass();3031void LowerSparcMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,32AsmPrinter &AP);33void initializeSparcDAGToDAGISelLegacyPass(PassRegistry &);34} // namespace llvm3536namespace llvm {37// Enums corresponding to Sparc condition codes, both icc's and fcc's. These38// values must be kept in sync with the ones in the .td file.39namespace SPCC {40enum CondCodes {41ICC_A = 8, // Always42ICC_N = 0, // Never43ICC_NE = 9, // Not Equal44ICC_E = 1, // Equal45ICC_G = 10, // Greater46ICC_LE = 2, // Less or Equal47ICC_GE = 11, // Greater or Equal48ICC_L = 3, // Less49ICC_GU = 12, // Greater Unsigned50ICC_LEU = 4, // Less or Equal Unsigned51ICC_CC = 13, // Carry Clear/Great or Equal Unsigned52ICC_CS = 5, // Carry Set/Less Unsigned53ICC_POS = 14, // Positive54ICC_NEG = 6, // Negative55ICC_VC = 15, // Overflow Clear56ICC_VS = 7, // Overflow Set5758FCC_BEGIN = 16,59FCC_A = 8 + FCC_BEGIN, // Always60FCC_N = 0 + FCC_BEGIN, // Never61FCC_U = 7 + FCC_BEGIN, // Unordered62FCC_G = 6 + FCC_BEGIN, // Greater63FCC_UG = 5 + FCC_BEGIN, // Unordered or Greater64FCC_L = 4 + FCC_BEGIN, // Less65FCC_UL = 3 + FCC_BEGIN, // Unordered or Less66FCC_LG = 2 + FCC_BEGIN, // Less or Greater67FCC_NE = 1 + FCC_BEGIN, // Not Equal68FCC_E = 9 + FCC_BEGIN, // Equal69FCC_UE = 10 + FCC_BEGIN, // Unordered or Equal70FCC_GE = 11 + FCC_BEGIN, // Greater or Equal71FCC_UGE = 12 + FCC_BEGIN, // Unordered or Greater or Equal72FCC_LE = 13 + FCC_BEGIN, // Less or Equal73FCC_ULE = 14 + FCC_BEGIN, // Unordered or Less or Equal74FCC_O = 15 + FCC_BEGIN, // Ordered7576CPCC_BEGIN = 32,77CPCC_A = 8 + CPCC_BEGIN, // Always78CPCC_N = 0 + CPCC_BEGIN, // Never79CPCC_3 = 7 + CPCC_BEGIN,80CPCC_2 = 6 + CPCC_BEGIN,81CPCC_23 = 5 + CPCC_BEGIN,82CPCC_1 = 4 + CPCC_BEGIN,83CPCC_13 = 3 + CPCC_BEGIN,84CPCC_12 = 2 + CPCC_BEGIN,85CPCC_123 = 1 + CPCC_BEGIN,86CPCC_0 = 9 + CPCC_BEGIN,87CPCC_03 = 10 + CPCC_BEGIN,88CPCC_02 = 11 + CPCC_BEGIN,89CPCC_023 = 12 + CPCC_BEGIN,90CPCC_01 = 13 + CPCC_BEGIN,91CPCC_013 = 14 + CPCC_BEGIN,92CPCC_012 = 15 + CPCC_BEGIN,9394REG_BEGIN = 48,95REG_Z = 1 + REG_BEGIN, // Is zero96REG_LEZ = 2 + REG_BEGIN, // Less or equal to zero97REG_LZ = 3 + REG_BEGIN, // Less than zero98REG_NZ = 5 + REG_BEGIN, // Is not zero99REG_GZ = 6 + REG_BEGIN, // Greater than zero100REG_GEZ = 7 + REG_BEGIN // Greater than or equal to zero101};102}103104inline static const char *SPARCCondCodeToString(SPCC::CondCodes CC) {105switch (CC) {106case SPCC::ICC_A: return "a";107case SPCC::ICC_N: return "n";108case SPCC::ICC_NE: return "ne";109case SPCC::ICC_E: return "e";110case SPCC::ICC_G: return "g";111case SPCC::ICC_LE: return "le";112case SPCC::ICC_GE: return "ge";113case SPCC::ICC_L: return "l";114case SPCC::ICC_GU: return "gu";115case SPCC::ICC_LEU: return "leu";116case SPCC::ICC_CC: return "cc";117case SPCC::ICC_CS: return "cs";118case SPCC::ICC_POS: return "pos";119case SPCC::ICC_NEG: return "neg";120case SPCC::ICC_VC: return "vc";121case SPCC::ICC_VS: return "vs";122case SPCC::FCC_A: return "a";123case SPCC::FCC_N: return "n";124case SPCC::FCC_U: return "u";125case SPCC::FCC_G: return "g";126case SPCC::FCC_UG: return "ug";127case SPCC::FCC_L: return "l";128case SPCC::FCC_UL: return "ul";129case SPCC::FCC_LG: return "lg";130case SPCC::FCC_NE: return "ne";131case SPCC::FCC_E: return "e";132case SPCC::FCC_UE: return "ue";133case SPCC::FCC_GE: return "ge";134case SPCC::FCC_UGE: return "uge";135case SPCC::FCC_LE: return "le";136case SPCC::FCC_ULE: return "ule";137case SPCC::FCC_O: return "o";138case SPCC::CPCC_A: return "a";139case SPCC::CPCC_N: return "n";140case SPCC::CPCC_3: return "3";141case SPCC::CPCC_2: return "2";142case SPCC::CPCC_23: return "23";143case SPCC::CPCC_1: return "1";144case SPCC::CPCC_13: return "13";145case SPCC::CPCC_12: return "12";146case SPCC::CPCC_123: return "123";147case SPCC::CPCC_0: return "0";148case SPCC::CPCC_03: return "03";149case SPCC::CPCC_02: return "02";150case SPCC::CPCC_023: return "023";151case SPCC::CPCC_01: return "01";152case SPCC::CPCC_013: return "013";153case SPCC::CPCC_012: return "012";154case SPCC::REG_BEGIN:155llvm_unreachable("Use of reserved cond code");156case SPCC::REG_Z:157return "z";158case SPCC::REG_LEZ:159return "lez";160case SPCC::REG_LZ:161return "lz";162case SPCC::REG_NZ:163return "nz";164case SPCC::REG_GZ:165return "gz";166case SPCC::REG_GEZ:167return "gez";168}169llvm_unreachable("Invalid cond code");170}171172inline static unsigned HI22(int64_t imm) {173return (unsigned)((imm >> 10) & ((1 << 22)-1));174}175176inline static unsigned LO10(int64_t imm) {177return (unsigned)(imm & 0x3FF);178}179180inline static unsigned HIX22(int64_t imm) {181return HI22(~imm);182}183184inline static unsigned LOX10(int64_t imm) {185return ~LO10(~imm);186}187188} // end namespace llvm189#endif190191192