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GitHub Repository: freebsd/freebsd-src
Path: blob/main/contrib/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
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//===-- SystemZMCAsmBackend.cpp - SystemZ assembler backend ---------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/SystemZMCFixups.h"
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#include "MCTargetDesc/SystemZMCTargetDesc.h"
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#include "llvm/ADT/StringSwitch.h"
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#include "llvm/MC/MCAsmBackend.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCELFObjectWriter.h"
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#include "llvm/MC/MCFixupKindInfo.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCObjectWriter.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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using namespace llvm;
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// Value is a fully-resolved relocation value: Symbol + Addend [- Pivot].
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// Return the bits that should be installed in a relocation field for
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// fixup kind Kind.
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static uint64_t extractBitsForFixup(MCFixupKind Kind, uint64_t Value,
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const MCFixup &Fixup, MCContext &Ctx) {
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if (Kind < FirstTargetFixupKind)
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return Value;
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auto checkFixupInRange = [&](int64_t Min, int64_t Max) -> bool {
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int64_t SVal = int64_t(Value);
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if (SVal < Min || SVal > Max) {
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Ctx.reportError(Fixup.getLoc(), "operand out of range (" + Twine(SVal) +
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" not between " + Twine(Min) +
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" and " + Twine(Max) + ")");
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return false;
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}
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return true;
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};
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auto handlePCRelFixupValue = [&](unsigned W) -> uint64_t {
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if (Value % 2 != 0)
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Ctx.reportError(Fixup.getLoc(), "Non-even PC relative offset.");
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if (!checkFixupInRange(minIntN(W) * 2, maxIntN(W) * 2))
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return 0;
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return (int64_t)Value / 2;
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};
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auto handleImmValue = [&](bool IsSigned, unsigned W) -> uint64_t {
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if (!(IsSigned ? checkFixupInRange(minIntN(W), maxIntN(W))
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: checkFixupInRange(0, maxUIntN(W))))
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return 0;
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return Value;
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};
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switch (unsigned(Kind)) {
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case SystemZ::FK_390_PC12DBL:
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return handlePCRelFixupValue(12);
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case SystemZ::FK_390_PC16DBL:
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return handlePCRelFixupValue(16);
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case SystemZ::FK_390_PC24DBL:
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return handlePCRelFixupValue(24);
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case SystemZ::FK_390_PC32DBL:
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return handlePCRelFixupValue(32);
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case SystemZ::FK_390_TLS_CALL:
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return 0;
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case SystemZ::FK_390_S8Imm:
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return handleImmValue(true, 8);
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case SystemZ::FK_390_S16Imm:
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return handleImmValue(true, 16);
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case SystemZ::FK_390_S20Imm: {
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Value = handleImmValue(true, 20);
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// S20Imm is used only for signed 20-bit displacements.
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// The high byte of a 20 bit displacement value comes first.
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uint64_t DLo = Value & 0xfff;
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uint64_t DHi = (Value >> 12) & 0xff;
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return (DLo << 8) | DHi;
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}
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case SystemZ::FK_390_S32Imm:
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return handleImmValue(true, 32);
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case SystemZ::FK_390_U1Imm:
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return handleImmValue(false, 1);
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case SystemZ::FK_390_U2Imm:
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return handleImmValue(false, 2);
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case SystemZ::FK_390_U3Imm:
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return handleImmValue(false, 3);
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case SystemZ::FK_390_U4Imm:
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return handleImmValue(false, 4);
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case SystemZ::FK_390_U8Imm:
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return handleImmValue(false, 8);
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case SystemZ::FK_390_U12Imm:
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return handleImmValue(false, 12);
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case SystemZ::FK_390_U16Imm:
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return handleImmValue(false, 16);
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case SystemZ::FK_390_U32Imm:
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return handleImmValue(false, 32);
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case SystemZ::FK_390_U48Imm:
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return handleImmValue(false, 48);
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}
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llvm_unreachable("Unknown fixup kind!");
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}
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namespace {
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class SystemZMCAsmBackend : public MCAsmBackend {
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public:
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SystemZMCAsmBackend() : MCAsmBackend(llvm::endianness::big) {}
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// Override MCAsmBackend
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unsigned getNumFixupKinds() const override {
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return SystemZ::NumTargetFixupKinds;
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}
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std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
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const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
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bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
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const MCValue &Target,
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const MCSubtargetInfo *STI) override;
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void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
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const MCValue &Target, MutableArrayRef<char> Data,
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uint64_t Value, bool IsResolved,
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const MCSubtargetInfo *STI) const override;
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bool writeNopData(raw_ostream &OS, uint64_t Count,
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const MCSubtargetInfo *STI) const override;
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};
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} // end anonymous namespace
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std::optional<MCFixupKind>
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SystemZMCAsmBackend::getFixupKind(StringRef Name) const {
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unsigned Type = llvm::StringSwitch<unsigned>(Name)
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#define ELF_RELOC(X, Y) .Case(#X, Y)
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#include "llvm/BinaryFormat/ELFRelocs/SystemZ.def"
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#undef ELF_RELOC
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.Case("BFD_RELOC_NONE", ELF::R_390_NONE)
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.Case("BFD_RELOC_8", ELF::R_390_8)
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.Case("BFD_RELOC_16", ELF::R_390_16)
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.Case("BFD_RELOC_32", ELF::R_390_32)
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.Case("BFD_RELOC_64", ELF::R_390_64)
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.Default(-1u);
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if (Type != -1u)
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return static_cast<MCFixupKind>(FirstLiteralRelocationKind + Type);
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return std::nullopt;
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}
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const MCFixupKindInfo &
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SystemZMCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
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// Fixup kinds from .reloc directive are like R_390_NONE. They
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// do not require any extra processing.
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if (Kind >= FirstLiteralRelocationKind)
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return MCAsmBackend::getFixupKindInfo(FK_NONE);
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if (Kind < FirstTargetFixupKind)
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return MCAsmBackend::getFixupKindInfo(Kind);
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assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
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"Invalid kind!");
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return SystemZ::MCFixupKindInfos[Kind - FirstTargetFixupKind];
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}
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bool SystemZMCAsmBackend::shouldForceRelocation(const MCAssembler &,
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const MCFixup &Fixup,
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const MCValue &,
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const MCSubtargetInfo *STI) {
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return Fixup.getKind() >= FirstLiteralRelocationKind;
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}
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void SystemZMCAsmBackend::applyFixup(const MCAssembler &Asm,
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const MCFixup &Fixup,
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const MCValue &Target,
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MutableArrayRef<char> Data, uint64_t Value,
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bool IsResolved,
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const MCSubtargetInfo *STI) const {
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MCFixupKind Kind = Fixup.getKind();
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if (Kind >= FirstLiteralRelocationKind)
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return;
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unsigned Offset = Fixup.getOffset();
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unsigned BitSize = getFixupKindInfo(Kind).TargetSize;
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unsigned Size = (BitSize + 7) / 8;
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assert(Offset + Size <= Data.size() && "Invalid fixup offset!");
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// Big-endian insertion of Size bytes.
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Value = extractBitsForFixup(Kind, Value, Fixup, Asm.getContext());
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if (BitSize < 64)
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Value &= ((uint64_t)1 << BitSize) - 1;
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unsigned ShiftValue = (Size * 8) - 8;
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for (unsigned I = 0; I != Size; ++I) {
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Data[Offset + I] |= uint8_t(Value >> ShiftValue);
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ShiftValue -= 8;
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}
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}
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bool SystemZMCAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
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const MCSubtargetInfo *STI) const {
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for (uint64_t I = 0; I != Count; ++I)
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OS << '\x7';
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return true;
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}
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namespace {
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class ELFSystemZAsmBackend : public SystemZMCAsmBackend {
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uint8_t OSABI;
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public:
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ELFSystemZAsmBackend(uint8_t OsABI) : SystemZMCAsmBackend(), OSABI(OsABI){};
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std::unique_ptr<MCObjectTargetWriter>
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createObjectTargetWriter() const override {
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return createSystemZELFObjectWriter(OSABI);
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}
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};
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class GOFFSystemZAsmBackend : public SystemZMCAsmBackend {
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public:
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GOFFSystemZAsmBackend() : SystemZMCAsmBackend(){};
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std::unique_ptr<MCObjectTargetWriter>
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createObjectTargetWriter() const override {
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return createSystemZGOFFObjectWriter();
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}
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};
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} // namespace
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MCAsmBackend *llvm::createSystemZMCAsmBackend(const Target &T,
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const MCSubtargetInfo &STI,
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const MCRegisterInfo &MRI,
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const MCTargetOptions &Options) {
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if (STI.getTargetTriple().isOSzOS()) {
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return new GOFFSystemZAsmBackend();
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}
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uint8_t OSABI =
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MCELFObjectTargetWriter::getOSABI(STI.getTargetTriple().getOS());
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return new ELFSystemZAsmBackend(OSABI);
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}
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