Path: blob/main/contrib/llvm-project/llvm/lib/Target/X86/X86.h
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//===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===//1//2// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.3// See https://llvm.org/LICENSE.txt for license information.4// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception5//6//===----------------------------------------------------------------------===//7//8// This file contains the entry points for global functions defined in the x869// target library, as used by the LLVM JIT.10//11//===----------------------------------------------------------------------===//1213#ifndef LLVM_LIB_TARGET_X86_X86_H14#define LLVM_LIB_TARGET_X86_X86_H1516#include "llvm/Support/CodeGen.h"1718namespace llvm {1920class FunctionPass;21class InstructionSelector;22class PassRegistry;23class X86RegisterBankInfo;24class X86Subtarget;25class X86TargetMachine;2627/// This pass converts a legalized DAG into a X86-specific DAG, ready for28/// instruction scheduling.29FunctionPass *createX86ISelDag(X86TargetMachine &TM, CodeGenOptLevel OptLevel);3031/// This pass initializes a global base register for PIC on x86-32.32FunctionPass *createX86GlobalBaseRegPass();3334/// This pass combines multiple accesses to local-dynamic TLS variables so that35/// the TLS base address for the module is only fetched once per execution path36/// through the function.37FunctionPass *createCleanupLocalDynamicTLSPass();3839/// This function returns a pass which converts floating-point register40/// references and pseudo instructions into floating-point stack references and41/// physical instructions.42FunctionPass *createX86FloatingPointStackifierPass();4344/// This pass inserts AVX vzeroupper instructions before each call to avoid45/// transition penalty between functions encoded with AVX and SSE.46FunctionPass *createX86IssueVZeroUpperPass();4748/// This pass inserts ENDBR instructions before indirect jump/call49/// destinations as part of CET IBT mechanism.50FunctionPass *createX86IndirectBranchTrackingPass();5152/// Return a pass that pads short functions with NOOPs.53/// This will prevent a stall when returning on the Atom.54FunctionPass *createX86PadShortFunctions();5556/// Return a pass that selectively replaces certain instructions (like add,57/// sub, inc, dec, some shifts, and some multiplies) by equivalent LEA58/// instructions, in order to eliminate execution delays in some processors.59FunctionPass *createX86FixupLEAs();6061/// Return a pass that replaces equivalent slower instructions with faster62/// ones.63FunctionPass *createX86FixupInstTuning();6465/// Return a pass that reduces the size of vector constant pool loads.66FunctionPass *createX86FixupVectorConstants();6768/// Return a pass that removes redundant LEA instructions and redundant address69/// recalculations.70FunctionPass *createX86OptimizeLEAs();7172/// Return a pass that transforms setcc + movzx pairs into xor + setcc.73FunctionPass *createX86FixupSetCC();7475/// Return a pass that transform inline buffer security check into seperate bb76FunctionPass *createX86WinFixupBufferSecurityCheckPass();7778/// Return a pass that avoids creating store forward block issues in the hardware.79FunctionPass *createX86AvoidStoreForwardingBlocks();8081/// Return a pass that lowers EFLAGS copy pseudo instructions.82FunctionPass *createX86FlagsCopyLoweringPass();8384/// Return a pass that expands DynAlloca pseudo-instructions.85FunctionPass *createX86DynAllocaExpander();8687/// Return a pass that config the tile registers.88FunctionPass *createX86TileConfigPass();8990/// Return a pass that preconfig the tile registers before fast reg allocation.91FunctionPass *createX86FastPreTileConfigPass();9293/// Return a pass that config the tile registers after fast reg allocation.94FunctionPass *createX86FastTileConfigPass();9596/// Return a pass that insert pseudo tile config instruction.97FunctionPass *createX86PreTileConfigPass();9899/// Return a pass that lower the tile copy instruction.100FunctionPass *createX86LowerTileCopyPass();101102/// Return a pass that inserts int3 at the end of the function if it ends with a103/// CALL instruction. The pass does the same for each funclet as well. This104/// ensures that the open interval of function start and end PCs contains all105/// return addresses for the benefit of the Windows x64 unwinder.106FunctionPass *createX86AvoidTrailingCallPass();107108/// Return a pass that optimizes the code-size of x86 call sequences. This is109/// done by replacing esp-relative movs with pushes.110FunctionPass *createX86CallFrameOptimization();111112/// Return an IR pass that inserts EH registration stack objects and explicit113/// EH state updates. This pass must run after EH preparation, which does114/// Windows-specific but architecture-neutral preparation.115FunctionPass *createX86WinEHStatePass();116117/// Return a Machine IR pass that expands X86-specific pseudo118/// instructions into a sequence of actual instructions. This pass119/// must run after prologue/epilogue insertion and before lowering120/// the MachineInstr to MC.121FunctionPass *createX86ExpandPseudoPass();122123/// This pass converts X86 cmov instructions into branch when profitable.124FunctionPass *createX86CmovConverterPass();125126/// Return a Machine IR pass that selectively replaces127/// certain byte and word instructions by equivalent 32 bit instructions,128/// in order to eliminate partial register usage, false dependences on129/// the upper portions of registers, and to save code size.130FunctionPass *createX86FixupBWInsts();131132/// Return a Machine IR pass that reassigns instruction chains from one domain133/// to another, when profitable.134FunctionPass *createX86DomainReassignmentPass();135136/// This pass compress instructions from EVEX space to legacy/VEX/EVEX space when137/// possible in order to reduce code size or facilitate HW decoding.138FunctionPass *createX86CompressEVEXPass();139140/// This pass creates the thunks for the retpoline feature.141FunctionPass *createX86IndirectThunksPass();142143/// This pass replaces ret instructions with jmp's to __x86_return thunk.144FunctionPass *createX86ReturnThunksPass();145146/// This pass ensures instructions featuring a memory operand147/// have distinctive <LineNumber, Discriminator> (with respect to eachother)148FunctionPass *createX86DiscriminateMemOpsPass();149150/// This pass applies profiling information to insert cache prefetches.151FunctionPass *createX86InsertPrefetchPass();152153/// This pass insert wait instruction after X87 instructions which could raise154/// fp exceptions when strict-fp enabled.155FunctionPass *createX86InsertX87waitPass();156157/// This pass optimizes arithmetic based on knowledge that is only used by158/// a reduction sequence and is therefore safe to reassociate in interesting159/// ways.160FunctionPass *createX86PartialReductionPass();161162InstructionSelector *createX86InstructionSelector(const X86TargetMachine &TM,163const X86Subtarget &,164const X86RegisterBankInfo &);165166FunctionPass *createX86LoadValueInjectionLoadHardeningPass();167FunctionPass *createX86LoadValueInjectionRetHardeningPass();168FunctionPass *createX86SpeculativeLoadHardeningPass();169FunctionPass *createX86SpeculativeExecutionSideEffectSuppression();170FunctionPass *createX86ArgumentStackSlotPass();171172void initializeCompressEVEXPassPass(PassRegistry &);173void initializeFPSPass(PassRegistry &);174void initializeFixupBWInstPassPass(PassRegistry &);175void initializeFixupLEAPassPass(PassRegistry &);176void initializeX86ArgumentStackSlotPassPass(PassRegistry &);177void initializeX86FixupInstTuningPassPass(PassRegistry &);178void initializeX86FixupVectorConstantsPassPass(PassRegistry &);179void initializeWinEHStatePassPass(PassRegistry &);180void initializeX86AvoidSFBPassPass(PassRegistry &);181void initializeX86AvoidTrailingCallPassPass(PassRegistry &);182void initializeX86CallFrameOptimizationPass(PassRegistry &);183void initializeX86CmovConverterPassPass(PassRegistry &);184void initializeX86DAGToDAGISelLegacyPass(PassRegistry &);185void initializeX86DomainReassignmentPass(PassRegistry &);186void initializeX86ExecutionDomainFixPass(PassRegistry &);187void initializeX86ExpandPseudoPass(PassRegistry &);188void initializeX86FastPreTileConfigPass(PassRegistry &);189void initializeX86FastTileConfigPass(PassRegistry &);190void initializeX86FixupSetCCPassPass(PassRegistry &);191void initializeX86WinFixupBufferSecurityCheckPassPass(PassRegistry &);192void initializeX86FlagsCopyLoweringPassPass(PassRegistry &);193void initializeX86LoadValueInjectionLoadHardeningPassPass(PassRegistry &);194void initializeX86LoadValueInjectionRetHardeningPassPass(PassRegistry &);195void initializeX86LowerAMXIntrinsicsLegacyPassPass(PassRegistry &);196void initializeX86LowerAMXTypeLegacyPassPass(PassRegistry &);197void initializeX86LowerTileCopyPass(PassRegistry &);198void initializeX86OptimizeLEAPassPass(PassRegistry &);199void initializeX86PartialReductionPass(PassRegistry &);200void initializeX86PreTileConfigPass(PassRegistry &);201void initializeX86ReturnThunksPass(PassRegistry &);202void initializeX86SpeculativeExecutionSideEffectSuppressionPass(PassRegistry &);203void initializeX86SpeculativeLoadHardeningPassPass(PassRegistry &);204void initializeX86TileConfigPass(PassRegistry &);205206namespace X86AS {207enum : unsigned {208GS = 256,209FS = 257,210SS = 258,211PTR32_SPTR = 270,212PTR32_UPTR = 271,213PTR64 = 272214};215} // End X86AS namespace216217} // End llvm namespace218219#endif220221222