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GitHub Repository: freebsd/freebsd-src
Path: blob/main/contrib/llvm-project/llvm/lib/Target/Xtensa/XtensaISelLowering.h
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//===- XtensaISelLowering.h - Xtensa DAG Lowering Interface -----*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the interfaces that Xtensa uses to lower LLVM code into a
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// selection DAG.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_XTENSA_XTENSAISELLOWERING_H
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#define LLVM_LIB_TARGET_XTENSA_XTENSAISELLOWERING_H
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#include "llvm/CodeGen/CallingConvLower.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/CodeGen/TargetLowering.h"
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namespace llvm {
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namespace XtensaISD {
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enum {
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FIRST_NUMBER = ISD::BUILTIN_OP_END,
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BR_JT,
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// Calls a function. Operand 0 is the chain operand and operand 1
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// is the target address. The arguments start at operand 2.
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// There is an optional glue operand at the end.
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CALL,
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// Wraps a TargetGlobalAddress that should be loaded using PC-relative
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// accesses. Operand 0 is the address.
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PCREL_WRAPPER,
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RET,
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// Select with condition operator - This selects between a true value and
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// a false value (ops #2 and #3) based on the boolean result of comparing
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// the lhs and rhs (ops #0 and #1) of a conditional expression with the
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// condition code in op #4
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SELECT_CC,
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};
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}
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class XtensaSubtarget;
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class XtensaTargetLowering : public TargetLowering {
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public:
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explicit XtensaTargetLowering(const TargetMachine &TM,
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const XtensaSubtarget &STI);
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EVT getSetCCResultType(const DataLayout &, LLVMContext &,
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EVT VT) const override {
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if (!VT.isVector())
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return MVT::i32;
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return VT.changeVectorElementTypeToInteger();
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}
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bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
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const char *getTargetNodeName(unsigned Opcode) const override;
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SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
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SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
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bool isVarArg,
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const SmallVectorImpl<ISD::InputArg> &Ins,
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const SDLoc &DL, SelectionDAG &DAG,
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SmallVectorImpl<SDValue> &InVals) const override;
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SDValue LowerCall(CallLoweringInfo &CLI,
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SmallVectorImpl<SDValue> &InVals) const override;
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bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
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bool isVarArg,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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LLVMContext &Context) const override;
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SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
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const SmallVectorImpl<ISD::OutputArg> &Outs,
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const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL,
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SelectionDAG &DAG) const override;
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const XtensaSubtarget &getSubtarget() const { return Subtarget; }
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MachineBasicBlock *
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EmitInstrWithCustomInserter(MachineInstr &MI,
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MachineBasicBlock *BB) const override;
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private:
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const XtensaSubtarget &Subtarget;
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SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerImmediate(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerConstantPool(ConstantPoolSDNode *CP, SelectionDAG &DAG) const;
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SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerSTACKSAVE(SDValue Op, SelectionDAG &DAG) const;
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SDValue LowerSTACKRESTORE(SDValue Op, SelectionDAG &DAG) const;
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SDValue getAddrPCRel(SDValue Op, SelectionDAG &DAG) const;
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CCAssignFn *CCAssignFnForCall(CallingConv::ID CC, bool IsVarArg) const;
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MachineBasicBlock *emitSelectCC(MachineInstr &MI,
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MachineBasicBlock *BB) const;
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};
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} // end namespace llvm
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#endif /* LLVM_LIB_TARGET_XTENSA_XTENSAISELLOWERING_H */
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