/*-1* Copyright (c) 2003 Peter Wemm <[email protected]>2* All rights reserved.3*4* Redistribution and use in source and binary forms, with or without5* modification, are permitted provided that the following conditions6* are met:7* 1. Redistributions of source code must retain the above copyright8* notice, this list of conditions and the following disclaimer.9* 2. Redistributions in binary form must reproduce the above copyright10* notice, this list of conditions and the following disclaimer in the11* documentation and/or other materials provided with the distribution.12*13* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND14* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE15* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE16* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE17* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL18* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS19* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)20* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT21* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY22* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF23* SUCH DAMAGE.24*/2526/*27* Quick and dirty trampoline to get into 64 bit (long) mode and running28* with paging enabled so that we enter the kernel at its linked address.29*/30#define MSR_EFER 0xc000008031#define EFER_LME 0x0000010032#define CR4_PAE 0x0000002033#define CR4_PSE 0x0000001034#define CR0_PG 0x800000003536/* GRRR. Deal with BTX that links us for a non-zero location */37#define VPBASE 0xa00038#define VTOP(x) ((x) + VPBASE)3940.data4142.p2align 12,0x404344.globl PT445PT4:46.space 0x100047.globl PT348PT3:49.space 0x100050.globl PT251PT2:52.space 0x10005354gdtdesc:55.word gdtend - gdt56.long VTOP(gdt) # low57.long 0 # high5859gdt:60.long 0 # null descriptor61.long 062.long 0x00000000 # %cs63.long 0x0020980064.long 0x00000000 # %ds65.long 0x0000800066gdtend:6768.text69.code327071.globl amd64_tramp72amd64_tramp:73/* Be sure that interrupts are disabled */74cli7576/* Turn on EFER.LME */77movl $MSR_EFER, %ecx78rdmsr79orl $EFER_LME, %eax80wrmsr8182/* Turn on PAE */83movl %cr4, %eax84orl $CR4_PAE, %eax85movl %eax, %cr48687/* Set %cr3 for PT4 */88movl $VTOP(PT4), %eax89movl %eax, %cr39091/* Turn on paging (implicitly sets EFER.LMA) */92movl %cr0, %eax93orl $CR0_PG, %eax94movl %eax, %cr09596/* Now we're in compatibility mode. set %cs for long mode */97movl $VTOP(gdtdesc), %eax98movl VTOP(entry_hi), %esi99movl VTOP(entry_lo), %edi100lgdt (%eax)101ljmp $0x8, $VTOP(longmode)102103.code64104longmode:105/* We're still running V=P, jump to entry point */106movl %esi, %eax107salq $32, %rax108orq %rdi, %rax109pushq %rax110ret111112113