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freebsd
GitHub Repository: freebsd/freebsd-src
 Path: blob/main/sys/arm/allwinner/a83t/a83t_padconf.c
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/*-

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 * Copyright (c) 2016 Jared McNeill <[email protected]>

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 *

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 * Redistribution and use in source and binary forms, with or without

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 * modification, are permitted provided that the following conditions

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 * are met:

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 * 1. Redistributions of source code must retain the above copyright

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 *    notice, this list of conditions and the following disclaimer.

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 * 2. Redistributions in binary form must reproduce the above copyright

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 *    notice, this list of conditions and the following disclaimer in the

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 *    documentation and/or other materials provided with the distribution.

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 *

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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR

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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES

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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.

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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,

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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,

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 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

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 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED

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 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,

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 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY

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 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF

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 * SUCH DAMAGE.

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 */

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#include <sys/param.h>

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#include <sys/systm.h>

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#include <sys/kernel.h>

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#include <sys/types.h>

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#include <arm/allwinner/allwinner_pinctrl.h>

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#ifdef SOC_ALLWINNER_A83T

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static const struct allwinner_pins a83t_pins[] = {

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	{ "PB0",  1, 0,   { "gpio_in", "gpio_out", "uart2", "jtag", NULL, NULL, "pb_eint0" }, 6, 0, 0},

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	{ "PB1",  1, 1,   { "gpio_in", "gpio_out", "uart2", "jtag", NULL, NULL, "pb_eint1" }, 6, 1, 0},

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	{ "PB2",  1, 2,   { "gpio_in", "gpio_out", "uart2", "jtag", NULL, NULL, "pb_eint2" }, 6, 2, 0},

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	{ "PB3",  1, 3,   { "gpio_in", "gpio_out", "uart2", "jtag", NULL, NULL, "pb_eint3" }, 6, 3, 0},

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	{ "PB4",  1, 4,   { "gpio_in", "gpio_out", "i2s0", "tdm", NULL, NULL, "pb_eint4" }, 6, 4, 0},

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	{ "PB5",  1, 5,   { "gpio_in", "gpio_out", "i2s0", "tdm", NULL, NULL, "pb_eint5" }, 6, 5, 0},

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	{ "PB6",  1, 6,   { "gpio_in", "gpio_out", "i2s0", "tdm", NULL, NULL, "pb_eint6" }, 6, 6, 0},

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	{ "PB7",  1, 7,   { "gpio_in", "gpio_out", "i2s0", "tdm", NULL, NULL, "pb_eint7" }, 6, 7, 0},

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	{ "PB8",  1, 8,   { "gpio_in", "gpio_out", "i2s0", "tdm", NULL, NULL, "pb_eint8" }, 6, 8, 0},

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	{ "PB9",  1, 9,   { "gpio_in", "gpio_out", "uart0", NULL, NULL, NULL, "pb_eint9" }, 6, 9, 0},

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	{ "PB10", 1, 10,  { "gpio_in", "gpio_out", "uart0", NULL, NULL, NULL, "pb_eint10" }, 6, 10, 0},

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	{ "PC0",  2, 0,   { "gpio_in", "gpio_out", "nand", "spi0" } },

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	{ "PC1",  2, 1,   { "gpio_in", "gpio_out", "nand", "spi0" } },

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	{ "PC2",  2, 2,   { "gpio_in", "gpio_out", "nand", "spi0" } },

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	{ "PC3",  2, 3,   { "gpio_in", "gpio_out", "nand", "spi0" } },

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	{ "PC4",  2, 4,   { "gpio_in", "gpio_out", "nand" } },

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	{ "PC5",  2, 5,   { "gpio_in", "gpio_out", "nand", "mmc2" } },

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	{ "PC6",  2, 6,   { "gpio_in", "gpio_out", "nand", "mmc2" } },

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	{ "PC7",  2, 7,   { "gpio_in", "gpio_out", "nand" } },

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	{ "PC8",  2, 8,   { "gpio_in", "gpio_out", "nand", "mmc2" } },

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	{ "PC9",  2, 9,   { "gpio_in", "gpio_out", "nand", "mmc2" } },

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	{ "PC10", 2, 10,  { "gpio_in", "gpio_out", "nand", "mmc2" } },

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	{ "PC11", 2, 11,  { "gpio_in", "gpio_out", "nand", "mmc2" } },

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	{ "PC12", 2, 12,  { "gpio_in", "gpio_out", "nand", "mmc2" } },

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	{ "PC13", 2, 13,  { "gpio_in", "gpio_out", "nand", "mmc2" } },

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	{ "PC14", 2, 14,  { "gpio_in", "gpio_out", "nand", "mmc2" } },

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	{ "PC15", 2, 15,  { "gpio_in", "gpio_out", "nand", "mmc2" } },

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	{ "PC16", 2, 16,  { "gpio_in", "gpio_out", "nand", "mmc2" } },

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	{ "PC17", 2, 17,  { "gpio_in", "gpio_out", "nand" } },

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	{ "PC18", 2, 18,  { "gpio_in", "gpio_out", "nand" } },

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	{ "PD2",  3, 2,   { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },

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	{ "PD3",  3, 3,   { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },

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	{ "PD4",  3, 4,   { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },

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	{ "PD5",  3, 5,   { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },

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	{ "PD6",  3, 6,   { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },

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	{ "PD7",  3, 7,   { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },

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	{ "PD10", 3, 10,  { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },

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	{ "PD11", 3, 11,  { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },

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	{ "PD12", 3, 12,  { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },

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	{ "PD13", 3, 13,  { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },

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	{ "PD14", 3, 14,  { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },

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	{ "PD15", 3, 15,  { "gpio_in", "gpio_out", "lcd", NULL, "gmac" } },

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	{ "PD18", 3, 18,  { "gpio_in", "gpio_out", "lcd", "lvds", "gmac" } },

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	{ "PD19", 3, 19,  { "gpio_in", "gpio_out", "lcd", "lvds", "gmac" } },

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	{ "PD20", 3, 20,  { "gpio_in", "gpio_out", "lcd", "lvds", "gmac" } },

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	{ "PD21", 3, 21,  { "gpio_in", "gpio_out", "lcd", "lvds", "gmac" } },

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	{ "PD22", 3, 22,  { "gpio_in", "gpio_out", "lcd", "lvds", "gmac" } },

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	{ "PD23", 3, 23,  { "gpio_in", "gpio_out", "lcd", "lvds", "gmac" } },

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	{ "PD24", 3, 24,  { "gpio_in", "gpio_out", "lcd", "lvds" } },

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	{ "PD25", 3, 25,  { "gpio_in", "gpio_out", "lcd", "lvds" } },

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	{ "PD26", 3, 26,  { "gpio_in", "gpio_out", "lcd", "lvds" } },

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	{ "PD27", 3, 27,  { "gpio_in", "gpio_out", "lcd", "lvds" } },

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	{ "PD28", 3, 28,  { "gpio_in", "gpio_out", "pwm" } },

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	{ "PD29", 3, 29,  { "gpio_in", "gpio_out" } },

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	{ "PE0",  4, 0,   { "gpio_in", "gpio_out", "csi", NULL, "ccir" } },

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	{ "PE1",  4, 1,   { "gpio_in", "gpio_out", "csi", NULL, "ccir" } },

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	{ "PE2",  4, 2,   { "gpio_in", "gpio_out", "csi", NULL, "ccir" } },

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	{ "PE3",  4, 3,   { "gpio_in", "gpio_out", "csi", NULL, "ccir" } },

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	{ "PE4",  4, 4,   { "gpio_in", "gpio_out", "csi" } },

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	{ "PE5",  4, 5,   { "gpio_in", "gpio_out", "csi" } },

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	{ "PE6",  4, 6,   { "gpio_in", "gpio_out", "csi", NULL, "ccir" } },

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	{ "PE7",  4, 7,   { "gpio_in", "gpio_out", "csi", NULL, "ccir" } },

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	{ "PE8",  4, 8,   { "gpio_in", "gpio_out", "csi", NULL, "ccir" } },

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	{ "PE9",  4, 9,   { "gpio_in", "gpio_out", "csi", NULL, "ccir" } },

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	{ "PE10", 4, 10,  { "gpio_in", "gpio_out", "csi", "uart4", "ccir" } },

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	{ "PE11", 4, 11,  { "gpio_in", "gpio_out", "csi", "uart4", "ccir" } },

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	{ "PE12", 4, 12,  { "gpio_in", "gpio_out", "csi", "uart4", "ccir" } },

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	{ "PE13", 4, 13,  { "gpio_in", "gpio_out", "csi", "uart4", "ccir" } },

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	{ "PE14", 4, 14,  { "gpio_in", "gpio_out", "csi", "twi2" } },

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	{ "PE15", 4, 15,  { "gpio_in", "gpio_out", "csi", "twi2" } },

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	{ "PE16", 4, 16,  { "gpio_in", "gpio_out" } },

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	{ "PE17", 4, 17,  { "gpio_in", "gpio_out" } },

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	{ "PE18", 4, 18,  { "gpio_in", "gpio_out", NULL, "owa" } },

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	{ "PE19", 4, 19,  { "gpio_in", "gpio_out" } },

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	{ "PF0",  5, 0,   { "gpio_in", "gpio_out", "mmc0", "jtag" } },

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	{ "PF1",  5, 1,   { "gpio_in", "gpio_out", "mmc0", "jtag" } },

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	{ "PF2",  5, 2,   { "gpio_in", "gpio_out", "mmc0", "uart0" } },

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	{ "PF3",  5, 3,   { "gpio_in", "gpio_out", "mmc0", "jtag" } },

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	{ "PF4",  5, 4,   { "gpio_in", "gpio_out", "mmc0", "uart0" } },

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	{ "PF5",  5, 5,   { "gpio_in", "gpio_out", "mmc0", "jtag" } },

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	{ "PF6",  5, 6,   { "gpio_in", "gpio_out" } },

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	{ "PG0",  6, 0,   { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "pg_eint0" }, 6, 0, 1},

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	{ "PG1",  6, 1,   { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "pg_eint1" }, 6, 1, 1},

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	{ "PG2",  6, 2,   { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "pg_eint2" }, 6, 2, 1},

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	{ "PG3",  6, 3,   { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "pg_eint3" }, 6, 3, 1},

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	{ "PG4",  6, 4,   { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "pg_eint4" }, 6, 4, 1},

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	{ "PG5",  6, 5,   { "gpio_in", "gpio_out", "mmc1", NULL, NULL, NULL, "pg_eint5" }, 6, 5, 1},

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	{ "PG6",  6, 6,   { "gpio_in", "gpio_out", "uart1", "spi1", NULL, NULL, "pg_eint6" }, 6, 6, 1},

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	{ "PG7",  6, 7,   { "gpio_in", "gpio_out", "uart1", "spi1", NULL, NULL, "pg_eint7" }, 6, 7, 1},

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	{ "PG8",  6, 8,   { "gpio_in", "gpio_out", "uart1", "spi1", NULL, NULL, "pg_eint8" }, 6, 8, 1},

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	{ "PG9",  6, 9,   { "gpio_in", "gpio_out", "uart1", "spi1", NULL, NULL, "pg_eint9" }, 6, 9, 1},

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	{ "PG10", 6, 10,  { "gpio_in", "gpio_out", "i2s1", "uart3", NULL, NULL, "pg_eint10" }, 6, 10, 1},

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	{ "PG11", 6, 11,  { "gpio_in", "gpio_out", "i2s1", "uart3", NULL, NULL, "pg_eint11" }, 6, 11, 1},

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	{ "PG12", 6, 12,  { "gpio_in", "gpio_out", "i2s1", "uart3", NULL, NULL, "pg_eint12" }, 6, 12, 1},

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	{ "PG13", 6, 13,  { "gpio_in", "gpio_out", "i2s1", "uart3", NULL, NULL, "pg_eint13" }, 6, 13, 1},

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	{ "PH0",  7, 0,   { "gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, "ph_eint0" }, 6, 0, 2},

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	{ "PH1",  7, 1,   { "gpio_in", "gpio_out", "i2c0", NULL, NULL, NULL, "ph_eint1" }, 6, 1, 2},

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	{ "PH2",  7, 2,   { "gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, "ph_eint2" }, 6, 2, 2},

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	{ "PH3",  7, 3,   { "gpio_in", "gpio_out", "i2c1", NULL, NULL, NULL, "ph_eint3" }, 6, 3, 2},

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	{ "PH4",  7, 4,   { "gpio_in", "gpio_out", "i2c2", NULL, NULL, NULL, "ph_eint4" }, 6, 4, 2},

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	{ "PH5",  7, 5,   { "gpio_in", "gpio_out", "i2c2", NULL, NULL, NULL, "ph_eint5" }, 6, 5, 2},

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	{ "PH6",  7, 6,   { "gpio_in", "gpio_out", "hdmiddc", NULL, NULL, NULL, "ph_eint6" }, 6, 6, 2},

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	{ "PH7",  7, 7,   { "gpio_in", "gpio_out", "hdmiddc", NULL, NULL, NULL, "ph_eint7" }, 6, 7, 2},

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	{ "PH8",  7, 8,   { "gpio_in", "gpio_out", "hdmiddc", NULL, NULL, NULL, "ph_eint8" }, 6, 8, 2},

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	{ "PH9",  7, 9,   { "gpio_in", "gpio_out", NULL, NULL, NULL, NULL, "ph_eint9" }, 6, 9, 2},

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	{ "PH10", 7, 10,  { "gpio_in", "gpio_out", NULL, NULL, NULL, NULL, "ph_eint10" }, 6, 10, 2},

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	{ "PH11", 7, 11,  { "gpio_in", "gpio_out", NULL, NULL, NULL, NULL, "ph_eint11" }, 6, 11, 2},

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};

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const struct allwinner_padconf a83t_padconf = {

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	.npins = nitems(a83t_pins),

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	.pins = a83t_pins,

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};

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#endif /* !SOC_ALLWINNER_A83T */

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