#include <sys/param.h>
#include <sys/bus.h>
#include <sys/eventhandler.h>
#include <sys/kernel.h>
#include <sys/lock.h>
#include <sys/module.h>
#include <sys/mutex.h>
#include <sys/resource.h>
#include <sys/rman.h>
#include <sys/systm.h>
#include <sys/time.h>
#include <sys/watchdog.h>
#include <machine/bus.h>
#include <machine/intr.h>
#include <dev/ofw/openfirm.h>
#include <dev/ofw/ofw_bus.h>
#include <dev/ofw/ofw_bus_subr.h>
#include <arm/freescale/imx/imx_machdep.h>
#include <arm/freescale/imx/imx_wdogreg.h>
struct imx_wdog_softc {
struct mtx sc_mtx;
device_t sc_dev;
struct resource *sc_res[2];
void *sc_ih;
uint32_t sc_timeout;
bool sc_pde_enabled;
};
static struct resource_spec imx_wdog_spec[] = {
{ SYS_RES_MEMORY, 0, RF_ACTIVE },
{ SYS_RES_IRQ, 0, RF_ACTIVE },
RESOURCE_SPEC_END
};
#define MEMRES 0
#define IRQRES 1
static struct ofw_compat_data compat_data[] = {
{"fsl,imx6sx-wdt", 1},
{"fsl,imx6sl-wdt", 1},
{"fsl,imx6q-wdt", 1},
{"fsl,imx53-wdt", 1},
{"fsl,imx51-wdt", 1},
{"fsl,imx50-wdt", 1},
{"fsl,imx35-wdt", 1},
{"fsl,imx27-wdt", 1},
{"fsl,imx25-wdt", 1},
{"fsl,imx21-wdt", 1},
{NULL, 0}
};
static inline uint16_t
RD2(struct imx_wdog_softc *sc, bus_size_t offs)
{
return (bus_read_2(sc->sc_res[MEMRES], offs));
}
static inline void
WR2(struct imx_wdog_softc *sc, bus_size_t offs, uint16_t val)
{
bus_write_2(sc->sc_res[MEMRES], offs, val);
}
static int
imx_wdog_enable(struct imx_wdog_softc *sc, u_int timeout)
{
uint16_t reg;
if (timeout < 1 || timeout > 128)
return (EINVAL);
mtx_lock(&sc->sc_mtx);
if (timeout != sc->sc_timeout) {
sc->sc_timeout = timeout;
reg = RD2(sc, WDOG_CR_REG);
reg &= ~WDOG_CR_WT_MASK;
reg |= ((2 * timeout - 1) << WDOG_CR_WT_SHIFT);
WR2(sc, WDOG_CR_REG, reg | WDOG_CR_WDE);
}
WR2(sc, WDOG_SR_REG, WDOG_SR_STEP1);
WR2(sc, WDOG_SR_REG, WDOG_SR_STEP2);
if (sc->sc_pde_enabled) {
sc->sc_pde_enabled = false;
reg = RD2(sc, WDOG_MCR_REG);
WR2(sc, WDOG_MCR_REG, reg & ~WDOG_MCR_PDE);
}
mtx_unlock(&sc->sc_mtx);
return (0);
}
static void
imx_watchdog(void *arg, u_int cmd, int *error)
{
struct imx_wdog_softc *sc;
u_int timeout;
sc = arg;
if (cmd == 0) {
if (bootverbose)
device_printf(sc->sc_dev, "Can not be disabled.\n");
*error = EOPNOTSUPP;
} else {
timeout = (u_int)((1ULL << (cmd & WD_INTERVAL)) / 1000000000U);
if (imx_wdog_enable(sc, timeout) == 0)
*error = 0;
}
}
static int
imx_wdog_intr(void *arg)
{
struct imx_wdog_softc *sc = arg;
imx_wdog_cpu_reset(BUS_SPACE_PHYSADDR(sc->sc_res[MEMRES], WDOG_CR_REG));
return (FILTER_HANDLED);
}
static int
imx_wdog_probe(device_t dev)
{
if (!ofw_bus_status_okay(dev))
return (ENXIO);
if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
return (ENXIO);
device_set_desc(dev, "Freescale i.MX Watchdog");
return (0);
}
static int
imx_wdog_attach(device_t dev)
{
struct imx_wdog_softc *sc;
pcell_t timeout;
sc = device_get_softc(dev);
sc->sc_dev = dev;
if (bus_alloc_resources(dev, imx_wdog_spec, sc->sc_res)) {
device_printf(dev, "could not allocate resources\n");
return (ENXIO);
}
mtx_init(&sc->sc_mtx, device_get_nameunit(dev), "imx_wdt", MTX_DEF);
if (ofw_bus_has_prop(sc->sc_dev, "fsl,ext-reset-output")) {
WR2(sc, WDOG_CR_REG, WDOG_CR_WDT | RD2(sc, WDOG_CR_REG));
bus_setup_intr(sc->sc_dev, sc->sc_res[IRQRES],
INTR_TYPE_MISC | INTR_MPSAFE, imx_wdog_intr, NULL, sc,
&sc->sc_ih);
WR2(sc, WDOG_ICR_REG, WDOG_ICR_WIE);
}
if (RD2(sc, WDOG_MCR_REG) & WDOG_MCR_PDE)
sc->sc_pde_enabled = true;
EVENTHANDLER_REGISTER(watchdog_list, imx_watchdog, sc, 0);
if (OF_getencprop(ofw_bus_get_node(sc->sc_dev), "timeout-sec",
&timeout, sizeof(timeout)) == sizeof(timeout)) {
if (timeout < 1 || timeout > 128) {
device_printf(sc->sc_dev, "ERROR: bad timeout-sec "
"property value %u, using 128\n", timeout);
timeout = 128;
}
imx_wdog_enable(sc, timeout);
device_printf(sc->sc_dev, "watchdog enabled using "
"timeout-sec property value %u\n", timeout);
}
device_busy(sc->sc_dev);
return (0);
}
static device_method_t imx_wdog_methods[] = {
DEVMETHOD(device_probe, imx_wdog_probe),
DEVMETHOD(device_attach, imx_wdog_attach),
DEVMETHOD_END
};
static driver_t imx_wdog_driver = {
"imx_wdog",
imx_wdog_methods,
sizeof(struct imx_wdog_softc),
};
EARLY_DRIVER_MODULE(imx_wdog, simplebus, imx_wdog_driver, 0, 0, BUS_PASS_TIMER);
SIMPLEBUS_PNP_INFO(compat_data);