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freebsd
GitHub Repository: freebsd/freebsd-src
 Path: blob/main/sys/arm/mv/a37x0_iicreg.h
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/*-

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 * SPDX-License-Identifier: BSD-2-Clause

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 *

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 * Copyright (c) 2018, 2019 Rubicon Communications, LLC (Netgate)

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 *

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 * Redistribution and use in source and binary forms, with or without

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 * modification, are permitted provided that the following conditions

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 * are met:

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 * 1. Redistributions of source code must retain the above copyright

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 *    notice, this list of conditions and the following disclaimer.

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 * 2. Redistributions in binary form must reproduce the above copyright

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 *    notice, this list of conditions and the following disclaimer in the

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 *    documentation and/or other materials provided with the distribution.

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 *

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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND

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 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE

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 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE

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 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE

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 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL

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 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS

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 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)

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 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT

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 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY

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 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF

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 * SUCH DAMAGE.

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 */

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#ifndef	_A37X0_IICREG_H_

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#define	_A37X0_IICREG_H_

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#define	A37X0_IIC_IBMR		0x00

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#define	A37X0_IIC_IDBR		0x04

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#define	A37X0_IIC_ICR		0x08

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#define	 ICR_START		(1 << 0)

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#define	 ICR_STOP		(1 << 1)

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#define	 ICR_ACKNAK		(1 << 2)

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#define	 ICR_TB			(1 << 3)

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#define	 ICR_MA			(1 << 4)

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#define	 ICR_SCLE		(1 << 5)

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#define	 ICR_IUE		(1 << 6)

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#define	 ICR_GCD		(1 << 7)

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#define	 ICR_ITEIE		(1 << 8)

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#define	 ICR_IRFIE		(1 << 9)

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#define	 ICR_BEIE		(1 << 10)

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#define	 ICR_SSDIE		(1 << 11)

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#define	 ICR_ALDIE		(1 << 12)

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#define	 ICR_SADIE		(1 << 13)

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#define	 ICR_UR			(1 << 14)

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#define	 ICR_FAST_MODE		(1 << 16)

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#define	 ICR_HIGH_SPEED		(1 << 17)

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#define	 ICR_MODE_MASK		(ICR_FAST_MODE | ICR_HIGH_SPEED)

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#define	 ICR_INIT							\

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    (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)

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#define	A37X0_IIC_ISR		0x0c

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#define	 ISR_RWM		(1 << 0)

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#define	 ISR_ACKNAK		(1 << 1)

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#define	 ISR_UB			(1 << 2)

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#define	 ISR_IBB		(1 << 3)

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#define	 ISR_SSD		(1 << 4)

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#define	 ISR_ALD		(1 << 5)

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#define	 ISR_ITE		(1 << 6)

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#define	 ISR_IRF		(1 << 7)

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#define	 ISR_GCAD		(1 << 8)

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#define	 ISR_SAD		(1 << 9)

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#define	 ISR_BED		(1 << 10)

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#endif	/* _A37X0_IICREG_H_ */

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