Path: blob/main/sys/arm/nvidia/tegra124/tegra124_machdep.c
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/*-1* Copyright (c) 2016 Michal Meloun <[email protected]>2* All rights reserved.3*4* Redistribution and use in source and binary forms, with or without5* modification, are permitted provided that the following conditions6* are met:7* 1. Redistributions of source code must retain the above copyright8* notice, this list of conditions and the following disclaimer.9* 2. Redistributions in binary form must reproduce the above copyright10* notice, this list of conditions and the following disclaimer in the11* documentation and/or other materials provided with the distribution.12*13* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND14* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE15* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE16* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE17* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL18* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS19* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)20* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT21* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY22* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF23* SUCH DAMAGE.24*/2526#include "opt_platform.h"2728#include <sys/param.h>29#include <sys/bus.h>30#include <sys/devmap.h>31#include <sys/lock.h>32#include <sys/reboot.h>33#include <sys/systm.h>3435#include <vm/vm.h>3637#include <machine/bus.h>38#include <machine/fdt.h>39#include <machine/intr.h>40#include <machine/machdep.h>41#include <machine/platformvar.h>4243#include <dev/ofw/openfirm.h>4445#include <arm/nvidia/tegra124/tegra124_mp.h>4647#include "platform_if.h"4849#define PMC_PHYSBASE 0x7000e40050#define PMC_SIZE 0x40051#define PMC_CONTROL_REG 0x052#define PMC_SCRATCH0 0x5053#define PMC_SCRATCH0_MODE_RECOVERY (1 << 31)54#define PMC_SCRATCH0_MODE_BOOTLOADER (1 << 30)55#define PMC_SCRATCH0_MODE_RCM (1 << 1)56#define PMC_SCRATCH0_MODE_MASK (PMC_SCRATCH0_MODE_RECOVERY | \57PMC_SCRATCH0_MODE_BOOTLOADER | \58PMC_SCRATCH0_MODE_RCM)5960static platform_attach_t tegra124_attach;61static platform_devmap_init_t tegra124_devmap_init;62static platform_late_init_t tegra124_late_init;63static platform_cpu_reset_t tegra124_cpu_reset;6465static int66tegra124_attach(platform_t plat)67{6869return (0);70}7172static void73tegra124_late_init(platform_t plat)74{7576}7778/*79* Set up static device mappings.80*81*/82static int83tegra124_devmap_init(platform_t plat)84{8586devmap_add_entry(0x70000000, 0x01000000);87return (0);88}8990static void91tegra124_cpu_reset(platform_t plat)92{93bus_space_handle_t pmc;94uint32_t reg;9596printf("Resetting...\n");97bus_space_map(fdtbus_bs_tag, PMC_PHYSBASE, PMC_SIZE, 0, &pmc);9899reg = bus_space_read_4(fdtbus_bs_tag, pmc, PMC_SCRATCH0);100reg &= PMC_SCRATCH0_MODE_MASK;101bus_space_write_4(fdtbus_bs_tag, pmc, PMC_SCRATCH0,102reg | PMC_SCRATCH0_MODE_BOOTLOADER); /* boot to bootloader */103bus_space_read_4(fdtbus_bs_tag, pmc, PMC_SCRATCH0);104105reg = bus_space_read_4(fdtbus_bs_tag, pmc, PMC_CONTROL_REG);106spinlock_enter();107dsb();108bus_space_write_4(fdtbus_bs_tag, pmc, PMC_CONTROL_REG, reg | 0x10);109bus_space_read_4(fdtbus_bs_tag, pmc, PMC_CONTROL_REG);110while(1)111;112113}114115/*116* Early putc routine for EARLY_PRINTF support. To use, add to kernel config:117* option SOCDEV_PA=0x70000000118* option SOCDEV_VA=0x70000000119* option EARLY_PRINTF120*/121#if 0122#ifdef EARLY_PRINTF123static void124tegra124_early_putc(int c)125{126127volatile uint32_t * UART_STAT_REG = (uint32_t *)(0x70006314);128volatile uint32_t * UART_TX_REG = (uint32_t *)(0x70006300);129const uint32_t UART_TXRDY = (1 << 6);130while ((*UART_STAT_REG & UART_TXRDY) == 0)131continue;132*UART_TX_REG = c;133}134early_putc_t *early_putc = tegra124_early_putc;135#endif136#endif137138static platform_method_t tegra124_methods[] = {139PLATFORMMETHOD(platform_attach, tegra124_attach),140PLATFORMMETHOD(platform_devmap_init, tegra124_devmap_init),141PLATFORMMETHOD(platform_late_init, tegra124_late_init),142PLATFORMMETHOD(platform_cpu_reset, tegra124_cpu_reset),143144#ifdef SMP145PLATFORMMETHOD(platform_mp_start_ap, tegra124_mp_start_ap),146PLATFORMMETHOD(platform_mp_setmaxid, tegra124_mp_setmaxid),147#endif148PLATFORMMETHOD_END,149};150151FDT_PLATFORM_DEF(tegra124, "Nvidia Jetson-TK1", 0, "nvidia,jetson-tk1", 120);152153154