/*-1* SPDX-License-Identifier: BSD-2-Clause2*3* Copyright (c) 2012 Damjan Marion <[email protected]>4* All rights reserved.5*6* Redistribution and use in source and binary forms, with or without7* modification, are permitted provided that the following conditions8* are met:9* 1. Redistributions of source code must retain the above copyright10* notice, this list of conditions and the following disclaimer.11* 2. Redistributions in binary form must reproduce the above copyright12* notice, this list of conditions and the following disclaimer in the13* documentation and/or other materials provided with the distribution.14*15* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND16* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE17* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE18* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE19* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL20* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS21* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)22* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT23* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY24* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF25* SUCH DAMAGE.26*/2728#ifndef _IF_CPSWVAR_H29#define _IF_CPSWVAR_H3031#define CPSW_PORTS 232#define CPSW_INTR_COUNT 43334/* MII BUS */35#define CPSW_MIIBUS_RETRIES 2036#define CPSW_MIIBUS_DELAY 1003738#define CPSW_MAX_ALE_ENTRIES 10243940#define CPSW_SYSCTL_COUNT 344142#ifdef CPSW_ETHERSWITCH43#define CPSW_CPU_PORT 044#define CPSW_PORTS_MASK 0x745#define CPSW_VLANS 128 /* Arbitrary number. */4647struct cpsw_vlangroups {48int vid;49};50#endif5152struct cpsw_slot {53uint32_t bd_offset; /* Offset of corresponding BD within CPPI RAM. */54bus_dmamap_t dmamap;55if_t ifp;56struct mbuf *mbuf;57STAILQ_ENTRY(cpsw_slot) next;58};59STAILQ_HEAD(cpsw_slots, cpsw_slot);6061struct cpsw_queue {62struct mtx lock;63int running;64int teardown;65struct cpsw_slots active;66struct cpsw_slots avail;67uint32_t queue_adds; /* total bufs added */68uint32_t queue_removes; /* total bufs removed */69uint32_t queue_removes_at_last_tick; /* Used by watchdog */70uint32_t queue_restart;71int queue_slots;72int active_queue_len;73int max_active_queue_len;74int avail_queue_len;75int max_avail_queue_len;76int longest_chain; /* Largest # segments in a single packet. */77int hdp_offset;78};7980struct cpsw_port {81device_t dev;82int phy;83int vlan;84};8586struct cpsw_softc {87device_t dev;88int active_slave;89int debug;90int dualemac;91phandle_t node;92struct bintime attach_uptime; /* system uptime when attach happened. */93struct cpsw_port port[2];94unsigned coal_us;9596/* RX and TX buffer tracking */97struct cpsw_queue rx, tx;9899/* We expect 1 memory resource and 4 interrupts from the device tree. */100int mem_rid;101struct resource *mem_res;102struct resource *irq_res[CPSW_INTR_COUNT];103void *ih_cookie[CPSW_INTR_COUNT];104105/* A buffer full of nulls for TX padding. */106void *nullpad;107108bus_dma_tag_t mbuf_dtag;109110struct {111int resets;112int timer;113struct callout callout;114} watchdog;115116/* 64-bit versions of 32-bit hardware statistics counters */117uint64_t shadow_stats[CPSW_SYSCTL_COUNT];118119/* CPPI STATERAM has 512 slots for building TX/RX queues. */120/* TODO: Size here supposedly varies with different versions121of the controller. Check DaVinci specs and find a good122way to adjust this. One option is to have a separate123Device Tree parameter for number slots; another option124is to calculate it from the memory size in the device tree. */125struct cpsw_slot _slots[CPSW_CPPI_RAM_SIZE / sizeof(struct cpsw_cpdma_bd)];126struct cpsw_slots avail;127};128129struct cpswp_softc {130device_t dev;131device_t miibus;132device_t pdev;133int media_status;134int unit;135int vlan;136struct bintime init_uptime; /* system uptime when init happened. */137struct callout mii_callout;138struct cpsw_softc *swsc;139if_t ifp;140struct mii_data *mii;141struct mtx lock;142uint32_t if_flags;143uint32_t phy;144uint32_t phyaccess;145uint32_t physel;146};147148#endif /*_IF_CPSWVAR_H */149150151