CoCalc -- ti_adcreg.h

GitHub Repository: freebsd/freebsd-src
Path: blob/main/sys/arm/ti/ti_adcreg.h
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/*-
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 * Copyright 2014 Luiz Otavio O Souza <[email protected]>
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * 1. Redistributions of source code must retain the above copyright
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 *    notice, this list of conditions and the following disclaimer.
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 * 2. Redistributions in binary form must reproduce the above copyright
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 *    notice, this list of conditions and the following disclaimer in the
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 *    documentation and/or other materials provided with the distribution.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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 * SUCH DAMAGE.
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 */
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#ifndef _TI_ADCREG_H_
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#define _TI_ADCREG_H_
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#define	ADC_REVISION		0x000
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#define	ADC_REV_SCHEME_MSK		0xc0000000
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#define	ADC_REV_SCHEME_SHIFT		30
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#define	ADC_REV_FUNC_MSK		0x0fff0000
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#define	ADC_REV_FUNC_SHIFT		16
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#define	ADC_REV_RTL_MSK			0x0000f800
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#define	ADC_REV_RTL_SHIFT		11
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#define	ADC_REV_MAJOR_MSK		0x00000700
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#define	ADC_REV_MAJOR_SHIFT		8
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#define	ADC_REV_CUSTOM_MSK		0x000000c0
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#define	ADC_REV_CUSTOM_SHIFT		6
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#define	ADC_REV_MINOR_MSK		0x0000003f
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#define	ADC_SYSCFG		0x010
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#define	ADC_SYSCFG_IDLE_MSK		0x000000c0
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#define	ADC_SYSCFG_IDLE_SHIFT		2
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#define	ADC_IRQSTATUS_RAW	0x024
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#define	ADC_IRQSTATUS		0x028
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#define	ADC_IRQENABLE_SET	0x02c
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#define	ADC_IRQENABLE_CLR	0x030
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#define	ADC_IRQ_HW_PEN_SYNC		(1 << 10)
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#define	ADC_IRQ_PEN_UP			(1 << 9)
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#define	ADC_IRQ_OUT_RANGE		(1 << 8)
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#define	ADC_IRQ_FIFO1_UNDR		(1 << 7)
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#define	ADC_IRQ_FIFO1_OVERR		(1 << 6)
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#define	ADC_IRQ_FIFO1_THRES		(1 << 5)
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#define	ADC_IRQ_FIFO0_UNDR		(1 << 4)
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#define	ADC_IRQ_FIFO0_OVERR		(1 << 3)
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#define	ADC_IRQ_FIFO0_THRES		(1 << 2)
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#define	ADC_IRQ_END_OF_SEQ		(1 << 1)
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#define	ADC_IRQ_HW_PEN_ASYNC		(1 << 0)
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#define	ADC_CTRL		0x040
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#define	ADC_CTRL_TSC_ENABLE		(1 << 7)
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#define	ADC_CTRL_TSC_4WIRE		(1 << 5)
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#define	ADC_CTRL_TSC_5WIRE		(2 << 5)
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#define	ADC_CTRL_TSC_8WIRE		(3 << 5)
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#define	ADC_CTRL_STEP_WP		(1 << 2)
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#define	ADC_CTRL_STEP_ID		(1 << 1)
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#define	ADC_CTRL_ENABLE			(1 << 0)
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#define	ADC_STAT		0x044
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#define	ADC_CLKDIV		0x04c
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#define	ADC_STEPENABLE		0x054
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#define	ADC_IDLECONFIG		0x058
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#define	ADC_TC_CHARGE_STEPCONFIG	0x05C
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#define	ADC_TC_CHARGE_DELAY		0x060
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#define	ADC_STEPS		16
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#define	ADC_STEPCFG(n)		(0x064 + (8*((n)-1)))
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#define	ADC_STEPDLY(n)		(0x068 + (8*((n)-1)))
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#define	ADC_STEP_FIFO1			(1 << 26)
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#define	ADC_STEP_DIFF_CNTRL		(1 << 25)
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#define	ADC_STEP_RFM_MSK		0x01800000
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#define	ADC_STEP_RFM_SHIFT		23
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#define	ADC_STEP_RFM_VSSA		0
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#define	ADC_STEP_RFM_XNUR		1
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#define	ADC_STEP_RFM_YNLR		2
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#define	ADC_STEP_RFM_VREFN		3
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#define	ADC_STEP_INP_MSK		0x00780000
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#define	ADC_STEP_INP_SHIFT		19
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#define	ADC_STEP_INP(i)			((i) << ADC_STEP_INP_SHIFT)
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#define	ADC_STEP_INM_MSK		0x00078000
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#define	ADC_STEP_INM_SHIFT		15
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#define	ADC_STEP_INM(i)			((i) << ADC_STEP_INM_SHIFT)
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#define	ADC_STEP_IN_VREFN		8
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#define	ADC_STEP_RFP_MSK		0x00007000
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#define	ADC_STEP_RFP_SHIFT		12
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#define	ADC_STEP_RFP_VDDA		0
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#define	ADC_STEP_RFP_XPUL		1
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#define	ADC_STEP_RFP_YPLL		2
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#define	ADC_STEP_RFP_VREFP		3
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#define	ADC_STEP_RFP_INTREF		4
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#define	ADC_STEP_YPN_SW			(1 << 10)
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#define	ADC_STEP_YNN_SW			(1 << 8)
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#define	ADC_STEP_YPP_SW			(1 << 7)
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#define	ADC_STEP_XNN_SW			(1 << 6)
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#define	ADC_STEP_XPP_SW			(1 << 5)
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#define	ADC_STEP_AVG_MSK		0x0000001c
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#define	ADC_STEP_AVG_SHIFT		2
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#define	ADC_STEP_MODE_MSK		0x00000003
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#define	ADC_STEP_MODE_ONESHOT		0x00000000
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#define	ADC_STEP_MODE_CONTINUOUS	0x00000001
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#define	ADC_STEP_MODE_HW_ONESHOT	0x00000002
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#define	ADC_STEP_MODE_HW_CONTINUOUS	0x00000003
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#define	ADC_STEP_SAMPLE_DELAY		0xff000000
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#define	ADC_STEP_OPEN_DELAY		0x0003ffff
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#define	ADC_FIFO0COUNT		0x0e4
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#define	ADC_FIFO0THRESHOLD	0x0e8
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#define	ADC_FIFO1COUNT		0x0f0
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#define	ADC_FIFO1THRESHOLD	0x0f4
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#define	ADC_FIFO0DATA		0x100
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#define	ADC_FIFO1DATA		0x200
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#define	ADC_FIFO_COUNT_MSK		0x0000007f
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#define	ADC_FIFO_STEP_ID_MSK		0x000f0000
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#define	ADC_FIFO_STEP_ID_SHIFT		16
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#define	ADC_FIFO_DATA_MSK		0x00000fff
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#define	ADC_MAX_VALUE		0xfff
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#endif /* _TI_ADCREG_H_ */
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