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freebsd
GitHub Repository: freebsd/freebsd-src
Path: blob/main/sys/arm64/cavium/thunder_pcie_fdt.c
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/*
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* Copyright (C) 2016 Cavium Inc.
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* All rights reserved.
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*
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* Developed by Semihalf.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include "opt_platform.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/types.h>
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#include <sys/sysctl.h>
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#include <sys/kernel.h>
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#include <sys/rman.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/endian.h>
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#include <sys/cpuset.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pci_host_generic.h>
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#include <dev/pci/pci_host_generic_fdt.h>
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#include <dev/pci/pcib_private.h>
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#include "thunder_pcie_common.h"
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#include "pcib_if.h"
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#ifdef THUNDERX_PASS_1_1_ERRATA
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static struct resource * thunder_pcie_fdt_alloc_resource(device_t, device_t,
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int, int *, rman_res_t, rman_res_t, rman_res_t, u_int);
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static int thunder_pcie_fdt_release_resource(device_t, device_t,
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struct resource*);
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#endif
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static int thunder_pcie_fdt_attach(device_t);
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static int thunder_pcie_fdt_probe(device_t);
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static int thunder_pcie_fdt_get_id(device_t, device_t, enum pci_id_type,
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uintptr_t *);
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static const struct ofw_bus_devinfo *thunder_pcie_ofw_get_devinfo(device_t,
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device_t);
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/* OFW bus interface */
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struct thunder_pcie_ofw_devinfo {
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struct ofw_bus_devinfo di_dinfo;
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struct resource_list di_rl;
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};
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static device_method_t thunder_pcie_fdt_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, thunder_pcie_fdt_probe),
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DEVMETHOD(device_attach, thunder_pcie_fdt_attach),
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#ifdef THUNDERX_PASS_1_1_ERRATA
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DEVMETHOD(bus_alloc_resource, thunder_pcie_fdt_alloc_resource),
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DEVMETHOD(bus_release_resource, thunder_pcie_fdt_release_resource),
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#endif
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/* pcib interface */
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DEVMETHOD(pcib_get_id, thunder_pcie_fdt_get_id),
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/* ofw interface */
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DEVMETHOD(ofw_bus_get_devinfo, thunder_pcie_ofw_get_devinfo),
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DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
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DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
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DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
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DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
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DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
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/* End */
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DEVMETHOD_END
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};
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DEFINE_CLASS_1(pcib, thunder_pcie_fdt_driver, thunder_pcie_fdt_methods,
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sizeof(struct generic_pcie_fdt_softc), generic_pcie_fdt_driver);
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DRIVER_MODULE(thunder_pcib, simplebus, thunder_pcie_fdt_driver, 0, 0);
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DRIVER_MODULE(thunder_pcib, ofwbus, thunder_pcie_fdt_driver, 0, 0);
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static const struct ofw_bus_devinfo *
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thunder_pcie_ofw_get_devinfo(device_t bus __unused, device_t child)
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{
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struct thunder_pcie_ofw_devinfo *di;
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di = device_get_ivars(child);
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return (&di->di_dinfo);
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}
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static void
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get_addr_size_cells(phandle_t node, pcell_t *addr_cells, pcell_t *size_cells)
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{
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*addr_cells = 2;
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/* Find address cells if present */
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OF_getencprop(node, "#address-cells", addr_cells, sizeof(*addr_cells));
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*size_cells = 2;
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/* Find size cells if present */
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OF_getencprop(node, "#size-cells", size_cells, sizeof(*size_cells));
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}
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static int
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thunder_pcie_ofw_bus_attach(device_t dev)
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{
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struct thunder_pcie_ofw_devinfo *di;
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device_t child;
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phandle_t parent, node;
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pcell_t addr_cells, size_cells;
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parent = ofw_bus_get_node(dev);
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if (parent > 0) {
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get_addr_size_cells(parent, &addr_cells, &size_cells);
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/* Iterate through all bus subordinates */
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for (node = OF_child(parent); node > 0; node = OF_peer(node)) {
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/* Allocate and populate devinfo. */
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di = malloc(sizeof(*di), M_DEVBUF, M_WAITOK | M_ZERO);
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if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node) != 0) {
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free(di, M_DEVBUF);
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continue;
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}
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/* Initialize and populate resource list. */
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resource_list_init(&di->di_rl);
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ofw_bus_reg_to_rl(dev, node, addr_cells, size_cells,
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&di->di_rl);
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ofw_bus_intr_to_rl(dev, node, &di->di_rl, NULL);
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/* Add newbus device for this FDT node */
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child = device_add_child(dev, NULL, DEVICE_UNIT_ANY);
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if (child == NULL) {
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resource_list_free(&di->di_rl);
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ofw_bus_gen_destroy_devinfo(&di->di_dinfo);
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free(di, M_DEVBUF);
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continue;
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}
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device_set_ivars(child, di);
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}
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}
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return (0);
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}
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static int
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thunder_pcie_fdt_probe(device_t dev)
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{
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/* Check if we're running on Cavium ThunderX */
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if (!CPU_MATCH(CPU_IMPL_MASK | CPU_PART_MASK,
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CPU_IMPL_CAVIUM, CPU_PART_THUNDERX, 0, 0))
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return (ENXIO);
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_is_compatible(dev, "pci-host-ecam-generic") ||
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ofw_bus_is_compatible(dev, "cavium,thunder-pcie") ||
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ofw_bus_is_compatible(dev, "cavium,pci-host-thunder-ecam")) {
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device_set_desc(dev, "Cavium Integrated PCI/PCI-E Controller");
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return (BUS_PROBE_DEFAULT);
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}
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return (ENXIO);
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}
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static int
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thunder_pcie_fdt_attach(device_t dev)
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{
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struct generic_pcie_fdt_softc *sc;
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sc = device_get_softc(dev);
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thunder_pcie_identify_ecam(dev, &sc->base.ecam);
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sc->base.coherent = 1;
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/* Attach OFW bus */
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if (thunder_pcie_ofw_bus_attach(dev) != 0)
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return (ENXIO);
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return (pci_host_generic_fdt_attach(dev));
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}
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static int
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thunder_pcie_fdt_get_id(device_t pci, device_t child, enum pci_id_type type,
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uintptr_t *id)
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{
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phandle_t node;
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int bsf;
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if (type != PCI_ID_MSI)
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return (pcib_get_id(pci, child, type, id));
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node = ofw_bus_get_node(pci);
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if (OF_hasprop(node, "msi-map"))
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return (generic_pcie_get_id(pci, child, type, id));
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bsf = pci_get_rid(child);
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*id = (pci_get_domain(child) << PCI_RID_DOMAIN_SHIFT) | bsf;
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return (0);
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}
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#ifdef THUNDERX_PASS_1_1_ERRATA
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struct resource *
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thunder_pcie_fdt_alloc_resource(device_t dev, device_t child, int type,
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int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
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{
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struct generic_pcie_fdt_softc *sc;
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struct thunder_pcie_ofw_devinfo *di;
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struct resource_list_entry *rle;
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int i;
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/*
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* For PCIe devices that do not have FDT nodes pass
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* the request to the core driver.
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*/
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if ((int)ofw_bus_get_node(child) <= 0)
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return (thunder_pcie_alloc_resource(dev, child, type,
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rid, start, end, count, flags));
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/* For other devices use OFW method */
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sc = device_get_softc(dev);
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if (RMAN_IS_DEFAULT_RANGE(start, end)) {
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if ((di = device_get_ivars(child)) == NULL)
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return (NULL);
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if (type == SYS_RES_IOPORT)
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type = SYS_RES_MEMORY;
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/* Find defaults for this rid */
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rle = resource_list_find(&di->di_rl, type, *rid);
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if (rle == NULL)
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return (NULL);
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start = rle->start;
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end = rle->end;
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count = rle->count;
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}
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if (type == SYS_RES_MEMORY) {
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/* Remap through ranges property */
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for (i = 0; i < MAX_RANGES_TUPLES; i++) {
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if (start >= sc->base.ranges[i].phys_base &&
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end < (sc->base.ranges[i].pci_base +
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sc->base.ranges[i].size)) {
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start -= sc->base.ranges[i].phys_base;
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start += sc->base.ranges[i].pci_base;
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end -= sc->base.ranges[i].phys_base;
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end += sc->base.ranges[i].pci_base;
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break;
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}
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}
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if (i == MAX_RANGES_TUPLES) {
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device_printf(dev, "Could not map resource "
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"%#jx-%#jx\n", start, end);
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return (NULL);
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}
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}
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return (bus_generic_alloc_resource(dev, child, type, rid, start,
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end, count, flags));
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}
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static int
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thunder_pcie_fdt_release_resource(device_t dev, device_t child,
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struct resource *res)
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{
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if ((int)ofw_bus_get_node(child) <= 0)
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return (pci_host_generic_core_release_resource(dev, child,
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res));
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return (bus_generic_release_resource(dev, child, res));
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}
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#endif
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