Path: blob/main/sys/arm64/cavium/thunder_pcie_pem_fdt.c
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/*1* Copyright (C) 2016 Cavium Inc.2* All rights reserved.3*4* Developed by Semihalf.5*6* Redistribution and use in source and binary forms, with or without7* modification, are permitted provided that the following conditions8* are met:9* 1. Redistributions of source code must retain the above copyright10* notice, this list of conditions and the following disclaimer.11* 2. Redistributions in binary form must reproduce the above copyright12* notice, this list of conditions and the following disclaimer in the13* documentation and/or other materials provided with the distribution.14*15* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND16* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE17* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE18* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE19* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL20* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS21* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)22* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT23* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY24* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF25* SUCH DAMAGE.26*/27#include <sys/cdefs.h>28#include "opt_platform.h"2930#include <sys/param.h>31#include <sys/systm.h>32#include <sys/malloc.h>33#include <sys/types.h>34#include <sys/sysctl.h>35#include <sys/kernel.h>36#include <sys/rman.h>37#include <sys/module.h>38#include <sys/bus.h>39#include <sys/endian.h>40#include <sys/cpuset.h>4142#include <dev/ofw/openfirm.h>43#include <dev/ofw/ofw_bus.h>44#include <dev/ofw/ofw_bus_subr.h>4546#include <dev/pci/pcivar.h>47#include <dev/pci/pcireg.h>48#include <dev/pci/pcib_private.h>49#include <dev/pci/pci_host_generic.h>5051#include <machine/intr.h>5253#include "thunder_pcie_common.h"54#include "thunder_pcie_pem.h"5556#include "pcib_if.h"5758static int thunder_pem_fdt_probe(device_t);59static int thunder_pem_fdt_alloc_msix(device_t, device_t, int *);60static int thunder_pem_fdt_release_msix(device_t, device_t, int);61static int thunder_pem_fdt_alloc_msi(device_t, device_t, int, int, int *);62static int thunder_pem_fdt_release_msi(device_t, device_t, int, int *);63static int thunder_pem_fdt_map_msi(device_t, device_t, int, uint64_t *,64uint32_t *);65static int thunder_pem_fdt_get_id(device_t, device_t, enum pci_id_type,66uintptr_t *);6768static device_method_t thunder_pem_fdt_methods[] = {69/* Device interface */70DEVMETHOD(device_probe, thunder_pem_fdt_probe),7172/* pcib interface */73DEVMETHOD(pcib_alloc_msix, thunder_pem_fdt_alloc_msix),74DEVMETHOD(pcib_release_msix, thunder_pem_fdt_release_msix),75DEVMETHOD(pcib_alloc_msi, thunder_pem_fdt_alloc_msi),76DEVMETHOD(pcib_release_msi, thunder_pem_fdt_release_msi),77DEVMETHOD(pcib_map_msi, thunder_pem_fdt_map_msi),78DEVMETHOD(pcib_get_id, thunder_pem_fdt_get_id),7980/* End */81DEVMETHOD_END82};8384DEFINE_CLASS_1(pcib, thunder_pem_fdt_driver, thunder_pem_fdt_methods,85sizeof(struct thunder_pem_softc), thunder_pem_driver);8687DRIVER_MODULE(thunder_pem, simplebus, thunder_pem_fdt_driver, 0, 0);88DRIVER_MODULE(thunder_pem, ofwbus, thunder_pem_fdt_driver, 0, 0);8990static int91thunder_pem_fdt_probe(device_t dev)92{9394if (!ofw_bus_status_okay(dev))95return (ENXIO);9697if (ofw_bus_is_compatible(dev, "cavium,pci-host-thunder-pem")) {98device_set_desc(dev, THUNDER_PEM_DESC);99return (BUS_PROBE_DEFAULT);100}101102return (ENXIO);103}104105static int106thunder_pem_fdt_alloc_msi(device_t pci, device_t child, int count, int maxcount,107int *irqs)108{109phandle_t msi_parent;110int err;111112err = ofw_bus_msimap(ofw_bus_get_node(pci), pci_get_rid(child),113&msi_parent, NULL);114if (err != 0)115return (err);116return (intr_alloc_msi(pci, child, msi_parent, count, maxcount,117irqs));118}119120static int121thunder_pem_fdt_release_msi(device_t pci, device_t child, int count, int *irqs)122{123phandle_t msi_parent;124int err;125126err = ofw_bus_msimap(ofw_bus_get_node(pci), pci_get_rid(child),127&msi_parent, NULL);128if (err != 0)129return (err);130return (intr_release_msi(pci, child, msi_parent, count, irqs));131}132133static int134thunder_pem_fdt_alloc_msix(device_t pci, device_t child, int *irq)135{136phandle_t msi_parent;137int err;138139err = ofw_bus_msimap(ofw_bus_get_node(pci), pci_get_rid(child),140&msi_parent, NULL);141if (err != 0)142return (err);143return (intr_alloc_msix(pci, child, msi_parent, irq));144}145146static int147thunder_pem_fdt_release_msix(device_t pci, device_t child, int irq)148{149phandle_t msi_parent;150int err;151152err = ofw_bus_msimap(ofw_bus_get_node(pci), pci_get_rid(child),153&msi_parent, NULL);154if (err != 0)155return (err);156return (intr_release_msix(pci, child, msi_parent, irq));157}158159static int160thunder_pem_fdt_map_msi(device_t pci, device_t child, int irq, uint64_t *addr,161uint32_t *data)162{163phandle_t msi_parent;164int err;165166err = ofw_bus_msimap(ofw_bus_get_node(pci), pci_get_rid(child),167&msi_parent, NULL);168if (err != 0)169return (err);170return (intr_map_msi(pci, child, msi_parent, irq, addr, data));171}172173static int174thunder_pem_fdt_get_id(device_t dev, device_t child, enum pci_id_type type,175uintptr_t *id)176{177phandle_t node;178int err;179uint32_t rid;180uint16_t pci_rid;181182if (type != PCI_ID_MSI)183return (pcib_get_id(dev, child, type, id));184185node = ofw_bus_get_node(dev);186pci_rid = pci_get_rid(child);187188err = ofw_bus_msimap(node, pci_rid, NULL, &rid);189if (err != 0)190return (err);191*id = rid;192193return (0);194}195196197