CoCalc -- imx8mp

GitHub Repository: freebsd/freebsd-src
Path: blob/main/sys/arm64/freescale/imx/imx8mp_ccm.c
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/*-
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 * SPDX-License-Identifier: BSD-2-Clause
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 *
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 * Copyright (c) 2020 Oleksandr Tymoshenko <[email protected]>
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 * Copyright (c) 2024 The FreeBSD Foundation
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 *
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 * Portions of this software were developed by Tom Jones <[email protected]>
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 * under sponsorship from the FreeBSD Foundation.
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 */
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#include <sys/cdefs.h>
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/*
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 * Clocks driver for Freescale i.MX 8M Plus SoC.
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 */
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <machine/bus.h>
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#include <arm64/freescale/imx/imx_ccm.h>
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#include <arm64/freescale/imx/imx8mp_ccm.h>
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#include <arm64/freescale/imx/clk/imx_clk_gate.h>
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#include <arm64/freescale/imx/clk/imx_clk_mux.h>
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#include <arm64/freescale/imx/clk/imx_clk_composite.h>
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#include <arm64/freescale/imx/clk/imx_clk_sscg_pll.h>
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#include <arm64/freescale/imx/clk/imx_clk_frac_pll.h>
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static const char *pll_ref_p[] = {
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	"osc_24m", "dummy", "dummy", "dummy"
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};
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static const char * audio_pll1_bypass_p[] = {
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	"audio_pll1", "audio_pll1_ref_sel"
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};
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static const char * audio_pll2_bypass_p[] = {
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	"audio_pll2", "audio_pll2_ref_sel"
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};
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static const char * video_pll1_bypass_p[] = {
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	"video_pll1", "video_pll1_ref_sel"
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};
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static const char * dram_pll_bypass_p[] = {
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	"dram_pll", "dram_pll_ref_sel"
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};
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static const char * gpu_pll_bypass_p[] = {
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	"gpu_pll", "gpu_pll_ref_sel"
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};
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static const char * vpu_pll_bypass_p[] = {
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	"vpu_pll", "vpu_pll_ref_sel"
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};
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static const char * arm_pll_bypass_p[] = {
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	"arm_pll", "arm_pll_ref_sel"
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};
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static const char * sys_pll1_bypass_p[] = {
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	"sys_pll1", "sys_pll1_ref_sel"
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};
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static const char * sys_pll2_bypass_p[] = {
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	"sys_pll2", "sys_pll2_ref_sel"
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};
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static const char * sys_pll3_bypass_p[] = {
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	"sys_pll3", "sys_pll3_ref_sel"
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};
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/* 
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 * Table 5-1 of "i.MX 8M Plus Applications Processor Reference Manual" provides
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 * the Clock Root Table.
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 */
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static const char *a53_p[] = {
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	"osc_24m", "arm_pll_out", "sys_pll2_500m", "sys_pll2_1000m",
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	"sys_pll1_800m", "sys_pll1_400m", "audio_pll1_out", "sys_pll3_out"
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};
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static const char * a53_core_p[] = {
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	"arm_a53_div", "arm_pll_out"
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};
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static const char *ahb_p[] = {
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	"osc_24m", "sys_pll1_133m", "sys_pll1_800m", "sys_pll1_400m",
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	"sys_pll2_125m", "sys_pll3_out", "audio_pll1_out", "video_pll1_out"
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};
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static const char *audio_ahb_p[] = {
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	"osc_24m", "sys_pll2_500m", "sys_pll1_800m", "sys_pll2_1000m",
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	"sys_pll2_166m", "sys_pll3_out", "audio_pll1_out", "video_pll1_out"
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};
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static const char *audio_axi_p[] = {
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	"osc_24m", "gpu_pll_out", "sys_pll1_800m", "sys_pll3_out",
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	"sys_pll2_1000m", "audio_pll1_out", "video_pll1_out", "audio_pll2_out"
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};
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static const char *can_p[] = {
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	"osc_24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll1_160m",
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	"sys_pll1_800m", "sys_pll3_out", "sys_pll2_250m", "audio_pll2_out"
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};
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static const char *clkout_p[] = {
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	"audio_pll1_out", "audio_pll2_out", "video_pll1_out", "dummy", "dummy",
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	"gpu_pll_out", "vpu_pll_out", "arm_pll_out", "sys_pll1", "sys_pll2",
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	"sys_pll3", "dummy", "dummy", "osc_24m", "dummy", "osc_32k"
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};
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static const char *dram_alt_p[] = {
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	"osc_24m", "sys_pll1_800m", "sys_pll1_100m", "sys_pll2_500m",
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	"sys_pll2_1000m", "sys_pll3_out", "audio_pll1_out", "sys_pll1_266m"
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};
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static const char *dram_apb_p[] = {
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	"osc_24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll1_160m",
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	"sys_pll1_800m", "sys_pll3_out", "sys_pll2_250m", "audio_pll2_out"
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};
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static const char *dram_core_p[] = {
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	"dram_pll_out", "dram_alt_root"
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};
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static const char *ecspi_p[] = {
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	"osc_24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll1_160m",
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	"sys_pll1_800m", "sys_pll3_out", "sys_pll2_250m", "audio_pll2_out"
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};
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static const char *enet_axi_p[] = {
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	"osc_24m", "sys_pll1_266m", "sys_pll1_800m", "sys_pll2_250m",
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	"sys_pll2_200m", "audio_pll1_out", "video_pll1_out", "sys_pll3_out"
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};
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static const char *enet_phy_ref_p[] = {
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	"osc_24m", "sys_pll2_50m", "sys_pll2_125m", "sys_pll2_200m",
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	"sys_pll2_500m", "audio_pll1_out", "video_pll1_out", "audio_pll2_out",
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};
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static const char *enet_qos_p[] = {
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	"osc_24m", "sys_pll2_125m", "sys_pll2_50m", "sys_pll2_100m",
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	"sys_pll1_160m", "audio_pll1_out", "video_pll1_out", "clk_ext4",
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};
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static const char *enet_qos_timer_p[] = {
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	"osc_24m", "sys_pll2_100m", "audio_pll1_out", "clk_ext1", "clk_ext2",
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	"clk_ext3", "clk_ext4", "video_pll1_out",
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};
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static const char *enet_ref_p[] = {
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	"osc_24m", "sys_pll2_125m", "sys_pll2_50m", "sys_pll2_100m",
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	"sys_pll1_160m", "audio_pll1_out", "video_pll1_out", "clk_ext4",
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};
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static const char *enet_timer_p[] = {
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	"osc_24m", "sys_pll2_100m", "audio_pll1_out", "clk_ext1", "clk_ext2",
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	"clk_ext3", "clk_ext4", "video_pll1_out",
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};
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static const char *gic_p[] = {
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	"osc_24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll2_100m",
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	"sys_pll1_800m", "sys_pll2_500m", "clk_ext4", "audio_pll2_out"
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};
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static const char *gpt_p[] = {
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	"osc_24m", "sys_pll2_100m", "sys_pll1_400m", "sys_pll1_40m",
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	"video_pll1_out", "sys_pll1_80m", "audio_pll1_out", "clk_ext1"
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};
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static const char *gpu_p[] = {
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	"osc_24m", "gpu_pll_out", "sys_pll1_800m", "sys_pll3_out",
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	"sys_pll2_1000m", "audio_pll1_out", "video_pll1_out", "audio_pll2_out"
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};
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static const char *gpu_ahb_p[] = {
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	"osc_24m", "sys_pll1_800m", "gpu_pll_out", "sys_pll3_out",
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	"sys_pll2_1000m", "audio_pll1_out", "video_pll1_out", "audio_pll2_out"
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};
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static const char *gpu_axi_p[] = {
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	"osc_24m", "sys_pll1_800m", "gpu_pll_out", "sys_pll3_out",
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	"sys_pll2_1000m", "audio_pll1_out", "video_pll1_out", "audio_pll2_out"
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};
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static const char *hdmi_24m_p[] = {
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	"osc_24m", "sys_pll1_160m", "sys_pll2_50m", "sys_pll3_out",
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	"audio_pll1_out", "video_pll1_out", "audio_pll2_out", "sys_pll1_133m"
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};
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static const char *hdmi_fdcc_tst_p[] = {
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	"osc_24m", "sys_pll1_266m", "sys_pll2_250m", "sys_pll1_800m",
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	"sys_pll2_1000m", "sys_pll3_out", "audio_pll2_out", "video_pll1_out"
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};
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static const char *hdmi_ref_266m_p[] = {
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	"osc_24m", "sys_pll1_400m", "sys_pll3_out", "sys_pll2_333m",
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	"sys_pll1_266m", "sys_pll2_200m", "audio_pll1_out", "video_pll1_out"
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};
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static const char *hsio_axi_p[] = {
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	"osc_24m", "sys_pll2_500m", "sys_pll1_800m", "sys_pll2_100m",
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	"sys_pll2_200m", "clk_ext2", "clk_ext4", "audio_pll2_out"
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};
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static const char *i2c_p[] = {
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	"osc_24m", "sys_pll1_160m", "sys_pll2_50m", "sys_pll3_out",
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	"audio_pll1_out", "video_pll1_out", "audio_pll2_out", "sys_pll1_133m"
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};
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static const char *ipp_do_clko1_p[] = {
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	"osc_24m", "sys_pll1_800m", "sys_pll1_133m", "sys_pll1_200m",
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	"audio_pll2_out", "sys_pll2_500m", "vpu_pll_out", "sys_pll1_80m"
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};
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static const char *ipp_do_clko2_p[] = {
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	"osc_24m", "sys_pll2_200m", "sys_pll1_400m", "sys_pll2_166m",
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	"sys_pll3_out", "audio_pll1_out", "video_pll1_out", "osc_32k"
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};
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static const char *m7_p[] = {
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	"osc_24m", "sys_pll2_200m", "sys_pll2_250m", "vpu_pll_out",
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	"sys_pll1_800m", "audio_pll1_out", "video_pll1_out", "sys_pll3_out"
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};
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static const char *main_axi_p[] = {
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	"osc_24m", "sys_pll2_333m", "sys_pll1_800m", "sys_pll2_250m",
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	"sys_pll2_1000m", "audio_pll1_out", "video_pll1_out", "sys_pll1_100m"
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};
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static const char *media_apb_p[] = {
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	"osc_24m", "sys_pll2_125m", "sys_pll1_800m", "sys_pll3_out",
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	"sys_pll1_40m", "audio_pll2_out", "clk_ext1", "sys_pll1_133m"
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};
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static const char *media_axi_p[] = {
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	"osc_24m", "sys_pll2_1000m", "sys_pll1_800m", "sys_pll3_out",
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	"sys_pll1_40m", "audio_pll2_out", "clk_ext1", "sys_pll2_500m"
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};
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static const char *media_cam1_pix_p[] = {
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	"osc_24m", "sys_pll1_266m", "sys_pll2_250m", "sys_pll1_800m",
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	"sys_pll2_1000m", "sys_pll3_out", "audio_pll2_out", "video_pll1_out"
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};
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static const char *media_cam2_pix_p[] = {
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		"osc_24m", "sys_pll1_266m", "sys_pll2_250m", "sys_pll1_800m",
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		"sys_pll2_1000m", "sys_pll3_out", "audio_pll2_out",
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		"video_pll1_out"
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};
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static const char *media_disp_pix_p[] = {
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	"osc_24m", "video_pll1_out", "audio_pll2_out", "audio_pll1_out",
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	"sys_pll1_800m", "sys_pll2_1000m", "sys_pll3_out", "clk_ext4"
219
};
220
static const char *media_isp_p[] = {
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	"osc_24m", "sys_pll2_1000m", "sys_pll1_800m", "sys_pll3_out",
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	"sys_pll1_400m", "audio_pll2_out", "clk_ext1", "sys_pll2_500m"
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};
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static const char *media_mipi_phy1_ref_p[] = {
225
	"osc_24m", "sys_pll2_333m", "sys_pll2_100m", "sys_pll1_800m",
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	"sys_pll2_1000m", "clk_ext2", "audio_pll2_out", "video_pll1_out"
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};
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static const char *media_mipi_test_byte_p[] = {
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	"osc_24m", "sys_pll2_200m", "sys_pll2_50m", "sys_pll3_out",
230
	"sys_pll2_100m", "sys_pll1_80m", "sys_pll1_160m", "sys_pll1_200m"
231
};
232
static const char *media_ldb_p[] = {
233
	"osc_24m", "sys_pll2_333m", "sys_pll2_100m", "sys_pll1_800m",
234
	"sys_pll2_1000m", "clk_ext2", "audio_pll2_out", "video_pll1_out"
235
};
236
static const char *memrepair_p[] = {
237
	"osc_24m", "sys_pll2_100m", "sys_pll1_80m", "sys_pll1_800m",
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	"sys_pll2_1000m", "sys_pll3_out", "clk_ext3", "audio_pll2_out"
239
};
240
static const char *mipi_dsi_esc_rx_p[] = {
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	"osc_24m", "sys_pll2_100m", "sys_pll1_80m", "sys_pll1_800m",
242
	"sys_pll2_1000m", "sys_pll3_out", "clk_ext3", "audio_pll2_out"
243
};
244
static const char *ml_p[] = {
245
	"osc_24m", "gpu_pll_out", "sys_pll1_800m", "sys_pll3_out",
246
	"sys_pll2_1000m", "audio_pll1_out", "video_pll1_out", "audio_pll2_out"
247
};
248
static const char *ml_ahb_p[] = {
249
	"osc_24m", "sys_pll1_800m", "gpu_pll_out", "sys_pll3_out",
250
	"sys_pll2_1000m", "audio_pll1_out", "video_pll1_out", "audio_pll2_out"
251
};
252
static const char *ml_axi_p[] = {
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	"osc_24m", "sys_pll1_800m", "gpu_pll_out", "sys_pll3_out",
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	"sys_pll2_1000m", "audio_pll1_out", "video_pll1_out", "audio_pll2_out"
255
};
256
static const char *nand_p[] = {
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	"osc_24m", "sys_pll2_500m", "audio_pll1_out", "sys_pll1_400m",
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	"audio_pll2_out", "sys_pll3_out", "sys_pll2_250m", "video_pll1_out"
259
};
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static const char *noc_p[] = {
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	"osc_24m", "sys_pll1_800m", "sys_pll3_out", "sys_pll2_1000m",
262
	"sys_pll2_500m", "audio_pll1_out", "video_pll1_out", "audio_pll2_out"
263
};
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static const char *noc_io_p[] = {
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	"osc_24m", "sys_pll1_800m", "sys_pll3_out", "sys_pll2_1000m",
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	"sys_pll2_500m", "audio_pll1_out", "video_pll1_out", "audio_pll2_out"
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};
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static const char *pcie_aux_p[] = {
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	"osc_24m", "sys_pll2_200m", "sys_pll2_50m", "sys_pll3_out",
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	"sys_pll2_100m", "sys_pll1_80m", "sys_pll1_160m", "sys_pll1_200m"
271
};
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static const char *pdm_p[] = {
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	"osc_24m", "sys_pll2_100m", "audio_pll1_out", "sys_pll1_800m",
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	"sys_pll2_1000m", "sys_pll3_out", "clk_ext3", "audio_pll2_out"
275
};
276
static const char *pwm_p[] = {
277
	"osc_24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m",
278
	"sys_pll3_out", "clk_ext1", "sys_pll1_80m", "video_pll1_out"
279
};
280
static const char *qspi_p[] = {
281
	"osc_24m", "sys_pll1_400m", "sys_pll2_333m", "sys_pll2_500m",
282
	"audio_pll2_out", "sys_pll1_266m", "sys_pll3_out", "sys_pll1_100m"
283
};
284
static const char *sai1_p[] = {
285
	"osc_24m" , "sys_pll1_133m" , "audio_pll1_out", "audio_pll2_out",
286
	"video_pll1_out", "clk_ext1", "clk_ext2", "dummy",
287
};
288
static const char *sai2_p[] = {
289
	"osc_24m" , "sys_pll1_133m" , "audio_pll1_out", "audio_pll2_out",
290
	"video_pll1_out", "clk_ext2", "clk_ext3", "dummy",
291
};
292
static const char *sai3_p[] = {
293
	"osc_24m" , "sys_pll1_133m" , "audio_pll1_out", "audio_pll2_out",
294
	"video_pll1_out", "clk_ext3", "clk_ext4", "dummy",
295
};
296
static const char *sai5_p[] = {
297
	"osc_24m" , "sys_pll1_133m" , "audio_pll1_out", "audio_pll2_out",
298
	"video_pll1_out", "clk_ext2", "clk_ext3", "dummy",
299
};
300
static const char *sai6_p[] = {
301
	"osc_24m" , "sys_pll1_133m" , "audio_pll1_out", "audio_pll2_out",
302
	"video_pll1_out", "clk_ext3", "clk_ext4", "dummy",
303
};
304
static const char *sai7_p[] = {
305
	"osc_24m" , "sys_pll1_133m" , "audio_pll1_out", "audio_pll2_out",
306
	"video_pll1_out", "clk_ext3", "clk_ext4", "dummy",
307
};
308
static const char *uart_p[] = {
309
	"osc_24m", "sys_pll1_80m", "sys_pll2_200m", "sys_pll2_100m",
310
	"sys_pll3_out", "clk_ext2", "clk_ext4", "audio_pll2_out"
311
};
312
static const char *usb_core_ref_p[] = {
313
	"osc_24m", "sys_pll1_100m", "sys_pll1_40m", "sys_pll2_100m",
314
	"sys_pll2_200m", "clk_ext2", "clk_ext3", "audio_pll2_out"
315
};
316
static const char *usdhc_p[] = {
317
	"osc_24m", "sys_pll1_400m", "sys_pll1_800m", "sys_pll2_500m",
318
	"sys_pll3_out", "sys_pll1_266m", "audio_pll2_out", "sys_pll1_100m"
319
};
320
static const char *usb_phy_ref_p[] = {
321
	"osc_24m", "sys_pll1_100m", "sys_pll1_40m", "sys_pll2_100m",
322
	"sys_pll2_200m", "clk_ext2", "clk_ext3", "audio_pll2_out"
323
};
324
static const char *usdhc_nand_p[] = {
325
	"osc_24m", "sys_pll1_266m", "sys_pll1_800m", "sys_pll2_200m",
326
	"sys_pll1_133m", "sys_pll3_out", "sys_pll2_250m", "audio_pll1_out"
327
};
328
static const char *vpu_bus_p[] = {
329
	"osc_24m", "sys_pll1_800m", "vpu_pll_out", "audio_pll2_out",
330
	"sys_pll3_out", "sys_pll2_1000m", "sys_pll2_200m", "sys_pll1_100m"
331
};
332
static const char *vpu_g_p[] = {
333
	"osc_24m", "vpu_pll_out", "sys_pll1_800m", "sys_pll2_1000m",
334
	"sys_pll1_100m", "sys_pll2_125m", "sys_pll3_out", "audio_pll1_out"
335
};
336
static const char *vpu_vc8000e_p[] = {
337
	"osc_24m", "vpu_pll_out", "sys_pll1_800m", "sys_pll2_1000m",
338
	"audio_pll2_out", "sys_pll2_125m", "sys_pll3_out", "audio_pll1_out"
339
};
340
static const char *wdog_p[] = {
341
	"osc_24m", "sys_pll1_133m", "sys_pll1_160m", "vpu_pll_out",
342
	"sys_pll2_125m", "sys_pll3_out", "sys_pll1_80m", "sys_pll2_166m"
343
};
344
static const char *wrclk_p[] = {
345
	"osc_24m", "sys_pll1_40m", "vpu_pll_out", "sys_pll3_out",
346
	"sys_pll2_200m", "sys_pll1_266m", "sys_pll2_500m", "sys_pll1_100m"
347
};
348

349
static struct imx_clk imx8mp_clks[] = {
350
	FIXED(IMX8MP_CLK_DUMMY, "dummy", 0),
351

352
	LINK(IMX8MP_CLK_32K, "osc_32k"),
353
	LINK(IMX8MP_CLK_24M, "osc_24m"),
354
	LINK(IMX8MP_CLK_EXT1, "clk_ext1"),
355
	LINK(IMX8MP_CLK_EXT2, "clk_ext2"),
356
	LINK(IMX8MP_CLK_EXT3, "clk_ext3"),
357
	LINK(IMX8MP_CLK_EXT4, "clk_ext4"),
358

359
	MUX(IMX8MP_AUDIO_PLL1_REF_SEL, "audio_pll1_ref_sel", pll_ref_p, 0, 0x00, 0, 2),
360
	MUX(IMX8MP_AUDIO_PLL2_REF_SEL, "audio_pll2_ref_sel", pll_ref_p, 0, 0x14, 0, 2),
361
	MUX(IMX8MP_VIDEO_PLL1_REF_SEL, "video_pll1_ref_sel", pll_ref_p, 0, 0x28, 0, 2),
362
	MUX(IMX8MP_DRAM_PLL_REF_SEL, "dram_pll_ref_sel", pll_ref_p, 0, 0x50, 0, 2),
363
	MUX(IMX8MP_GPU_PLL_REF_SEL, "gpu_pll_ref_sel", pll_ref_p, 0, 0x64, 0, 2),
364
	MUX(IMX8MP_VPU_PLL_REF_SEL, "vpu_pll_ref_sel", pll_ref_p, 0, 0x74, 0, 2),
365
	MUX(IMX8MP_ARM_PLL_REF_SEL, "arm_pll_ref_sel", pll_ref_p, 0, 0x84, 0, 2),
366
	MUX(IMX8MP_SYS_PLL1_REF_SEL, "sys_pll1_ref_sel", pll_ref_p, 0, 0x94, 0, 2),
367
	MUX(IMX8MP_SYS_PLL2_REF_SEL, "sys_pll2_ref_sel", pll_ref_p, 0, 0x104, 0, 2),
368
	MUX(IMX8MP_SYS_PLL3_REF_SEL, "sys_pll3_ref_sel", pll_ref_p, 0, 0x114, 0, 2),
369

370
	FRAC_PLL(IMX8MP_AUDIO_PLL1, "audio_pll1", "audio_pll1_ref_sel", 0x00),
371
	FRAC_PLL(IMX8MP_AUDIO_PLL2, "audio_pll2", "audio_pll2_ref_sel", 0x14),
372
	FRAC_PLL(IMX8MP_VIDEO_PLL1, "video_pll1", "video_pll1_ref_sel", 0x28),
373
	FRAC_PLL(IMX8MP_DRAM_PLL, "dram_pll", "dram_pll_ref_sel", 0x50),
374
	FRAC_PLL(IMX8MP_GPU_PLL, "gpu_pll", "gpu_pll_ref_sel", 0x64),
375
	FRAC_PLL(IMX8MP_VPU_PLL, "vpu_pll", "vpu_pll_ref_sel", 0x74),
376
	FRAC_PLL(IMX8MP_ARM_PLL, "arm_pll", "arm_pll_ref_sel", 0x84),
377
	FRAC_PLL(IMX8MP_SYS_PLL1, "sys_pll1", "sys_pll1_ref_sel", 0x94),
378
	FRAC_PLL(IMX8MP_SYS_PLL2, "sys_pll2", "sys_pll2_ref_sel", 0x104),
379
	FRAC_PLL(IMX8MP_SYS_PLL3, "sys_pll3", "sys_pll3_ref_sel", 0x114),
380

381
	MUX(IMX8MP_AUDIO_PLL1_BYPASS, "audio_pll1_bypass", audio_pll1_bypass_p, 1, 0x00, 16, 1),
382
	MUX(IMX8MP_AUDIO_PLL2_BYPASS, "audio_pll2_bypass", audio_pll2_bypass_p, 1, 0x14, 16, 1),
383
	MUX(IMX8MP_VIDEO_PLL1_BYPASS, "video_pll1_bypass", video_pll1_bypass_p, 1, 0x28, 16, 1),
384
	MUX(IMX8MP_DRAM_PLL_BYPASS, "dram_pll_bypass", dram_pll_bypass_p, 1, 0x50, 16, 1),
385
	MUX(IMX8MP_GPU_PLL_BYPASS, "gpu_pll_bypass", gpu_pll_bypass_p, 1, 0x64, 28, 1),
386
	MUX(IMX8MP_VPU_PLL_BYPASS, "vpu_pll_bypass", vpu_pll_bypass_p, 1, 0x74, 28, 1),
387
	MUX(IMX8MP_ARM_PLL_BYPASS, "arm_pll_bypass", arm_pll_bypass_p, 1, 0x84, 28, 1),
388
	MUX(IMX8MP_SYS_PLL1_BYPASS, "sys_pll1_bypass", sys_pll1_bypass_p, 1, 0x94, 28, 1),
389
	MUX(IMX8MP_SYS_PLL2_BYPASS, "sys_pll2_bypass", sys_pll2_bypass_p, 1, 0x104, 28, 1),
390
	MUX(IMX8MP_SYS_PLL3_BYPASS, "sys_pll3_bypass", sys_pll3_bypass_p, 1, 0x114, 28, 1),
391

392
	GATE(IMX8MP_AUDIO_PLL1_OUT, "audio_pll1_out", "audio_pll1_bypass", 0x00, 13),
393
	GATE(IMX8MP_AUDIO_PLL2_OUT, "audio_pll2_out", "audio_pll2_bypass", 0x14, 13),
394
	GATE(IMX8MP_VIDEO_PLL1_OUT, "video_pll1_out", "video_pll1_bypass", 0x28, 13),
395
	GATE(IMX8MP_DRAM_PLL_OUT, "dram_pll_out", "dram_pll_bypass", 0x50, 13),
396
	GATE(IMX8MP_GPU_PLL_OUT, "gpu_pll_out", "gpu_pll_bypass", 0x64, 11),
397
	GATE(IMX8MP_VPU_PLL_OUT, "vpu_pll_out", "vpu_pll_bypass", 0x74, 11),
398
	GATE(IMX8MP_ARM_PLL_OUT, "arm_pll_out", "arm_pll_bypass", 0x84, 11),
399
	GATE(IMX8MP_SYS_PLL1_OUT, "sys_pll1_out", "sys_pll1_bypass", 0x94, 11),
400
	GATE(IMX8MP_SYS_PLL2_OUT, "sys_pll2_out", "sys_pll2_bypass", 0x104, 11),
401
	GATE(IMX8MP_SYS_PLL3_OUT, "sys_pll3_out", "sys_pll3_bypass", 0x114, 11),
402

403
	FFACT(IMX8MP_SYS_PLL1_40M, "sys_pll1_40m", "sys_pll1_out", 1, 20),
404
	FFACT(IMX8MP_SYS_PLL1_80M, "sys_pll1_80m", "sys_pll1_out", 1, 10),
405
	FFACT(IMX8MP_SYS_PLL1_100M, "sys_pll1_100m", "sys_pll1_out", 1, 8),
406
	FFACT(IMX8MP_SYS_PLL1_133M, "sys_pll1_133m", "sys_pll1_out", 1, 6),
407
	FFACT(IMX8MP_SYS_PLL1_160M, "sys_pll1_160m", "sys_pll1_out", 1, 5),
408
	FFACT(IMX8MP_SYS_PLL1_200M, "sys_pll1_200m", "sys_pll1_out", 1, 4),
409
	FFACT(IMX8MP_SYS_PLL1_266M, "sys_pll1_266m", "sys_pll1_out", 1, 3),
410
	FFACT(IMX8MP_SYS_PLL1_400M, "sys_pll1_400m", "sys_pll1_out", 1, 2),
411
	FFACT(IMX8MP_SYS_PLL1_800M, "sys_pll1_800m", "sys_pll1_out", 1, 1),
412

413
	FFACT(IMX8MP_SYS_PLL2_50M, "sys_pll2_50m", "sys_pll2_out", 1, 20),
414
	FFACT(IMX8MP_SYS_PLL2_100M, "sys_pll2_100m", "sys_pll2_out", 1, 10),
415
	FFACT(IMX8MP_SYS_PLL2_125M, "sys_pll2_125m", "sys_pll2_out", 1, 8),
416
	FFACT(IMX8MP_SYS_PLL2_166M, "sys_pll2_166m", "sys_pll2_out", 1, 6),
417
	FFACT(IMX8MP_SYS_PLL2_200M, "sys_pll2_200m", "sys_pll2_out", 1, 5),
418
	FFACT(IMX8MP_SYS_PLL2_250M, "sys_pll2_250m", "sys_pll2_out", 1, 4),
419
	FFACT(IMX8MP_SYS_PLL2_333M, "sys_pll2_333m", "sys_pll2_out", 1, 3),
420
	FFACT(IMX8MP_SYS_PLL2_500M, "sys_pll2_500m", "sys_pll2_out", 1, 2),
421
	FFACT(IMX8MP_SYS_PLL2_1000M, "sys_pll2_1000m", "sys_pll2_out", 1, 1),
422

423
	MUX(IMX8MP_CLK_CLKOUT1_SEL, "clkout1_sel", clkout_p, 0x128, 4, 4, 1),
424
	DIV(IMX8MP_CLK_CLKOUT1_DIV, "clkout1_div", "clkout1_sel", 0x128, 0, 4),
425
	GATE(IMX8MP_CLK_CLKOUT1, "clkout1", "clkout1_div", 0x128, 8),
426

427
	MUX(IMX8MP_CLK_CLKOUT2_SEL, "clkout2_sel", clkout_p, 0x128, 20, 4, 1),
428
	DIV(IMX8MP_CLK_CLKOUT2_DIV, "clkout2_div", "clkout2_sel", 0x128, 16, 4),
429
	GATE(IMX8MP_CLK_CLKOUT2, "clkout2", "clkout2_div", 0x128, 24),
430

431
	COMPOSITE(IMX8MP_CLK_A53_DIV, "arm_a53_div", a53_p, 0x8000, 0),
432
	COMPOSITE(IMX8MP_CLK_M7_CORE, "m7_core", m7_p, 0x8080, 0),
433
	COMPOSITE(IMX8MP_CLK_ML_CORE, "ml_core", ml_p, 0x8100, 0),
434
	COMPOSITE(IMX8MP_CLK_GPU3D_CORE, "gpu3d_core", gpu_p, 0x8180, 0),
435
	COMPOSITE(IMX8MP_CLK_GPU3D_SHADER_CORE, "gpu3d_shader", gpu_p, 0x8200, 0),
436
	COMPOSITE(IMX8MP_CLK_GPU2D_CORE, "gpu2d_core", gpu_p, 0x8280, 0),
437
	COMPOSITE(IMX8MP_CLK_AUDIO_AXI, "audio_axi", audio_axi_p, 0x8300, 0),
438
	COMPOSITE(IMX8MP_CLK_HSIO_AXI, "hsio_axi", hsio_axi_p, 0x8380, 0),
439
	COMPOSITE(IMX8MP_CLK_MEDIA_ISP, "media_isp", media_isp_p, 0x8400, 0),
440
	COMPOSITE(IMX8MP_CLK_NAND_USDHC_BUS, "nand_usdhc_bus", usdhc_nand_p, 0x8900, 1),
441

442
	MUX(IMX8MP_CLK_A53_CORE, "arm_a53_core", a53_core_p, 0x9880, 24, 1, 1),
443

444
	COMPOSITE(IMX8MP_CLK_MAIN_AXI, "main_axi", main_axi_p, 0x8800, 1),
445
	COMPOSITE(IMX8MP_CLK_ENET_AXI, "enet_axi", enet_axi_p, 0x8880, 1),
446
	COMPOSITE(IMX8MP_CLK_VPU_BUS, "vpu_bus", vpu_bus_p, 0x8980, 1),
447
	COMPOSITE(IMX8MP_CLK_MEDIA_AXI, "media_axi", media_axi_p, 0x8a00, 1),
448
	COMPOSITE(IMX8MP_CLK_MEDIA_APB, "media_apb", media_apb_p, 0x8a80, 1),
449
	COMPOSITE(IMX8MP_CLK_HDMI_APB, "hdmi_apb", media_apb_p, 0x8b00, 1),
450
	COMPOSITE(IMX8MP_CLK_HDMI_AXI, "hdmi_axi", media_axi_p, 0x8b80, 1),
451
	COMPOSITE(IMX8MP_CLK_GPU_AXI, "gpu_axi", gpu_axi_p, 0x8c00, 1),
452
	COMPOSITE(IMX8MP_CLK_GPU_AHB, "gpu_ahb", gpu_ahb_p, 0x8c80, 1),
453
	COMPOSITE(IMX8MP_CLK_NOC, "noc", noc_p, 0x8d00, 1),
454
	COMPOSITE(IMX8MP_CLK_NOC_IO, "noc_io", noc_io_p, 0x8d80, 1),
455
	COMPOSITE(IMX8MP_CLK_ML_AXI, "ml_axi", ml_axi_p, 0x8e00, 1),
456
	COMPOSITE(IMX8MP_CLK_ML_AHB, "ml_ahb", ml_ahb_p, 0x8e80, 1),
457

458
	COMPOSITE(IMX8MP_CLK_AHB, "ahb_root", ahb_p, 0x9000, 1),
459
	COMPOSITE(IMX8MP_CLK_AUDIO_AHB, "audio_ahb", audio_ahb_p, 0x9100, 1),
460
	COMPOSITE(IMX8MP_CLK_MIPI_DSI_ESC_RX, "mipi_dsi_esc_rx", mipi_dsi_esc_rx_p, 0x9200, 1),
461
	COMPOSITE(IMX8MP_CLK_MEDIA_DISP2_PIX, "media_disp2_pix", media_disp_pix_p, 0x9300, 1),
462

463
	DIV(IMX8MP_CLK_IPG_ROOT, "ipg_root", "ahb_root", 0x9080, 0, 1),
464

465
	COMPOSITE(IMX8MP_CLK_DRAM_ALT, "dram_alt", dram_alt_p, 0xa000, 0),
466
	COMPOSITE(IMX8MP_CLK_DRAM_APB, "dram_apb", dram_apb_p, 0xa080, 0),
467

468
	COMPOSITE(IMX8MP_CLK_VPU_G1, "vpu_g1", vpu_g_p, 0xa100, 0),
469
	COMPOSITE(IMX8MP_CLK_VPU_G2, "vpu_g2", vpu_g_p, 0xa180, 0),
470

471
	COMPOSITE(IMX8MP_CLK_CAN1, "can1", can_p, 0xa200, 0),
472
	COMPOSITE(IMX8MP_CLK_CAN2, "can2", can_p, 0xa280, 0),
473

474
	COMPOSITE(IMX8MP_CLK_PCIE_AUX, "pcie_aux", pcie_aux_p, 0xa400, 0),
475

476
	COMPOSITE(IMX8MP_CLK_SAI1, "sai1", sai1_p, 0xa580, 0),
477
	COMPOSITE(IMX8MP_CLK_SAI2, "sai2", sai2_p, 0xa600, 0),
478
	COMPOSITE(IMX8MP_CLK_SAI3, "sai3", sai3_p, 0xa680, 0),
479
	COMPOSITE(IMX8MP_CLK_SAI5, "sai5", sai5_p, 0xa780, 0),
480
	COMPOSITE(IMX8MP_CLK_SAI6, "sai6", sai6_p, 0xa800, 0),
481
	COMPOSITE(IMX8MP_CLK_SAI7, "sai7", sai7_p, 0xc300, 0),
482

483
	COMPOSITE(IMX8MP_CLK_ENET_QOS, "enet_qos", enet_qos_p, 0xa880, 0),
484
	COMPOSITE(IMX8MP_CLK_ENET_QOS_TIMER, "enet_qos_timer", enet_qos_timer_p, 0xa900, 0),
485
	COMPOSITE(IMX8MP_CLK_ENET_REF, "enet_ref", enet_ref_p, 0xa980, 0),
486
	COMPOSITE(IMX8MP_CLK_ENET_TIMER, "enet_timer", enet_timer_p, 0xaa00, 0),
487
	COMPOSITE(IMX8MP_CLK_ENET_PHY_REF, "enet_phy_ref", enet_phy_ref_p, 0xaa80, 0),
488

489
	COMPOSITE(IMX8MP_CLK_NAND, "nand", nand_p, 0xab00, 0),
490
	COMPOSITE(IMX8MP_CLK_QSPI, "qspi", qspi_p, 0xab80, 0),
491

492
	COMPOSITE(IMX8MP_CLK_USDHC1, "usdhc1", usdhc_p, 0xac00, 0),
493
	COMPOSITE(IMX8MP_CLK_USDHC2, "usdhc2", usdhc_p, 0xac80, 0),
494
	COMPOSITE(IMX8MP_CLK_USDHC3, "usdhc3", usdhc_p, 0xbc80, 0),
495

496
	COMPOSITE(IMX8MP_CLK_I2C1, "i2c1", i2c_p, 0xad00, 0),
497
	COMPOSITE(IMX8MP_CLK_I2C2, "i2c2", i2c_p, 0xad80, 0),
498
	COMPOSITE(IMX8MP_CLK_I2C3, "i2c3", i2c_p, 0xae00, 0),
499
	COMPOSITE(IMX8MP_CLK_I2C4, "i2c4", i2c_p, 0xae80, 0),
500
	COMPOSITE(IMX8MP_CLK_I2C5, "i2c5", i2c_p, 0xa480, 0),
501
	COMPOSITE(IMX8MP_CLK_I2C6, "i2c6", i2c_p, 0xa500, 0),
502

503
	COMPOSITE(IMX8MP_CLK_UART1, "uart1", uart_p, 0xaf00, 0),
504
	COMPOSITE(IMX8MP_CLK_UART2, "uart2", uart_p, 0xaf80, 0),
505
	COMPOSITE(IMX8MP_CLK_UART3, "uart3", uart_p, 0xb000, 0),
506
	COMPOSITE(IMX8MP_CLK_UART4, "uart4", uart_p, 0xb080, 0),
507

508
	COMPOSITE(IMX8MP_CLK_USB_CORE_REF, "usb_core_ref", usb_core_ref_p, 0xb100, 0),
509
	COMPOSITE(IMX8MP_CLK_USB_PHY_REF, "usb_phy_ref", usb_phy_ref_p, 0xb180, 0),
510

511
	COMPOSITE(IMX8MP_CLK_GIC, "gic", gic_p, 0xb200, 0),
512

513
	COMPOSITE(IMX8MP_CLK_ECSPI1, "ecspi1", ecspi_p, 0xb280, 0),
514
	COMPOSITE(IMX8MP_CLK_ECSPI2, "ecspi2", ecspi_p, 0xb300, 0),
515
	COMPOSITE(IMX8MP_CLK_ECSPI3, "ecspi3", ecspi_p, 0xc180, 0),
516

517
	COMPOSITE(IMX8MP_CLK_PWM1, "pwm1", pwm_p, 0xb380, 0),
518
	COMPOSITE(IMX8MP_CLK_PWM2, "pwm2", pwm_p, 0xb400, 0),
519
	COMPOSITE(IMX8MP_CLK_PWM3, "pwm3", pwm_p, 0xb480, 0),
520
	COMPOSITE(IMX8MP_CLK_PWM4, "pwm4", pwm_p, 0xb500, 0),
521

522
	COMPOSITE(IMX8MP_CLK_GPT1, "gpt1", gpt_p, 0xb580, 0),
523
	COMPOSITE(IMX8MP_CLK_GPT2, "gpt2", gpt_p, 0xb600, 0),
524
	COMPOSITE(IMX8MP_CLK_GPT3, "gpt3", gpt_p, 0xb680, 0),
525
	COMPOSITE(IMX8MP_CLK_GPT4, "gpt4", gpt_p, 0xb700, 0),
526
	COMPOSITE(IMX8MP_CLK_GPT5, "gpt5", gpt_p, 0xb780, 0),
527
	COMPOSITE(IMX8MP_CLK_GPT6, "gpt6", gpt_p, 0xb800, 0),
528

529
	COMPOSITE(IMX8MP_CLK_WDOG, "wdog", wdog_p, 0xb900, 0),
530
	COMPOSITE(IMX8MP_CLK_WRCLK, "wrclk", wrclk_p, 0xb980, 0),
531

532
	COMPOSITE(IMX8MP_CLK_IPP_DO_CLKO1, "ipp_do_clko1", ipp_do_clko1_p, 0xba00, 0),
533
	COMPOSITE(IMX8MP_CLK_IPP_DO_CLKO2, "ipp_do_clko2", ipp_do_clko2_p, 0xba80, 0),
534

535
	COMPOSITE(IMX8MP_CLK_HDMI_FDCC_TST, "hdmi_fdcc_tst", hdmi_fdcc_tst_p, 0xbb00, 0),
536
	COMPOSITE(IMX8MP_CLK_HDMI_24M, "hdmi_24m", hdmi_24m_p, 0xbb80, 0),
537
	COMPOSITE(IMX8MP_CLK_HDMI_REF_266M, "hdmi_ref_266m", hdmi_ref_266m_p, 0xbc00, 0),
538
	COMPOSITE(IMX8MP_CLK_MEDIA_CAM1_PIX, "media_cam1_pix", media_cam1_pix_p, 0xbd00, 0),
539
	COMPOSITE(IMX8MP_CLK_MEDIA_MIPI_PHY1_REF, "media_mipi_phy1_ref", media_mipi_phy1_ref_p, 0xbd80, 0),
540
	COMPOSITE(IMX8MP_CLK_MEDIA_DISP1_PIX, "media_disp1_pix", media_disp_pix_p, 0xbe00, 0),
541
	COMPOSITE(IMX8MP_CLK_MEDIA_CAM2_PIX, "media_cam2_pix", media_cam2_pix_p, 0xbe80, 0),
542
	COMPOSITE(IMX8MP_CLK_MEDIA_LDB, "media_ldb", media_ldb_p, 0xbf00, 0),
543

544
	COMPOSITE(IMX8MP_CLK_MEMREPAIR, "mem_repair", memrepair_p, 0xbf80, 0),
545

546
	COMPOSITE(IMX8MP_CLK_MEDIA_MIPI_TEST_BYTE, "media_mipi_test_byte", media_mipi_test_byte_p, 0xc100, 0),
547
	COMPOSITE(IMX8MP_CLK_PDM, "pdm", pdm_p, 0xc200, 0),
548
	COMPOSITE(IMX8MP_CLK_VPU_VC8000E, "vpu_vc8000e", vpu_vc8000e_p, 0xc280, 0),
549

550
	FFACT(IMX8MP_CLK_DRAM_ALT_ROOT, "dram_alt_root", "dram_alt", 1, 4),
551

552
	MUX(IMX8MP_CLK_DRAM_CORE, "dram_core_clk", dram_core_p, 0x9800, 24, 1, 1),
553
	ROOT_GATE(IMX8MP_CLK_DRAM1_ROOT, "dram1_root_clk", "dram_core_clk", 0x4050),
554

555
	ROOT_GATE(IMX8MP_CLK_ECSPI1_ROOT, "ecspi1_root_clk", "ecspi1", 0x4070),
556
	ROOT_GATE(IMX8MP_CLK_ECSPI2_ROOT, "ecspi2_root_clk", "ecspi2", 0x4080),
557
	ROOT_GATE(IMX8MP_CLK_ECSPI3_ROOT, "ecspi3_root_clk", "ecspi3", 0x4090),
558
	ROOT_GATE(IMX8MP_CLK_ENET1_ROOT, "enet1_root_clk", "enet_axi", 0x40a0),
559

560
	ROOT_GATE(IMX8MP_CLK_GPIO1_ROOT ,"gpio1_root_clk", "ipg_root", 0x40b0),
561
	ROOT_GATE(IMX8MP_CLK_GPIO2_ROOT ,"gpio2_root_clk", "ipg_root", 0x40c0),
562
	ROOT_GATE(IMX8MP_CLK_GPIO3_ROOT ,"gpio3_root_clk", "ipg_root", 0x40d0),
563
	ROOT_GATE(IMX8MP_CLK_GPIO4_ROOT ,"gpio4_root_clk", "ipg_root", 0x40e0),
564
	ROOT_GATE(IMX8MP_CLK_GPIO5_ROOT ,"gpio5_root_clk", "ipg_root", 0x40f0),
565

566
	ROOT_GATE(IMX8MP_CLK_GPT1_ROOT, "gpt1_root_clk", "gpt1", 0x4100),
567
	ROOT_GATE(IMX8MP_CLK_GPT2_ROOT, "gpt2_root_clk", "gpt2", 0x4110),
568
	ROOT_GATE(IMX8MP_CLK_GPT3_ROOT, "gpt3_root_clk", "gpt3", 0x4120),
569
	ROOT_GATE(IMX8MP_CLK_GPT4_ROOT, "gpt4_root_clk", "gpt4", 0x4130),
570
	ROOT_GATE(IMX8MP_CLK_GPT5_ROOT, "gpt5_root_clk", "gpt5", 0x4140),
571
	ROOT_GATE(IMX8MP_CLK_GPT6_ROOT, "gpt6_root_clk", "gpt6", 0x4150),
572

573
	ROOT_GATE(IMX8MP_CLK_I2C1_ROOT ,"i2c1_root_clk", "i2c1", 0x4170),
574
	ROOT_GATE(IMX8MP_CLK_I2C2_ROOT ,"i2c2_root_clk", "i2c2", 0x4180),
575
	ROOT_GATE(IMX8MP_CLK_I2C3_ROOT ,"i2c3_root_clk", "i2c3", 0x4190),
576
	ROOT_GATE(IMX8MP_CLK_I2C4_ROOT ,"i2c4_root_clk", "i2c4", 0x41a0),
577
	ROOT_GATE(IMX8MP_CLK_I2C5_ROOT ,"i2c5_root_clk", "i2c5", 0x4330),
578
	ROOT_GATE(IMX8MP_CLK_I2C6_ROOT ,"i2c6_root_clk", "i2c6", 0x4340),
579

580
	ROOT_GATE(IMX8MP_CLK_MU_ROOT, "mu_root_clk", "ipg_root", 0x4210),
581
	ROOT_GATE(IMX8MP_CLK_OCOTP_ROOT, "ocotp_root_clk", "ipg_root", 0x4220),
582
	ROOT_GATE(IMX8MP_CLK_PCIE_ROOT, "pcie_root_clk", "pcie_aux", 0x4250),
583

584
	ROOT_GATE(IMX8MP_CLK_PWM1_ROOT, "pwm1_root_clk", "pwm1", 0x4280),
585
	ROOT_GATE(IMX8MP_CLK_PWM2_ROOT, "pwm2_root_clk", "pwm2", 0x4290),
586
	ROOT_GATE(IMX8MP_CLK_PWM3_ROOT, "pwm3_root_clk", "pwm3", 0x42a0),
587
	ROOT_GATE(IMX8MP_CLK_PWM4_ROOT, "pwm4_root_clk", "pwm4", 0x42b0),
588
	ROOT_GATE(IMX8MP_CLK_QOS_ROOT, "qos_root_clk", "ipg_root", 0x42c0),
589
	ROOT_GATE(IMX8MP_CLK_QOS_ENET_ROOT, "qos_enet_root_clk", "ipg_root", 0x42e0),
590
	ROOT_GATE(IMX8MP_CLK_QSPI_ROOT, "qspi_root_clk", "qspi", 0x42f0),
591

592
	ROOT_GATE(IMX8MP_CLK_NAND_ROOT, "nand_root_clk", "nand", 0x4300),
593
	ROOT_GATE(IMX8MP_CLK_NAND_USDHC_BUS_RAWNAND_CLK, "nand_usdhc_rawnand_clk", "nand_usdhc_bus", 0x4300),
594

595
	ROOT_GATE(IMX8MP_CLK_CAN1_ROOT, "can1_root_clk", "can1", 0x4350),
596
	ROOT_GATE(IMX8MP_CLK_CAN2_ROOT, "can2_root_clk", "can2", 0x4360),
597

598
	ROOT_GATE(IMX8MP_CLK_SDMA1_ROOT, "sdma1_root_clk", "ipg_root", 0x43a0),
599
	ROOT_GATE(IMX8MP_CLK_SIM_ENET_ROOT, "sim_enet_root_clk", "enet_axi", 0x4400),
600
	ROOT_GATE(IMX8MP_CLK_ENET_QOS_ROOT, "enet_qos_root_clk", "sim_enet_root_clk", 0x43b0),
601
	ROOT_GATE(IMX8MP_CLK_GPU2D_ROOT, "gpu2d_root_clk", "gpu2d_core", 0x4450),
602
	ROOT_GATE(IMX8MP_CLK_GPU3D_ROOT, "gpu3d_root_clk", "gpu3d_core", 0x4460),
603

604
	ROOT_GATE(IMX8MP_CLK_UART1_ROOT ,"uart1_root_clk", "uart1", 0x4490),
605
	ROOT_GATE(IMX8MP_CLK_UART2_ROOT ,"uart2_root_clk", "uart2", 0x44a0),
606
	ROOT_GATE(IMX8MP_CLK_UART3_ROOT ,"uart3_root_clk", "uart3", 0x44b0),
607
	ROOT_GATE(IMX8MP_CLK_UART4_ROOT ,"uart4_root_clk", "uart4", 0x44c0),
608

609
	ROOT_GATE(IMX8MP_CLK_USB_ROOT ,"usb_root_clk", "hsio_axi", 0x44d0),
610
	ROOT_GATE(IMX8MP_CLK_USB_SUSP ,"usb_suspend_clk", "osc_32k", 0x44d0),
611
	ROOT_GATE(IMX8MP_CLK_USB_PHY_ROOT ,"usb_phy_root_clk", "usb_phy_ref", 0x44f0),
612
	ROOT_GATE(IMX8MP_CLK_USDHC1_ROOT ,"usdhc1_root_clk", "usdhc1", 0x4510),
613
	ROOT_GATE(IMX8MP_CLK_USDHC2_ROOT ,"usdhc2_root_clk", "usdhc2", 0x4520),
614
	ROOT_GATE(IMX8MP_CLK_USDHC3_ROOT ,"usdhc3_root_clk", "usdhc3", 0x45e0),
615

616
	ROOT_GATE(IMX8MP_CLK_HSIO_ROOT, "hsio_root_clk", "ipg_root", 0x45c0),
617

618
	ROOT_GATE(IMX8MP_CLK_WDOG1_ROOT, "wdog1_root_clk", "wdog", 0x4530),
619
	ROOT_GATE(IMX8MP_CLK_WDOG2_ROOT, "wdog2_root_clk", "wdog", 0x4540),
620
	ROOT_GATE(IMX8MP_CLK_WDOG3_ROOT, "wdog3_root_clk", "wdog", 0x4550),
621
	ROOT_GATE(IMX8MP_CLK_VPU_G1_ROOT, "vpu_g1_root_clk", "vpu_g1", 0x4560),
622
	ROOT_GATE(IMX8MP_CLK_GPU_ROOT, "gpu_root_clk", "gpu_axi", 0x4570),
623
	ROOT_GATE(IMX8MP_CLK_VPU_VC8KE_ROOT, "vpu_vc8ke_root_clk", "vpu_vc8000e", 0x4590),
624
	ROOT_GATE(IMX8MP_CLK_VPU_G2_ROOT, "vpu_g2_root_clk", "vpu_g2", 0x45a0),
625
	ROOT_GATE(IMX8MP_CLK_NPU_ROOT, "npu_root_clk", "ml_core", 0x45b0),
626

627
	ROOT_GATE(IMX8MP_CLK_MEDIA_APB_ROOT, "media_apb_root_clk", "media_apb", 0x45d0),
628
	ROOT_GATE(IMX8MP_CLK_MEDIA_AXI_ROOT, "media_axi_root_clk", "media_axi", 0x45d0),
629
	ROOT_GATE(IMX8MP_CLK_MEDIA_CAM1_PIX_ROOT, "media_cam1_pix_root_clk", "media_cam1_pix", 0x45d0),
630
	ROOT_GATE(IMX8MP_CLK_MEDIA_CAM2_PIX_ROOT, "media_cam2_pix_root_clk", "media_cam2_pix", 0x45d0),
631
	ROOT_GATE(IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT, "media_disp1_pix_root_clk", "media_disp1_pix", 0x45d0),
632
	ROOT_GATE(IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT, "media_disp2_pix_root_clk", "media_disp2_pix", 0x45d0),
633
	ROOT_GATE(IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT, "media_mipi_phy1_ref_root", "media_mipi_phy1_ref", 0x45d0),
634
	ROOT_GATE(IMX8MP_CLK_MEDIA_LDB_ROOT, "media_ldb_root_clk", "media_ldb", 0x45d0),
635
	ROOT_GATE(IMX8MP_CLK_MEDIA_ISP_ROOT, "media_isp_root_clk", "media_isp", 0x45d0),
636

637
	ROOT_GATE(IMX8MP_CLK_HDMI_ROOT, "hdmi_root_clk", "hdmi_axi", 0x45f0),
638
	ROOT_GATE(IMX8MP_CLK_TSENSOR_ROOT, "tsensor_root_clk", "ipg_root", 0x4620),
639
	ROOT_GATE(IMX8MP_CLK_VPU_ROOT, "vpu_root_clk", "vpu_bus", 0x4630),
640

641
	ROOT_GATE(IMX8MP_CLK_AUDIO_AHB_ROOT, "audio_ahb_root", "audio_ahb", 0x4650),
642
	ROOT_GATE(IMX8MP_CLK_AUDIO_AXI_ROOT, "audio_axi_root", "audio_axi", 0x4650),
643
	ROOT_GATE(IMX8MP_CLK_SAI1_ROOT, "sai1_root", "sai1", 0x4650),
644
	ROOT_GATE(IMX8MP_CLK_SAI2_ROOT, "sai2_root", "sai2", 0x4650),
645
	ROOT_GATE(IMX8MP_CLK_SAI3_ROOT, "sai3_root", "sai3", 0x4650),
646
	ROOT_GATE(IMX8MP_CLK_SAI5_ROOT, "sai5_root", "sai5", 0x4650),
647
	ROOT_GATE(IMX8MP_CLK_SAI6_ROOT, "sai6_root", "sai6", 0x4650),
648
	ROOT_GATE(IMX8MP_CLK_SAI7_ROOT, "sai7_root", "sai7", 0x4650),
649
	ROOT_GATE(IMX8MP_CLK_PDM_ROOT, "pdm_root", "pdm", 0x4650),
650
};
651

652
static int
653
imx8mp_ccm_attach(device_t dev)
654
{
655
	struct imx_ccm_softc *sc;
656

657
	sc = device_get_softc(dev);
658
	sc->dev = dev;
659

660
	sc->clks = imx8mp_clks;
661
	sc->nclks = nitems(imx8mp_clks);
662

663
	return (imx_ccm_attach(dev));
664
}
665

666
static int
667
imx8mp_ccm_probe(device_t dev)
668
{
669

670
	if (!ofw_bus_status_okay(dev))
671
		return (ENXIO);
672

673
	if (ofw_bus_is_compatible(dev, "fsl,imx8mp-ccm") == 0)
674
		return (ENXIO);
675

676
	device_set_desc(dev, "Freescale i.MX 8M Plus Clock Control Module");
677

678
	return (BUS_PROBE_DEFAULT);
679
}
680

681
static device_method_t imx8mp_ccm_methods[] = {
682
	/* Device interface */
683
	DEVMETHOD(device_probe,  imx8mp_ccm_probe),
684
	DEVMETHOD(device_attach, imx8mp_ccm_attach),
685

686
	DEVMETHOD_END
687
};
688

689
DEFINE_CLASS_1(imx8mp_ccm, imx8mp_ccm_driver, imx8mp_ccm_methods,
690
    sizeof(struct imx_ccm_softc), imx_ccm_driver);
691

692
EARLY_DRIVER_MODULE(imx8mp_ccm, simplebus, imx8mp_ccm_driver, 0, 0,
693
    BUS_PASS_CPU + BUS_PASS_ORDER_EARLY);
694

695
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