Path: blob/main/sys/arm64/nvidia/tegra210/max77620_rtc.c
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/*-1* SPDX-License-Identifier: BSD-2-Clause2*3* Copyright 2020 Michal Meloun <[email protected]>4*5* Redistribution and use in source and binary forms, with or without6* modification, are permitted provided that the following conditions7* are met:8* 1. Redistributions of source code must retain the above copyright9* notice, this list of conditions and the following disclaimer.10* 2. Redistributions in binary form must reproduce the above copyright11* notice, this list of conditions and the following disclaimer in the12* documentation and/or other materials provided with the distribution.13*14* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND15* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE16* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE17* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE18* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL19* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS20* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)21* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT22* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY23* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF24* SUCH DAMAGE.25*/2627#include <sys/param.h>28#include <sys/systm.h>29#include <sys/bus.h>30#include <sys/clock.h>31#include <sys/kernel.h>32#include <sys/module.h>33#include <sys/rman.h>34#include <sys/sx.h>3536#include <dev/iicbus/iiconf.h>37#include <dev/iicbus/iicbus.h>38#include <dev/ofw/ofw_bus.h>39#include <dev/ofw/ofw_bus_subr.h>4041#include "clock_if.h"42#include "ofw_iicbus_if.h"43#include "max77620.h"4445#define MAX77620_RTC_INT 0x0046#define MAX77620_RTC_INTM 0x0147#define MAX77620_RTC_CONTROLM 0x0248#define MAX77620_RTC_CONTROL 0x0349#define RTC_CONTROL_MODE_24 (1 << 1)50#define RTC_CONTROL_BCD_EN (1 << 0)5152#define MAX77620_RTC_UPDATE0 0x0453#define RTC_UPDATE0_RTC_RBUDR (1 << 4)54#define RTC_UPDATE0_RTC_UDR (1 << 0)5556#define MAX77620_WTSR_SMPL_CNTL 0x0657#define MAX77620_RTC_SEC 0x0758#define MAX77620_RTC_MIN 0x0859#define MAX77620_RTC_HOUR 0x0960#define MAX77620_RTC_WEEKDAY 0x0A61#define MAX77620_RTC_MONTH 0x0B62#define MAX77620_RTC_YEAR 0x0C63#define MAX77620_RTC_DATE 0x0D64#define MAX77620_ALARM1_SEC 0x0E65#define MAX77620_ALARM1_MIN 0x0F66#define MAX77620_ALARM1_HOUR 0x1067#define MAX77620_ALARM1_WEEKDAY 0x1168#define MAX77620_ALARM1_MONTH 0x1269#define MAX77620_ALARM1_YEAR 0x1370#define MAX77620_ALARM1_DATE 0x1471#define MAX77620_ALARM2_SEC 0x1572#define MAX77620_ALARM2_MIN 0x1673#define MAX77620_ALARM2_HOUR 0x1774#define MAX77620_ALARM2_WEEKDAY 0x1875#define MAX77620_ALARM2_MONTH 0x1976#define MAX77620_ALARM2_YEAR 0x1A77#define MAX77620_ALARM2_DATE 0x1B7879#define MAX77620_RTC_START_YEAR 200080#define MAX77620_RTC_I2C_ADDR 0x688182#define LOCK(_sc) sx_xlock(&(_sc)->lock)83#define UNLOCK(_sc) sx_xunlock(&(_sc)->lock)84#define LOCK_INIT(_sc) sx_init(&(_sc)->lock, "max77620_rtc")85#define LOCK_DESTROY(_sc) sx_destroy(&(_sc)->lock);8687struct max77620_rtc_softc {88device_t dev;89struct sx lock;90int bus_addr;91};9293char max77620_rtc_compat[] = "maxim,max77620_rtc";9495/*96* Raw register access function.97*/98static int99max77620_rtc_read(struct max77620_rtc_softc *sc, uint8_t reg, uint8_t *val)100{101uint8_t addr;102int rv;103struct iic_msg msgs[2] = {104{0, IIC_M_WR, 1, &addr},105{0, IIC_M_RD, 1, val},106};107108msgs[0].slave = sc->bus_addr;109msgs[1].slave = sc->bus_addr;110addr = reg;111112rv = iicbus_transfer(sc->dev, msgs, 2);113if (rv != 0) {114device_printf(sc->dev,115"Error when reading reg 0x%02X, rv: %d\n", reg, rv);116return (EIO);117}118119return (0);120}121122static int123max77620_rtc_read_buf(struct max77620_rtc_softc *sc, uint8_t reg,124uint8_t *buf, size_t size)125{126uint8_t addr;127int rv;128struct iic_msg msgs[2] = {129{0, IIC_M_WR, 1, &addr},130{0, IIC_M_RD, size, buf},131};132133msgs[0].slave = sc->bus_addr;134msgs[1].slave = sc->bus_addr;135addr = reg;136137rv = iicbus_transfer(sc->dev, msgs, 2);138if (rv != 0) {139device_printf(sc->dev,140"Error when reading reg 0x%02X, rv: %d\n", reg, rv);141return (EIO);142}143144return (0);145}146147static int148max77620_rtc_write(struct max77620_rtc_softc *sc, uint8_t reg, uint8_t val)149{150uint8_t data[2];151int rv;152153struct iic_msg msgs[1] = {154{0, IIC_M_WR, 2, data},155};156157msgs[0].slave = sc->bus_addr;158data[0] = reg;159data[1] = val;160161rv = iicbus_transfer(sc->dev, msgs, 1);162if (rv != 0) {163device_printf(sc->dev,164"Error when writing reg 0x%02X, rv: %d\n", reg, rv);165return (EIO);166}167return (0);168}169170static int171max77620_rtc_write_buf(struct max77620_rtc_softc *sc, uint8_t reg, uint8_t *buf,172size_t size)173{174uint8_t data[1];175int rv;176struct iic_msg msgs[2] = {177{0, IIC_M_WR, 1, data},178{0, IIC_M_WR | IIC_M_NOSTART, size, buf},179};180181msgs[0].slave = sc->bus_addr;182msgs[1].slave = sc->bus_addr;183data[0] = reg;184185rv = iicbus_transfer(sc->dev, msgs, 2);186if (rv != 0) {187device_printf(sc->dev,188"Error when writing reg 0x%02X, rv: %d\n", reg, rv);189return (EIO);190}191return (0);192}193194static int195max77620_rtc_modify(struct max77620_rtc_softc *sc, uint8_t reg, uint8_t clear,196uint8_t set)197{198uint8_t val;199int rv;200201rv = max77620_rtc_read(sc, reg, &val);202if (rv != 0)203return (rv);204205val &= ~clear;206val |= set;207208rv = max77620_rtc_write(sc, reg, val);209if (rv != 0)210return (rv);211212return (0);213}214215static int216max77620_rtc_update(struct max77620_rtc_softc *sc, bool for_read)217{218uint8_t reg;219int rv;220221reg = for_read ? RTC_UPDATE0_RTC_RBUDR: RTC_UPDATE0_RTC_UDR;222rv = max77620_rtc_modify(sc, MAX77620_RTC_UPDATE0, reg, reg);223if (rv != 0)224return (rv);225226DELAY(16000);227return (rv);228}229230static int231max77620_rtc_gettime(device_t dev, struct timespec *ts)232{233struct max77620_rtc_softc *sc;234struct clocktime ct;235uint8_t buf[7];236int rv;237238sc = device_get_softc(dev);239240LOCK(sc);241rv = max77620_rtc_update(sc, true);242if (rv != 0) {243UNLOCK(sc);244device_printf(sc->dev, "Failed to strobe RTC data\n");245return (rv);246}247248rv = max77620_rtc_read_buf(sc, MAX77620_RTC_SEC, buf, nitems(buf));249UNLOCK(sc);250if (rv != 0) {251device_printf(sc->dev, "Failed to read RTC data\n");252return (rv);253}254ct.nsec = 0;255ct.sec = bcd2bin(buf[0] & 0x7F);256ct.min = bcd2bin(buf[1] & 0x7F);257ct.hour = bcd2bin(buf[2] & 0x3F);258ct.dow = ffs(buf[3] & 07);259ct.mon = bcd2bin(buf[4] & 0x1F);260ct.year = bcd2bin(buf[5] & 0x7F) + MAX77620_RTC_START_YEAR;261ct.day = bcd2bin(buf[6] & 0x3F);262263return (clock_ct_to_ts(&ct, ts));264}265266static int267max77620_rtc_settime(device_t dev, struct timespec *ts)268{269struct max77620_rtc_softc *sc;270struct clocktime ct;271uint8_t buf[7];272int rv;273274sc = device_get_softc(dev);275clock_ts_to_ct(ts, &ct);276277if (ct.year < MAX77620_RTC_START_YEAR)278return (EINVAL);279280buf[0] = bin2bcd(ct.sec);281buf[1] = bin2bcd(ct.min);282buf[2] = bin2bcd(ct.hour);283buf[3] = 1 << ct.dow;284buf[4] = bin2bcd(ct.mon);285buf[5] = bin2bcd(ct.year - MAX77620_RTC_START_YEAR);286buf[6] = bin2bcd(ct.day);287288LOCK(sc);289rv = max77620_rtc_write_buf(sc, MAX77620_RTC_SEC, buf, nitems(buf));290if (rv != 0) {291UNLOCK(sc);292device_printf(sc->dev, "Failed to write RTC data\n");293return (rv);294}295rv = max77620_rtc_update(sc, false);296UNLOCK(sc);297if (rv != 0) {298device_printf(sc->dev, "Failed to update RTC data\n");299return (rv);300}301302return (0);303}304305static int306max77620_rtc_probe(device_t dev)307{308const char *compat;309310/*311* TODO:312* ofw_bus_is_compatible() should use compat string from devinfo cache313* maximum size of OFW property should be defined in public header314*/315if ((compat = ofw_bus_get_compat(dev)) == NULL)316return (ENXIO);317if (strncasecmp(compat, max77620_rtc_compat, 255) != 0)318return (ENXIO);319320device_set_desc(dev, "MAX77620 RTC");321return (BUS_PROBE_DEFAULT);322}323324static int325max77620_rtc_attach(device_t dev)326{327struct max77620_rtc_softc *sc;328uint8_t reg;329int rv;330331sc = device_get_softc(dev);332sc->dev = dev;333sc->bus_addr = iicbus_get_addr(dev);334335LOCK_INIT(sc);336337reg = RTC_CONTROL_MODE_24 | RTC_CONTROL_BCD_EN;338rv = max77620_rtc_modify(sc, MAX77620_RTC_CONTROLM, reg, reg);339if (rv != 0) {340device_printf(sc->dev, "Failed to configure RTC\n");341goto fail;342}343344rv = max77620_rtc_modify(sc, MAX77620_RTC_CONTROL, reg, reg);345if (rv != 0) {346device_printf(sc->dev, "Failed to configure RTC\n");347goto fail;348}349rv = max77620_rtc_update(sc, false);350if (rv != 0) {351device_printf(sc->dev, "Failed to update RTC data\n");352return (rv);353}354355clock_register(sc->dev, 1000000);356357bus_attach_children(dev);358return (0);359360fail:361LOCK_DESTROY(sc);362return (rv);363}364365static int366max77620_rtc_detach(device_t dev)367{368struct max77620_softc *sc;369int error;370371error = bus_generic_detach(dev);372if (error != 0)373return (error);374375sc = device_get_softc(dev);376LOCK_DESTROY(sc);377378return (0);379}380381/*382* The secondary address of MAX77620 (RTC function) is not in DT,383* add it manualy as subdevice384*/385int386max77620_rtc_create(struct max77620_softc *sc, phandle_t node)387{388device_t parent, child;389int rv;390391parent = device_get_parent(sc->dev);392393child = BUS_ADD_CHILD(parent, 0, NULL, DEVICE_UNIT_ANY);394if (child == NULL) {395device_printf(sc->dev, "Cannot create MAX77620 RTC device.\n");396return (ENXIO);397}398399rv = OFW_IICBUS_SET_DEVINFO(parent, child, -1, "rtc@68",400max77620_rtc_compat, MAX77620_RTC_I2C_ADDR << 1);401if (rv != 0) {402device_printf(sc->dev, "Cannot setup MAX77620 RTC device.\n");403return (ENXIO);404}405406return (0);407}408409static device_method_t max77620_rtc_methods[] = {410/* Device interface */411DEVMETHOD(device_probe, max77620_rtc_probe),412DEVMETHOD(device_attach, max77620_rtc_attach),413DEVMETHOD(device_detach, max77620_rtc_detach),414415/* RTC interface */416DEVMETHOD(clock_gettime, max77620_rtc_gettime),417DEVMETHOD(clock_settime, max77620_rtc_settime),418419DEVMETHOD_END420};421422static DEFINE_CLASS_0(rtc, max77620_rtc_driver, max77620_rtc_methods,423sizeof(struct max77620_rtc_softc));424EARLY_DRIVER_MODULE(max77620rtc_, iicbus, max77620_rtc_driver, NULL, NULL, 74);425426427