/*-1* SPDX-License-Identifier: BSD-2-Clause2*3* Copyright (C) 2015 Mihai Carabas <[email protected]>4* All rights reserved.5*6* Redistribution and use in source and binary forms, with or without7* modification, are permitted provided that the following conditions8* are met:9* 1. Redistributions of source code must retain the above copyright10* notice, this list of conditions and the following disclaimer.11* 2. Redistributions in binary form must reproduce the above copyright12* notice, this list of conditions and the following disclaimer in the13* documentation and/or other materials provided with the distribution.14*15* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND16* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE17* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE18* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE19* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL20* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS21* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)22* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT23* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY24* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF25* SUCH DAMAGE.26*/2728#ifndef _VMM_VGIC_V3_H_29#define _VMM_VGIC_V3_H_3031#define VGIC_ICH_LR_NUM_MAX 1632#define VGIC_ICH_APR_NUM_MAX 43334/* Registers accessed by EL2 */35struct vgic_v3_regs {36uint32_t ich_eisr_el2; /* End of Interrupt Status Register */37uint32_t ich_elrsr_el2; /* Empty List register Status Register (ICH_ELRSR_EL2) */38uint32_t ich_hcr_el2; /* Hyp Control Register */39uint32_t ich_misr_el2; /* Maintenance Interrupt State Register */40uint32_t ich_vmcr_el2; /* Virtual Machine Control Register */4142/*43* The List Registers are part of the VM context and are modified on a44* world switch. They need to be allocated statically so they are45* mapped in the EL2 translation tables when struct hypctx is mapped.46*/47uint64_t ich_lr_el2[VGIC_ICH_LR_NUM_MAX];48uint16_t ich_lr_num;4950/* Active Priorities Registers for Group 0 and 1 interrupts */51uint16_t ich_apr_num;52uint32_t ich_ap0r_el2[VGIC_ICH_APR_NUM_MAX];53uint32_t ich_ap1r_el2[VGIC_ICH_APR_NUM_MAX];54};5556#endif /* !_VMM_VGIC_V3_H_ */575859