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freebsd
GitHub Repository: freebsd/freebsd-src
Path: blob/main/sys/cam/mmc/mmc_da.c
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1
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2006 Bernd Walter <[email protected]> All rights reserved.
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* Copyright (c) 2009 Alexander Motin <[email protected]> All rights reserved.
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* Copyright (c) 2015-2017 Ilya Bakulin <[email protected]> All rights reserved.
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* Copyright (c) 2006 M. Warner Losh <[email protected]>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Some code derived from the sys/dev/mmc and sys/cam/ata
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* Thanks to Warner Losh <[email protected]>, Alexander Motin <[email protected]>
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* Bernd Walter <[email protected]>, and other authors.
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*/
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//#include "opt_sdda.h"
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#include <sys/param.h>
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#ifdef _KERNEL
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/bio.h>
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#include <sys/sysctl.h>
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#include <sys/endian.h>
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#include <sys/taskqueue.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/conf.h>
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#include <sys/devicestat.h>
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#include <sys/eventhandler.h>
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#include <sys/malloc.h>
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#include <sys/cons.h>
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#include <sys/proc.h>
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#include <sys/reboot.h>
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#include <geom/geom_disk.h>
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#include <machine/_inttypes.h> /* for PRIu64 */
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#endif /* _KERNEL */
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#ifndef _KERNEL
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#include <stdio.h>
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#include <string.h>
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#endif /* _KERNEL */
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#include <cam/cam.h>
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#include <cam/cam_ccb.h>
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#include <cam/cam_queue.h>
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#include <cam/cam_periph.h>
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#include <cam/cam_sim.h>
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#include <cam/cam_xpt.h>
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#include <cam/cam_xpt_sim.h>
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#include <cam/cam_xpt_periph.h>
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#include <cam/cam_xpt_internal.h>
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#include <cam/cam_debug.h>
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#include <cam/mmc/mmc_all.h>
76
77
#ifdef _KERNEL
78
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typedef enum {
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SDDA_FLAG_OPEN = 0x0002,
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SDDA_FLAG_DIRTY = 0x0004
82
} sdda_flags;
83
84
typedef enum {
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SDDA_STATE_INIT,
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SDDA_STATE_INVALID,
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SDDA_STATE_NORMAL,
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SDDA_STATE_PART_SWITCH,
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} sdda_state;
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/* Purposefully ignore a '%d' argument to snprintf in SDDA_FMT! */
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#define SDDA_FMT "%s"
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#define SDDA_FMT_BOOT "%s%dboot"
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#define SDDA_FMT_GP "%s%dgp"
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#define SDDA_FMT_RPMB "%s%drpmb"
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#define SDDA_LABEL_ENH "enh"
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98
#define SDDA_PART_NAMELEN (16 + 1)
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struct sdda_softc;
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102
struct sdda_part {
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struct disk *disk;
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struct bio_queue_head bio_queue;
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sdda_flags flags;
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struct sdda_softc *sc;
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u_int cnt;
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u_int type;
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bool ro;
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char name[SDDA_PART_NAMELEN];
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};
112
113
struct sdda_softc {
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int outstanding_cmds; /* Number of active commands */
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int refcount; /* Active xpt_action() calls */
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sdda_state state;
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struct mmc_data *mmcdata;
118
struct cam_periph *periph;
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// sdda_quirks quirks;
120
struct task start_init_task;
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uint32_t raw_csd[4];
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uint8_t raw_ext_csd[512]; /* MMC only? */
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struct mmc_csd csd;
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struct mmc_cid cid;
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struct mmc_scr scr;
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/* Calculated from CSD */
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uint64_t sector_count;
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uint64_t mediasize;
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/* Calculated from CID */
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char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */
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char card_sn_string[16];/* Formatted serial # for disk->d_ident */
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/* Determined from CSD + is highspeed card*/
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uint32_t card_f_max;
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/* Generic switch timeout */
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uint32_t cmd6_time;
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uint32_t timings; /* Mask of bus timings supported */
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uint32_t vccq_120; /* Mask of bus timings at VCCQ of 1.2 V */
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uint32_t vccq_180; /* Mask of bus timings at VCCQ of 1.8 V */
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/* MMC partitions support */
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struct sdda_part *part[MMC_PART_MAX];
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uint8_t part_curr; /* Partition currently switched to */
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uint8_t part_requested; /* What partition we're currently switching to */
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uint32_t part_time; /* Partition switch timeout [us] */
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off_t enh_base; /* Enhanced user data area slice base ... */
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off_t enh_size; /* ... and size [bytes] */
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int log_count;
149
struct timeval log_time;
150
};
151
152
static const char *mmc_errmsg[] =
153
{
154
"None",
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"Timeout",
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"Bad CRC",
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"Fifo",
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"Failed",
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"Invalid",
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"NO MEMORY"
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};
162
163
#define ccb_bp ppriv_ptr1
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static disk_strategy_t sddastrategy;
166
static dumper_t sddadump;
167
static periph_init_t sddainit;
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static void sddaasync(void *callback_arg, uint32_t code,
169
struct cam_path *path, void *arg);
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static periph_ctor_t sddaregister;
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static periph_dtor_t sddacleanup;
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static periph_start_t sddastart;
173
static periph_oninv_t sddaoninvalidate;
174
static void sddadone(struct cam_periph *periph,
175
union ccb *done_ccb);
176
static int sddaerror(union ccb *ccb, uint32_t cam_flags,
177
uint32_t sense_flags);
178
179
static int mmc_handle_reply(union ccb *ccb);
180
static uint16_t get_rca(struct cam_periph *periph);
181
static void sdda_start_init(void *context, union ccb *start_ccb);
182
static void sdda_start_init_task(void *context, int pending);
183
static void sdda_process_mmc_partitions(struct cam_periph *periph, union ccb *start_ccb);
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static uint32_t sdda_get_host_caps(struct cam_periph *periph, union ccb *ccb);
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static int mmc_select_card(struct cam_periph *periph, union ccb *ccb, uint32_t rca);
186
static inline uint32_t mmc_get_sector_size(struct cam_periph *periph) {return MMC_SECTOR_SIZE;}
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static SYSCTL_NODE(_kern_cam, OID_AUTO, sdda, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
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"CAM Direct Access Disk driver");
190
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static int sdda_mmcsd_compat = 1;
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SYSCTL_INT(_kern_cam_sdda, OID_AUTO, mmcsd_compat, CTLFLAG_RDTUN,
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&sdda_mmcsd_compat, 1, "Enable creation of mmcsd aliases.");
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/* TODO: actually issue GET_TRAN_SETTINGS to get R/O status */
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static inline bool sdda_get_read_only(struct cam_periph *periph, union ccb *start_ccb)
197
{
198
199
return (false);
200
}
201
202
static uint32_t mmc_get_spec_vers(struct cam_periph *periph);
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static uint64_t mmc_get_media_size(struct cam_periph *periph);
204
static uint32_t mmc_get_cmd6_timeout(struct cam_periph *periph);
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static bool sdda_add_part(struct cam_periph *periph, u_int type,
206
const char *name, u_int cnt, off_t media_size, bool ro);
207
208
static struct periph_driver sddadriver =
209
{
210
sddainit, "sdda",
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TAILQ_HEAD_INITIALIZER(sddadriver.units), /* generation */ 0
212
};
213
214
PERIPHDRIVER_DECLARE(sdda, sddadriver);
215
216
static MALLOC_DEFINE(M_SDDA, "sd_da", "sd_da buffers");
217
218
static const int exp[8] = {
219
1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
220
};
221
222
static const int mant[16] = {
223
0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
224
};
225
226
static const int cur_min[8] = {
227
500, 1000, 5000, 10000, 25000, 35000, 60000, 100000
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};
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static const int cur_max[8] = {
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1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000
232
};
233
234
static uint16_t
235
get_rca(struct cam_periph *periph) {
236
return periph->path->device->mmc_ident_data.card_rca;
237
}
238
239
/*
240
* Figure out if CCB execution resulted in error.
241
* Look at both CAM-level errors and on MMC protocol errors.
242
*
243
* Return value is always MMC error.
244
*/
245
static int
246
mmc_handle_reply(union ccb *ccb)
247
{
248
KASSERT(ccb->ccb_h.func_code == XPT_MMC_IO,
249
("ccb %p: cannot handle non-XPT_MMC_IO errors, got func_code=%d",
250
ccb, ccb->ccb_h.func_code));
251
252
/* CAM-level error should always correspond to MMC-level error */
253
if (((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_CMP) &&
254
(ccb->mmcio.cmd.error != MMC_ERR_NONE))
255
panic("CCB status is OK but MMC error != MMC_ERR_NONE");
256
257
if (ccb->mmcio.cmd.error != MMC_ERR_NONE) {
258
xpt_print_path(ccb->ccb_h.path);
259
printf("CMD%d failed, err %d (%s)\n",
260
ccb->mmcio.cmd.opcode,
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ccb->mmcio.cmd.error,
262
mmc_errmsg[ccb->mmcio.cmd.error]);
263
}
264
return (ccb->mmcio.cmd.error);
265
}
266
267
static uint32_t
268
mmc_get_bits(uint32_t *bits, int bit_len, int start, int size)
269
{
270
const int i = (bit_len / 32) - (start / 32) - 1;
271
const int shift = start & 31;
272
uint32_t retval = bits[i] >> shift;
273
if (size + shift > 32)
274
retval |= bits[i - 1] << (32 - shift);
275
return (retval & ((1llu << size) - 1));
276
}
277
278
static void
279
mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd)
280
{
281
int v;
282
int m;
283
int e;
284
285
memset(csd, 0, sizeof(*csd));
286
csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2);
287
288
/* Common members between 1.0 and 2.0 */
289
m = mmc_get_bits(raw_csd, 128, 115, 4);
290
e = mmc_get_bits(raw_csd, 128, 112, 3);
291
csd->tacc = (exp[e] * mant[m] + 9) / 10;
292
csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
293
m = mmc_get_bits(raw_csd, 128, 99, 4);
294
e = mmc_get_bits(raw_csd, 128, 96, 3);
295
csd->tran_speed = exp[e] * 10000 * mant[m];
296
csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
297
csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
298
csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
299
csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
300
csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
301
csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
302
csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
303
csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
304
csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
305
csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
306
csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
307
csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
308
csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
309
310
if (v == 0) {
311
csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
312
csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
313
csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
314
csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
315
m = mmc_get_bits(raw_csd, 128, 62, 12);
316
e = mmc_get_bits(raw_csd, 128, 47, 3);
317
csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
318
} else if (v == 1) {
319
csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) + 1) *
320
512 * 1024;
321
} else
322
panic("unknown SD CSD version");
323
}
324
325
static void
326
mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd)
327
{
328
int m;
329
int e;
330
331
memset(csd, 0, sizeof(*csd));
332
csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2);
333
csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4);
334
m = mmc_get_bits(raw_csd, 128, 115, 4);
335
e = mmc_get_bits(raw_csd, 128, 112, 3);
336
csd->tacc = exp[e] * mant[m] + 9 / 10;
337
csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
338
m = mmc_get_bits(raw_csd, 128, 99, 4);
339
e = mmc_get_bits(raw_csd, 128, 96, 3);
340
csd->tran_speed = exp[e] * 10000 * mant[m];
341
csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
342
csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
343
csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
344
csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
345
csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
346
csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
347
csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
348
csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
349
csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
350
csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
351
m = mmc_get_bits(raw_csd, 128, 62, 12);
352
e = mmc_get_bits(raw_csd, 128, 47, 3);
353
csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
354
csd->erase_blk_en = 0;
355
csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) *
356
(mmc_get_bits(raw_csd, 128, 37, 5) + 1);
357
csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5);
358
csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
359
csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
360
csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
361
csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
362
}
363
364
static void
365
mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid)
366
{
367
int i;
368
369
/* There's no version info, so we take it on faith */
370
memset(cid, 0, sizeof(*cid));
371
cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
372
cid->oid = mmc_get_bits(raw_cid, 128, 104, 16);
373
for (i = 0; i < 5; i++)
374
cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
375
cid->pnm[5] = 0;
376
cid->prv = mmc_get_bits(raw_cid, 128, 56, 8);
377
cid->psn = mmc_get_bits(raw_cid, 128, 24, 32);
378
cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000;
379
cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4);
380
}
381
382
static void
383
mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid)
384
{
385
int i;
386
387
/* There's no version info, so we take it on faith */
388
memset(cid, 0, sizeof(*cid));
389
cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
390
cid->oid = mmc_get_bits(raw_cid, 128, 104, 8);
391
for (i = 0; i < 6; i++)
392
cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
393
cid->pnm[6] = 0;
394
cid->prv = mmc_get_bits(raw_cid, 128, 48, 8);
395
cid->psn = mmc_get_bits(raw_cid, 128, 16, 32);
396
cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4);
397
cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4) + 1997;
398
}
399
400
static void
401
mmc_format_card_id_string(struct sdda_softc *sc, struct mmc_params *mmcp)
402
{
403
char oidstr[8];
404
uint8_t c1;
405
uint8_t c2;
406
407
/*
408
* Format a card ID string for use by the mmcsd driver, it's what
409
* appears between the <> in the following:
410
* mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 Mfg 08/2008 by 3 TN> at mmc0
411
* 22.5MHz/4bit/128-block
412
*
413
* Also format just the card serial number, which the mmcsd driver will
414
* use as the disk->d_ident string.
415
*
416
* The card_id_string in mmc_ivars is currently allocated as 64 bytes,
417
* and our max formatted length is currently 55 bytes if every field
418
* contains the largest value.
419
*
420
* Sometimes the oid is two printable ascii chars; when it's not,
421
* format it as 0xnnnn instead.
422
*/
423
c1 = (sc->cid.oid >> 8) & 0x0ff;
424
c2 = sc->cid.oid & 0x0ff;
425
if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f)
426
snprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2);
427
else
428
snprintf(oidstr, sizeof(oidstr), "0x%04x", sc->cid.oid);
429
snprintf(sc->card_sn_string, sizeof(sc->card_sn_string),
430
"%08X", sc->cid.psn);
431
snprintf(sc->card_id_string, sizeof(sc->card_id_string),
432
"%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s",
433
mmcp->card_features & CARD_FEATURE_MMC ? "MMC" : "SD",
434
mmcp->card_features & CARD_FEATURE_SDHC ? "HC" : "",
435
sc->cid.pnm, sc->cid.prv >> 4, sc->cid.prv & 0x0f,
436
sc->cid.psn, sc->cid.mdt_month, sc->cid.mdt_year,
437
sc->cid.mid, oidstr);
438
}
439
440
static int
441
sddaopen(struct disk *dp)
442
{
443
struct sdda_part *part;
444
struct cam_periph *periph;
445
struct sdda_softc *softc;
446
int error;
447
448
part = (struct sdda_part *)dp->d_drv1;
449
softc = part->sc;
450
periph = softc->periph;
451
if (cam_periph_acquire(periph) != 0) {
452
return(ENXIO);
453
}
454
455
cam_periph_lock(periph);
456
if ((error = cam_periph_hold(periph, PRIBIO|PCATCH)) != 0) {
457
cam_periph_unlock(periph);
458
cam_periph_release(periph);
459
return (error);
460
}
461
462
CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaopen\n"));
463
464
part->flags |= SDDA_FLAG_OPEN;
465
466
cam_periph_unhold(periph);
467
cam_periph_unlock(periph);
468
return (0);
469
}
470
471
static int
472
sddaclose(struct disk *dp)
473
{
474
struct sdda_part *part;
475
struct cam_periph *periph;
476
struct sdda_softc *softc;
477
478
part = (struct sdda_part *)dp->d_drv1;
479
softc = part->sc;
480
periph = softc->periph;
481
part->flags &= ~SDDA_FLAG_OPEN;
482
483
cam_periph_lock(periph);
484
485
CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaclose\n"));
486
487
while (softc->refcount != 0)
488
cam_periph_sleep(periph, &softc->refcount, PRIBIO, "sddaclose", 1);
489
cam_periph_unlock(periph);
490
cam_periph_release(periph);
491
return (0);
492
}
493
494
static void
495
sddaschedule(struct cam_periph *periph)
496
{
497
struct sdda_softc *softc = (struct sdda_softc *)periph->softc;
498
struct sdda_part *part;
499
struct bio *bp;
500
int i;
501
502
/* Check if we have more work to do. */
503
/* Find partition that has outstanding commands. Prefer current partition. */
504
bp = bioq_first(&softc->part[softc->part_curr]->bio_queue);
505
if (bp == NULL) {
506
for (i = 0; i < MMC_PART_MAX; i++) {
507
if ((part = softc->part[i]) != NULL &&
508
(bp = bioq_first(&softc->part[i]->bio_queue)) != NULL)
509
break;
510
}
511
}
512
if (bp != NULL) {
513
xpt_schedule(periph, CAM_PRIORITY_NORMAL);
514
}
515
}
516
517
/*
518
* Actually translate the requested transfer into one the physical driver
519
* can understand. The transfer is described by a buf and will include
520
* only one physical transfer.
521
*/
522
static void
523
sddastrategy(struct bio *bp)
524
{
525
struct cam_periph *periph;
526
struct sdda_part *part;
527
struct sdda_softc *softc;
528
529
part = (struct sdda_part *)bp->bio_disk->d_drv1;
530
softc = part->sc;
531
periph = softc->periph;
532
533
cam_periph_lock(periph);
534
535
CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddastrategy(%p)\n", bp));
536
537
/*
538
* If the device has been made invalid, error out
539
*/
540
if ((periph->flags & CAM_PERIPH_INVALID) != 0) {
541
cam_periph_unlock(periph);
542
biofinish(bp, NULL, ENXIO);
543
return;
544
}
545
546
/*
547
* Place it in the queue of disk activities for this disk
548
*/
549
bioq_disksort(&part->bio_queue, bp);
550
551
/*
552
* Schedule ourselves for performing the work.
553
*/
554
sddaschedule(periph);
555
cam_periph_unlock(periph);
556
557
return;
558
}
559
560
static void
561
sddainit(void)
562
{
563
cam_status status;
564
565
/*
566
* Install a global async callback. This callback will
567
* receive async callbacks like "new device found".
568
*/
569
status = xpt_register_async(AC_FOUND_DEVICE, sddaasync, NULL, NULL);
570
571
if (status != CAM_REQ_CMP) {
572
printf("sdda: Failed to attach master async callback "
573
"due to status 0x%x!\n", status);
574
}
575
}
576
577
/*
578
* Callback from GEOM, called when it has finished cleaning up its
579
* resources.
580
*/
581
static void
582
sddadiskgonecb(struct disk *dp)
583
{
584
struct cam_periph *periph;
585
struct sdda_part *part;
586
587
part = (struct sdda_part *)dp->d_drv1;
588
periph = part->sc->periph;
589
CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddadiskgonecb\n"));
590
591
cam_periph_release(periph);
592
}
593
594
static void
595
sddaoninvalidate(struct cam_periph *periph)
596
{
597
struct sdda_softc *softc;
598
struct sdda_part *part;
599
600
softc = (struct sdda_softc *)periph->softc;
601
602
CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaoninvalidate\n"));
603
604
/*
605
* De-register any async callbacks.
606
*/
607
xpt_register_async(0, sddaasync, periph, periph->path);
608
609
/*
610
* Return all queued I/O with ENXIO.
611
* XXX Handle any transactions queued to the card
612
* with XPT_ABORT_CCB.
613
*/
614
CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("bioq_flush start\n"));
615
for (int i = 0; i < MMC_PART_MAX; i++) {
616
if ((part = softc->part[i]) != NULL) {
617
bioq_flush(&part->bio_queue, NULL, ENXIO);
618
disk_gone(part->disk);
619
}
620
}
621
CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("bioq_flush end\n"));
622
}
623
624
static void
625
sddacleanup(struct cam_periph *periph)
626
{
627
struct sdda_softc *softc;
628
struct sdda_part *part;
629
int i;
630
631
CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddacleanup\n"));
632
softc = (struct sdda_softc *)periph->softc;
633
634
cam_periph_unlock(periph);
635
636
for (i = 0; i < MMC_PART_MAX; i++) {
637
if ((part = softc->part[i]) != NULL) {
638
disk_destroy(part->disk);
639
free(part, M_DEVBUF);
640
softc->part[i] = NULL;
641
}
642
}
643
free(softc, M_DEVBUF);
644
cam_periph_lock(periph);
645
}
646
647
static void
648
sddaasync(void *callback_arg, uint32_t code,
649
struct cam_path *path, void *arg)
650
{
651
struct ccb_getdev cgd;
652
struct cam_periph *periph;
653
654
periph = (struct cam_periph *)callback_arg;
655
CAM_DEBUG(path, CAM_DEBUG_TRACE, ("sddaasync(code=%d)\n", code));
656
switch (code) {
657
case AC_FOUND_DEVICE:
658
{
659
CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_FOUND_DEVICE\n"));
660
struct ccb_getdev *cgd;
661
cam_status status;
662
663
cgd = (struct ccb_getdev *)arg;
664
if (cgd == NULL)
665
break;
666
667
if (cgd->protocol != PROTO_MMCSD)
668
break;
669
670
if (!(path->device->mmc_ident_data.card_features & CARD_FEATURE_MEMORY)) {
671
CAM_DEBUG(path, CAM_DEBUG_TRACE, ("No memory on the card!\n"));
672
break;
673
}
674
675
/*
676
* Allocate a peripheral instance for
677
* this device and start the probe
678
* process.
679
*/
680
status = cam_periph_alloc(sddaregister, sddaoninvalidate,
681
sddacleanup, sddastart,
682
"sdda", CAM_PERIPH_BIO,
683
path, sddaasync,
684
AC_FOUND_DEVICE, cgd);
685
686
if (status != CAM_REQ_CMP
687
&& status != CAM_REQ_INPROG)
688
printf("sddaasync: Unable to attach to new device "
689
"due to status 0x%x\n", status);
690
break;
691
}
692
case AC_GETDEV_CHANGED:
693
{
694
CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_GETDEV_CHANGED\n"));
695
xpt_gdev_type(&cgd, periph->path);
696
cam_periph_async(periph, code, path, arg);
697
break;
698
}
699
case AC_ADVINFO_CHANGED:
700
{
701
uintptr_t buftype;
702
int i;
703
704
CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> AC_ADVINFO_CHANGED\n"));
705
buftype = (uintptr_t)arg;
706
if (buftype == CDAI_TYPE_PHYS_PATH) {
707
struct sdda_softc *softc;
708
struct sdda_part *part;
709
710
softc = periph->softc;
711
for (i = 0; i < MMC_PART_MAX; i++) {
712
if ((part = softc->part[i]) != NULL) {
713
disk_attr_changed(part->disk, "GEOM::physpath",
714
M_NOWAIT);
715
}
716
}
717
}
718
break;
719
}
720
default:
721
CAM_DEBUG(path, CAM_DEBUG_TRACE, ("=> default?!\n"));
722
cam_periph_async(periph, code, path, arg);
723
break;
724
}
725
}
726
727
static int
728
sddagetattr(struct bio *bp)
729
{
730
struct cam_periph *periph;
731
struct sdda_softc *softc;
732
struct sdda_part *part;
733
int ret;
734
735
part = (struct sdda_part *)bp->bio_disk->d_drv1;
736
softc = part->sc;
737
periph = softc->periph;
738
cam_periph_lock(periph);
739
ret = xpt_getattr(bp->bio_data, bp->bio_length, bp->bio_attribute,
740
periph->path);
741
cam_periph_unlock(periph);
742
if (ret == 0)
743
bp->bio_completed = bp->bio_length;
744
return (ret);
745
}
746
747
static cam_status
748
sddaregister(struct cam_periph *periph, void *arg)
749
{
750
struct sdda_softc *softc;
751
struct ccb_getdev *cgd;
752
753
CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddaregister\n"));
754
cgd = (struct ccb_getdev *)arg;
755
if (cgd == NULL) {
756
printf("sddaregister: no getdev CCB, can't register device\n");
757
return (CAM_REQ_CMP_ERR);
758
}
759
760
softc = (struct sdda_softc *)malloc(sizeof(*softc), M_DEVBUF,
761
M_NOWAIT|M_ZERO);
762
if (softc == NULL) {
763
printf("sddaregister: Unable to probe new device. "
764
"Unable to allocate softc\n");
765
return (CAM_REQ_CMP_ERR);
766
}
767
768
softc->state = SDDA_STATE_INIT;
769
softc->mmcdata =
770
(struct mmc_data *)malloc(sizeof(struct mmc_data), M_DEVBUF, M_NOWAIT|M_ZERO);
771
if (softc->mmcdata == NULL) {
772
printf("sddaregister: Unable to probe new device. "
773
"Unable to allocate mmcdata\n");
774
free(softc, M_DEVBUF);
775
return (CAM_REQ_CMP_ERR);
776
}
777
periph->softc = softc;
778
softc->periph = periph;
779
780
xpt_schedule(periph, CAM_PRIORITY_XPT);
781
TASK_INIT(&softc->start_init_task, 0, sdda_start_init_task, periph);
782
taskqueue_enqueue(taskqueue_thread, &softc->start_init_task);
783
784
return (CAM_REQ_CMP);
785
}
786
787
static int
788
mmc_exec_app_cmd(struct cam_periph *periph, union ccb *ccb,
789
struct mmc_command *cmd)
790
{
791
int err;
792
793
/* Send APP_CMD first */
794
memset(&ccb->mmcio.cmd, 0, sizeof(struct mmc_command));
795
memset(&ccb->mmcio.stop, 0, sizeof(struct mmc_command));
796
cam_fill_mmcio(&ccb->mmcio,
797
/*retries*/ 0,
798
/*cbfcnp*/ NULL,
799
/*flags*/ CAM_DIR_NONE,
800
/*mmc_opcode*/ MMC_APP_CMD,
801
/*mmc_arg*/ get_rca(periph) << 16,
802
/*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_AC,
803
/*mmc_data*/ NULL,
804
/*timeout*/ 0);
805
806
cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL);
807
err = mmc_handle_reply(ccb);
808
if (err != 0)
809
return (err);
810
if (!(ccb->mmcio.cmd.resp[0] & R1_APP_CMD))
811
return (EIO);
812
813
/* Now exec actual command */
814
int flags = 0;
815
if (cmd->data != NULL) {
816
ccb->mmcio.cmd.data = cmd->data;
817
if (cmd->data->flags & MMC_DATA_READ)
818
flags |= CAM_DIR_IN;
819
if (cmd->data->flags & MMC_DATA_WRITE)
820
flags |= CAM_DIR_OUT;
821
} else flags = CAM_DIR_NONE;
822
823
cam_fill_mmcio(&ccb->mmcio,
824
/*retries*/ 0,
825
/*cbfcnp*/ NULL,
826
/*flags*/ flags,
827
/*mmc_opcode*/ cmd->opcode,
828
/*mmc_arg*/ cmd->arg,
829
/*mmc_flags*/ cmd->flags,
830
/*mmc_data*/ cmd->data,
831
/*timeout*/ 0);
832
833
cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL);
834
err = mmc_handle_reply(ccb);
835
if (err != 0)
836
return (err);
837
memcpy(cmd->resp, ccb->mmcio.cmd.resp, sizeof(cmd->resp));
838
cmd->error = ccb->mmcio.cmd.error;
839
840
return (0);
841
}
842
843
static int
844
mmc_app_get_scr(struct cam_periph *periph, union ccb *ccb, uint32_t *rawscr)
845
{
846
int err;
847
struct mmc_command cmd;
848
struct mmc_data d;
849
850
memset(&cmd, 0, sizeof(cmd));
851
memset(&d, 0, sizeof(d));
852
853
memset(rawscr, 0, 8);
854
cmd.opcode = ACMD_SEND_SCR;
855
cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
856
cmd.arg = 0;
857
858
d.data = rawscr;
859
d.len = 8;
860
d.flags = MMC_DATA_READ;
861
cmd.data = &d;
862
863
err = mmc_exec_app_cmd(periph, ccb, &cmd);
864
rawscr[0] = be32toh(rawscr[0]);
865
rawscr[1] = be32toh(rawscr[1]);
866
return (err);
867
}
868
869
static int
870
mmc_send_ext_csd(struct cam_periph *periph, union ccb *ccb,
871
uint8_t *rawextcsd, size_t buf_len)
872
{
873
int err;
874
struct mmc_data d;
875
876
KASSERT(buf_len == 512, ("Buffer for ext csd must be 512 bytes"));
877
memset(&d, 0, sizeof(d));
878
d.data = rawextcsd;
879
d.len = buf_len;
880
d.flags = MMC_DATA_READ;
881
memset(d.data, 0, d.len);
882
883
cam_fill_mmcio(&ccb->mmcio,
884
/*retries*/ 0,
885
/*cbfcnp*/ NULL,
886
/*flags*/ CAM_DIR_IN,
887
/*mmc_opcode*/ MMC_SEND_EXT_CSD,
888
/*mmc_arg*/ 0,
889
/*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_ADTC,
890
/*mmc_data*/ &d,
891
/*timeout*/ 0);
892
893
cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL);
894
err = mmc_handle_reply(ccb);
895
return (err);
896
}
897
898
static void
899
mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr)
900
{
901
unsigned int scr_struct;
902
903
memset(scr, 0, sizeof(*scr));
904
905
scr_struct = mmc_get_bits(raw_scr, 64, 60, 4);
906
if (scr_struct != 0) {
907
printf("Unrecognised SCR structure version %d\n",
908
scr_struct);
909
return;
910
}
911
scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4);
912
scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4);
913
}
914
915
static inline void
916
mmc_switch_fill_mmcio(union ccb *ccb,
917
uint8_t set, uint8_t index, uint8_t value, u_int timeout)
918
{
919
int arg = (MMC_SWITCH_FUNC_WR << 24) |
920
(index << 16) |
921
(value << 8) |
922
set;
923
924
cam_fill_mmcio(&ccb->mmcio,
925
/*retries*/ 0,
926
/*cbfcnp*/ NULL,
927
/*flags*/ CAM_DIR_NONE,
928
/*mmc_opcode*/ MMC_SWITCH_FUNC,
929
/*mmc_arg*/ arg,
930
/*mmc_flags*/ MMC_RSP_R1B | MMC_CMD_AC,
931
/*mmc_data*/ NULL,
932
/*timeout*/ timeout);
933
}
934
935
static int
936
mmc_select_card(struct cam_periph *periph, union ccb *ccb, uint32_t rca)
937
{
938
int flags, err;
939
940
flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC;
941
cam_fill_mmcio(&ccb->mmcio,
942
/*retries*/ 0,
943
/*cbfcnp*/ NULL,
944
/*flags*/ CAM_DIR_IN,
945
/*mmc_opcode*/ MMC_SELECT_CARD,
946
/*mmc_arg*/ rca << 16,
947
/*mmc_flags*/ flags,
948
/*mmc_data*/ NULL,
949
/*timeout*/ 0);
950
951
cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL);
952
err = mmc_handle_reply(ccb);
953
return (err);
954
}
955
956
static int
957
mmc_switch(struct cam_periph *periph, union ccb *ccb,
958
uint8_t set, uint8_t index, uint8_t value, u_int timeout)
959
{
960
int err;
961
962
mmc_switch_fill_mmcio(ccb, set, index, value, timeout);
963
cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL);
964
err = mmc_handle_reply(ccb);
965
return (err);
966
}
967
968
static uint32_t
969
mmc_get_spec_vers(struct cam_periph *periph)
970
{
971
struct sdda_softc *softc = (struct sdda_softc *)periph->softc;
972
973
return (softc->csd.spec_vers);
974
}
975
976
static uint64_t
977
mmc_get_media_size(struct cam_periph *periph)
978
{
979
struct sdda_softc *softc = (struct sdda_softc *)periph->softc;
980
981
return (softc->mediasize);
982
}
983
984
static uint32_t
985
mmc_get_cmd6_timeout(struct cam_periph *periph)
986
{
987
struct sdda_softc *softc = (struct sdda_softc *)periph->softc;
988
989
if (mmc_get_spec_vers(periph) >= 6)
990
return (softc->raw_ext_csd[EXT_CSD_GEN_CMD6_TIME] * 10);
991
return (500 * 1000);
992
}
993
994
static int
995
mmc_sd_switch(struct cam_periph *periph, union ccb *ccb,
996
uint8_t mode, uint8_t grp, uint8_t value,
997
uint8_t *res)
998
{
999
struct mmc_data mmc_d;
1000
uint32_t arg;
1001
int err;
1002
1003
memset(res, 0, 64);
1004
memset(&mmc_d, 0, sizeof(mmc_d));
1005
mmc_d.len = 64;
1006
mmc_d.data = res;
1007
mmc_d.flags = MMC_DATA_READ;
1008
1009
arg = mode << 31; /* 0 - check, 1 - set */
1010
arg |= 0x00FFFFFF;
1011
arg &= ~(0xF << (grp * 4));
1012
arg |= value << (grp * 4);
1013
1014
cam_fill_mmcio(&ccb->mmcio,
1015
/*retries*/ 0,
1016
/*cbfcnp*/ NULL,
1017
/*flags*/ CAM_DIR_IN,
1018
/*mmc_opcode*/ SD_SWITCH_FUNC,
1019
/*mmc_arg*/ arg,
1020
/*mmc_flags*/ MMC_RSP_R1 | MMC_CMD_ADTC,
1021
/*mmc_data*/ &mmc_d,
1022
/*timeout*/ 0);
1023
1024
cam_periph_runccb(ccb, sddaerror, CAM_FLAG_NONE, /*sense_flags*/0, NULL);
1025
err = mmc_handle_reply(ccb);
1026
return (err);
1027
}
1028
1029
static int
1030
mmc_set_timing(struct cam_periph *periph,
1031
union ccb *ccb,
1032
enum mmc_bus_timing timing)
1033
{
1034
u_char switch_res[64];
1035
int err;
1036
uint8_t value;
1037
struct sdda_softc *softc = (struct sdda_softc *)periph->softc;
1038
struct mmc_params *mmcp = &periph->path->device->mmc_ident_data;
1039
1040
CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE,
1041
("mmc_set_timing(timing=%d)", timing));
1042
switch (timing) {
1043
case bus_timing_normal:
1044
value = 0;
1045
break;
1046
case bus_timing_hs:
1047
value = 1;
1048
break;
1049
default:
1050
return (MMC_ERR_INVALID);
1051
}
1052
if (mmcp->card_features & CARD_FEATURE_MMC) {
1053
err = mmc_switch(periph, ccb, EXT_CSD_CMD_SET_NORMAL,
1054
EXT_CSD_HS_TIMING, value, softc->cmd6_time);
1055
} else {
1056
err = mmc_sd_switch(periph, ccb, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1, value, switch_res);
1057
}
1058
1059
/* Set high-speed timing on the host */
1060
struct ccb_trans_settings_mmc *cts;
1061
cts = &ccb->cts.proto_specific.mmc;
1062
ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS;
1063
ccb->ccb_h.flags = CAM_DIR_NONE;
1064
ccb->ccb_h.retry_count = 0;
1065
ccb->ccb_h.timeout = 100;
1066
ccb->ccb_h.cbfcnp = NULL;
1067
cts->ios.timing = timing;
1068
cts->ios_valid = MMC_BT;
1069
xpt_action(ccb);
1070
1071
return (err);
1072
}
1073
1074
static void
1075
sdda_start_init_task(void *context, int pending)
1076
{
1077
union ccb *new_ccb;
1078
struct cam_periph *periph;
1079
1080
periph = (struct cam_periph *)context;
1081
CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_start_init_task\n"));
1082
new_ccb = xpt_alloc_ccb();
1083
xpt_setup_ccb(&new_ccb->ccb_h, periph->path,
1084
CAM_PRIORITY_NORMAL);
1085
1086
cam_periph_lock(periph);
1087
cam_periph_hold(periph, PRIBIO|PCATCH);
1088
sdda_start_init(context, new_ccb);
1089
cam_periph_unhold(periph);
1090
cam_periph_unlock(periph);
1091
xpt_free_ccb(new_ccb);
1092
}
1093
1094
static void
1095
sdda_set_bus_width(struct cam_periph *periph, union ccb *ccb, int width)
1096
{
1097
struct sdda_softc *softc = (struct sdda_softc *)periph->softc;
1098
struct mmc_params *mmcp = &periph->path->device->mmc_ident_data;
1099
int err;
1100
1101
CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_set_bus_width\n"));
1102
1103
/* First set for the card, then for the host */
1104
if (mmcp->card_features & CARD_FEATURE_MMC) {
1105
uint8_t value;
1106
switch (width) {
1107
case bus_width_1:
1108
value = EXT_CSD_BUS_WIDTH_1;
1109
break;
1110
case bus_width_4:
1111
value = EXT_CSD_BUS_WIDTH_4;
1112
break;
1113
case bus_width_8:
1114
value = EXT_CSD_BUS_WIDTH_8;
1115
break;
1116
default:
1117
panic("Invalid bus width %d", width);
1118
}
1119
err = mmc_switch(periph, ccb, EXT_CSD_CMD_SET_NORMAL,
1120
EXT_CSD_BUS_WIDTH, value, softc->cmd6_time);
1121
} else {
1122
/* For SD cards we send ACMD6 with the required bus width in arg */
1123
struct mmc_command cmd;
1124
memset(&cmd, 0, sizeof(struct mmc_command));
1125
cmd.opcode = ACMD_SET_BUS_WIDTH;
1126
cmd.arg = width;
1127
cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
1128
err = mmc_exec_app_cmd(periph, ccb, &cmd);
1129
}
1130
1131
if (err != MMC_ERR_NONE) {
1132
CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Error %d when setting bus width on the card\n", err));
1133
return;
1134
}
1135
/* Now card is done, set the host to the same width */
1136
struct ccb_trans_settings_mmc *cts;
1137
cts = &ccb->cts.proto_specific.mmc;
1138
ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS;
1139
ccb->ccb_h.flags = CAM_DIR_NONE;
1140
ccb->ccb_h.retry_count = 0;
1141
ccb->ccb_h.timeout = 100;
1142
ccb->ccb_h.cbfcnp = NULL;
1143
cts->ios.bus_width = width;
1144
cts->ios_valid = MMC_BW;
1145
xpt_action(ccb);
1146
}
1147
1148
static inline const char
1149
*part_type(u_int type)
1150
{
1151
1152
switch (type) {
1153
case EXT_CSD_PART_CONFIG_ACC_RPMB:
1154
return ("RPMB");
1155
case EXT_CSD_PART_CONFIG_ACC_DEFAULT:
1156
return ("default");
1157
case EXT_CSD_PART_CONFIG_ACC_BOOT0:
1158
return ("boot0");
1159
case EXT_CSD_PART_CONFIG_ACC_BOOT1:
1160
return ("boot1");
1161
case EXT_CSD_PART_CONFIG_ACC_GP0:
1162
case EXT_CSD_PART_CONFIG_ACC_GP1:
1163
case EXT_CSD_PART_CONFIG_ACC_GP2:
1164
case EXT_CSD_PART_CONFIG_ACC_GP3:
1165
return ("general purpose");
1166
default:
1167
return ("(unknown type)");
1168
}
1169
}
1170
1171
static inline const char
1172
*bus_width_str(enum mmc_bus_width w)
1173
{
1174
1175
switch (w) {
1176
case bus_width_1:
1177
return ("1-bit");
1178
case bus_width_4:
1179
return ("4-bit");
1180
case bus_width_8:
1181
return ("8-bit");
1182
default:
1183
__assert_unreachable();
1184
}
1185
}
1186
1187
static uint32_t
1188
sdda_get_host_caps(struct cam_periph *periph, union ccb *ccb)
1189
{
1190
struct ccb_trans_settings_mmc *cts;
1191
1192
cts = &ccb->cts.proto_specific.mmc;
1193
1194
ccb->ccb_h.func_code = XPT_GET_TRAN_SETTINGS;
1195
ccb->ccb_h.flags = CAM_DIR_NONE;
1196
ccb->ccb_h.retry_count = 0;
1197
ccb->ccb_h.timeout = 100;
1198
ccb->ccb_h.cbfcnp = NULL;
1199
xpt_action(ccb);
1200
1201
if (ccb->ccb_h.status != CAM_REQ_CMP)
1202
panic("Cannot get host caps");
1203
return (cts->host_caps);
1204
}
1205
1206
static void
1207
sdda_start_init(void *context, union ccb *start_ccb)
1208
{
1209
struct cam_periph *periph = (struct cam_periph *)context;
1210
struct ccb_trans_settings_mmc *cts;
1211
uint32_t host_caps;
1212
uint32_t sec_count;
1213
int err;
1214
int host_f_max;
1215
uint8_t card_type;
1216
1217
CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sdda_start_init\n"));
1218
/* periph was held for us when this task was enqueued */
1219
if ((periph->flags & CAM_PERIPH_INVALID) != 0) {
1220
cam_periph_release(periph);
1221
return;
1222
}
1223
1224
struct sdda_softc *softc = (struct sdda_softc *)periph->softc;
1225
struct mmc_params *mmcp = &periph->path->device->mmc_ident_data;
1226
struct cam_ed *device = periph->path->device;
1227
1228
if (mmcp->card_features & CARD_FEATURE_MMC) {
1229
mmc_decode_csd_mmc(mmcp->card_csd, &softc->csd);
1230
mmc_decode_cid_mmc(mmcp->card_cid, &softc->cid);
1231
if (mmc_get_spec_vers(periph) >= 4) {
1232
err = mmc_send_ext_csd(periph, start_ccb,
1233
(uint8_t *)&softc->raw_ext_csd,
1234
sizeof(softc->raw_ext_csd));
1235
if (err != 0) {
1236
CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH,
1237
("Cannot read EXT_CSD, err %d", err));
1238
return;
1239
}
1240
}
1241
} else {
1242
mmc_decode_csd_sd(mmcp->card_csd, &softc->csd);
1243
mmc_decode_cid_sd(mmcp->card_cid, &softc->cid);
1244
}
1245
1246
softc->sector_count = softc->csd.capacity / MMC_SECTOR_SIZE;
1247
softc->mediasize = softc->csd.capacity;
1248
softc->cmd6_time = mmc_get_cmd6_timeout(periph);
1249
1250
/* MMC >= 4.x have EXT_CSD that has its own opinion about capacity */
1251
if (mmc_get_spec_vers(periph) >= 4) {
1252
sec_count = softc->raw_ext_csd[EXT_CSD_SEC_CNT] +
1253
(softc->raw_ext_csd[EXT_CSD_SEC_CNT + 1] << 8) +
1254
(softc->raw_ext_csd[EXT_CSD_SEC_CNT + 2] << 16) +
1255
(softc->raw_ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1256
if (sec_count != 0) {
1257
softc->sector_count = sec_count;
1258
softc->mediasize = softc->sector_count * MMC_SECTOR_SIZE;
1259
/* FIXME: there should be a better name for this option...*/
1260
mmcp->card_features |= CARD_FEATURE_SDHC;
1261
}
1262
}
1263
CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH,
1264
("Capacity: %"PRIu64", sectors: %"PRIu64"\n",
1265
softc->mediasize,
1266
softc->sector_count));
1267
mmc_format_card_id_string(softc, mmcp);
1268
1269
/* Update info for CAM */
1270
device->serial_num_len = strlen(softc->card_sn_string);
1271
device->serial_num = (uint8_t *)malloc((device->serial_num_len + 1),
1272
M_CAMXPT, M_NOWAIT);
1273
strlcpy(device->serial_num, softc->card_sn_string, device->serial_num_len + 1);
1274
1275
device->device_id_len = strlen(softc->card_id_string);
1276
device->device_id = (uint8_t *)malloc((device->device_id_len + 1),
1277
M_CAMXPT, M_NOWAIT);
1278
strlcpy(device->device_id, softc->card_id_string, device->device_id_len + 1);
1279
1280
strlcpy(mmcp->model, softc->card_id_string, sizeof(mmcp->model));
1281
1282
/* Set the clock frequency that the card can handle */
1283
cts = &start_ccb->cts.proto_specific.mmc;
1284
1285
/* First, get the host's max freq */
1286
start_ccb->ccb_h.func_code = XPT_GET_TRAN_SETTINGS;
1287
start_ccb->ccb_h.flags = CAM_DIR_NONE;
1288
start_ccb->ccb_h.retry_count = 0;
1289
start_ccb->ccb_h.timeout = 100;
1290
start_ccb->ccb_h.cbfcnp = NULL;
1291
xpt_action(start_ccb);
1292
1293
if (start_ccb->ccb_h.status != CAM_REQ_CMP)
1294
panic("Cannot get max host freq");
1295
host_f_max = cts->host_f_max;
1296
host_caps = cts->host_caps;
1297
if (cts->ios.bus_width != bus_width_1)
1298
panic("Bus width in ios is not 1-bit");
1299
1300
/* Now check if the card supports High-speed */
1301
softc->card_f_max = softc->csd.tran_speed;
1302
1303
if (host_caps & MMC_CAP_HSPEED) {
1304
/* Find out if the card supports High speed timing */
1305
if (mmcp->card_features & CARD_FEATURE_SD20) {
1306
/* Get and decode SCR */
1307
uint32_t rawscr[2];
1308
uint8_t res[64];
1309
if (mmc_app_get_scr(periph, start_ccb, rawscr)) {
1310
CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Cannot get SCR\n"));
1311
goto finish_hs_tests;
1312
}
1313
mmc_app_decode_scr(rawscr, &softc->scr);
1314
1315
if ((softc->scr.sda_vsn >= 1) && (softc->csd.ccc & (1<<10))) {
1316
mmc_sd_switch(periph, start_ccb, SD_SWITCH_MODE_CHECK,
1317
SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE, res);
1318
if (res[13] & 2) {
1319
CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports HS\n"));
1320
softc->card_f_max = SD_HS_MAX;
1321
}
1322
1323
/*
1324
* We deselect then reselect the card here. Some cards
1325
* become unselected and timeout with the above two
1326
* commands, although the state tables / diagrams in the
1327
* standard suggest they go back to the transfer state.
1328
* Other cards don't become deselected, and if we
1329
* attempt to blindly re-select them, we get timeout
1330
* errors from some controllers. So we deselect then
1331
* reselect to handle all situations.
1332
*/
1333
mmc_select_card(periph, start_ccb, 0);
1334
mmc_select_card(periph, start_ccb, get_rca(periph));
1335
} else {
1336
CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Not trying the switch\n"));
1337
goto finish_hs_tests;
1338
}
1339
}
1340
1341
if (mmcp->card_features & CARD_FEATURE_MMC && mmc_get_spec_vers(periph) >= 4) {
1342
card_type = softc->raw_ext_csd[EXT_CSD_CARD_TYPE];
1343
if (card_type & EXT_CSD_CARD_TYPE_HS_52)
1344
softc->card_f_max = MMC_TYPE_HS_52_MAX;
1345
else if (card_type & EXT_CSD_CARD_TYPE_HS_26)
1346
softc->card_f_max = MMC_TYPE_HS_26_MAX;
1347
if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_2V) != 0 &&
1348
(host_caps & MMC_CAP_SIGNALING_120) != 0) {
1349
setbit(&softc->timings, bus_timing_mmc_ddr52);
1350
setbit(&softc->vccq_120, bus_timing_mmc_ddr52);
1351
CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports DDR52 at 1.2V\n"));
1352
}
1353
if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_8V) != 0 &&
1354
(host_caps & MMC_CAP_SIGNALING_180) != 0) {
1355
setbit(&softc->timings, bus_timing_mmc_ddr52);
1356
setbit(&softc->vccq_180, bus_timing_mmc_ddr52);
1357
CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports DDR52 at 1.8V\n"));
1358
}
1359
if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_2V) != 0 &&
1360
(host_caps & MMC_CAP_SIGNALING_120) != 0) {
1361
setbit(&softc->timings, bus_timing_mmc_hs200);
1362
setbit(&softc->vccq_120, bus_timing_mmc_hs200);
1363
CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports HS200 at 1.2V\n"));
1364
}
1365
if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_8V) != 0 &&
1366
(host_caps & MMC_CAP_SIGNALING_180) != 0) {
1367
setbit(&softc->timings, bus_timing_mmc_hs200);
1368
setbit(&softc->vccq_180, bus_timing_mmc_hs200);
1369
CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Card supports HS200 at 1.8V\n"));
1370
}
1371
}
1372
}
1373
int f_max;
1374
finish_hs_tests:
1375
f_max = min(host_f_max, softc->card_f_max);
1376
CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH, ("Set SD freq to %d MHz (min out of host f=%d MHz and card f=%d MHz)\n", f_max / 1000000, host_f_max / 1000000, softc->card_f_max / 1000000));
1377
1378
/* Enable high-speed timing on the card */
1379
if (f_max > 25000000) {
1380
err = mmc_set_timing(periph, start_ccb, bus_timing_hs);
1381
if (err != MMC_ERR_NONE) {
1382
CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("Cannot switch card to high-speed mode"));
1383
f_max = 25000000;
1384
}
1385
}
1386
/* If possible, set lower-level signaling */
1387
enum mmc_bus_timing timing;
1388
/* FIXME: MMCCAM supports max. bus_timing_mmc_ddr52 at the moment. */
1389
for (timing = bus_timing_mmc_ddr52; timing > bus_timing_normal; timing--) {
1390
if (isset(&softc->vccq_120, timing)) {
1391
/* Set VCCQ = 1.2V */
1392
start_ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS;
1393
start_ccb->ccb_h.flags = CAM_DIR_NONE;
1394
start_ccb->ccb_h.retry_count = 0;
1395
start_ccb->ccb_h.timeout = 100;
1396
start_ccb->ccb_h.cbfcnp = NULL;
1397
cts->ios.vccq = vccq_120;
1398
cts->ios_valid = MMC_VCCQ;
1399
xpt_action(start_ccb);
1400
break;
1401
} else if (isset(&softc->vccq_180, timing)) {
1402
/* Set VCCQ = 1.8V */
1403
start_ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS;
1404
start_ccb->ccb_h.flags = CAM_DIR_NONE;
1405
start_ccb->ccb_h.retry_count = 0;
1406
start_ccb->ccb_h.timeout = 100;
1407
start_ccb->ccb_h.cbfcnp = NULL;
1408
cts->ios.vccq = vccq_180;
1409
cts->ios_valid = MMC_VCCQ;
1410
xpt_action(start_ccb);
1411
break;
1412
} else {
1413
/* Set VCCQ = 3.3V */
1414
start_ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS;
1415
start_ccb->ccb_h.flags = CAM_DIR_NONE;
1416
start_ccb->ccb_h.retry_count = 0;
1417
start_ccb->ccb_h.timeout = 100;
1418
start_ccb->ccb_h.cbfcnp = NULL;
1419
cts->ios.vccq = vccq_330;
1420
cts->ios_valid = MMC_VCCQ;
1421
xpt_action(start_ccb);
1422
break;
1423
}
1424
}
1425
1426
/* Set frequency on the controller */
1427
start_ccb->ccb_h.func_code = XPT_SET_TRAN_SETTINGS;
1428
start_ccb->ccb_h.flags = CAM_DIR_NONE;
1429
start_ccb->ccb_h.retry_count = 0;
1430
start_ccb->ccb_h.timeout = 100;
1431
start_ccb->ccb_h.cbfcnp = NULL;
1432
cts->ios.clock = f_max;
1433
cts->ios_valid = MMC_CLK;
1434
xpt_action(start_ccb);
1435
1436
/* Set bus width */
1437
enum mmc_bus_width desired_bus_width = bus_width_1;
1438
enum mmc_bus_width max_host_bus_width =
1439
(host_caps & MMC_CAP_8_BIT_DATA ? bus_width_8 :
1440
host_caps & MMC_CAP_4_BIT_DATA ? bus_width_4 : bus_width_1);
1441
enum mmc_bus_width max_card_bus_width = bus_width_1;
1442
if (mmcp->card_features & CARD_FEATURE_SD20 &&
1443
softc->scr.bus_widths & SD_SCR_BUS_WIDTH_4)
1444
max_card_bus_width = bus_width_4;
1445
/*
1446
* Unlike SD, MMC cards don't have any information about supported bus width...
1447
* So we need to perform read/write test to find out the width.
1448
*/
1449
/* TODO: figure out bus width for MMC; use 8-bit for now (to test on BBB) */
1450
if (mmcp->card_features & CARD_FEATURE_MMC)
1451
max_card_bus_width = bus_width_8;
1452
1453
desired_bus_width = min(max_host_bus_width, max_card_bus_width);
1454
CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH,
1455
("Set bus width to %s (min of host %s and card %s)\n",
1456
bus_width_str(desired_bus_width),
1457
bus_width_str(max_host_bus_width),
1458
bus_width_str(max_card_bus_width)));
1459
sdda_set_bus_width(periph, start_ccb, desired_bus_width);
1460
1461
softc->state = SDDA_STATE_NORMAL;
1462
1463
cam_periph_unhold(periph);
1464
/* MMC partitions support */
1465
if (mmcp->card_features & CARD_FEATURE_MMC && mmc_get_spec_vers(periph) >= 4) {
1466
sdda_process_mmc_partitions(periph, start_ccb);
1467
} else if (mmcp->card_features & CARD_FEATURE_MEMORY) {
1468
/* For SD[HC] cards, just add one partition that is the whole card */
1469
if (sdda_add_part(periph, 0, SDDA_FMT,
1470
periph->unit_number,
1471
mmc_get_media_size(periph),
1472
sdda_get_read_only(periph, start_ccb)) == false)
1473
return;
1474
softc->part_curr = 0;
1475
}
1476
cam_periph_hold(periph, PRIBIO|PCATCH);
1477
1478
xpt_announce_periph(periph, softc->card_id_string);
1479
/*
1480
* Add async callbacks for bus reset and bus device reset calls.
1481
* I don't bother checking if this fails as, in most cases,
1482
* the system will function just fine without them and the only
1483
* alternative would be to not attach the device on failure.
1484
*/
1485
xpt_register_async(AC_LOST_DEVICE | AC_GETDEV_CHANGED |
1486
AC_ADVINFO_CHANGED, sddaasync, periph, periph->path);
1487
}
1488
1489
static bool
1490
sdda_add_part(struct cam_periph *periph, u_int type, const char *name,
1491
u_int cnt, off_t media_size, bool ro)
1492
{
1493
struct sdda_softc *sc = (struct sdda_softc *)periph->softc;
1494
struct sdda_part *part;
1495
struct ccb_pathinq cpi;
1496
1497
CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH,
1498
("Partition type '%s', size %ju %s\n",
1499
part_type(type),
1500
media_size,
1501
ro ? "(read-only)" : ""));
1502
1503
part = sc->part[type] = malloc(sizeof(*part), M_DEVBUF,
1504
M_NOWAIT | M_ZERO);
1505
if (part == NULL) {
1506
printf("Cannot add partition for sdda\n");
1507
return (false);
1508
}
1509
1510
part->cnt = cnt;
1511
part->type = type;
1512
part->ro = ro;
1513
part->sc = sc;
1514
snprintf(part->name, sizeof(part->name), name, "sdda", periph->unit_number);
1515
1516
/*
1517
* Due to the nature of RPMB partition it doesn't make much sense
1518
* to add it as a disk. It would be more appropriate to create a
1519
* userland tool to operate on the partition or leverage the existing
1520
* tools from sysutils/mmc-utils.
1521
*/
1522
if (type == EXT_CSD_PART_CONFIG_ACC_RPMB) {
1523
/* TODO: Create device, assign IOCTL handler */
1524
CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH,
1525
("Don't know what to do with RPMB partitions yet\n"));
1526
return (false);
1527
}
1528
1529
bioq_init(&part->bio_queue);
1530
1531
xpt_path_inq(&cpi, periph->path);
1532
1533
/*
1534
* Register this media as a disk
1535
*/
1536
(void)cam_periph_hold(periph, PRIBIO);
1537
cam_periph_unlock(periph);
1538
1539
part->disk = disk_alloc();
1540
part->disk->d_rotation_rate = DISK_RR_NON_ROTATING;
1541
part->disk->d_devstat = devstat_new_entry(part->name,
1542
cnt, MMC_SECTOR_SIZE,
1543
DEVSTAT_ALL_SUPPORTED,
1544
DEVSTAT_TYPE_DIRECT | XPORT_DEVSTAT_TYPE(cpi.transport),
1545
DEVSTAT_PRIORITY_DISK);
1546
1547
part->disk->d_open = sddaopen;
1548
part->disk->d_close = sddaclose;
1549
part->disk->d_strategy = sddastrategy;
1550
if (cam_sim_pollable(periph->sim))
1551
part->disk->d_dump = sddadump;
1552
part->disk->d_getattr = sddagetattr;
1553
part->disk->d_gone = sddadiskgonecb;
1554
part->disk->d_name = part->name;
1555
part->disk->d_drv1 = part;
1556
part->disk->d_maxsize = MIN(maxphys, cpi.maxio);
1557
part->disk->d_unit = cnt;
1558
part->disk->d_flags = 0;
1559
strlcpy(part->disk->d_descr, sc->card_id_string,
1560
MIN(sizeof(part->disk->d_descr), sizeof(sc->card_id_string)));
1561
strlcpy(part->disk->d_ident, sc->card_sn_string,
1562
MIN(sizeof(part->disk->d_ident), sizeof(sc->card_sn_string)));
1563
part->disk->d_hba_vendor = cpi.hba_vendor;
1564
part->disk->d_hba_device = cpi.hba_device;
1565
part->disk->d_hba_subvendor = cpi.hba_subvendor;
1566
part->disk->d_hba_subdevice = cpi.hba_subdevice;
1567
snprintf(part->disk->d_attachment, sizeof(part->disk->d_attachment),
1568
"%s%d", cpi.dev_name, cpi.unit_number);
1569
1570
part->disk->d_sectorsize = mmc_get_sector_size(periph);
1571
part->disk->d_mediasize = media_size;
1572
part->disk->d_stripesize = 0;
1573
part->disk->d_fwsectors = 0;
1574
part->disk->d_fwheads = 0;
1575
1576
if (sdda_mmcsd_compat) {
1577
char cname[SDDA_PART_NAMELEN]; /* This equals the mmcsd namelen. */
1578
snprintf(cname, sizeof(cname), name, "mmcsd", periph->unit_number);
1579
disk_add_alias(part->disk, cname);
1580
}
1581
1582
/*
1583
* Acquire a reference to the periph before we register with GEOM.
1584
* We'll release this reference once GEOM calls us back (via
1585
* sddadiskgonecb()) telling us that our provider has been freed.
1586
*/
1587
if (cam_periph_acquire(periph) != 0) {
1588
xpt_print(periph->path, "%s: lost periph during "
1589
"registration!\n", __func__);
1590
cam_periph_lock(periph);
1591
return (false);
1592
}
1593
disk_create(part->disk, DISK_VERSION);
1594
cam_periph_lock(periph);
1595
cam_periph_unhold(periph);
1596
1597
return (true);
1598
}
1599
1600
/*
1601
* For MMC cards, process EXT_CSD and add partitions that are supported by
1602
* this device.
1603
*/
1604
static void
1605
sdda_process_mmc_partitions(struct cam_periph *periph, union ccb *ccb)
1606
{
1607
struct sdda_softc *sc = (struct sdda_softc *)periph->softc;
1608
struct mmc_params *mmcp = &periph->path->device->mmc_ident_data;
1609
off_t erase_size, sector_size, size, wp_size;
1610
int i;
1611
const uint8_t *ext_csd;
1612
uint8_t rev;
1613
bool comp, ro;
1614
1615
ext_csd = sc->raw_ext_csd;
1616
1617
/*
1618
* Enhanced user data area and general purpose partitions are only
1619
* supported in revision 1.4 (EXT_CSD_REV == 4) and later, the RPMB
1620
* partition in revision 1.5 (MMC v4.41, EXT_CSD_REV == 5) and later.
1621
*/
1622
rev = ext_csd[EXT_CSD_REV];
1623
1624
/*
1625
* Ignore user-creatable enhanced user data area and general purpose
1626
* partitions partitions as long as partitioning hasn't been finished.
1627
*/
1628
comp = (ext_csd[EXT_CSD_PART_SET] & EXT_CSD_PART_SET_COMPLETED) != 0;
1629
1630
/*
1631
* Add enhanced user data area slice, unless it spans the entirety of
1632
* the user data area. The enhanced area is of a multiple of high
1633
* capacity write protect groups ((ERASE_GRP_SIZE + HC_WP_GRP_SIZE) *
1634
* 512 KB) and its offset given in either sectors or bytes, depending
1635
* on whether it's a high capacity device or not.
1636
* NB: The slicer and its slices need to be registered before adding
1637
* the disk for the corresponding user data area as re-tasting is
1638
* racy.
1639
*/
1640
sector_size = mmc_get_sector_size(periph);
1641
size = ext_csd[EXT_CSD_ENH_SIZE_MULT] +
1642
(ext_csd[EXT_CSD_ENH_SIZE_MULT + 1] << 8) +
1643
(ext_csd[EXT_CSD_ENH_SIZE_MULT + 2] << 16);
1644
if (rev >= 4 && comp == TRUE && size > 0 &&
1645
(ext_csd[EXT_CSD_PART_SUPPORT] &
1646
EXT_CSD_PART_SUPPORT_ENH_ATTR_EN) != 0 &&
1647
(ext_csd[EXT_CSD_PART_ATTR] & (EXT_CSD_PART_ATTR_ENH_USR)) != 0) {
1648
erase_size = ext_csd[EXT_CSD_ERASE_GRP_SIZE] * 1024 *
1649
MMC_SECTOR_SIZE;
1650
wp_size = ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1651
size *= erase_size * wp_size;
1652
if (size != mmc_get_media_size(periph) * sector_size) {
1653
sc->enh_size = size;
1654
sc->enh_base = (ext_csd[EXT_CSD_ENH_START_ADDR] +
1655
(ext_csd[EXT_CSD_ENH_START_ADDR + 1] << 8) +
1656
(ext_csd[EXT_CSD_ENH_START_ADDR + 2] << 16) +
1657
(ext_csd[EXT_CSD_ENH_START_ADDR + 3] << 24)) *
1658
((mmcp->card_features & CARD_FEATURE_SDHC) ? 1: MMC_SECTOR_SIZE);
1659
} else
1660
CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH,
1661
("enhanced user data area spans entire device"));
1662
}
1663
1664
/*
1665
* Add default partition. This may be the only one or the user
1666
* data area in case partitions are supported.
1667
*/
1668
ro = sdda_get_read_only(periph, ccb);
1669
sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_DEFAULT, SDDA_FMT,
1670
periph->unit_number, mmc_get_media_size(periph), ro);
1671
sc->part_curr = EXT_CSD_PART_CONFIG_ACC_DEFAULT;
1672
1673
if (mmc_get_spec_vers(periph) < 3)
1674
return;
1675
1676
/* Belatedly announce enhanced user data slice. */
1677
if (sc->enh_size != 0) {
1678
CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH,
1679
("enhanced user data area off 0x%jx size %ju bytes\n",
1680
sc->enh_base, sc->enh_size));
1681
}
1682
1683
/*
1684
* Determine partition switch timeout (provided in units of 10 ms)
1685
* and ensure it's at least 300 ms as some eMMC chips lie.
1686
*/
1687
sc->part_time = max(ext_csd[EXT_CSD_PART_SWITCH_TO] * 10 * 1000,
1688
300 * 1000);
1689
1690
/* Add boot partitions, which are of a fixed multiple of 128 KB. */
1691
size = ext_csd[EXT_CSD_BOOT_SIZE_MULT] * MMC_BOOT_RPMB_BLOCK_SIZE;
1692
if (size > 0 && (sdda_get_host_caps(periph, ccb) & MMC_CAP_BOOT_NOACC) == 0) {
1693
sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_BOOT0,
1694
SDDA_FMT_BOOT, 0, size,
1695
ro | ((ext_csd[EXT_CSD_BOOT_WP_STATUS] &
1696
EXT_CSD_BOOT_WP_STATUS_BOOT0_MASK) != 0));
1697
sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_BOOT1,
1698
SDDA_FMT_BOOT, 1, size,
1699
ro | ((ext_csd[EXT_CSD_BOOT_WP_STATUS] &
1700
EXT_CSD_BOOT_WP_STATUS_BOOT1_MASK) != 0));
1701
}
1702
1703
/* Add RPMB partition, which also is of a fixed multiple of 128 KB. */
1704
size = ext_csd[EXT_CSD_RPMB_MULT] * MMC_BOOT_RPMB_BLOCK_SIZE;
1705
if (rev >= 5 && size > 0)
1706
sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_RPMB,
1707
SDDA_FMT_RPMB, 0, size, ro);
1708
1709
if (rev <= 3 || comp == FALSE)
1710
return;
1711
1712
/*
1713
* Add general purpose partitions, which are of a multiple of high
1714
* capacity write protect groups, too.
1715
*/
1716
if ((ext_csd[EXT_CSD_PART_SUPPORT] & EXT_CSD_PART_SUPPORT_EN) != 0) {
1717
erase_size = ext_csd[EXT_CSD_ERASE_GRP_SIZE] * 1024 *
1718
MMC_SECTOR_SIZE;
1719
wp_size = ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1720
for (i = 0; i < MMC_PART_GP_MAX; i++) {
1721
size = ext_csd[EXT_CSD_GP_SIZE_MULT + i * 3] +
1722
(ext_csd[EXT_CSD_GP_SIZE_MULT + i * 3 + 1] << 8) +
1723
(ext_csd[EXT_CSD_GP_SIZE_MULT + i * 3 + 2] << 16);
1724
if (size == 0)
1725
continue;
1726
sdda_add_part(periph, EXT_CSD_PART_CONFIG_ACC_GP0 + i,
1727
SDDA_FMT_GP, i, size * erase_size * wp_size, ro);
1728
}
1729
}
1730
}
1731
1732
/*
1733
* We cannot just call mmc_switch() since it will sleep, and we are in
1734
* GEOM context and cannot sleep. Instead, create an MMCIO request to switch
1735
* partitions and send it to h/w, and upon completion resume processing
1736
* the I/O queue.
1737
* This function cannot fail, instead check switch errors in sddadone().
1738
*/
1739
static void
1740
sdda_init_switch_part(struct cam_periph *periph, union ccb *start_ccb,
1741
uint8_t part)
1742
{
1743
struct sdda_softc *sc = (struct sdda_softc *)periph->softc;
1744
uint8_t value;
1745
1746
KASSERT(part < MMC_PART_MAX, ("%s: invalid partition index", __func__));
1747
sc->part_requested = part;
1748
1749
value = (sc->raw_ext_csd[EXT_CSD_PART_CONFIG] &
1750
~EXT_CSD_PART_CONFIG_ACC_MASK) | part;
1751
1752
mmc_switch_fill_mmcio(start_ccb, EXT_CSD_CMD_SET_NORMAL,
1753
EXT_CSD_PART_CONFIG, value, sc->part_time);
1754
start_ccb->ccb_h.cbfcnp = sddadone;
1755
1756
sc->outstanding_cmds++;
1757
cam_periph_unlock(periph);
1758
xpt_action(start_ccb);
1759
cam_periph_lock(periph);
1760
}
1761
1762
/* Called with periph lock held! */
1763
static void
1764
sddastart(struct cam_periph *periph, union ccb *start_ccb)
1765
{
1766
struct bio *bp;
1767
struct sdda_softc *softc = (struct sdda_softc *)periph->softc;
1768
struct sdda_part *part;
1769
struct mmc_params *mmcp = &periph->path->device->mmc_ident_data;
1770
uint8_t part_index;
1771
1772
CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("sddastart\n"));
1773
1774
if (softc->state != SDDA_STATE_NORMAL) {
1775
CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("device is not in SDDA_STATE_NORMAL yet\n"));
1776
xpt_release_ccb(start_ccb);
1777
return;
1778
}
1779
1780
/* Find partition that has outstanding commands. Prefer current partition. */
1781
part_index = softc->part_curr;
1782
part = softc->part[softc->part_curr];
1783
bp = bioq_first(&part->bio_queue);
1784
if (bp == NULL) {
1785
for (part_index = 0; part_index < MMC_PART_MAX; part_index++) {
1786
if ((part = softc->part[part_index]) != NULL &&
1787
(bp = bioq_first(&softc->part[part_index]->bio_queue)) != NULL)
1788
break;
1789
}
1790
}
1791
if (bp == NULL) {
1792
xpt_release_ccb(start_ccb);
1793
return;
1794
}
1795
if (part_index != softc->part_curr) {
1796
CAM_DEBUG(periph->path, CAM_DEBUG_PERIPH,
1797
("Partition %d -> %d\n", softc->part_curr, part_index));
1798
/*
1799
* According to section "6.2.2 Command restrictions" of the eMMC
1800
* specification v5.1, CMD19/CMD21 aren't allowed to be used with
1801
* RPMB partitions. So we pause re-tuning along with triggering
1802
* it up-front to decrease the likelihood of re-tuning becoming
1803
* necessary while accessing an RPMB partition. Consequently, an
1804
* RPMB partition should immediately be switched away from again
1805
* after an access in order to allow for re-tuning to take place
1806
* anew.
1807
*/
1808
/* TODO: pause retune if switching to RPMB partition */
1809
softc->state = SDDA_STATE_PART_SWITCH;
1810
sdda_init_switch_part(periph, start_ccb, part_index);
1811
return;
1812
}
1813
1814
bioq_remove(&part->bio_queue, bp);
1815
1816
switch (bp->bio_cmd) {
1817
case BIO_WRITE:
1818
CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_WRITE\n"));
1819
part->flags |= SDDA_FLAG_DIRTY;
1820
/* FALLTHROUGH */
1821
case BIO_READ:
1822
{
1823
struct ccb_mmcio *mmcio;
1824
uint64_t blockno = bp->bio_pblkno;
1825
uint16_t count = bp->bio_bcount / MMC_SECTOR_SIZE;
1826
uint16_t opcode;
1827
1828
if (bp->bio_cmd == BIO_READ)
1829
CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_READ\n"));
1830
CAM_DEBUG(periph->path, CAM_DEBUG_TRACE,
1831
("Block %"PRIu64" cnt %u\n", blockno, count));
1832
1833
/* Construct new MMC command */
1834
if (bp->bio_cmd == BIO_READ) {
1835
if (count > 1)
1836
opcode = MMC_READ_MULTIPLE_BLOCK;
1837
else
1838
opcode = MMC_READ_SINGLE_BLOCK;
1839
} else {
1840
if (count > 1)
1841
opcode = MMC_WRITE_MULTIPLE_BLOCK;
1842
else
1843
opcode = MMC_WRITE_BLOCK;
1844
}
1845
1846
start_ccb->ccb_h.func_code = XPT_MMC_IO;
1847
start_ccb->ccb_h.flags = (bp->bio_cmd == BIO_READ ? CAM_DIR_IN : CAM_DIR_OUT);
1848
start_ccb->ccb_h.retry_count = 0;
1849
start_ccb->ccb_h.timeout = 15 * 1000;
1850
start_ccb->ccb_h.cbfcnp = sddadone;
1851
1852
mmcio = &start_ccb->mmcio;
1853
mmcio->cmd.opcode = opcode;
1854
mmcio->cmd.arg = blockno;
1855
if (!(mmcp->card_features & CARD_FEATURE_SDHC))
1856
mmcio->cmd.arg <<= 9;
1857
1858
mmcio->cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1859
mmcio->cmd.data = softc->mmcdata;
1860
memset(mmcio->cmd.data, 0, sizeof(struct mmc_data));
1861
mmcio->cmd.data->data = bp->bio_data;
1862
mmcio->cmd.data->len = MMC_SECTOR_SIZE * count;
1863
mmcio->cmd.data->flags = (bp->bio_cmd == BIO_READ ? MMC_DATA_READ : MMC_DATA_WRITE);
1864
/* Direct h/w to issue CMD12 upon completion */
1865
if (count > 1) {
1866
mmcio->cmd.data->flags |= MMC_DATA_MULTI;
1867
mmcio->stop.opcode = MMC_STOP_TRANSMISSION;
1868
mmcio->stop.flags = MMC_RSP_R1B | MMC_CMD_AC;
1869
mmcio->stop.arg = 0;
1870
}
1871
1872
break;
1873
}
1874
case BIO_FLUSH:
1875
CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_FLUSH\n"));
1876
sddaschedule(periph);
1877
break;
1878
case BIO_DELETE:
1879
CAM_DEBUG(periph->path, CAM_DEBUG_TRACE, ("BIO_DELETE\n"));
1880
sddaschedule(periph);
1881
break;
1882
default:
1883
biofinish(bp, NULL, EOPNOTSUPP);
1884
xpt_release_ccb(start_ccb);
1885
return;
1886
}
1887
start_ccb->ccb_h.ccb_bp = bp;
1888
softc->outstanding_cmds++;
1889
softc->refcount++;
1890
cam_periph_unlock(periph);
1891
xpt_action(start_ccb);
1892
cam_periph_lock(periph);
1893
1894
/* May have more work to do, so ensure we stay scheduled */
1895
sddaschedule(periph);
1896
}
1897
1898
static void
1899
sddadone(struct cam_periph *periph, union ccb *done_ccb)
1900
{
1901
struct bio *bp;
1902
struct sdda_softc *softc;
1903
struct ccb_mmcio *mmcio;
1904
struct cam_path *path;
1905
uint32_t card_status;
1906
int error = 0;
1907
1908
softc = (struct sdda_softc *)periph->softc;
1909
mmcio = &done_ccb->mmcio;
1910
path = done_ccb->ccb_h.path;
1911
1912
CAM_DEBUG(path, CAM_DEBUG_TRACE, ("sddadone\n"));
1913
if ((done_ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) {
1914
CAM_DEBUG(path, CAM_DEBUG_TRACE, ("Error!!!\n"));
1915
if ((done_ccb->ccb_h.status & CAM_DEV_QFRZN) != 0)
1916
cam_release_devq(path,
1917
/*relsim_flags*/0,
1918
/*reduction*/0,
1919
/*timeout*/0,
1920
/*getcount_only*/0);
1921
error = EIO;
1922
} else {
1923
if ((done_ccb->ccb_h.status & CAM_DEV_QFRZN) != 0)
1924
panic("REQ_CMP with QFRZN");
1925
error = 0;
1926
}
1927
1928
card_status = mmcio->cmd.resp[0];
1929
CAM_DEBUG(path, CAM_DEBUG_TRACE,
1930
("Card status: %08x\n", R1_STATUS(card_status)));
1931
CAM_DEBUG(path, CAM_DEBUG_TRACE,
1932
("Current state: %d\n", R1_CURRENT_STATE(card_status)));
1933
1934
/* Process result of switching MMC partitions */
1935
if (softc->state == SDDA_STATE_PART_SWITCH) {
1936
CAM_DEBUG(path, CAM_DEBUG_TRACE,
1937
("Completing partition switch to %d\n",
1938
softc->part_requested));
1939
softc->outstanding_cmds--;
1940
/* Complete partition switch */
1941
softc->state = SDDA_STATE_NORMAL;
1942
if (error != 0) {
1943
/* TODO: Unpause retune if accessing RPMB */
1944
xpt_release_ccb(done_ccb);
1945
xpt_schedule(periph, CAM_PRIORITY_NORMAL);
1946
return;
1947
}
1948
1949
softc->raw_ext_csd[EXT_CSD_PART_CONFIG] =
1950
(softc->raw_ext_csd[EXT_CSD_PART_CONFIG] &
1951
~EXT_CSD_PART_CONFIG_ACC_MASK) | softc->part_requested;
1952
/* TODO: Unpause retune if accessing RPMB */
1953
softc->part_curr = softc->part_requested;
1954
xpt_release_ccb(done_ccb);
1955
1956
/* Return to processing BIO requests */
1957
xpt_schedule(periph, CAM_PRIORITY_NORMAL);
1958
return;
1959
}
1960
1961
bp = (struct bio *)done_ccb->ccb_h.ccb_bp;
1962
bp->bio_error = error;
1963
if (error != 0) {
1964
bp->bio_resid = bp->bio_bcount;
1965
bp->bio_flags |= BIO_ERROR;
1966
} else {
1967
/* XXX: How many bytes remaining? */
1968
bp->bio_resid = 0;
1969
if (bp->bio_resid > 0)
1970
bp->bio_flags |= BIO_ERROR;
1971
}
1972
1973
softc->outstanding_cmds--;
1974
xpt_release_ccb(done_ccb);
1975
/*
1976
* Release the periph refcount taken in sddastart() for each CCB.
1977
*/
1978
KASSERT(softc->refcount >= 1, ("sddadone softc %p refcount %d", softc, softc->refcount));
1979
softc->refcount--;
1980
biodone(bp);
1981
}
1982
1983
static int
1984
sddaerror(union ccb *ccb, uint32_t cam_flags, uint32_t sense_flags)
1985
{
1986
return(cam_periph_error(ccb, cam_flags, sense_flags));
1987
}
1988
1989
static int
1990
sddadump(void *arg, void *virtual, off_t offset, size_t length)
1991
{
1992
struct ccb_mmcio mmcio;
1993
struct disk *dp;
1994
struct sdda_part *part;
1995
struct sdda_softc *softc;
1996
struct cam_periph *periph;
1997
struct mmc_params *mmcp;
1998
uint16_t count;
1999
uint16_t opcode;
2000
int error;
2001
2002
dp = arg;
2003
part = dp->d_drv1;
2004
softc = part->sc;
2005
periph = softc->periph;
2006
mmcp = &periph->path->device->mmc_ident_data;
2007
2008
if (softc->state != SDDA_STATE_NORMAL)
2009
return (ENXIO);
2010
2011
count = length / MMC_SECTOR_SIZE;
2012
if (count == 0)
2013
return (0);
2014
2015
if (softc->part[softc->part_curr] != part)
2016
return (EIO); /* TODO implement polled partition switch */
2017
2018
memset(&mmcio, 0, sizeof(mmcio));
2019
xpt_setup_ccb(&mmcio.ccb_h, periph->path, CAM_PRIORITY_NORMAL); /* XXX needed? */
2020
2021
mmcio.ccb_h.func_code = XPT_MMC_IO;
2022
mmcio.ccb_h.flags = CAM_DIR_OUT;
2023
mmcio.ccb_h.retry_count = 0;
2024
mmcio.ccb_h.timeout = 15 * 1000;
2025
2026
if (count > 1)
2027
opcode = MMC_WRITE_MULTIPLE_BLOCK;
2028
else
2029
opcode = MMC_WRITE_BLOCK;
2030
mmcio.cmd.opcode = opcode;
2031
mmcio.cmd.arg = offset / MMC_SECTOR_SIZE;
2032
if (!(mmcp->card_features & CARD_FEATURE_SDHC))
2033
mmcio.cmd.arg <<= 9;
2034
2035
mmcio.cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
2036
mmcio.cmd.data = softc->mmcdata;
2037
memset(mmcio.cmd.data, 0, sizeof(struct mmc_data));
2038
mmcio.cmd.data->data = virtual;
2039
mmcio.cmd.data->len = MMC_SECTOR_SIZE * count;
2040
mmcio.cmd.data->flags = MMC_DATA_WRITE;
2041
2042
/* Direct h/w to issue CMD12 upon completion */
2043
if (count > 1) {
2044
mmcio.cmd.data->flags |= MMC_DATA_MULTI;
2045
mmcio.stop.opcode = MMC_STOP_TRANSMISSION;
2046
mmcio.stop.flags = MMC_RSP_R1B | MMC_CMD_AC;
2047
mmcio.stop.arg = 0;
2048
}
2049
2050
error = cam_periph_runccb((union ccb *)&mmcio, cam_periph_error,
2051
0, SF_NO_RECOVERY | SF_NO_RETRY, NULL);
2052
if (error != 0)
2053
printf("Aborting dump due to I/O error.\n");
2054
return (error);
2055
}
2056
2057
#endif /* _KERNEL */
2058
2059