Path: blob/main/sys/contrib/dev/acpica/common/dmtbinfo2.c
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/******************************************************************************1*2* Module Name: dmtbinfo2 - Table info for non-AML tables3*4*****************************************************************************/56/******************************************************************************7*8* 1. Copyright Notice9*10* Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp.11* All rights reserved.12*13* 2. License14*15* 2.1. This is your license from Intel Corp. under its intellectual property16* rights. You may have additional license terms from the party that provided17* you this software, covering your right to use that party's intellectual18* property rights.19*20* 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a21* copy of the source code appearing in this file ("Covered Code") an22* irrevocable, perpetual, worldwide license under Intel's copyrights in the23* base code distributed originally by Intel ("Original Intel Code") to copy,24* make derivatives, distribute, use and display any portion of the Covered25* Code in any form, with the right to sublicense such rights; and26*27* 2.3. Intel grants Licensee a non-exclusive and non-transferable patent28* license (with the right to sublicense), under only those claims of Intel29* patents that are infringed by the Original Intel Code, to make, use, sell,30* offer to sell, and import the Covered Code and derivative works thereof31* solely to the minimum extent necessary to exercise the above copyright32* license, and in no event shall the patent license extend to any additions33* to or modifications of the Original Intel Code. No other license or right34* is granted directly or by implication, estoppel or otherwise;35*36* The above copyright and patent license is granted only if the following37* conditions are met:38*39* 3. Conditions40*41* 3.1. Redistribution of Source with Rights to Further Distribute Source.42* Redistribution of source code of any substantial portion of the Covered43* Code or modification with rights to further distribute source must include44* the above Copyright Notice, the above License, this list of Conditions,45* and the following Disclaimer and Export Compliance provision. In addition,46* Licensee must cause all Covered Code to which Licensee contributes to47* contain a file documenting the changes Licensee made to create that Covered48* Code and the date of any change. Licensee must include in that file the49* documentation of any changes made by any predecessor Licensee. Licensee50* must include a prominent statement that the modification is derived,51* directly or indirectly, from Original Intel Code.52*53* 3.2. Redistribution of Source with no Rights to Further Distribute Source.54* Redistribution of source code of any substantial portion of the Covered55* Code or modification without rights to further distribute source must56* include the following Disclaimer and Export Compliance provision in the57* documentation and/or other materials provided with distribution. In58* addition, Licensee may not authorize further sublicense of source of any59* portion of the Covered Code, and must include terms to the effect that the60* license from Licensee to its licensee is limited to the intellectual61* property embodied in the software Licensee provides to its licensee, and62* not to intellectual property embodied in modifications its licensee may63* make.64*65* 3.3. Redistribution of Executable. Redistribution in executable form of any66* substantial portion of the Covered Code or modification must reproduce the67* above Copyright Notice, and the following Disclaimer and Export Compliance68* provision in the documentation and/or other materials provided with the69* distribution.70*71* 3.4. Intel retains all right, title, and interest in and to the Original72* Intel Code.73*74* 3.5. Neither the name Intel nor any other trademark owned or controlled by75* Intel shall be used in advertising or otherwise to promote the sale, use or76* other dealings in products derived from or relating to the Covered Code77* without prior written authorization from Intel.78*79* 4. Disclaimer and Export Compliance80*81* 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED82* HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE83* IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE,84* INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY85* UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY86* IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A87* PARTICULAR PURPOSE.88*89* 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES90* OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR91* COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,92* SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY93* CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL94* HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS95* SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY96* LIMITED REMEDY.97*98* 4.3. Licensee shall not export, either directly or indirectly, any of this99* software or system incorporating such software without first obtaining any100* required license or other approval from the U. S. Department of Commerce or101* any other agency or department of the United States Government. In the102* event Licensee exports any such software from the United States or103* re-exports any such software from a foreign destination, Licensee shall104* ensure that the distribution and export/re-export of the software is in105* compliance with all laws, regulations, orders, or other restrictions of the106* U.S. Export Administration Regulations. Licensee agrees that neither it nor107* any of its subsidiaries will export/re-export any technical data, process,108* software, or service, directly or indirectly, to any country for which the109* United States government or any agency thereof requires an export license,110* other governmental approval, or letter of assurance, without first obtaining111* such license, approval or letter.112*113*****************************************************************************114*115* Alternatively, you may choose to be licensed under the terms of the116* following license:117*118* Redistribution and use in source and binary forms, with or without119* modification, are permitted provided that the following conditions120* are met:121* 1. Redistributions of source code must retain the above copyright122* notice, this list of conditions, and the following disclaimer,123* without modification.124* 2. Redistributions in binary form must reproduce at minimum a disclaimer125* substantially similar to the "NO WARRANTY" disclaimer below126* ("Disclaimer") and any redistribution must be conditioned upon127* including a substantially similar Disclaimer requirement for further128* binary redistribution.129* 3. Neither the names of the above-listed copyright holders nor the names130* of any contributors may be used to endorse or promote products derived131* from this software without specific prior written permission.132*133* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS134* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT135* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR136* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT137* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,138* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT139* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,140* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY141* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT142* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE143* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.144*145* Alternatively, you may choose to be licensed under the terms of the146* GNU General Public License ("GPL") version 2 as published by the Free147* Software Foundation.148*149*****************************************************************************/150151#include <contrib/dev/acpica/include/acpi.h>152#include <contrib/dev/acpica/include/accommon.h>153#include <contrib/dev/acpica/include/acdisasm.h>154#include <contrib/dev/acpica/include/actbinfo.h>155156/* This module used for application-level code only */157158#define _COMPONENT ACPI_CA_DISASSEMBLER159ACPI_MODULE_NAME ("dmtbinfo2")160161/*162* How to add a new table:163*164* - Add the C table definition to the actbl1.h or actbl2.h header.165* - Add ACPI_xxxx_OFFSET macro(s) for the table (and subtables) to list below.166* - Define the table in this file (for the disassembler). If any167* new data types are required (ACPI_DMT_*), see below.168* - Add an external declaration for the new table definition (AcpiDmTableInfo*)169* in acdisam.h170* - Add new table definition to the dispatch table in dmtable.c (AcpiDmTableData)171* If a simple table (with no subtables), no disassembly code is needed.172* Otherwise, create the AcpiDmDump* function for to disassemble the table173* and add it to the dmtbdump.c file.174* - Add an external declaration for the new AcpiDmDump* function in acdisasm.h175* - Add the new AcpiDmDump* function to the dispatch table in dmtable.c176* - Create a template for the new table177* - Add data table compiler support178*179* How to add a new data type (ACPI_DMT_*):180*181* - Add new type at the end of the ACPI_DMT list in acdisasm.h182* - Add length and implementation cases in dmtable.c (disassembler)183* - Add type and length cases in dtutils.c (DT compiler)184*/185186/*187* Remaining tables are not consumed directly by the ACPICA subsystem188*/189190/*******************************************************************************191*192* AGDI - Arm Generic Diagnostic Dump and Reset Device Interface193*194* Conforms to "ACPI for Arm Components 1.1, Platform Design Document"195* ARM DEN0093 v1.1196*197******************************************************************************/198199ACPI_DMTABLE_INFO AcpiDmTableInfoAgdi[] =200{201{ACPI_DMT_UINT8, ACPI_AGDI_OFFSET (Flags), "Flags (decoded below)", 0},202{ACPI_DMT_FLAG0, ACPI_AGDI_FLAG_OFFSET (Flags, 0), "Signalling mode", 0},203{ACPI_DMT_UINT24, ACPI_AGDI_OFFSET (Reserved[0]), "Reserved", 0},204{ACPI_DMT_UINT32, ACPI_AGDI_OFFSET (SdeiEvent), "SdeiEvent", 0},205{ACPI_DMT_UINT32, ACPI_AGDI_OFFSET (Gsiv), "Gsiv", 0},206ACPI_DMT_TERMINATOR207};208209210/*******************************************************************************211*212* APMT - ARM Performance Monitoring Unit Table213*214* Conforms to:215* ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document216* ARM DEN0117 v1.0 November 25, 2021217*218******************************************************************************/219220ACPI_DMTABLE_INFO AcpiDmTableInfoApmtNode[] =221{222{ACPI_DMT_UINT16, ACPI_APMTN_OFFSET (Length), "Length of APMT Node", 0},223{ACPI_DMT_UINT8, ACPI_APMTN_OFFSET (Flags), "Node Flags", 0},224{ACPI_DMT_FLAG0, ACPI_APMTN_FLAG_OFFSET (Flags, 0), "Dual Page Extension", 0},225{ACPI_DMT_FLAG1, ACPI_APMTN_FLAG_OFFSET (Flags, 0), "Processor Affinity Type", 0},226{ACPI_DMT_FLAG2, ACPI_APMTN_FLAG_OFFSET (Flags, 0), "64-bit Atomic Support", 0},227{ACPI_DMT_UINT8, ACPI_APMTN_OFFSET (Type), "Node Type", 0},228{ACPI_DMT_UINT32, ACPI_APMTN_OFFSET (Id), "Unique Node Identifier", 0},229{ACPI_DMT_UINT64, ACPI_APMTN_OFFSET (InstPrimary), "Primary Node Instance", 0},230{ACPI_DMT_UINT32, ACPI_APMTN_OFFSET (InstSecondary), "Secondary Node Instance", 0},231{ACPI_DMT_UINT64, ACPI_APMTN_OFFSET (BaseAddress0), "Page 0 Base Address", 0},232{ACPI_DMT_UINT64, ACPI_APMTN_OFFSET (BaseAddress1), "Page 1 Base Address", 0},233{ACPI_DMT_UINT32, ACPI_APMTN_OFFSET (OvflwIrq), "Overflow Interrupt ID", 0},234{ACPI_DMT_UINT32, ACPI_APMTN_OFFSET (Reserved), "Reserved", 0},235{ACPI_DMT_UINT32, ACPI_APMTN_OFFSET (OvflwIrqFlags), "Overflow Interrupt Flags", 0},236{ACPI_DMT_FLAG0, ACPI_APMTN_FLAG_OFFSET (OvflwIrqFlags, 0), "Interrupt Mode", 0},237{ACPI_DMT_FLAG1, ACPI_APMTN_FLAG_OFFSET (OvflwIrqFlags, 0), "Interrupt Type", 0},238{ACPI_DMT_UINT32, ACPI_APMTN_OFFSET (ProcAffinity), "Processor Affinity", 0},239{ACPI_DMT_UINT32, ACPI_APMTN_OFFSET (ImplId), "Implementation ID", 0},240ACPI_DMT_TERMINATOR241};242243244/*******************************************************************************245*246* IORT - IO Remapping Table247*248******************************************************************************/249250ACPI_DMTABLE_INFO AcpiDmTableInfoIort[] =251{252{ACPI_DMT_UINT32, ACPI_IORT_OFFSET (NodeCount), "Node Count", 0},253{ACPI_DMT_UINT32, ACPI_IORT_OFFSET (NodeOffset), "Node Offset", 0},254{ACPI_DMT_UINT32, ACPI_IORT_OFFSET (Reserved), "Reserved", 0},255ACPI_DMT_TERMINATOR256};257258/* Optional padding field */259260ACPI_DMTABLE_INFO AcpiDmTableInfoIortPad[] =261{262{ACPI_DMT_RAW_BUFFER, 0, "Optional Padding", DT_OPTIONAL},263ACPI_DMT_TERMINATOR264};265266/* Common Subtable header (one per Subtable) */267268ACPI_DMTABLE_INFO AcpiDmTableInfoIortHdr[] =269{270{ACPI_DMT_UINT8, ACPI_IORTH_OFFSET (Type), "Type", 0},271{ACPI_DMT_UINT16, ACPI_IORTH_OFFSET (Length), "Length", DT_LENGTH},272{ACPI_DMT_UINT8, ACPI_IORTH_OFFSET (Revision), "Revision", 0},273{ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (Identifier), "Reserved", 0},274{ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (MappingCount), "Mapping Count", 0},275{ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (MappingOffset), "Mapping Offset", 0},276ACPI_DMT_TERMINATOR277};278279/* Common Subtable header (one per Subtable)- Revision 3 */280281ACPI_DMTABLE_INFO AcpiDmTableInfoIortHdr3[] =282{283{ACPI_DMT_UINT8, ACPI_IORTH_OFFSET (Type), "Type", 0},284{ACPI_DMT_UINT16, ACPI_IORTH_OFFSET (Length), "Length", DT_LENGTH},285{ACPI_DMT_UINT8, ACPI_IORTH_OFFSET (Revision), "Revision", 0},286{ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (Identifier), "Identifier", 0},287{ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (MappingCount), "Mapping Count", 0},288{ACPI_DMT_UINT32, ACPI_IORTH_OFFSET (MappingOffset), "Mapping Offset", 0},289ACPI_DMT_TERMINATOR290};291292ACPI_DMTABLE_INFO AcpiDmTableInfoIortMap[] =293{294{ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (InputBase), "Input base", DT_OPTIONAL},295{ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (IdCount), "ID Count", 0},296{ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (OutputBase), "Output Base", 0},297{ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (OutputReference), "Output Reference", 0},298{ACPI_DMT_UINT32, ACPI_IORTM_OFFSET (Flags), "Flags (decoded below)", 0},299{ACPI_DMT_FLAG0, ACPI_IORTM_FLAG_OFFSET (Flags, 0), "Single Mapping", 0},300ACPI_DMT_TERMINATOR301};302303ACPI_DMTABLE_INFO AcpiDmTableInfoIortAcc[] =304{305{ACPI_DMT_UINT32, ACPI_IORTA_OFFSET (CacheCoherency), "Cache Coherency", 0},306{ACPI_DMT_UINT8, ACPI_IORTA_OFFSET (Hints), "Hints (decoded below)", 0},307{ACPI_DMT_FLAG0, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Transient", 0},308{ACPI_DMT_FLAG1, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Write Allocate", 0},309{ACPI_DMT_FLAG2, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Read Allocate", 0},310{ACPI_DMT_FLAG3, ACPI_IORTA_FLAG_OFFSET (Hints, 0), "Override", 0},311{ACPI_DMT_UINT16, ACPI_IORTA_OFFSET (Reserved), "Reserved", 0},312{ACPI_DMT_UINT8, ACPI_IORTA_OFFSET (MemoryFlags), "Memory Flags (decoded below)", 0},313{ACPI_DMT_FLAG0, ACPI_IORTA_FLAG_OFFSET (MemoryFlags, 0), "Coherency", 0},314{ACPI_DMT_FLAG1, ACPI_IORTA_FLAG_OFFSET (MemoryFlags, 0), "Device Attribute", 0},315{ACPI_DMT_FLAG2, ACPI_IORTA_FLAG_OFFSET (MemoryFlags, 0), "Ensured Coherency of Accesses", 0},316ACPI_DMT_TERMINATOR317};318319/* IORT subtables */320321/* 0x00: ITS Group */322323ACPI_DMTABLE_INFO AcpiDmTableInfoIort0[] =324{325{ACPI_DMT_UINT32, ACPI_IORT0_OFFSET (ItsCount), "ItsCount", 0},326ACPI_DMT_TERMINATOR327};328329ACPI_DMTABLE_INFO AcpiDmTableInfoIort0a[] =330{331{ACPI_DMT_UINT32, 0, "Identifiers", DT_OPTIONAL},332ACPI_DMT_TERMINATOR333};334335/* 0x01: Named Component */336337ACPI_DMTABLE_INFO AcpiDmTableInfoIort1[] =338{339{ACPI_DMT_UINT32, ACPI_IORT1_OFFSET (NodeFlags), "Node Flags", 0},340{ACPI_DMT_IORTMEM, ACPI_IORT1_OFFSET (MemoryProperties), "Memory Properties", 0},341{ACPI_DMT_UINT8, ACPI_IORT1_OFFSET (MemoryAddressLimit), "Memory Size Limit", 0},342{ACPI_DMT_STRING, ACPI_IORT1_OFFSET (DeviceName[0]), "Device Name", 0},343ACPI_DMT_TERMINATOR344};345346ACPI_DMTABLE_INFO AcpiDmTableInfoIort1a[] =347{348{ACPI_DMT_RAW_BUFFER, 0, "Padding", DT_OPTIONAL},349ACPI_DMT_TERMINATOR350};351352/* 0x02: PCI Root Complex */353354ACPI_DMTABLE_INFO AcpiDmTableInfoIort2[] =355{356{ACPI_DMT_IORTMEM, ACPI_IORT2_OFFSET (MemoryProperties), "Memory Properties", 0},357{ACPI_DMT_UINT32, ACPI_IORT2_OFFSET (AtsAttribute), "ATS Attribute", 0},358{ACPI_DMT_UINT32, ACPI_IORT2_OFFSET (PciSegmentNumber), "PCI Segment Number", 0},359{ACPI_DMT_UINT8, ACPI_IORT2_OFFSET (MemoryAddressLimit), "Memory Size Limit", 0},360{ACPI_DMT_UINT16, ACPI_IORT2_OFFSET (PasidCapabilities), "PASID Capabilities", 0},361{ACPI_DMT_UINT8, ACPI_IORT2_OFFSET (Reserved[0]), "Reserved", 0},362ACPI_DMT_TERMINATOR363};364365/* 0x03: SMMUv1/2 */366367ACPI_DMTABLE_INFO AcpiDmTableInfoIort3[] =368{369{ACPI_DMT_UINT64, ACPI_IORT3_OFFSET (BaseAddress), "Base Address", 0},370{ACPI_DMT_UINT64, ACPI_IORT3_OFFSET (Span), "Span", 0},371{ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (Model), "Model", 0},372{ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (Flags), "Flags (decoded below)", 0},373{ACPI_DMT_FLAG0, ACPI_IORT3_FLAG_OFFSET (Flags, 0), "DVM Supported", 0},374{ACPI_DMT_FLAG1, ACPI_IORT3_FLAG_OFFSET (Flags, 0), "Coherent Walk", 0},375{ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (GlobalInterruptOffset), "Global Interrupt Offset", 0},376{ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (ContextInterruptCount), "Context Interrupt Count", 0},377{ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (ContextInterruptOffset), "Context Interrupt Offset", 0},378{ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (PmuInterruptCount), "PMU Interrupt Count", 0},379{ACPI_DMT_UINT32, ACPI_IORT3_OFFSET (PmuInterruptOffset), "PMU Interrupt Offset", 0},380ACPI_DMT_TERMINATOR381};382383ACPI_DMTABLE_INFO AcpiDmTableInfoIort3a[] =384{385{ACPI_DMT_UINT32, ACPI_IORT3A_OFFSET (NSgIrpt), "NSgIrpt", 0},386{ACPI_DMT_UINT32, ACPI_IORT3A_OFFSET (NSgIrptFlags), "NSgIrpt Flags (decoded below)", 0},387{ACPI_DMT_FLAG0, ACPI_IORT3a_FLAG_OFFSET (NSgIrptFlags, 0), "Edge Triggered", 0},388{ACPI_DMT_UINT32, ACPI_IORT3A_OFFSET (NSgCfgIrpt), "NSgCfgIrpt", 0},389{ACPI_DMT_UINT32, ACPI_IORT3A_OFFSET (NSgCfgIrptFlags), "NSgCfgIrpt Flags (decoded below)", 0},390{ACPI_DMT_FLAG0, ACPI_IORT3a_FLAG_OFFSET (NSgCfgIrptFlags, 0), "Edge Triggered", 0},391ACPI_DMT_TERMINATOR392};393394ACPI_DMTABLE_INFO AcpiDmTableInfoIort3b[] =395{396{ACPI_DMT_UINT64, 0, "Context Interrupt", DT_OPTIONAL},397ACPI_DMT_TERMINATOR398};399400ACPI_DMTABLE_INFO AcpiDmTableInfoIort3c[] =401{402{ACPI_DMT_UINT64, 0, "PMU Interrupt", DT_OPTIONAL},403ACPI_DMT_TERMINATOR404};405406/* 0x04: SMMUv3 */407408ACPI_DMTABLE_INFO AcpiDmTableInfoIort4[] =409{410{ACPI_DMT_UINT64, ACPI_IORT4_OFFSET (BaseAddress), "Base Address", 0},411{ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Flags), "Flags (decoded below)", 0},412{ACPI_DMT_FLAG0, ACPI_IORT4_FLAG_OFFSET (Flags, 0), "COHACC Override", 0},413{ACPI_DMT_FLAG1, ACPI_IORT4_FLAG_OFFSET (Flags, 0), "HTTU Override", 0},414{ACPI_DMT_FLAG3, ACPI_IORT4_FLAG_OFFSET (Flags, 0), "Proximity Domain Valid", 0},415{ACPI_DMT_FLAG4, ACPI_IORT4_FLAG_OFFSET (Flags, 0), "DeviceID Valid", 0},416{ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Reserved), "Reserved", 0},417{ACPI_DMT_UINT64, ACPI_IORT4_OFFSET (VatosAddress), "VATOS Address", 0},418{ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Model), "Model", 0},419{ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (EventGsiv), "Event GSIV", 0},420{ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (PriGsiv), "PRI GSIV", 0},421{ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (GerrGsiv), "GERR GSIV", 0},422{ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (SyncGsiv), "Sync GSIV", 0},423{ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (Pxm), "Proximity Domain", 0},424{ACPI_DMT_UINT32, ACPI_IORT4_OFFSET (IdMappingIndex), "Device ID Mapping Index", 0},425ACPI_DMT_TERMINATOR426};427428/* 0x05: PMCG */429430ACPI_DMTABLE_INFO AcpiDmTableInfoIort5[] =431{432{ACPI_DMT_UINT64, ACPI_IORT5_OFFSET (Page0BaseAddress), "Page 0 Base Address", 0},433{ACPI_DMT_UINT32, ACPI_IORT5_OFFSET (OverflowGsiv), "Overflow Interrupt GSIV", 0},434{ACPI_DMT_UINT32, ACPI_IORT5_OFFSET (NodeReference), "Node Reference", 0},435{ACPI_DMT_UINT64, ACPI_IORT5_OFFSET (Page1BaseAddress), "Page 1 Base Address", 0},436ACPI_DMT_TERMINATOR437};438439440/* 0x06: RMR */441442ACPI_DMTABLE_INFO AcpiDmTableInfoIort6[] =443{444{ACPI_DMT_UINT32, ACPI_IORT6_OFFSET (Flags), "Flags (decoded below)", 0},445{ACPI_DMT_FLAG0, ACPI_IORT6_FLAG_OFFSET (Flags, 0), "Remapping Permitted", 0},446{ACPI_DMT_FLAG1, ACPI_IORT6_FLAG_OFFSET (Flags, 0), "Access Privileged", 0},447{ACPI_DMT_FLAGS8_2, ACPI_IORT6_FLAG_OFFSET (Flags, 0), "Access Attributes", 0},448{ACPI_DMT_UINT32, ACPI_IORT6_OFFSET (RmrCount), "Number of RMR Descriptors", 0},449{ACPI_DMT_UINT32, ACPI_IORT6_OFFSET (RmrOffset), "RMR Descriptor Offset", 0},450ACPI_DMT_TERMINATOR451};452453ACPI_DMTABLE_INFO AcpiDmTableInfoIort6a[] =454{455{ACPI_DMT_UINT64, ACPI_IORT6A_OFFSET (BaseAddress), "Base Address of RMR", DT_OPTIONAL},456{ACPI_DMT_UINT64, ACPI_IORT6A_OFFSET (Length), "Length of RMR", 0},457{ACPI_DMT_UINT32, ACPI_IORT6A_OFFSET (Reserved), "Reserved", 0},458ACPI_DMT_TERMINATOR459};460461/* 0x07: IWB */462463ACPI_DMTABLE_INFO AcpiDmTableInfoIort7[] =464{465{ACPI_DMT_UINT64, ACPI_IORT7_OFFSET (BaseAddress), "Config Frame base", 0},466{ACPI_DMT_UINT16, ACPI_IORT7_OFFSET (IwbIndex), "IWB Index", 0},467{ACPI_DMT_STRING, ACPI_IORT7_OFFSET (DeviceName[0]), "IWB Device Name", 0},468ACPI_DMT_TERMINATOR469};470471472/*******************************************************************************473*474* IOVT - I/O Virtualization Table475*476******************************************************************************/477478ACPI_DMTABLE_INFO AcpiDmTableInfoIovt[] =479{480{ACPI_DMT_UINT16, ACPI_IOVT_OFFSET (IommuCount), "IOMMU Count", 0},481{ACPI_DMT_UINT16, ACPI_IOVT_OFFSET (IommuOffset), "IOMMU Offset", 0},482{ACPI_DMT_UINT64, ACPI_IOVT_OFFSET (Reserved), "Reserved", 0},483ACPI_DMT_TERMINATOR484};485486/* IOVT Subtables */487488ACPI_DMTABLE_INFO AcpiDmTableInfoIovt0[] =489{490{ACPI_DMT_IOVT, ACPI_IOVTH_OFFSET (Type), "Subtable Type", 0},491{ACPI_DMT_UINT16, ACPI_IOVTH_OFFSET (Length), "Length", DT_LENGTH},492{ACPI_DMT_UINT32, ACPI_IOVT0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},493{ACPI_DMT_FLAG0, ACPI_IOVT0_FLAG_OFFSET (Flags,0), "PCI Device", 0},494{ACPI_DMT_FLAG1, ACPI_IOVT0_FLAG_OFFSET (Flags,0), "Proximity Domain Valid", 0},495{ACPI_DMT_FLAG2, ACPI_IOVT0_FLAG_OFFSET (Flags,0), "Manageable Devices Range", 0},496{ACPI_DMT_FLAG3, ACPI_IOVT0_FLAG_OFFSET (Flags,0), "HW Capability Supported", 0},497{ACPI_DMT_FLAG4, ACPI_IOVT0_FLAG_OFFSET (Flags,0), "MSI Interrupt Address", 0},498{ACPI_DMT_UINT16, ACPI_IOVT0_OFFSET (Segment), "PCI Segment Number", 0},499{ACPI_DMT_UINT16, ACPI_IOVT0_OFFSET (PhyWidth), "Physical Address Width", 0},500{ACPI_DMT_UINT16, ACPI_IOVT0_OFFSET (VirtWidth), "Virtual Address Width", 0},501{ACPI_DMT_UINT16, ACPI_IOVT0_OFFSET (MaxPageLevel), "Max Page Level", 0},502{ACPI_DMT_UINT64, ACPI_IOVT0_OFFSET (PageSize), "Page Size Supported", 0},503{ACPI_DMT_UINT32, ACPI_IOVT0_OFFSET (DeviceId), "IOMMU DeviceID", 0},504{ACPI_DMT_UINT64, ACPI_IOVT0_OFFSET (BaseAddress), "IOMMU Base Address", 0},505{ACPI_DMT_UINT32, ACPI_IOVT0_OFFSET (AddressSpaceSize), "IOMMU Register Size", 0},506{ACPI_DMT_UINT8, ACPI_IOVT0_OFFSET (InterruptType), "Interrupt Type", 0},507{ACPI_DMT_UINT24, ACPI_IOVT0_OFFSET (Reserved), "Reserved", 0},508{ACPI_DMT_UINT32, ACPI_IOVT0_OFFSET (GsiNumber), "Global System Interrupt", 0},509{ACPI_DMT_UINT32, ACPI_IOVT0_OFFSET (ProximityDomain), "Proximity Domain", 0},510{ACPI_DMT_UINT32, ACPI_IOVT0_OFFSET (MaxDeviceNum), "Max Device Num", 0},511{ACPI_DMT_UINT32, ACPI_IOVT0_OFFSET (DeviceEntryNum), "Number of Device Entries", 0},512{ACPI_DMT_UINT32, ACPI_IOVT0_OFFSET (DeviceEntryOffset), "Offset of Device Entries", 0},513ACPI_DMT_TERMINATOR514};515516/* device entry */517518ACPI_DMTABLE_INFO AcpiDmTableInfoIovtdev[] =519{520{ACPI_DMT_IOVTDEV, ACPI_IOVTDEV_OFFSET (Type), "Subtable Type", 0},521{ACPI_DMT_UINT8, ACPI_IOVTDEV_OFFSET (Length), "Length", 0},522{ACPI_DMT_UINT8, ACPI_IOVTDEV_OFFSET (Flags), "Flags", 0},523{ACPI_DMT_UINT24, ACPI_IOVTDEV_OFFSET (Reserved), "Reserved", 0},524{ACPI_DMT_UINT16, ACPI_IOVTDEV_OFFSET (DeviceId), "DeviceID", 0},525ACPI_DMT_TERMINATOR526};527528529/*******************************************************************************530*531* IVRS - I/O Virtualization Reporting Structure532*533******************************************************************************/534535ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs[] =536{537{ACPI_DMT_UINT32, ACPI_IVRS_OFFSET (Info), "Virtualization Info", 0},538{ACPI_DMT_UINT64, ACPI_IVRS_OFFSET (Reserved), "Reserved", 0},539ACPI_DMT_TERMINATOR540};541542/* IVRS subtables */543544/* 0x10: I/O Virtualization Hardware Definition (IVHD) Block */545546ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHware1[] =547{548{ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type", 0},549{ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},550{ACPI_DMT_FLAG0, ACPI_IVRS_FLAG_OFFSET (Flags,0), "HtTunEn", 0},551{ACPI_DMT_FLAG1, ACPI_IVRS_FLAG_OFFSET (Flags,0), "PassPW", 0},552{ACPI_DMT_FLAG2, ACPI_IVRS_FLAG_OFFSET (Flags,0), "ResPassPW", 0},553{ACPI_DMT_FLAG3, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Isoc Control", 0},554{ACPI_DMT_FLAG4, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Iotlb Support", 0},555{ACPI_DMT_FLAG5, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Coherent", 0},556{ACPI_DMT_FLAG6, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Prefetch Support", 0},557{ACPI_DMT_FLAG7, ACPI_IVRS_FLAG_OFFSET (Flags,0), "PPR Support", 0},558{ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (Length), "Length", DT_LENGTH},559{ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (DeviceId), "DeviceId", 0},560{ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (CapabilityOffset), "Capability Offset", 0},561{ACPI_DMT_UINT64, ACPI_IVRS0_OFFSET (BaseAddress), "Base Address", 0},562{ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (PciSegmentGroup), "PCI Segment Group", 0},563{ACPI_DMT_UINT16, ACPI_IVRS0_OFFSET (Info), "Virtualization Info", 0},564{ACPI_DMT_UINT32, ACPI_IVRS0_OFFSET (FeatureReporting), "Feature Reporting", 0},565ACPI_DMT_TERMINATOR566};567568/* 0x11, 0x40: I/O Virtualization Hardware Definition (IVHD) Block */569570ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHware23[] =571{572{ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type", 0},573{ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},574{ACPI_DMT_FLAG0, ACPI_IVRS_FLAG_OFFSET (Flags,0), "HtTunEn", 0},575{ACPI_DMT_FLAG1, ACPI_IVRS_FLAG_OFFSET (Flags,0), "PassPW", 0},576{ACPI_DMT_FLAG2, ACPI_IVRS_FLAG_OFFSET (Flags,0), "ResPassPW", 0},577{ACPI_DMT_FLAG3, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Isoc Control", 0},578{ACPI_DMT_FLAG4, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Iotlb Support", 0},579{ACPI_DMT_FLAG5, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Coherent", 0},580{ACPI_DMT_FLAG6, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Prefetch Support", 0},581{ACPI_DMT_FLAG7, ACPI_IVRS_FLAG_OFFSET (Flags,0), "PPR Support", 0},582{ACPI_DMT_UINT16, ACPI_IVRS01_OFFSET (Header.Length), "Length", DT_LENGTH},583{ACPI_DMT_UINT16, ACPI_IVRS01_OFFSET (Header.DeviceId), "DeviceId", 0},584{ACPI_DMT_UINT16, ACPI_IVRS01_OFFSET (CapabilityOffset), "Capability Offset", 0},585{ACPI_DMT_UINT64, ACPI_IVRS01_OFFSET (BaseAddress), "Base Address", 0},586{ACPI_DMT_UINT16, ACPI_IVRS01_OFFSET (PciSegmentGroup), "PCI Segment Group", 0},587{ACPI_DMT_UINT16, ACPI_IVRS01_OFFSET (Info), "Virtualization Info", 0},588{ACPI_DMT_UINT32, ACPI_IVRS01_OFFSET (Attributes), "Attributes", 0},589{ACPI_DMT_UINT64, ACPI_IVRS01_OFFSET (EfrRegisterImage), "EFR Image", 0},590{ACPI_DMT_UINT64, ACPI_IVRS01_OFFSET (Reserved), "Reserved", 0},591ACPI_DMT_TERMINATOR592};593594/* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition (IVMD) Device Entry Block */595596ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsMemory[] =597{598{ACPI_DMT_IVRS, ACPI_IVRSH_OFFSET (Type), "Subtable Type", 0},599{ACPI_DMT_UINT8, ACPI_IVRSH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},600{ACPI_DMT_FLAG0, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Unity", 0},601{ACPI_DMT_FLAG1, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Readable", 0},602{ACPI_DMT_FLAG2, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Writeable", 0},603{ACPI_DMT_FLAG3, ACPI_IVRS_FLAG_OFFSET (Flags,0), "Exclusion Range", 0},604{ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (Length), "Length", DT_LENGTH},605{ACPI_DMT_UINT16, ACPI_IVRSH_OFFSET (DeviceId), "DeviceId", 0},606{ACPI_DMT_UINT16, ACPI_IVRS1_OFFSET (AuxData), "Auxiliary Data", 0},607{ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (Reserved), "Reserved", 0},608{ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (StartAddress), "Start Address", 0},609{ACPI_DMT_UINT64, ACPI_IVRS1_OFFSET (MemoryLength), "Memory Length", 0},610ACPI_DMT_TERMINATOR611};612613/* Device entry header for IVHD block */614615#define ACPI_DMT_IVRS_DE_HEADER \616{ACPI_DMT_IVRS_DE, ACPI_IVRSD_OFFSET (Type), "Subtable Type", 0}, \617{ACPI_DMT_UINT16, ACPI_IVRSD_OFFSET (Id), "Device ID", 0}, \618{ACPI_DMT_UINT8, ACPI_IVRSD_OFFSET (DataSetting), "Data Setting (decoded below)", 0}, \619{ACPI_DMT_FLAG0, ACPI_IVRSDE_FLAG_OFFSET (DataSetting, 0), "INITPass", 0}, \620{ACPI_DMT_FLAG1, ACPI_IVRSDE_FLAG_OFFSET (DataSetting, 0), "EIntPass", 0}, \621{ACPI_DMT_FLAG2, ACPI_IVRSDE_FLAG_OFFSET (DataSetting, 0), "NMIPass", 0}, \622{ACPI_DMT_FLAG3, ACPI_IVRSDE_FLAG_OFFSET (DataSetting, 0), "Reserved", 0}, \623{ACPI_DMT_FLAGS4, ACPI_IVRSDE_FLAG_OFFSET (DataSetting, 0), "System MGMT", 0}, \624{ACPI_DMT_FLAG6, ACPI_IVRSDE_FLAG_OFFSET (DataSetting, 0), "LINT0 Pass", 0}, \625{ACPI_DMT_FLAG7, ACPI_IVRSDE_FLAG_OFFSET (DataSetting, 0), "LINT1 Pass", 0}626627/* 4-byte device entry (Types 1,2,3,4) */628629ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs4[] =630{631ACPI_DMT_IVRS_DE_HEADER,632ACPI_DMT_TERMINATOR633};634635/* 8-byte device entry (Type Alias Select, Alias Start of Range) */636637ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8a[] =638{639ACPI_DMT_IVRS_DE_HEADER,640{ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved1), "Reserved", 0},641{ACPI_DMT_UINT16, ACPI_IVRS8A_OFFSET (UsedId), "Source Used Device ID", 0},642{ACPI_DMT_UINT8, ACPI_IVRS8A_OFFSET (Reserved2), "Reserved", 0},643ACPI_DMT_TERMINATOR644};645646/* 8-byte device entry (Type Extended Select, Extended Start of Range) */647648ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8b[] =649{650ACPI_DMT_IVRS_DE_HEADER,651{ACPI_DMT_UINT32, ACPI_IVRS8B_OFFSET (ExtendedData), "Extended Data", 0},652ACPI_DMT_TERMINATOR653};654655/* 8-byte device entry (Type Special Device) */656657ACPI_DMTABLE_INFO AcpiDmTableInfoIvrs8c[] =658{659ACPI_DMT_IVRS_DE_HEADER,660{ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Handle), "Handle", 0},661{ACPI_DMT_UINT16, ACPI_IVRS8C_OFFSET (UsedId), "Source Used Device ID", 0},662{ACPI_DMT_UINT8, ACPI_IVRS8C_OFFSET (Variety), "Variety", 0},663ACPI_DMT_TERMINATOR664};665666/* Variable-length Device Entry Type 0xF0 */667668ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHid[] =669{670ACPI_DMT_IVRS_DE_HEADER,671ACPI_DMT_TERMINATOR672};673674ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsUidString[] =675{676{ACPI_DMT_UINT8, 0, "UID Format", DT_DESCRIBES_OPTIONAL},677{ACPI_DMT_UINT8, 1, "UID Length", DT_DESCRIBES_OPTIONAL},678{ACPI_DMT_IVRS_UNTERMINATED_STRING, 2, "UID", DT_OPTIONAL},679ACPI_DMT_TERMINATOR680};681682ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsUidInteger[] =683{684{ACPI_DMT_UINT8, 0, "UID Format", DT_DESCRIBES_OPTIONAL},685{ACPI_DMT_UINT8, 1, "UID Length", DT_DESCRIBES_OPTIONAL},686{ACPI_DMT_UINT64, 2, "UID", DT_OPTIONAL},687ACPI_DMT_TERMINATOR688};689690ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHidString[] =691{692{ACPI_DMT_NAME8, 0, "ACPI HID", 0},693ACPI_DMT_TERMINATOR694};695696ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsHidInteger[] =697{698{ACPI_DMT_UINT64, 0, "ACPI HID", 0},699ACPI_DMT_TERMINATOR700};701ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsCidString[] =702{703{ACPI_DMT_NAME8, 0, "ACPI CID", 0},704ACPI_DMT_TERMINATOR705};706707ACPI_DMTABLE_INFO AcpiDmTableInfoIvrsCidInteger[] =708{709{ACPI_DMT_UINT64, 0, "ACPI CID", 0},710ACPI_DMT_TERMINATOR711};712713714/*******************************************************************************715*716* LPIT - Low Power Idle Table717*718******************************************************************************/719720/* Main table consists only of the standard ACPI table header */721722/* Common Subtable header (one per Subtable) */723724ACPI_DMTABLE_INFO AcpiDmTableInfoLpitHdr[] =725{726{ACPI_DMT_LPIT, ACPI_LPITH_OFFSET (Type), "Subtable Type", 0},727{ACPI_DMT_UINT32, ACPI_LPITH_OFFSET (Length), "Length", DT_LENGTH},728{ACPI_DMT_UINT16, ACPI_LPITH_OFFSET (UniqueId), "Unique ID", 0},729{ACPI_DMT_UINT16, ACPI_LPITH_OFFSET (Reserved), "Reserved", 0},730{ACPI_DMT_UINT32, ACPI_LPITH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},731{ACPI_DMT_FLAG0, ACPI_LPITH_FLAG_OFFSET (Flags, 0), "State Disabled", 0},732{ACPI_DMT_FLAG1, ACPI_LPITH_FLAG_OFFSET (Flags, 0), "No Counter", 0},733ACPI_DMT_TERMINATOR734};735736/* LPIT Subtables */737738/* 0: Native C-state */739740ACPI_DMTABLE_INFO AcpiDmTableInfoLpit0[] =741{742{ACPI_DMT_GAS, ACPI_LPIT0_OFFSET (EntryTrigger), "Entry Trigger", 0},743{ACPI_DMT_UINT32, ACPI_LPIT0_OFFSET (Residency), "Residency", 0},744{ACPI_DMT_UINT32, ACPI_LPIT0_OFFSET (Latency), "Latency", 0},745{ACPI_DMT_GAS, ACPI_LPIT0_OFFSET (ResidencyCounter), "Residency Counter", 0},746{ACPI_DMT_UINT64, ACPI_LPIT0_OFFSET (CounterFrequency), "Counter Frequency", 0},747ACPI_DMT_TERMINATOR748};749/*******************************************************************************750*751* MADT - Multiple APIC Description Table and subtables752*753******************************************************************************/754755ACPI_DMTABLE_INFO AcpiDmTableInfoMadt[] =756{757{ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Address), "Local Apic Address", 0},758{ACPI_DMT_UINT32, ACPI_MADT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},759{ACPI_DMT_FLAG0, ACPI_MADT_FLAG_OFFSET (Flags,0), "PC-AT Compatibility", 0},760ACPI_DMT_TERMINATOR761};762763/* Common Subtable header (one per Subtable) */764765ACPI_DMTABLE_INFO AcpiDmTableInfoMadtHdr[] =766{767{ACPI_DMT_MADT, ACPI_MADTH_OFFSET (Type), "Subtable Type", 0},768{ACPI_DMT_UINT8, ACPI_MADTH_OFFSET (Length), "Length", DT_LENGTH},769ACPI_DMT_TERMINATOR770};771772/* MADT Subtables */773774/* 0: processor APIC */775776ACPI_DMTABLE_INFO AcpiDmTableInfoMadt0[] =777{778{ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (ProcessorId), "Processor ID", 0},779{ACPI_DMT_UINT8, ACPI_MADT0_OFFSET (Id), "Local Apic ID", 0},780{ACPI_DMT_UINT32, ACPI_MADT0_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG},781{ACPI_DMT_FLAG0, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0},782{ACPI_DMT_FLAG1, ACPI_MADT0_FLAG_OFFSET (LapicFlags,0), "Runtime Online Capable", 0},783ACPI_DMT_TERMINATOR784};785786/* 1: IO APIC */787788ACPI_DMTABLE_INFO AcpiDmTableInfoMadt1[] =789{790{ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Id), "I/O Apic ID", 0},791{ACPI_DMT_UINT8, ACPI_MADT1_OFFSET (Reserved), "Reserved", 0},792{ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (Address), "Address", 0},793{ACPI_DMT_UINT32, ACPI_MADT1_OFFSET (GlobalIrqBase), "Interrupt", 0},794ACPI_DMT_TERMINATOR795};796797/* 2: Interrupt Override */798799ACPI_DMTABLE_INFO AcpiDmTableInfoMadt2[] =800{801{ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (Bus), "Bus", 0},802{ACPI_DMT_UINT8, ACPI_MADT2_OFFSET (SourceIrq), "Source", 0},803{ACPI_DMT_UINT32, ACPI_MADT2_OFFSET (GlobalIrq), "Interrupt", 0},804{ACPI_DMT_UINT16, ACPI_MADT2_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG},805{ACPI_DMT_FLAGS0, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Polarity", 0},806{ACPI_DMT_FLAGS2, ACPI_MADT2_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0},807ACPI_DMT_TERMINATOR808};809810/* 3: NMI Sources */811812ACPI_DMTABLE_INFO AcpiDmTableInfoMadt3[] =813{814{ACPI_DMT_UINT16, ACPI_MADT3_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG},815{ACPI_DMT_FLAGS0, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Polarity", 0},816{ACPI_DMT_FLAGS2, ACPI_MADT3_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0},817{ACPI_DMT_UINT32, ACPI_MADT3_OFFSET (GlobalIrq), "Interrupt", 0},818ACPI_DMT_TERMINATOR819};820821/* 4: Local APIC NMI */822823ACPI_DMTABLE_INFO AcpiDmTableInfoMadt4[] =824{825{ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (ProcessorId), "Processor ID", 0},826{ACPI_DMT_UINT16, ACPI_MADT4_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG},827{ACPI_DMT_FLAGS0, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Polarity", 0},828{ACPI_DMT_FLAGS2, ACPI_MADT4_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0},829{ACPI_DMT_UINT8, ACPI_MADT4_OFFSET (Lint), "Interrupt Input LINT", 0},830ACPI_DMT_TERMINATOR831};832833/* 5: Address Override */834835ACPI_DMTABLE_INFO AcpiDmTableInfoMadt5[] =836{837{ACPI_DMT_UINT16, ACPI_MADT5_OFFSET (Reserved), "Reserved", 0},838{ACPI_DMT_UINT64, ACPI_MADT5_OFFSET (Address), "APIC Address", 0},839ACPI_DMT_TERMINATOR840};841842/* 6: I/O Sapic */843844ACPI_DMTABLE_INFO AcpiDmTableInfoMadt6[] =845{846{ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Id), "I/O Sapic ID", 0},847{ACPI_DMT_UINT8, ACPI_MADT6_OFFSET (Reserved), "Reserved", 0},848{ACPI_DMT_UINT32, ACPI_MADT6_OFFSET (GlobalIrqBase), "Interrupt Base", 0},849{ACPI_DMT_UINT64, ACPI_MADT6_OFFSET (Address), "Address", 0},850ACPI_DMT_TERMINATOR851};852853/* 7: Local Sapic */854855ACPI_DMTABLE_INFO AcpiDmTableInfoMadt7[] =856{857{ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (ProcessorId), "Processor ID", 0},858{ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Id), "Local Sapic ID", 0},859{ACPI_DMT_UINT8, ACPI_MADT7_OFFSET (Eid), "Local Sapic EID", 0},860{ACPI_DMT_UINT24, ACPI_MADT7_OFFSET (Reserved[0]), "Reserved", 0},861{ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG},862{ACPI_DMT_FLAG0, ACPI_MADT7_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0},863{ACPI_DMT_UINT32, ACPI_MADT7_OFFSET (Uid), "Processor UID", 0},864{ACPI_DMT_STRING, ACPI_MADT7_OFFSET (UidString[0]), "Processor UID String", 0},865ACPI_DMT_TERMINATOR866};867868/* 8: Platform Interrupt Source */869870ACPI_DMTABLE_INFO AcpiDmTableInfoMadt8[] =871{872{ACPI_DMT_UINT16, ACPI_MADT8_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG},873{ACPI_DMT_FLAGS0, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Polarity", 0},874{ACPI_DMT_FLAGS2, ACPI_MADT8_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0},875{ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Type), "InterruptType", 0},876{ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Id), "Processor ID", 0},877{ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (Eid), "Processor EID", 0},878{ACPI_DMT_UINT8, ACPI_MADT8_OFFSET (IoSapicVector), "I/O Sapic Vector", 0},879{ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (GlobalIrq), "Interrupt", 0},880{ACPI_DMT_UINT32, ACPI_MADT8_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},881{ACPI_DMT_FLAG0, ACPI_MADT8_OFFSET (Flags), "CPEI Override", 0},882ACPI_DMT_TERMINATOR883};884885/* 9: Processor Local X2_APIC (ACPI 4.0) */886887ACPI_DMTABLE_INFO AcpiDmTableInfoMadt9[] =888{889{ACPI_DMT_UINT16, ACPI_MADT9_OFFSET (Reserved), "Reserved", 0},890{ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LocalApicId), "Processor x2Apic ID", 0},891{ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (LapicFlags), "Flags (decoded below)", DT_FLAG},892{ACPI_DMT_FLAG0, ACPI_MADT9_FLAG_OFFSET (LapicFlags,0), "Processor Enabled", 0},893{ACPI_DMT_UINT32, ACPI_MADT9_OFFSET (Uid), "Processor UID", 0},894ACPI_DMT_TERMINATOR895};896897/* 10: Local X2_APIC NMI (ACPI 4.0) */898899ACPI_DMTABLE_INFO AcpiDmTableInfoMadt10[] =900{901{ACPI_DMT_UINT16, ACPI_MADT10_OFFSET (IntiFlags), "Flags (decoded below)", DT_FLAG},902{ACPI_DMT_FLAGS0, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Polarity", 0},903{ACPI_DMT_FLAGS2, ACPI_MADT10_FLAG_OFFSET (IntiFlags,0), "Trigger Mode", 0},904{ACPI_DMT_UINT32, ACPI_MADT10_OFFSET (Uid), "Processor UID", 0},905{ACPI_DMT_UINT8, ACPI_MADT10_OFFSET (Lint), "Interrupt Input LINT", 0},906{ACPI_DMT_UINT24, ACPI_MADT10_OFFSET (Reserved[0]), "Reserved", 0},907ACPI_DMT_TERMINATOR908};909910/* 11: Generic Interrupt Controller (ACPI 5.0) */911912ACPI_DMTABLE_INFO AcpiDmTableInfoMadt11[] =913{914{ACPI_DMT_UINT16, ACPI_MADT11_OFFSET (Reserved), "Reserved", 0},915{ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (CpuInterfaceNumber), "CPU Interface Number", 0},916{ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (Uid), "Processor UID", 0},917{ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},918{ACPI_DMT_FLAG0, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Processor Enabled", 0},919{ACPI_DMT_FLAG1, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Performance Interrupt Trigger Mode", 0},920{ACPI_DMT_FLAG2, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Virtual GIC Interrupt Trigger Mode", 0},921{ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (ParkingVersion), "Parking Protocol Version", 0},922{ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (PerformanceInterrupt), "Performance Interrupt", 0},923{ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (ParkedAddress), "Parked Address", 0},924{ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (BaseAddress), "Base Address", 0},925{ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GicvBaseAddress), "Virtual GIC Base Address", 0},926{ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GichBaseAddress), "Hypervisor GIC Base Address", 0},927{ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (VgicInterrupt), "Virtual GIC Interrupt", 0},928{ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GicrBaseAddress), "Redistributor Base Address", 0},929{ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (ArmMpidr), "ARM MPIDR", 0},930{ACPI_DMT_UINT8, ACPI_MADT11_OFFSET (EfficiencyClass), "Efficiency Class", 0},931{ACPI_DMT_UINT8, ACPI_MADT11_OFFSET (Reserved2[0]), "Reserved", 0},932{ACPI_DMT_UINT16, ACPI_MADT11_OFFSET (SpeInterrupt), "SPE Overflow Interrupt", 0},933{ACPI_DMT_UINT16, ACPI_MADT11_OFFSET (TrbeInterrupt), "TRBE Interrupt", 0},934ACPI_DMT_TERMINATOR935};936937/* 11: Generic Interrupt Controller (ACPI 5.0) - MADT revision 6 */938939ACPI_DMTABLE_INFO AcpiDmTableInfoMadt11a[] =940{941{ACPI_DMT_UINT16, ACPI_MADT11_OFFSET (Reserved), "Reserved", 0},942{ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (CpuInterfaceNumber), "CPU Interface Number", 0},943{ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (Uid), "Processor UID", 0},944{ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},945{ACPI_DMT_FLAG0, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Processor Enabled", 0},946{ACPI_DMT_FLAG1, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Performance Interrupt Trigger Mode", 0},947{ACPI_DMT_FLAG2, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Virtual GIC Interrupt Trigger Mode", 0},948{ACPI_DMT_FLAG3, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Online Capable", 0},949{ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (ParkingVersion), "Parking Protocol Version", 0},950{ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (PerformanceInterrupt), "Performance Interrupt", 0},951{ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (ParkedAddress), "Parked Address", 0},952{ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (BaseAddress), "Base Address", 0},953{ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GicvBaseAddress), "Virtual GIC Base Address", 0},954{ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GichBaseAddress), "Hypervisor GIC Base Address", 0},955{ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (VgicInterrupt), "Virtual GIC Interrupt", 0},956{ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GicrBaseAddress), "Redistributor Base Address", 0},957{ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (ArmMpidr), "ARM MPIDR", 0},958{ACPI_DMT_UINT8, ACPI_MADT11_OFFSET (EfficiencyClass), "Efficiency Class", 0},959{ACPI_DMT_UINT8, ACPI_MADT11_OFFSET (Reserved2[0]), "Reserved", 0},960{ACPI_DMT_UINT16, ACPI_MADT11_OFFSET (SpeInterrupt), "SPE Overflow Interrupt", 0},961{ACPI_DMT_UINT16, ACPI_MADT11_OFFSET (TrbeInterrupt), "TRBE Interrupt", 0},962ACPI_DMT_TERMINATOR963};964965/* 11: Generic Interrupt Controller (ACPI 5.0) - MADT revision 7 */966967ACPI_DMTABLE_INFO AcpiDmTableInfoMadt11b[] =968{969{ACPI_DMT_UINT16, ACPI_MADT11_OFFSET (Reserved), "Reserved", 0},970{ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (CpuInterfaceNumber), "CPU Interface Number", 0},971{ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (Uid), "Processor UID", 0},972{ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},973{ACPI_DMT_FLAG0, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Processor Enabled", 0},974{ACPI_DMT_FLAG1, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Performance Interrupt Trigger Mode", 0},975{ACPI_DMT_FLAG2, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Virtual GIC Interrupt Trigger Mode", 0},976{ACPI_DMT_FLAG3, ACPI_MADT11_FLAG_OFFSET (Flags,0), "Online Capable", 0},977{ACPI_DMT_FLAG4, ACPI_MADT11_FLAG_OFFSET (Flags,0), "GICR non-coherent", 0},978{ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (ParkingVersion), "Parking Protocol Version", 0},979{ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (PerformanceInterrupt), "Performance Interrupt", 0},980{ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (ParkedAddress), "Parked Address", 0},981{ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (BaseAddress), "Base Address", 0},982{ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GicvBaseAddress), "Virtual GIC Base Address", 0},983{ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GichBaseAddress), "Hypervisor GIC Base Address", 0},984{ACPI_DMT_UINT32, ACPI_MADT11_OFFSET (VgicInterrupt), "Virtual GIC Interrupt", 0},985{ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (GicrBaseAddress), "Redistributor Base Address", 0},986{ACPI_DMT_UINT64, ACPI_MADT11_OFFSET (ArmMpidr), "ARM MPIDR", 0},987{ACPI_DMT_UINT8, ACPI_MADT11_OFFSET (EfficiencyClass), "Efficiency Class", 0},988{ACPI_DMT_UINT8, ACPI_MADT11_OFFSET (Reserved2[0]), "Reserved", 0},989{ACPI_DMT_UINT16, ACPI_MADT11_OFFSET (SpeInterrupt), "SPE Overflow Interrupt", 0},990{ACPI_DMT_UINT16, ACPI_MADT11_OFFSET (TrbeInterrupt), "TRBE Interrupt", 0},991ACPI_DMT_TERMINATOR992};993994/* 12: Generic Interrupt Distributor (ACPI 5.0) */995996ACPI_DMTABLE_INFO AcpiDmTableInfoMadt12[] =997{998{ACPI_DMT_UINT16, ACPI_MADT12_OFFSET (Reserved), "Reserved", 0},999{ACPI_DMT_UINT32, ACPI_MADT12_OFFSET (GicId), "Local GIC Hardware ID", 0},1000{ACPI_DMT_UINT64, ACPI_MADT12_OFFSET (BaseAddress), "Base Address", 0},1001{ACPI_DMT_UINT32, ACPI_MADT12_OFFSET (GlobalIrqBase), "Interrupt Base", 0},1002{ACPI_DMT_UINT8, ACPI_MADT12_OFFSET (Version), "Version", 0},1003{ACPI_DMT_UINT24, ACPI_MADT12_OFFSET (Reserved2[0]), "Reserved", 0},1004ACPI_DMT_TERMINATOR1005};10061007/* 13: Generic MSI Frame (ACPI 5.1) */10081009ACPI_DMTABLE_INFO AcpiDmTableInfoMadt13[] =1010{1011{ACPI_DMT_UINT16, ACPI_MADT13_OFFSET (Reserved), "Reserved", 0},1012{ACPI_DMT_UINT32, ACPI_MADT13_OFFSET (MsiFrameId), "MSI Frame ID", 0},1013{ACPI_DMT_UINT64, ACPI_MADT13_OFFSET (BaseAddress), "Base Address", 0},1014{ACPI_DMT_UINT32, ACPI_MADT13_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},1015{ACPI_DMT_FLAG0, ACPI_MADT13_FLAG_OFFSET (Flags,0), "Select SPI", 0},1016{ACPI_DMT_UINT16, ACPI_MADT13_OFFSET (SpiCount), "SPI Count", 0},1017{ACPI_DMT_UINT16, ACPI_MADT13_OFFSET (SpiBase), "SPI Base", 0},1018ACPI_DMT_TERMINATOR1019};10201021/* 14: Generic Redistributor (ACPI 5.1) */10221023ACPI_DMTABLE_INFO AcpiDmTableInfoMadt14[] =1024{1025{ACPI_DMT_UINT16, ACPI_MADT14_OFFSET (Reserved), "Reserved", 0},1026{ACPI_DMT_UINT64, ACPI_MADT14_OFFSET (BaseAddress), "Base Address", 0},1027{ACPI_DMT_UINT32, ACPI_MADT14_OFFSET (Length), "Length", 0},1028ACPI_DMT_TERMINATOR1029};10301031/* 14: Generic Redistributor (ACPI 5.1) */10321033ACPI_DMTABLE_INFO AcpiDmTableInfoMadt14a[] =1034{1035{ACPI_DMT_UINT8, ACPI_MADT14_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},1036{ACPI_DMT_FLAG0, ACPI_MADT14_FLAG_OFFSET (Flags,0), "GICR non-coherent", 0},1037{ACPI_DMT_UINT8, ACPI_MADT14_OFFSET (Reserved), "Reserved", 0},1038{ACPI_DMT_UINT64, ACPI_MADT14_OFFSET (BaseAddress), "Base Address", 0},1039{ACPI_DMT_UINT32, ACPI_MADT14_OFFSET (Length), "Length", 0},1040ACPI_DMT_TERMINATOR1041};10421043/* 15: Generic Translator (ACPI 6.0) */10441045ACPI_DMTABLE_INFO AcpiDmTableInfoMadt15[] =1046{1047{ACPI_DMT_UINT16, ACPI_MADT15_OFFSET (Reserved), "Reserved", 0},1048{ACPI_DMT_UINT32, ACPI_MADT15_OFFSET (TranslationId), "Translation ID", 0},1049{ACPI_DMT_UINT64, ACPI_MADT15_OFFSET (BaseAddress), "Base Address", 0},1050{ACPI_DMT_UINT32, ACPI_MADT15_OFFSET (Reserved2), "Reserved", 0},1051ACPI_DMT_TERMINATOR1052};10531054ACPI_DMTABLE_INFO AcpiDmTableInfoMadt15a[] =1055{1056{ACPI_DMT_UINT8, ACPI_MADT15_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},1057{ACPI_DMT_FLAG0, ACPI_MADT15_FLAG_OFFSET (Flags,0), "GIC ITS non-coherent", 0},1058{ACPI_DMT_UINT8, ACPI_MADT15_OFFSET (Reserved), "Reserved", 0},1059{ACPI_DMT_UINT32, ACPI_MADT15_OFFSET (TranslationId), "Translation ID", 0},1060{ACPI_DMT_UINT64, ACPI_MADT15_OFFSET (BaseAddress), "Base Address", 0},1061{ACPI_DMT_UINT32, ACPI_MADT15_OFFSET (Reserved2), "Reserved", 0},1062ACPI_DMT_TERMINATOR1063};10641065/* 16: Multiprocessor wakeup structure (ACPI 6.6) */10661067ACPI_DMTABLE_INFO AcpiDmTableInfoMadt16[] =1068{1069{ACPI_DMT_UINT16, ACPI_MADT16_OFFSET (MailboxVersion), "Mailbox Version", 0},1070{ACPI_DMT_UINT32, ACPI_MADT16_OFFSET (Reserved), "Reserved", 0},1071{ACPI_DMT_UINT64, ACPI_MADT16_OFFSET (BaseAddress), "Mailbox Address", 0},1072{ACPI_DMT_UINT64, ACPI_MADT16_OFFSET (ResetVector), "ResetVector", 0},1073ACPI_DMT_TERMINATOR1074};10751076/* 17: core interrupt controller */10771078ACPI_DMTABLE_INFO AcpiDmTableInfoMadt17[] =1079{1080{ACPI_DMT_UINT8, ACPI_MADT17_OFFSET (Version), "Version", 0},1081{ACPI_DMT_UINT32, ACPI_MADT17_OFFSET (ProcessorId), "ProcessorId", 0},1082{ACPI_DMT_UINT32, ACPI_MADT17_OFFSET (CoreId), "CoreId", 0},1083{ACPI_DMT_UINT32, ACPI_MADT17_OFFSET (Flags), "Flags", 0},1084ACPI_DMT_TERMINATOR1085};10861087/* 18: Legacy I/O interrupt controller */10881089ACPI_DMTABLE_INFO AcpiDmTableInfoMadt18[] =1090{1091{ACPI_DMT_UINT8, ACPI_MADT18_OFFSET (Version), "Version", 0},1092{ACPI_DMT_UINT64, ACPI_MADT18_OFFSET (Address), "Address", 0},1093{ACPI_DMT_UINT16, ACPI_MADT18_OFFSET (Size), "Size", 0},1094{ACPI_DMT_UINT16, ACPI_MADT18_OFFSET (Cascade), "Cascade", 0},1095{ACPI_DMT_UINT64, ACPI_MADT18_OFFSET (CascadeMap), "CascadeMap", 0},1096ACPI_DMT_TERMINATOR1097};10981099/* 19: HT interrupt controller */11001101ACPI_DMTABLE_INFO AcpiDmTableInfoMadt19[] =1102{1103{ACPI_DMT_UINT8, ACPI_MADT19_OFFSET (Version), "Version", 0},1104{ACPI_DMT_UINT64, ACPI_MADT19_OFFSET (Address), "Address", 0},1105{ACPI_DMT_UINT16, ACPI_MADT19_OFFSET (Size), "Size", 0},1106{ACPI_DMT_UINT64, ACPI_MADT19_OFFSET (Cascade), "Cascade", 0},1107ACPI_DMT_TERMINATOR1108};11091110/* 20: Extend I/O interrupt controller */11111112ACPI_DMTABLE_INFO AcpiDmTableInfoMadt20[] =1113{1114{ACPI_DMT_UINT8, ACPI_MADT20_OFFSET (Version), "Version", 0},1115{ACPI_DMT_UINT8, ACPI_MADT20_OFFSET (Cascade), "Cascade", 0},1116{ACPI_DMT_UINT8, ACPI_MADT20_OFFSET (Node), "Node", 0},1117{ACPI_DMT_UINT64, ACPI_MADT20_OFFSET (NodeMap), "NodeMap", 0},1118ACPI_DMT_TERMINATOR1119};11201121/* 21: MSI controller */11221123ACPI_DMTABLE_INFO AcpiDmTableInfoMadt21[] =1124{1125{ACPI_DMT_UINT8, ACPI_MADT21_OFFSET (Version), "Version", 0},1126{ACPI_DMT_UINT64, ACPI_MADT21_OFFSET (MsgAddress), "MsgAddress", 0},1127{ACPI_DMT_UINT32, ACPI_MADT21_OFFSET (Start), "Start", 0},1128{ACPI_DMT_UINT32, ACPI_MADT21_OFFSET (Count), "Count", 0},1129ACPI_DMT_TERMINATOR1130};11311132/* 22: BIO interrupt controller */11331134ACPI_DMTABLE_INFO AcpiDmTableInfoMadt22[] =1135{1136{ACPI_DMT_UINT8, ACPI_MADT22_OFFSET (Version), "Version", 0},1137{ACPI_DMT_UINT64, ACPI_MADT22_OFFSET (Address), "Address", 0},1138{ACPI_DMT_UINT16, ACPI_MADT22_OFFSET (Size), "Size", 0},1139{ACPI_DMT_UINT16, ACPI_MADT22_OFFSET (Id), "Id", 0},1140{ACPI_DMT_UINT16, ACPI_MADT22_OFFSET (GsiBase), "GsiBase", 0},1141ACPI_DMT_TERMINATOR1142};11431144/* 23: LPC interrupt controller */11451146ACPI_DMTABLE_INFO AcpiDmTableInfoMadt23[] =1147{1148{ACPI_DMT_UINT8, ACPI_MADT23_OFFSET (Version), "Version", 0},1149{ACPI_DMT_UINT64, ACPI_MADT23_OFFSET (Address), "Address", 0},1150{ACPI_DMT_UINT16, ACPI_MADT23_OFFSET (Size), "Size", 0},1151{ACPI_DMT_UINT8, ACPI_MADT23_OFFSET (Cascade), "Cascade", 0},1152ACPI_DMT_TERMINATOR1153};11541155/* 24: RINTC interrupt controller */11561157ACPI_DMTABLE_INFO AcpiDmTableInfoMadt24[] =1158{1159{ACPI_DMT_UINT8, ACPI_MADT24_OFFSET (Version), "Version", 0},1160{ACPI_DMT_UINT8, ACPI_MADT24_OFFSET (Reserved), "Reserved", 0},1161{ACPI_DMT_UINT32, ACPI_MADT24_OFFSET (Flags), "Flags", 0},1162{ACPI_DMT_UINT64, ACPI_MADT24_OFFSET (HartId), "HartId", 0},1163{ACPI_DMT_UINT32, ACPI_MADT24_OFFSET (Uid), "Uid", 0},1164{ACPI_DMT_UINT32, ACPI_MADT24_OFFSET (ExtIntcId), "ExtIntcId", 0},1165{ACPI_DMT_UINT64, ACPI_MADT24_OFFSET (ImsicAddr), "ImsicAddr", 0},1166{ACPI_DMT_UINT32, ACPI_MADT24_OFFSET (ImsicSize), "ImsicSize", 0},1167ACPI_DMT_TERMINATOR1168};11691170/* 25: RISC-V IMSIC interrupt controller */11711172ACPI_DMTABLE_INFO AcpiDmTableInfoMadt25[] =1173{1174{ACPI_DMT_UINT8, ACPI_MADT25_OFFSET (Version), "Version", 0},1175{ACPI_DMT_UINT8, ACPI_MADT25_OFFSET (Reserved), "Reserved", 0},1176{ACPI_DMT_UINT32, ACPI_MADT25_OFFSET (Flags), "Flags", 0},1177{ACPI_DMT_UINT16, ACPI_MADT25_OFFSET (NumIds), "NumIds", 0},1178{ACPI_DMT_UINT16, ACPI_MADT25_OFFSET (NumGuestIds), "NumGuestIds", 0},1179{ACPI_DMT_UINT8, ACPI_MADT25_OFFSET (GuestIndexBits), "GuestIndexBits", 0},1180{ACPI_DMT_UINT8, ACPI_MADT25_OFFSET (HartIndexBits), "HartIndexBits", 0},1181{ACPI_DMT_UINT8, ACPI_MADT25_OFFSET (GroupIndexBits), "GroupIndexBits", 0},1182{ACPI_DMT_UINT8, ACPI_MADT25_OFFSET (GroupIndexShift), "GroupIndexShift", 0},1183ACPI_DMT_TERMINATOR1184};11851186/* 26: RISC-V APLIC interrupt controller */11871188ACPI_DMTABLE_INFO AcpiDmTableInfoMadt26[] =1189{1190{ACPI_DMT_UINT8, ACPI_MADT26_OFFSET (Version), "Version", 0},1191{ACPI_DMT_UINT8, ACPI_MADT26_OFFSET (Id), "Id", 0},1192{ACPI_DMT_UINT32, ACPI_MADT26_OFFSET (Flags), "Flags", 0},1193{ACPI_DMT_UINT64, ACPI_MADT26_OFFSET (HwId), "HwId", 0},1194{ACPI_DMT_UINT16, ACPI_MADT26_OFFSET (NumIdcs), "NumIdcs", 0},1195{ACPI_DMT_UINT16, ACPI_MADT26_OFFSET (NumSources), "NumSources", 0},1196{ACPI_DMT_UINT32, ACPI_MADT26_OFFSET (GsiBase), "GsiBase", 0},1197{ACPI_DMT_UINT64, ACPI_MADT26_OFFSET (BaseAddr), "BaseAddr", 0},1198{ACPI_DMT_UINT32, ACPI_MADT26_OFFSET (Size), "Size", 0},1199ACPI_DMT_TERMINATOR1200};12011202/* 27: RISC-V PLIC interrupt controller */12031204ACPI_DMTABLE_INFO AcpiDmTableInfoMadt27[] =1205{1206{ACPI_DMT_UINT8, ACPI_MADT27_OFFSET (Version), "Version", 0},1207{ACPI_DMT_UINT8, ACPI_MADT27_OFFSET (Id), "Id", 0},1208{ACPI_DMT_UINT64, ACPI_MADT27_OFFSET (HwId), "HwId", 0},1209{ACPI_DMT_UINT16, ACPI_MADT27_OFFSET (NumIrqs), "NumIrqs", 0},1210{ACPI_DMT_UINT16, ACPI_MADT27_OFFSET (MaxPrio), "MaxPrio", 0},1211{ACPI_DMT_UINT32, ACPI_MADT27_OFFSET (Flags), "Flags", 0},1212{ACPI_DMT_UINT32, ACPI_MADT27_OFFSET (Size), "Size", 0},1213{ACPI_DMT_UINT64, ACPI_MADT27_OFFSET (BaseAddr), "BaseAddr", 0},1214{ACPI_DMT_UINT32, ACPI_MADT27_OFFSET (GsiBase), "GsiBase", 0},1215ACPI_DMT_TERMINATOR1216};12171218ACPI_DMTABLE_INFO AcpiDmTableInfoMadt28[] =1219{1220{ACPI_DMT_UINT8, ACPI_MADT28_OFFSET (Version), "Gic version", 0},1221{ACPI_DMT_UINT8, ACPI_MADT28_OFFSET (Reserved), "Reserved", 0},1222{ACPI_DMT_UINT32, ACPI_MADT28_OFFSET (IrsId), "Irs Id", 0},1223{ACPI_DMT_UINT32, ACPI_MADT28_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},1224{ACPI_DMT_FLAG0, ACPI_MADT28_FLAG_OFFSET (Flags,0), "GICV5 IRS non-coherent", 0},1225{ACPI_DMT_UINT32, ACPI_MADT28_OFFSET (Reserved2), "Reserved", 0},1226{ACPI_DMT_UINT64, ACPI_MADT28_OFFSET (ConfigBaseAddress), "Irs Config Frame Physical Base Address", 0},1227{ACPI_DMT_UINT64, ACPI_MADT28_OFFSET (SetlpiBaseAddress), "Irs Setlpi Frame Physical Base Address", 0},1228ACPI_DMT_TERMINATOR1229};12301231ACPI_DMTABLE_INFO AcpiDmTableInfoMadt29[] =1232{1233{ACPI_DMT_UINT8, ACPI_MADT29_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},1234{ACPI_DMT_FLAG0, ACPI_MADT29_FLAG_OFFSET (Flags,0), "GICV5 ITS non-coherent", 0},1235{ACPI_DMT_UINT8, ACPI_MADT29_OFFSET (Reserved), "Reserved", 0},1236{ACPI_DMT_UINT32, ACPI_MADT29_OFFSET (TranslatorId), "Gic Its Id", 0},1237{ACPI_DMT_UINT64, ACPI_MADT29_OFFSET (BaseAddress), "Physical Base Address", 0},1238ACPI_DMT_TERMINATOR1239};12401241ACPI_DMTABLE_INFO AcpiDmTableInfoMadt30[] =1242{1243{ACPI_DMT_UINT16, ACPI_MADT30_OFFSET (Reserved), "Reserved", 0},1244{ACPI_DMT_UINT32, ACPI_MADT30_OFFSET (LinkedTranslatorId), "Linked Its Id", 0},1245{ACPI_DMT_UINT32, ACPI_MADT30_OFFSET (TranslateFrameId), "Its Transalte Id", 0},1246{ACPI_DMT_UINT32, ACPI_MADT30_OFFSET (Reserved2), "Reserved", 0},1247{ACPI_DMT_UINT64, ACPI_MADT30_OFFSET (BaseAddress), "Its Translate Frame Physical Base Address", 0},1248ACPI_DMT_TERMINATOR1249};12501251/* 128: OEM data structure */12521253ACPI_DMTABLE_INFO AcpiDmTableInfoMadt128[] =1254{1255{ACPI_DMT_RAW_BUFFER, 0, "OEM Data", 0},1256ACPI_DMT_TERMINATOR1257};12581259/*******************************************************************************1260*1261* MCFG - PCI Memory Mapped Configuration table and Subtable1262*1263******************************************************************************/12641265ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg[] =1266{1267{ACPI_DMT_UINT64, ACPI_MCFG_OFFSET (Reserved[0]), "Reserved", 0},1268ACPI_DMT_TERMINATOR1269};12701271ACPI_DMTABLE_INFO AcpiDmTableInfoMcfg0[] =1272{1273{ACPI_DMT_UINT64, ACPI_MCFG0_OFFSET (Address), "Base Address", 0},1274{ACPI_DMT_UINT16, ACPI_MCFG0_OFFSET (PciSegment), "Segment Group Number", 0},1275{ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (StartBusNumber), "Start Bus Number", 0},1276{ACPI_DMT_UINT8, ACPI_MCFG0_OFFSET (EndBusNumber), "End Bus Number", 0},1277{ACPI_DMT_UINT32, ACPI_MCFG0_OFFSET (Reserved), "Reserved", 0},1278ACPI_DMT_TERMINATOR1279};128012811282/*******************************************************************************1283*1284* MCHI - Management Controller Host Interface table1285*1286******************************************************************************/12871288ACPI_DMTABLE_INFO AcpiDmTableInfoMchi[] =1289{1290{ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterfaceType), "Interface Type", 0},1291{ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Protocol), "Protocol", 0},1292{ACPI_DMT_UINT64, ACPI_MCHI_OFFSET (ProtocolData), "Protocol Data", 0},1293{ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (InterruptType), "Interrupt Type", 0},1294{ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (Gpe), "Gpe", 0},1295{ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDeviceFlag), "Pci Device Flag", 0},1296{ACPI_DMT_UINT32, ACPI_MCHI_OFFSET (GlobalInterrupt), "Global Interrupt", 0},1297{ACPI_DMT_GAS, ACPI_MCHI_OFFSET (ControlRegister), "Control Register", 0},1298{ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciSegment), "Pci Segment", 0},1299{ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciBus), "Pci Bus", 0},1300{ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciDevice), "Pci Device", 0},1301{ACPI_DMT_UINT8, ACPI_MCHI_OFFSET (PciFunction), "Pci Function", 0},1302ACPI_DMT_TERMINATOR1303};13041305/*******************************************************************************1306*1307* MPAM - Memory System Resource Partitioning and Monitoring Tables1308* Arm's DEN0065 MPAM ACPI 2.0. December 2022.1309******************************************************************************/13101311/* MPAM subtables */13121313/* 0: MPAM Resource Node Structure - A root MSC table.1314* Arm's DEN0065 MPAM ACPI 2.0. Table 4: MPAM MSC node body.1315*/1316ACPI_DMTABLE_INFO AcpiDmTableInfoMpam0[] =1317{1318{ACPI_DMT_UINT16, ACPI_MPAM0_OFFSET (Length), "Length", 0},1319{ACPI_DMT_UINT8, ACPI_MPAM0_OFFSET (InterfaceType), "Interface type", 0},1320{ACPI_DMT_UINT8, ACPI_MPAM0_OFFSET (Reserved), "Reserved", 0},1321{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (Identifier), "Identifier", 0},1322{ACPI_DMT_UINT64, ACPI_MPAM0_OFFSET (BaseAddress), "Base address", 0},1323{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (MMIOSize), "MMIO size", 0},1324{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (OverflowInterrupt), "Overflow interrupt", 0},1325{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (OverflowInterruptFlags), "Overflow interrupt flags", 0},1326{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (Reserved1), "Reserved1", 0},1327{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (OverflowInterruptAffinity), "Overflow interrupt affinity", 0},1328{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (ErrorInterrupt), "Error interrupt", 0},1329{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (ErrorInterruptFlags), "Error interrupt flags", 0},1330{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (Reserved2), "Reserved2", 0},1331{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (ErrorInterruptAffinity), "Error interrupt affinity", 0},1332{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (MaxNrdyUsec), "MAX_NRDY_USEC", 0},1333{ACPI_DMT_NAME8, ACPI_MPAM0_OFFSET (HardwareIdLinkedDevice), "Hardware ID of linked device", 0},1334{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (InstanceIdLinkedDevice), "Instance ID of linked device", 0},1335{ACPI_DMT_UINT32, ACPI_MPAM0_OFFSET (NumResourceNodes), "Number of resource nodes", 0},13361337ACPI_DMT_TERMINATOR1338};13391340/* 1: MPAM Resource (RIS) Node Structure - A subtable of MSC Nodes.1341* Arm's DEN0065 MPAM ACPI 2.0. Table 9: Resource node.1342*/1343ACPI_DMTABLE_INFO AcpiDmTableInfoMpam1[] =1344{1345{ACPI_DMT_UINT32, ACPI_MPAM1_OFFSET (Identifier), "Identifier", 0},1346{ACPI_DMT_UINT8, ACPI_MPAM1_OFFSET (RISIndex), "RIS Index", 0},1347{ACPI_DMT_UINT16, ACPI_MPAM1_OFFSET (Reserved1), "Reserved1", 0},1348{ACPI_DMT_MPAM_LOCATOR, ACPI_MPAM1_OFFSET (LocatorType), "Locator type", 0},1349ACPI_DMT_TERMINATOR1350};13511352/* An RIS field part of the RIS subtable */1353ACPI_DMTABLE_INFO AcpiDmTableInfoMpam1Deps[] =1354{1355{ACPI_DMT_UINT32, 0, "Number of functional dependencies", 0},1356ACPI_DMT_TERMINATOR1357};13581359/* 1A: MPAM Processor cache locator descriptor. A subtable of RIS.1360* Arm's DEN0065 MPAM ACPI 2.0. Table 13.1361*/1362ACPI_DMTABLE_INFO AcpiDmTableInfoMpam1A[] =1363{1364{ACPI_DMT_UINT64, ACPI_MPAM1A_OFFSET (CacheReference), "Cache reference", 0},1365{ACPI_DMT_UINT32, ACPI_MPAM1A_OFFSET (Reserved), "Reserved", 0},1366ACPI_DMT_TERMINATOR1367};13681369/* 1B: MPAM Memory locator descriptor. A subtable of RIS.1370* Arm's DEN0065 MPAM ACPI 2.0. Table 14.1371*/1372ACPI_DMTABLE_INFO AcpiDmTableInfoMpam1B[] =1373{1374{ACPI_DMT_UINT64, ACPI_MPAM1B_OFFSET (ProximityDomain), "Proximity domain", 0},1375{ACPI_DMT_UINT32, ACPI_MPAM1B_OFFSET (Reserved), "Reserved", 0},1376ACPI_DMT_TERMINATOR1377};13781379/* 1C: MPAM SMMU locator descriptor. A subtable of RIS.1380* Arm's DEN0065 MPAM ACPI 2.0. Table 15.1381*/1382ACPI_DMTABLE_INFO AcpiDmTableInfoMpam1C[] =1383{1384{ACPI_DMT_UINT64, ACPI_MPAM1C_OFFSET (SmmuInterface), "SMMU Interface", 0},1385{ACPI_DMT_UINT32, ACPI_MPAM1C_OFFSET (Reserved), "Reserved", 0},1386ACPI_DMT_TERMINATOR1387};13881389/* 1D: MPAM Memory-side cache locator descriptor. A subtable of RIS.1390* Arm's DEN0065 MPAM ACPI 2.0. Table 16.1391*/1392ACPI_DMTABLE_INFO AcpiDmTableInfoMpam1D[] =1393{1394{ACPI_DMT_UINT56, ACPI_MPAM1D_OFFSET (Reserved), "Reserved", 0},1395{ACPI_DMT_UINT8, ACPI_MPAM1D_OFFSET (Level), "Level", 0},1396{ACPI_DMT_UINT32, ACPI_MPAM1D_OFFSET (Reference), "Reference", 0},1397ACPI_DMT_TERMINATOR1398};13991400/* 1E: MPAM ACPI device locator descriptor. A subtable of RIS.1401* Arm's DEN0065 MPAM ACPI 2.0. Table 17.1402*/1403ACPI_DMTABLE_INFO AcpiDmTableInfoMpam1E[] =1404{1405{ACPI_DMT_UINT64, ACPI_MPAM1E_OFFSET (AcpiHwId), "ACPI Hardware ID", 0},1406{ACPI_DMT_UINT32, ACPI_MPAM1E_OFFSET (AcpiUniqueId), "ACPI Unique ID", 0},1407ACPI_DMT_TERMINATOR1408};14091410/* 1F: MPAM Interconnect locator descriptor. A subtable of RIS.1411* Arm's DEN0065 MPAM ACPI 2.0. Table 18.1412*/1413ACPI_DMTABLE_INFO AcpiDmTableInfoMpam1F[] =1414{1415{ACPI_DMT_UINT64, ACPI_MPAM1F_OFFSET (InterConnectDescTblOff), "Interconnect descriptor table offset", 0},1416{ACPI_DMT_UINT32, ACPI_MPAM1F_OFFSET (Reserved), "Reserved", 0},1417ACPI_DMT_TERMINATOR1418};14191420/* 1G: MPAM Locator structure.1421* Arm's DEN0065 MPAM ACPI 2.0. Table 12.1422*/1423ACPI_DMTABLE_INFO AcpiDmTableInfoMpam1G[] =1424{1425{ACPI_DMT_UINT64, ACPI_MPAM1G_OFFSET (Descriptor1), "Descriptor1", 0},1426{ACPI_DMT_UINT32, ACPI_MPAM1G_OFFSET (Descriptor2), "Descriptor2", 0},1427ACPI_DMT_TERMINATOR1428};14291430/* 2: MPAM Functional dependency descriptor.1431* Arm's DEN0065 MPAM ACPI 2.0. Table 10.1432*/1433ACPI_DMTABLE_INFO AcpiDmTableInfoMpam2[] =1434{1435{ACPI_DMT_UINT32, ACPI_MPAM2_OFFSET (Producer), "Producer", 0},1436{ACPI_DMT_UINT32, ACPI_MPAM2_OFFSET (Reserved), "Reserved", 0},1437ACPI_DMT_TERMINATOR1438};143914401441/*******************************************************************************1442*1443* MPST - Memory Power State Table1444*1445******************************************************************************/14461447ACPI_DMTABLE_INFO AcpiDmTableInfoMpst[] =1448{1449{ACPI_DMT_UINT8, ACPI_MPST_OFFSET (ChannelId), "Channel ID", 0},1450{ACPI_DMT_UINT24, ACPI_MPST_OFFSET (Reserved1[0]), "Reserved", 0},1451{ACPI_DMT_UINT16, ACPI_MPST_OFFSET (PowerNodeCount), "Power Node Count", 0},1452{ACPI_DMT_UINT16, ACPI_MPST_OFFSET (Reserved2), "Reserved", 0},1453ACPI_DMT_TERMINATOR1454};14551456/* MPST subtables */14571458/* 0: Memory Power Node Structure */14591460ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0[] =1461{1462{ACPI_DMT_UINT8, ACPI_MPST0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},1463{ACPI_DMT_FLAG0, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Node Enabled", 0},1464{ACPI_DMT_FLAG1, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Power Managed", 0},1465{ACPI_DMT_FLAG2, ACPI_MPST0_FLAG_OFFSET (Flags,0), "Hot Plug Capable", 0},14661467{ACPI_DMT_UINT8, ACPI_MPST0_OFFSET (Reserved1), "Reserved", 0},1468{ACPI_DMT_UINT16, ACPI_MPST0_OFFSET (NodeId), "Node ID", 0},1469{ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (Length), "Length", 0},1470{ACPI_DMT_UINT64, ACPI_MPST0_OFFSET (RangeAddress), "Range Address", 0},1471{ACPI_DMT_UINT64, ACPI_MPST0_OFFSET (RangeLength), "Range Length", 0},1472{ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (NumPowerStates), "Num Power States", 0},1473{ACPI_DMT_UINT32, ACPI_MPST0_OFFSET (NumPhysicalComponents), "Num Physical Components", 0},1474ACPI_DMT_TERMINATOR1475};14761477/* 0A: Sub-subtable - Memory Power State Structure (follows Memory Power Node above) */14781479ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0A[] =1480{1481{ACPI_DMT_UINT8, ACPI_MPST0A_OFFSET (PowerState), "Power State", 0},1482{ACPI_DMT_UINT8, ACPI_MPST0A_OFFSET (InfoIndex), "InfoIndex", 0},1483ACPI_DMT_TERMINATOR1484};14851486/* 0B: Sub-subtable - Physical Component ID Structure (follows Memory Power State(s) above) */14871488ACPI_DMTABLE_INFO AcpiDmTableInfoMpst0B[] =1489{1490{ACPI_DMT_UINT16, ACPI_MPST0B_OFFSET (ComponentId), "Component Id", 0},1491ACPI_DMT_TERMINATOR1492};14931494/* 01: Power Characteristics Count (follows all Power Node(s) above) */14951496ACPI_DMTABLE_INFO AcpiDmTableInfoMpst1[] =1497{1498{ACPI_DMT_UINT16, ACPI_MPST1_OFFSET (CharacteristicsCount), "Characteristics Count", 0},1499{ACPI_DMT_UINT16, ACPI_MPST1_OFFSET (Reserved), "Reserved", 0},1500ACPI_DMT_TERMINATOR1501};15021503/* 02: Memory Power State Characteristics Structure */15041505ACPI_DMTABLE_INFO AcpiDmTableInfoMpst2[] =1506{1507{ACPI_DMT_UINT8, ACPI_MPST2_OFFSET (StructureId), "Structure ID", 0},1508{ACPI_DMT_UINT8, ACPI_MPST2_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},1509{ACPI_DMT_FLAG0, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Memory Preserved", 0},1510{ACPI_DMT_FLAG1, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Auto Entry", 0},1511{ACPI_DMT_FLAG2, ACPI_MPST2_FLAG_OFFSET (Flags,0), "Auto Exit", 0},15121513{ACPI_DMT_UINT16, ACPI_MPST2_OFFSET (Reserved1), "Reserved", 0},1514{ACPI_DMT_UINT32, ACPI_MPST2_OFFSET (AveragePower), "Average Power", 0},1515{ACPI_DMT_UINT32, ACPI_MPST2_OFFSET (PowerSaving), "Power Saving", 0},1516{ACPI_DMT_UINT64, ACPI_MPST2_OFFSET (ExitLatency), "Exit Latency", 0},1517{ACPI_DMT_UINT64, ACPI_MPST2_OFFSET (Reserved2), "Reserved", 0},1518ACPI_DMT_TERMINATOR1519};152015211522/*******************************************************************************1523*1524* MRRM - Memory Range and Region Mapping Table1525*1526******************************************************************************/15271528ACPI_DMTABLE_INFO AcpiDmTableInfoMrrm[] =1529{1530{ACPI_DMT_UINT8, ACPI_MRRM_OFFSET (MaxMemRegion), "Max Memory Regions", 0},1531{ACPI_DMT_UINT8, ACPI_MRRM_OFFSET (Flags), "Region Assignment Type", 0},1532{ACPI_DMT_BUF26, ACPI_MRRM_OFFSET (Reserved), "Reserved", 0},1533ACPI_DMT_TERMINATOR1534};15351536/* MRRM Subtable */15371538/* 0: Memory Range entry */15391540ACPI_DMTABLE_INFO AcpiDmTableInfoMrrm0[] =1541{1542{ACPI_DMT_UINT16, ACPI_MRRM0_OFFSET (Header.Type), "Memory Range", 0},1543{ACPI_DMT_UINT16, ACPI_MRRM0_OFFSET (Header.Length), "Length", DT_LENGTH},1544{ACPI_DMT_UINT32, ACPI_MRRM0_OFFSET (Reserved0), "Reserved", 0},1545{ACPI_DMT_UINT64, ACPI_MRRM0_OFFSET (AddrBase), "System Address Base", 0},1546{ACPI_DMT_UINT64, ACPI_MRRM0_OFFSET (AddrLen), "System Address Length", 0},1547{ACPI_DMT_UINT16, ACPI_MRRM0_OFFSET (RegionIdFlags), "Region Valid Flags", 0},1548{ACPI_DMT_UINT8, ACPI_MRRM0_OFFSET (LocalRegionId), "Static Local Region ID", 0},1549{ACPI_DMT_UINT8, ACPI_MRRM0_OFFSET (RemoteRegionId), "Static Remote Region ID", 0},1550{ACPI_DMT_UINT32, ACPI_MRRM0_OFFSET (Reserved1), "Reserved", 0},1551ACPI_DMT_TERMINATOR1552};155315541555/*******************************************************************************1556*1557* MSCT - Maximum System Characteristics Table (ACPI 4.0)1558*1559******************************************************************************/15601561ACPI_DMTABLE_INFO AcpiDmTableInfoMsct[] =1562{1563{ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (ProximityOffset), "Proximity Offset", 0},1564{ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxProximityDomains), "Max Proximity Domains", 0},1565{ACPI_DMT_UINT32, ACPI_MSCT_OFFSET (MaxClockDomains), "Max Clock Domains", 0},1566{ACPI_DMT_UINT64, ACPI_MSCT_OFFSET (MaxAddress), "Max Physical Address", 0},1567ACPI_DMT_TERMINATOR1568};15691570/* Subtable - Maximum Proximity Domain Information. Version 1 */15711572ACPI_DMTABLE_INFO AcpiDmTableInfoMsct0[] =1573{1574{ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Revision), "Revision", 0},1575{ACPI_DMT_UINT8, ACPI_MSCT0_OFFSET (Length), "Length", DT_LENGTH},1576{ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeStart), "Domain Range Start", 0},1577{ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (RangeEnd), "Domain Range End", 0},1578{ACPI_DMT_UINT32, ACPI_MSCT0_OFFSET (ProcessorCapacity), "Processor Capacity", 0},1579{ACPI_DMT_UINT64, ACPI_MSCT0_OFFSET (MemoryCapacity), "Memory Capacity", 0},1580ACPI_DMT_TERMINATOR1581};158215831584/*******************************************************************************1585*1586* NFIT - NVDIMM Firmware Interface Table and Subtables - (ACPI 6.0)1587*1588******************************************************************************/15891590ACPI_DMTABLE_INFO AcpiDmTableInfoNfit[] =1591{1592{ACPI_DMT_UINT32, ACPI_NFIT_OFFSET (Reserved), "Reserved", 0},1593ACPI_DMT_TERMINATOR1594};15951596/* Common Subtable header */15971598ACPI_DMTABLE_INFO AcpiDmTableInfoNfitHdr[] =1599{1600{ACPI_DMT_NFIT, ACPI_NFITH_OFFSET (Type), "Subtable Type", 0},1601{ACPI_DMT_UINT16, ACPI_NFITH_OFFSET (Length), "Length", DT_LENGTH},1602ACPI_DMT_TERMINATOR1603};16041605/* 0: System Physical Address Range Structure */16061607ACPI_DMTABLE_INFO AcpiDmTableInfoNfit0[] =1608{1609{ACPI_DMT_UINT16, ACPI_NFIT0_OFFSET (RangeIndex), "Range Index", 0},1610{ACPI_DMT_UINT16, ACPI_NFIT0_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},1611{ACPI_DMT_FLAG0, ACPI_NFIT0_FLAG_OFFSET (Flags,0), "Add/Online Operation Only", 0},1612{ACPI_DMT_FLAG1, ACPI_NFIT0_FLAG_OFFSET (Flags,0), "Proximity Domain Valid", 0},1613{ACPI_DMT_FLAG2, ACPI_NFIT0_FLAG_OFFSET (Flags,0), "Location Cookie Valid", 0},1614{ACPI_DMT_UINT32, ACPI_NFIT0_OFFSET (Reserved), "Reserved", 0},1615{ACPI_DMT_UINT32, ACPI_NFIT0_OFFSET (ProximityDomain), "Proximity Domain", 0},1616{ACPI_DMT_UUID, ACPI_NFIT0_OFFSET (RangeGuid[0]), "Region Type GUID", 0},1617{ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (Address), "Address Range Base", 0},1618{ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (Length), "Address Range Length", 0},1619{ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (MemoryMapping), "Memory Map Attribute", 0},1620{ACPI_DMT_UINT64, ACPI_NFIT0_OFFSET (LocationCookie), "Location Cookie", 0}, /* ACPI 6.4 */1621ACPI_DMT_TERMINATOR1622};16231624/* 1: Memory Device to System Address Range Map Structure */16251626ACPI_DMTABLE_INFO AcpiDmTableInfoNfit1[] =1627{1628{ACPI_DMT_UINT32, ACPI_NFIT1_OFFSET (DeviceHandle), "Device Handle", 0},1629{ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (PhysicalId), "Physical Id", 0},1630{ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (RegionId), "Region Id", 0},1631{ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (RangeIndex), "Range Index", 0},1632{ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (RegionIndex), "Control Region Index", 0},1633{ACPI_DMT_UINT64, ACPI_NFIT1_OFFSET (RegionSize), "Region Size", 0},1634{ACPI_DMT_UINT64, ACPI_NFIT1_OFFSET (RegionOffset), "Region Offset", 0},1635{ACPI_DMT_UINT64, ACPI_NFIT1_OFFSET (Address), "Address Region Base", 0},1636{ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (InterleaveIndex), "Interleave Index", 0},1637{ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (InterleaveWays), "Interleave Ways", 0},1638{ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (Flags), "Flags", DT_FLAG},1639{ACPI_DMT_FLAG0, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Save to device failed", 0},1640{ACPI_DMT_FLAG1, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Restore from device failed", 0},1641{ACPI_DMT_FLAG2, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Platform flush failed", 0},1642{ACPI_DMT_FLAG3, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Device not armed", 0},1643{ACPI_DMT_FLAG4, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Health events observed", 0},1644{ACPI_DMT_FLAG5, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Health events enabled", 0},1645{ACPI_DMT_FLAG6, ACPI_NFIT1_FLAG_OFFSET (Flags,0), "Mapping failed", 0},1646{ACPI_DMT_UINT16, ACPI_NFIT1_OFFSET (Reserved), "Reserved", 0},1647ACPI_DMT_TERMINATOR1648};16491650/* 2: Interleave Structure */16511652ACPI_DMTABLE_INFO AcpiDmTableInfoNfit2[] =1653{1654{ACPI_DMT_UINT16, ACPI_NFIT2_OFFSET (InterleaveIndex), "Interleave Index", 0},1655{ACPI_DMT_UINT16, ACPI_NFIT2_OFFSET (Reserved), "Reserved", 0},1656{ACPI_DMT_UINT32, ACPI_NFIT2_OFFSET (LineCount), "Line Count", 0},1657{ACPI_DMT_UINT32, ACPI_NFIT2_OFFSET (LineSize), "Line Size", 0},1658ACPI_DMT_TERMINATOR1659};16601661ACPI_DMTABLE_INFO AcpiDmTableInfoNfit2a[] =1662{1663{ACPI_DMT_UINT32, 0, "Line Offset", DT_OPTIONAL},1664ACPI_DMT_TERMINATOR1665};16661667/* 3: SMBIOS Management Information Structure */16681669ACPI_DMTABLE_INFO AcpiDmTableInfoNfit3[] =1670{1671{ACPI_DMT_UINT32, ACPI_NFIT3_OFFSET (Reserved), "Reserved", 0},1672ACPI_DMT_TERMINATOR1673};16741675ACPI_DMTABLE_INFO AcpiDmTableInfoNfit3a[] =1676{1677{ACPI_DMT_RAW_BUFFER, 0, "SMBIOS Table Entries", DT_OPTIONAL},1678ACPI_DMT_TERMINATOR1679};16801681/* 4: NVDIMM Control Region Structure */16821683ACPI_DMTABLE_INFO AcpiDmTableInfoNfit4[] =1684{1685{ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (RegionIndex), "Region Index", 0},1686{ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (VendorId), "Vendor Id", 0},1687{ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (DeviceId), "Device Id", 0},1688{ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (RevisionId), "Revision Id", 0},1689{ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (SubsystemVendorId), "Subsystem Vendor Id", 0},1690{ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (SubsystemDeviceId), "Subsystem Device Id", 0},1691{ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (SubsystemRevisionId), "Subsystem Revision Id", 0},1692{ACPI_DMT_UINT8, ACPI_NFIT4_OFFSET (ValidFields), "Valid Fields", 0},1693{ACPI_DMT_UINT8, ACPI_NFIT4_OFFSET (ManufacturingLocation), "Manufacturing Location", 0},1694{ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (ManufacturingDate), "Manufacturing Date", 0},1695{ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Reserved[0]), "Reserved", 0},1696{ACPI_DMT_UINT32, ACPI_NFIT4_OFFSET (SerialNumber), "Serial Number", 0},1697{ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Code), "Code", 0},1698{ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Windows), "Window Count", 0},1699{ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (WindowSize), "Window Size", 0},1700{ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (CommandOffset), "Command Offset", 0},1701{ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (CommandSize), "Command Size", 0},1702{ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (StatusOffset), "Status Offset", 0},1703{ACPI_DMT_UINT64, ACPI_NFIT4_OFFSET (StatusSize), "Status Size", 0},1704{ACPI_DMT_UINT16, ACPI_NFIT4_OFFSET (Flags), "Flags", DT_FLAG},1705{ACPI_DMT_FLAG0, ACPI_NFIT4_FLAG_OFFSET (Flags,0), "Windows buffered", 0},1706{ACPI_DMT_UINT48, ACPI_NFIT4_OFFSET (Reserved1[0]), "Reserved1", 0},1707ACPI_DMT_TERMINATOR1708};17091710/* 5: NVDIMM Block Data Window Region Structure */17111712ACPI_DMTABLE_INFO AcpiDmTableInfoNfit5[] =1713{1714{ACPI_DMT_UINT16, ACPI_NFIT5_OFFSET (RegionIndex), "Region Index", 0},1715{ACPI_DMT_UINT16, ACPI_NFIT5_OFFSET (Windows), "Window Count", 0},1716{ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (Offset), "Offset", 0},1717{ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (Size), "Size", 0},1718{ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (Capacity), "Capacity", 0},1719{ACPI_DMT_UINT64, ACPI_NFIT5_OFFSET (StartAddress), "Start Address", 0},1720ACPI_DMT_TERMINATOR1721};17221723/* 6: Flush Hint Address Structure */17241725ACPI_DMTABLE_INFO AcpiDmTableInfoNfit6[] =1726{1727{ACPI_DMT_UINT32, ACPI_NFIT6_OFFSET (DeviceHandle), "Device Handle", 0},1728{ACPI_DMT_UINT16, ACPI_NFIT6_OFFSET (HintCount), "Hint Count", 0},1729{ACPI_DMT_UINT48, ACPI_NFIT6_OFFSET (Reserved[0]), "Reserved", 0},1730ACPI_DMT_TERMINATOR1731};17321733ACPI_DMTABLE_INFO AcpiDmTableInfoNfit6a[] =1734{1735{ACPI_DMT_UINT64, 0, "Hint Address", DT_OPTIONAL},1736ACPI_DMT_TERMINATOR1737};17381739ACPI_DMTABLE_INFO AcpiDmTableInfoNfit7[] =1740{1741{ACPI_DMT_UINT8, ACPI_NFIT7_OFFSET (HighestCapability), "Highest Capability", 0},1742{ACPI_DMT_UINT24, ACPI_NFIT7_OFFSET (Reserved[0]), "Reserved", 0},1743{ACPI_DMT_UINT32, ACPI_NFIT7_OFFSET (Capabilities), "Capabilities (decoded below)", DT_FLAG},1744{ACPI_DMT_FLAG0, ACPI_NFIT7_FLAG_OFFSET (Capabilities,0), "Cache Flush to NVDIMM", 0},1745{ACPI_DMT_FLAG1, ACPI_NFIT7_FLAG_OFFSET (Capabilities,0), "Memory Flush to NVDIMM", 0},1746{ACPI_DMT_FLAG2, ACPI_NFIT7_FLAG_OFFSET (Capabilities,0), "Memory Mirroring", 0},1747{ACPI_DMT_UINT32, ACPI_NFIT7_OFFSET (Reserved2), "Reserved", 0},1748ACPI_DMT_TERMINATOR1749};175017511752/*******************************************************************************1753*1754* PCCT - Platform Communications Channel Table (ACPI 5.0)1755*1756******************************************************************************/17571758ACPI_DMTABLE_INFO AcpiDmTableInfoPcct[] =1759{1760{ACPI_DMT_UINT32, ACPI_PCCT_OFFSET (Flags), "Flags (decoded below)", DT_FLAG},1761{ACPI_DMT_FLAG0, ACPI_PCCT_FLAG_OFFSET (Flags,0), "Platform", 0},1762{ACPI_DMT_UINT64, ACPI_PCCT_OFFSET (Reserved), "Reserved", 0},1763ACPI_DMT_TERMINATOR1764};17651766/* PCCT subtables */17671768ACPI_DMTABLE_INFO AcpiDmTableInfoPcctHdr[] =1769{1770{ACPI_DMT_PCCT, ACPI_PCCT0_OFFSET (Header.Type), "Subtable Type", 0},1771{ACPI_DMT_UINT8, ACPI_PCCT0_OFFSET (Header.Length), "Length", DT_LENGTH},1772ACPI_DMT_TERMINATOR1773};17741775/* 0: Generic Communications Subspace */17761777ACPI_DMTABLE_INFO AcpiDmTableInfoPcct0[] =1778{1779{ACPI_DMT_UINT48, ACPI_PCCT0_OFFSET (Reserved[0]), "Reserved", 0},1780{ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (BaseAddress), "Base Address", 0},1781{ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (Length), "Address Length", 0},1782{ACPI_DMT_GAS, ACPI_PCCT0_OFFSET (DoorbellRegister), "Doorbell Register", 0},1783{ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (PreserveMask), "Preserve Mask", 0},1784{ACPI_DMT_UINT64, ACPI_PCCT0_OFFSET (WriteMask), "Write Mask", 0},1785{ACPI_DMT_UINT32, ACPI_PCCT0_OFFSET (Latency), "Command Latency", 0},1786{ACPI_DMT_UINT32, ACPI_PCCT0_OFFSET (MaxAccessRate), "Maximum Access Rate", 0},1787{ACPI_DMT_UINT16, ACPI_PCCT0_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0},1788ACPI_DMT_TERMINATOR1789};17901791/* 1: HW-reduced Communications Subspace (ACPI 5.1) */17921793ACPI_DMTABLE_INFO AcpiDmTableInfoPcct1[] =1794{1795{ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (PlatformInterrupt), "Platform Interrupt", 0},1796{ACPI_DMT_UINT8, ACPI_PCCT1_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG},1797{ACPI_DMT_FLAG0, ACPI_PCCT1_FLAG_OFFSET (Flags,0), "Polarity", 0},1798{ACPI_DMT_FLAG1, ACPI_PCCT1_FLAG_OFFSET (Flags,0), "Mode", 0},1799{ACPI_DMT_UINT8, ACPI_PCCT1_OFFSET (Reserved), "Reserved", 0},1800{ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (BaseAddress), "Base Address", 0},1801{ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (Length), "Address Length", 0},1802{ACPI_DMT_GAS, ACPI_PCCT1_OFFSET (DoorbellRegister), "Doorbell Register", 0},1803{ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (PreserveMask), "Preserve Mask", 0},1804{ACPI_DMT_UINT64, ACPI_PCCT1_OFFSET (WriteMask), "Write Mask", 0},1805{ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (Latency), "Command Latency", 0},1806{ACPI_DMT_UINT32, ACPI_PCCT1_OFFSET (MaxAccessRate), "Maximum Access Rate", 0},1807{ACPI_DMT_UINT16, ACPI_PCCT1_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0},1808ACPI_DMT_TERMINATOR1809};18101811/* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */18121813ACPI_DMTABLE_INFO AcpiDmTableInfoPcct2[] =1814{1815{ACPI_DMT_UINT32, ACPI_PCCT2_OFFSET (PlatformInterrupt), "Platform Interrupt", 0},1816{ACPI_DMT_UINT8, ACPI_PCCT2_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG},1817{ACPI_DMT_FLAG0, ACPI_PCCT2_FLAG_OFFSET (Flags,0), "Polarity", 0},1818{ACPI_DMT_FLAG1, ACPI_PCCT2_FLAG_OFFSET (Flags,0), "Mode", 0},1819{ACPI_DMT_UINT8, ACPI_PCCT2_OFFSET (Reserved), "Reserved", 0},1820{ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (BaseAddress), "Base Address", 0},1821{ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (Length), "Address Length", 0},1822{ACPI_DMT_GAS, ACPI_PCCT2_OFFSET (DoorbellRegister), "Doorbell Register", 0},1823{ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (PreserveMask), "Preserve Mask", 0},1824{ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (WriteMask), "Write Mask", 0},1825{ACPI_DMT_UINT32, ACPI_PCCT2_OFFSET (Latency), "Command Latency", 0},1826{ACPI_DMT_UINT32, ACPI_PCCT2_OFFSET (MaxAccessRate), "Maximum Access Rate", 0},1827{ACPI_DMT_UINT16, ACPI_PCCT2_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0},1828{ACPI_DMT_GAS, ACPI_PCCT2_OFFSET (PlatformAckRegister), "Platform ACK Register", 0},1829{ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (AckPreserveMask), "ACK Preserve Mask", 0},1830{ACPI_DMT_UINT64, ACPI_PCCT2_OFFSET (AckWriteMask), "ACK Write Mask", 0},1831ACPI_DMT_TERMINATOR1832};18331834/* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */18351836ACPI_DMTABLE_INFO AcpiDmTableInfoPcct3[] =1837{1838{ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (PlatformInterrupt), "Platform Interrupt", 0},1839{ACPI_DMT_UINT8, ACPI_PCCT3_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG},1840{ACPI_DMT_FLAG0, ACPI_PCCT3_FLAG_OFFSET (Flags,0), "Polarity", 0},1841{ACPI_DMT_FLAG1, ACPI_PCCT3_FLAG_OFFSET (Flags,0), "Mode", 0},1842{ACPI_DMT_UINT8, ACPI_PCCT3_OFFSET (Reserved1), "Reserved", 0},1843{ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (BaseAddress), "Base Address", 0},1844{ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (Length), "Address Length", 0},1845{ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (DoorbellRegister), "Doorbell Register", 0},1846{ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (PreserveMask), "Preserve Mask", 0},1847{ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (WriteMask), "Write Mask", 0},1848{ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (Latency), "Command Latency", 0},1849{ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (MaxAccessRate), "Maximum Access Rate", 0},1850{ACPI_DMT_UINT32, ACPI_PCCT3_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0},1851{ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (PlatformAckRegister), "Platform ACK Register", 0},1852{ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (AckPreserveMask), "ACK Preserve Mask", 0},1853{ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (AckSetMask), "ACK Set Mask", 0},1854{ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (Reserved2), "Reserved", 0},1855{ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (CmdCompleteRegister), "Command Complete Register", 0},1856{ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (CmdCompleteMask), "Command Complete Check Mask", 0},1857{ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (CmdUpdateRegister), "Command Update Register", 0},1858{ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (CmdUpdatePreserveMask), "Command Update Preserve Mask", 0},1859{ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (CmdUpdateSetMask), "Command Update Set Mask", 0},1860{ACPI_DMT_GAS, ACPI_PCCT3_OFFSET (ErrorStatusRegister), "Error Status Register", 0},1861{ACPI_DMT_UINT64, ACPI_PCCT3_OFFSET (ErrorStatusMask), "Error Status Mask", 0},1862ACPI_DMT_TERMINATOR1863};18641865/* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */18661867ACPI_DMTABLE_INFO AcpiDmTableInfoPcct4[] =1868{1869{ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (PlatformInterrupt), "Platform Interrupt", 0},1870{ACPI_DMT_UINT8, ACPI_PCCT4_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG},1871{ACPI_DMT_FLAG0, ACPI_PCCT4_FLAG_OFFSET (Flags,0), "Polarity", 0},1872{ACPI_DMT_FLAG1, ACPI_PCCT4_FLAG_OFFSET (Flags,0), "Mode", 0},1873{ACPI_DMT_UINT8, ACPI_PCCT4_OFFSET (Reserved1), "Reserved", 0},1874{ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (BaseAddress), "Base Address", 0},1875{ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (Length), "Address Length", 0},1876{ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (DoorbellRegister), "Doorbell Register", 0},1877{ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (PreserveMask), "Preserve Mask", 0},1878{ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (WriteMask), "Write Mask", 0},1879{ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (Latency), "Command Latency", 0},1880{ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (MaxAccessRate), "Maximum Access Rate", 0},1881{ACPI_DMT_UINT32, ACPI_PCCT4_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0},1882{ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (PlatformAckRegister), "Platform ACK Register", 0},1883{ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (AckPreserveMask), "ACK Preserve Mask", 0},1884{ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (AckSetMask), "ACK Set Mask", 0},1885{ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (Reserved2), "Reserved", 0},1886{ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (CmdCompleteRegister), "Command Complete Register", 0},1887{ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (CmdCompleteMask), "Command Complete Check Mask", 0},1888{ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (CmdUpdateRegister), "Command Update Register", 0},1889{ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (CmdUpdatePreserveMask), "Command Update Preserve Mask", 0},1890{ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (CmdUpdateSetMask), "Command Update Set Mask", 0},1891{ACPI_DMT_GAS, ACPI_PCCT4_OFFSET (ErrorStatusRegister), "Error Status Register", 0},1892{ACPI_DMT_UINT64, ACPI_PCCT4_OFFSET (ErrorStatusMask), "Error Status Mask", 0},1893ACPI_DMT_TERMINATOR1894};18951896/* 5: HW Registers based Communications Subspace */18971898ACPI_DMTABLE_INFO AcpiDmTableInfoPcct5[] =1899{1900{ACPI_DMT_UINT16, ACPI_PCCT5_OFFSET (Version), "Version", 0},1901{ACPI_DMT_UINT64, ACPI_PCCT5_OFFSET (BaseAddress), "Base Address", 0},1902{ACPI_DMT_UINT64, ACPI_PCCT5_OFFSET (Length), "Length", 0},1903{ACPI_DMT_GAS, ACPI_PCCT5_OFFSET (DoorbellRegister), "Doorbell Register", 0},1904{ACPI_DMT_UINT64, ACPI_PCCT5_OFFSET (DoorbellPreserve), "Preserve Mask", 0},1905{ACPI_DMT_UINT64, ACPI_PCCT5_OFFSET (DoorbellWrite), "Write Mask", 0},1906{ACPI_DMT_GAS, ACPI_PCCT5_OFFSET (CmdCompleteRegister), "Command Complete Register", 0},1907{ACPI_DMT_UINT64, ACPI_PCCT5_OFFSET (CmdCompleteMask), "Command Complete Check Mask", 0},1908{ACPI_DMT_GAS, ACPI_PCCT5_OFFSET (ErrorStatusRegister), "Error Status Register", 0},1909{ACPI_DMT_UINT64, ACPI_PCCT5_OFFSET (ErrorStatusMask), "Error Status Mask", 0},1910{ACPI_DMT_UINT32, ACPI_PCCT5_OFFSET (NominalLatency), "Nominal Latency", 0},1911{ACPI_DMT_UINT32, ACPI_PCCT5_OFFSET (MinTurnaroundTime), "Minimum Turnaround Time", 0},1912ACPI_DMT_TERMINATOR1913};191419151916/*******************************************************************************1917*1918* PDTT - Platform Debug Trigger Table (ACPI 6.2)1919*1920******************************************************************************/19211922ACPI_DMTABLE_INFO AcpiDmTableInfoPdtt[] =1923{1924{ACPI_DMT_UINT8, ACPI_PDTT_OFFSET (TriggerCount), "Trigger Count", 0},1925{ACPI_DMT_UINT24, ACPI_PDTT_OFFSET (Reserved), "Reserved", 0},1926{ACPI_DMT_UINT32, ACPI_PDTT_OFFSET (ArrayOffset), "Array Offset", 0},1927ACPI_DMT_TERMINATOR1928};19291930ACPI_DMTABLE_INFO AcpiDmTableInfoPdtt0[] =1931{1932{ACPI_DMT_UINT8, ACPI_PDTT0_OFFSET (SubchannelId), "Subchannel Id", 0},1933{ACPI_DMT_UINT8, ACPI_PDTT0_OFFSET (Flags), "Flags (Decoded Below)", DT_FLAG},1934{ACPI_DMT_FLAG0, ACPI_PDTT0_FLAG_OFFSET (Flags,0), "Runtime Trigger", 0},1935{ACPI_DMT_FLAG1, ACPI_PDTT0_FLAG_OFFSET (Flags,0), "Wait for Completion", 0},1936{ACPI_DMT_FLAG2, ACPI_PDTT0_FLAG_OFFSET (Flags,0), "Trigger Order", 0},1937ACPI_DMT_TERMINATOR1938};193919401941/*******************************************************************************1942*1943* PHAT - Platform Health Assessment Table (ACPI 6.4)1944*1945******************************************************************************/19461947/* Common subtable header */19481949ACPI_DMTABLE_INFO AcpiDmTableInfoPhatHdr[] =1950{1951{ACPI_DMT_PHAT, ACPI_PHATH_OFFSET (Type), "Subtable Type", 0},1952{ACPI_DMT_UINT16, ACPI_PHATH_OFFSET (Length), "Length", DT_LENGTH},1953{ACPI_DMT_UINT8, ACPI_PHATH_OFFSET (Revision), "Revision", 0},1954ACPI_DMT_TERMINATOR1955};19561957/* 0: Firmware version table */19581959ACPI_DMTABLE_INFO AcpiDmTableInfoPhat0[] =1960{1961{ACPI_DMT_UINT24, ACPI_PHAT0_OFFSET (Reserved), "Reserved", 0},1962{ACPI_DMT_UINT32, ACPI_PHAT0_OFFSET (ElementCount), "Element Count", 0},1963ACPI_DMT_TERMINATOR1964};19651966ACPI_DMTABLE_INFO AcpiDmTableInfoPhat0a[] =1967{1968{ACPI_DMT_UUID, ACPI_PHAT0A_OFFSET (Guid), "GUID", 0},1969{ACPI_DMT_UINT64, ACPI_PHAT0A_OFFSET (VersionValue), "Version Value", 0},1970{ACPI_DMT_UINT32, ACPI_PHAT0A_OFFSET (ProducerId), "Producer ID", 0},1971ACPI_DMT_TERMINATOR1972};19731974/* 1: Firmware Health Data Record */19751976ACPI_DMTABLE_INFO AcpiDmTableInfoPhat1[] =1977{1978{ACPI_DMT_UINT16, ACPI_PHAT1_OFFSET (Reserved), "Reserved", 0},1979{ACPI_DMT_UINT8, ACPI_PHAT1_OFFSET (Health), "Health", 0},1980{ACPI_DMT_UUID, ACPI_PHAT1_OFFSET (DeviceGuid), "Device GUID", 0},1981{ACPI_DMT_UINT32, ACPI_PHAT1_OFFSET (DeviceSpecificOffset), "Device-Specific Offset", 0},1982ACPI_DMT_TERMINATOR1983};19841985ACPI_DMTABLE_INFO AcpiDmTableInfoPhat1a[] =1986{1987{ACPI_DMT_UNICODE, 0, "Device Path", 0},1988ACPI_DMT_TERMINATOR1989};19901991ACPI_DMTABLE_INFO AcpiDmTableInfoPhat1b[] =1992{1993{ACPI_DMT_RAW_BUFFER, 0, "Device-Specific Data", DT_OPTIONAL},1994ACPI_DMT_TERMINATOR1995};199619971998/*******************************************************************************1999*2000* PMTT - Platform Memory Topology Table2001*2002******************************************************************************/20032004ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt[] =2005{2006{ACPI_DMT_UINT32, ACPI_PMTT_OFFSET (MemoryDeviceCount), "Memory Device Count", 0},2007ACPI_DMT_TERMINATOR2008};20092010/* Common Subtable header (one per Subtable) */20112012#define ACPI_DM_PMTT_HEADER \2013{ACPI_DMT_PMTT, ACPI_PMTTH_OFFSET (Type), "Subtable Type", 0}, \2014{ACPI_DMT_UINT8, ACPI_PMTTH_OFFSET (Reserved1), "Reserved", 0}, \2015{ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Length), "Length", DT_LENGTH}, \2016{ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Flags), "Flags (decoded below)", DT_FLAG}, \2017{ACPI_DMT_FLAG0, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Top-level Device", 0}, \2018{ACPI_DMT_FLAG1, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Physical Element", 0}, \2019{ACPI_DMT_FLAGS2, ACPI_PMTTH_FLAG_OFFSET (Flags,0), "Memory Type", 0}, \2020{ACPI_DMT_UINT16, ACPI_PMTTH_OFFSET (Reserved2), "Reserved", 0}, \2021{ACPI_DMT_UINT32, ACPI_PMTTH_OFFSET (MemoryDeviceCount), "Memory Device Count", 0}20222023/* PMTT Subtables */20242025/* 0: Socket */20262027ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt0[] =2028{2029ACPI_DM_PMTT_HEADER,2030{ACPI_DMT_UINT16, ACPI_PMTT0_OFFSET (SocketId), "Socket ID", 0},2031{ACPI_DMT_UINT16, ACPI_PMTT0_OFFSET (Reserved), "Reserved", 0},2032ACPI_DMT_TERMINATOR2033};20342035/* 1: Memory Controller */20362037ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt1[] =2038{2039ACPI_DM_PMTT_HEADER,2040{ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (ControllerId), "Controller ID", 0},2041{ACPI_DMT_UINT16, ACPI_PMTT1_OFFSET (Reserved), "Reserved", 0},2042ACPI_DMT_TERMINATOR2043};20442045/* 2: Physical Component */20462047ACPI_DMTABLE_INFO AcpiDmTableInfoPmtt2[] =2048{2049ACPI_DM_PMTT_HEADER,2050{ACPI_DMT_UINT32, ACPI_PMTT2_OFFSET (BiosHandle), "Bios Handle", 0},2051ACPI_DMT_TERMINATOR2052};20532054/* 0xFF: Vendor Specific */20552056ACPI_DMTABLE_INFO AcpiDmTableInfoPmttVendor[] =2057{2058ACPI_DM_PMTT_HEADER,2059{ACPI_DMT_UUID, ACPI_PMTT_VENDOR_OFFSET (TypeUuid), "Type Uuid", 0},2060{ACPI_DMT_PMTT_VENDOR, ACPI_PMTT_VENDOR_OFFSET (Specific), "Vendor Data", 0},2061ACPI_DMT_TERMINATOR2062};206320642065/*******************************************************************************2066*2067* PPTT - Processor Properties Topology Table (ACPI 6.2)2068*2069******************************************************************************/20702071/* Main table consists of only the standard ACPI header - subtables follow */20722073/* Common Subtable header (one per Subtable) */20742075ACPI_DMTABLE_INFO AcpiDmTableInfoPpttHdr[] =2076{2077{ACPI_DMT_PPTT, ACPI_PPTTH_OFFSET (Type), "Subtable Type", 0},2078{ACPI_DMT_UINT8, ACPI_PPTTH_OFFSET (Length), "Length", 0},2079ACPI_DMT_TERMINATOR2080};20812082/* 0: Processor hierarchy node */20832084ACPI_DMTABLE_INFO AcpiDmTableInfoPptt0[] =2085{2086{ACPI_DMT_UINT16, ACPI_PPTT0_OFFSET (Reserved), "Reserved", 0},2087{ACPI_DMT_UINT32, ACPI_PPTT0_OFFSET (Flags), "Flags (decoded below)", 0},2088{ACPI_DMT_FLAG0, ACPI_PPTT0_FLAG_OFFSET (Flags,0), "Physical package", 0},2089{ACPI_DMT_FLAG1, ACPI_PPTT0_FLAG_OFFSET (Flags,0), "ACPI Processor ID valid", 0},2090{ACPI_DMT_FLAG2, ACPI_PPTT0_FLAG_OFFSET (Flags,0), "Processor is a thread", 0},2091{ACPI_DMT_FLAG3, ACPI_PPTT0_FLAG_OFFSET (Flags,0), "Node is a leaf", 0},2092{ACPI_DMT_FLAG4, ACPI_PPTT0_FLAG_OFFSET (Flags,0), "Identical Implementation", 0},2093{ACPI_DMT_UINT32, ACPI_PPTT0_OFFSET (Parent), "Parent", 0},2094{ACPI_DMT_UINT32, ACPI_PPTT0_OFFSET (AcpiProcessorId), "ACPI Processor ID", 0},2095{ACPI_DMT_UINT32, ACPI_PPTT0_OFFSET (NumberOfPrivResources), "Private Resource Number", 0},2096ACPI_DMT_TERMINATOR2097};20982099ACPI_DMTABLE_INFO AcpiDmTableInfoPptt0a[] =2100{2101{ACPI_DMT_UINT32, 0, "Private Resource", DT_OPTIONAL},2102ACPI_DMT_TERMINATOR2103};21042105/* 1: Cache type */21062107ACPI_DMTABLE_INFO AcpiDmTableInfoPptt1[] =2108{2109{ACPI_DMT_UINT16, ACPI_PPTT1_OFFSET (Reserved), "Reserved", 0},2110{ACPI_DMT_UINT32, ACPI_PPTT1_OFFSET (Flags), "Flags (decoded below)", 0},2111{ACPI_DMT_FLAG0, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Size valid", 0},2112{ACPI_DMT_FLAG1, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Number of Sets valid", 0},2113{ACPI_DMT_FLAG2, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Associativity valid", 0},2114{ACPI_DMT_FLAG3, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Allocation Type valid", 0},2115{ACPI_DMT_FLAG4, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Cache Type valid", 0},2116{ACPI_DMT_FLAG5, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Write Policy valid", 0},2117{ACPI_DMT_FLAG6, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Line Size valid", 0},2118{ACPI_DMT_FLAG7, ACPI_PPTT1_FLAG_OFFSET (Flags,0), "Cache ID valid", 0},2119{ACPI_DMT_UINT32, ACPI_PPTT1_OFFSET (NextLevelOfCache), "Next Level of Cache", 0},2120{ACPI_DMT_UINT32, ACPI_PPTT1_OFFSET (Size), "Size", 0},2121{ACPI_DMT_UINT32, ACPI_PPTT1_OFFSET (NumberOfSets), "Number of Sets", 0},2122{ACPI_DMT_UINT8, ACPI_PPTT1_OFFSET (Associativity), "Associativity", 0},2123{ACPI_DMT_UINT8, ACPI_PPTT1_OFFSET (Attributes), "Attributes", 0},2124{ACPI_DMT_FLAGS0, ACPI_PPTT1_OFFSET (Attributes), "Allocation Type", 0},2125{ACPI_DMT_FLAGS2, ACPI_PPTT1_OFFSET (Attributes), "Cache Type", 0},2126{ACPI_DMT_FLAG4, ACPI_PPTT1_OFFSET (Attributes), "Write Policy", 0},2127{ACPI_DMT_UINT16, ACPI_PPTT1_OFFSET (LineSize), "Line Size", 0},2128ACPI_DMT_TERMINATOR2129};21302131/* 1: cache type v1 */21322133ACPI_DMTABLE_INFO AcpiDmTableInfoPptt1a[] =2134{2135{ACPI_DMT_UINT16, ACPI_PPTT1A_OFFSET (Reserved), "Reserved", 0},2136{ACPI_DMT_UINT32, ACPI_PPTT1A_OFFSET (Flags), "Flags (decoded below)", 0},2137{ACPI_DMT_FLAG0, ACPI_PPTT1A_FLAG_OFFSET (Flags,0), "Size valid", 0},2138{ACPI_DMT_FLAG1, ACPI_PPTT1A_FLAG_OFFSET (Flags,0), "Number of Sets valid", 0},2139{ACPI_DMT_FLAG2, ACPI_PPTT1A_FLAG_OFFSET (Flags,0), "Associativity valid", 0},2140{ACPI_DMT_FLAG3, ACPI_PPTT1A_FLAG_OFFSET (Flags,0), "Allocation Type valid", 0},2141{ACPI_DMT_FLAG4, ACPI_PPTT1A_FLAG_OFFSET (Flags,0), "Cache Type valid", 0},2142{ACPI_DMT_FLAG5, ACPI_PPTT1A_FLAG_OFFSET (Flags,0), "Write Policy valid", 0},2143{ACPI_DMT_FLAG6, ACPI_PPTT1A_FLAG_OFFSET (Flags,0), "Line Size valid", 0},2144{ACPI_DMT_FLAG7, ACPI_PPTT1A_FLAG_OFFSET (Flags,0), "Cache ID valid", 0},2145{ACPI_DMT_UINT32, ACPI_PPTT1A_OFFSET (NextLevelOfCache), "Next Level of Cache", 0},2146{ACPI_DMT_UINT32, ACPI_PPTT1A_OFFSET (Size), "Size", 0},2147{ACPI_DMT_UINT32, ACPI_PPTT1A_OFFSET (NumberOfSets), "Number of Sets", 0},2148{ACPI_DMT_UINT8, ACPI_PPTT1A_OFFSET (Associativity), "Associativity", 0},2149{ACPI_DMT_UINT8, ACPI_PPTT1A_OFFSET (Attributes), "Attributes", 0},2150{ACPI_DMT_FLAGS0, ACPI_PPTT1A_OFFSET (Attributes), "Allocation Type", 0},2151{ACPI_DMT_FLAGS2, ACPI_PPTT1A_OFFSET (Attributes), "Cache Type", 0},2152{ACPI_DMT_FLAG4, ACPI_PPTT1A_OFFSET (Attributes), "Write Policy", 0},2153{ACPI_DMT_UINT16, ACPI_PPTT1A_OFFSET (LineSize), "Line Size", 0},2154{ACPI_DMT_UINT32, ACPI_PPTT1A_OFFSET (CacheId), "Cache ID", 0},2155ACPI_DMT_TERMINATOR2156};21572158/* 2: ID */21592160ACPI_DMTABLE_INFO AcpiDmTableInfoPptt2[] =2161{2162{ACPI_DMT_UINT16, ACPI_PPTT2_OFFSET (Reserved), "Reserved", 0},2163{ACPI_DMT_UINT32, ACPI_PPTT2_OFFSET (VendorId), "Vendor ID", 0},2164{ACPI_DMT_UINT64, ACPI_PPTT2_OFFSET (Level1Id), "Level1 ID", 0},2165{ACPI_DMT_UINT64, ACPI_PPTT2_OFFSET (Level2Id), "Level2 ID", 0},2166{ACPI_DMT_UINT16, ACPI_PPTT2_OFFSET (MajorRev), "Major revision", 0},2167{ACPI_DMT_UINT16, ACPI_PPTT2_OFFSET (MinorRev), "Minor revision", 0},2168{ACPI_DMT_UINT16, ACPI_PPTT2_OFFSET (SpinRev), "Spin revision", 0},2169ACPI_DMT_TERMINATOR2170};217121722173/*******************************************************************************2174*2175* PRMT - Platform Runtime Mechanism Table2176* Version 12177*2178******************************************************************************/21792180ACPI_DMTABLE_INFO AcpiDmTableInfoPrmtHdr[] =2181{2182{ACPI_DMT_UUID, ACPI_PRMTH_OFFSET (PlatformGuid[0]), "Platform GUID", 0},2183{ACPI_DMT_UINT32, ACPI_PRMTH_OFFSET (ModuleInfoOffset), "Module info offset", 0},2184{ACPI_DMT_UINT32, ACPI_PRMTH_OFFSET (ModuleInfoCount), "Module info count", 0},2185ACPI_DMT_NEW_LINE,2186ACPI_DMT_TERMINATOR21872188};21892190ACPI_DMTABLE_INFO AcpiDmTableInfoPrmtModule[] =2191{2192{ACPI_DMT_UINT16, ACPI_PRMT0_OFFSET (Revision), "Revision", 0},2193{ACPI_DMT_UINT16, ACPI_PRMT0_OFFSET (Length), "Length", 0},2194{ACPI_DMT_UUID, ACPI_PRMT0_OFFSET (ModuleGuid[0]), "Module GUID", 0},2195{ACPI_DMT_UINT16, ACPI_PRMT0_OFFSET (MajorRev), "Major Revision", 0},2196{ACPI_DMT_UINT16, ACPI_PRMT0_OFFSET (MinorRev), "Minor Revision", 0},2197{ACPI_DMT_UINT16, ACPI_PRMT0_OFFSET (HandlerInfoCount), "Handler Info Count", 0},2198{ACPI_DMT_UINT32, ACPI_PRMT0_OFFSET (HandlerInfoOffset), "Handler Info Offset", 0},2199{ACPI_DMT_UINT64, ACPI_PRMT0_OFFSET (MmioListPointer), "Mmio List pointer", 0},2200ACPI_DMT_NEW_LINE,2201ACPI_DMT_TERMINATOR22022203};22042205ACPI_DMTABLE_INFO AcpiDmTableInfoPrmtHandler[] =2206{2207{ACPI_DMT_UINT16, ACPI_PRMT1_OFFSET (Revision), "Revision", 0},2208{ACPI_DMT_UINT16, ACPI_PRMT1_OFFSET (Length), "Length", 0},2209{ACPI_DMT_UUID, ACPI_PRMT1_OFFSET (HandlerGuid[0]), "Handler GUID", 0},2210{ACPI_DMT_UINT64, ACPI_PRMT1_OFFSET (HandlerAddress), "Handler address", 0},2211{ACPI_DMT_UINT64, ACPI_PRMT1_OFFSET (StaticDataBufferAddress),"Static Data Address", 0},2212{ACPI_DMT_UINT64, ACPI_PRMT1_OFFSET (AcpiParamBufferAddress), "ACPI Parameter Address", 0},2213ACPI_DMT_NEW_LINE,2214ACPI_DMT_TERMINATOR22152216};221722182219/*******************************************************************************2220*2221* RASF - RAS Feature table2222*2223******************************************************************************/22242225ACPI_DMTABLE_INFO AcpiDmTableInfoRasf[] =2226{2227{ACPI_DMT_BUF12, ACPI_RASF_OFFSET (ChannelId[0]), "Channel ID", 0},2228ACPI_DMT_TERMINATOR2229};223022312232/*******************************************************************************2233*2234* RAS2 - RAS2 Feature table (ACPI 6.5)2235*2236******************************************************************************/22372238ACPI_DMTABLE_INFO AcpiDmTableInfoRas2[] =2239{2240{ACPI_DMT_UINT16, ACPI_RAS2_OFFSET (Reserved), "Reserved", 0},2241{ACPI_DMT_UINT16, ACPI_RAS2_OFFSET (NumPccDescs), "Number of PCC Descriptors", 0},2242ACPI_DMT_TERMINATOR2243};22442245/* RAS2 PCC Descriptor */22462247ACPI_DMTABLE_INFO AcpiDmTableInfoRas2PccDesc[] =2248{2249{ACPI_DMT_UINT8, ACPI_RAS2_PCC_DESC_OFFSET (ChannelId), "Channel ID", 0},2250{ACPI_DMT_UINT16, ACPI_RAS2_PCC_DESC_OFFSET (Reserved), "Reserved", 0},2251{ACPI_DMT_UINT8, ACPI_RAS2_PCC_DESC_OFFSET (FeatureType), "Feature Type", 0},2252{ACPI_DMT_UINT32, ACPI_RAS2_PCC_DESC_OFFSET (Instance), "Instance", 0},2253ACPI_DMT_TERMINATOR2254};225522562257/*******************************************************************************2258*2259* RGRT - Regulatory Graphics Resource Table2260*2261******************************************************************************/22622263ACPI_DMTABLE_INFO AcpiDmTableInfoRgrt[] =2264{2265{ACPI_DMT_UINT16, ACPI_RGRT_OFFSET (Version), "Version", 0},2266{ACPI_DMT_RGRT, ACPI_RGRT_OFFSET (ImageType), "Image Type", 0},2267{ACPI_DMT_UINT8, ACPI_RGRT_OFFSET (Reserved), "Reserved", 0},2268ACPI_DMT_TERMINATOR2269};22702271/*2272* We treat the binary image field as its own subtable (to make2273* ACPI_DMT_RAW_BUFFER work properly).2274*/2275ACPI_DMTABLE_INFO AcpiDmTableInfoRgrt0[] =2276{2277{ACPI_DMT_RAW_BUFFER, 0, "Image", 0},2278ACPI_DMT_TERMINATOR2279};228022812282/*******************************************************************************2283*2284* RHCT - RISC-V Hart Capabilities Table2285*2286******************************************************************************/22872288ACPI_DMTABLE_INFO AcpiDmTableInfoRhct[] =2289{2290{ACPI_DMT_UINT32, ACPI_RHCT_OFFSET (Flags), "Flags", 0},2291{ACPI_DMT_UINT64, ACPI_RHCT_OFFSET (TimeBaseFreq), "Timer Base Frequency", 0},2292{ACPI_DMT_UINT32, ACPI_RHCT_OFFSET (NodeCount), "Number of nodes", 0},2293{ACPI_DMT_UINT32, ACPI_RHCT_OFFSET (NodeOffset), "Offset to the node array", 0},2294ACPI_DMT_TERMINATOR2295};229622972298/* Common Subtable header (one per Subtable) */22992300ACPI_DMTABLE_INFO AcpiDmTableInfoRhctNodeHdr[] =2301{2302{ACPI_DMT_RHCT, ACPI_RHCTH_OFFSET (Type), "Subtable Type", 0},2303{ACPI_DMT_UINT16, ACPI_RHCTH_OFFSET (Length), "Length", DT_LENGTH},2304{ACPI_DMT_UINT16, ACPI_RHCTH_OFFSET (Revision), "Revision", 0},2305ACPI_DMT_TERMINATOR2306};23072308/* 0: ISA string type */23092310ACPI_DMTABLE_INFO AcpiDmTableInfoRhctIsa1[] =2311{2312{ACPI_DMT_UINT16, ACPI_RHCT0_OFFSET (IsaLength), "ISA string length", 0},2313{ACPI_DMT_STRING, ACPI_RHCT0_OFFSET (Isa[0]), "ISA string", 0},2314ACPI_DMT_TERMINATOR2315};231623172318/* Optional padding field */23192320ACPI_DMTABLE_INFO AcpiDmTableInfoRhctIsaPad[] =2321{2322{ACPI_DMT_RAW_BUFFER, 0, "Optional Padding", DT_OPTIONAL},2323ACPI_DMT_TERMINATOR2324};23252326/* 1: CMO node type */23272328ACPI_DMTABLE_INFO AcpiDmTableInfoRhctCmo1[] =2329{2330{ACPI_DMT_UINT8, ACPI_RHCT1_OFFSET (Reserved), "Reserved", 0},2331{ACPI_DMT_UINT8, ACPI_RHCT1_OFFSET (CbomSize), "CBOM Block Size", 0},2332{ACPI_DMT_UINT8, ACPI_RHCT1_OFFSET (CbopSize), "CBOP Block Size", 0},2333{ACPI_DMT_UINT8, ACPI_RHCT1_OFFSET (CbozSize), "CBOZ Block Size", 0},2334ACPI_DMT_TERMINATOR2335};23362337/* 2: MMU node type */23382339ACPI_DMTABLE_INFO AcpiDmTableInfoRhctMmu1[] =2340{2341{ACPI_DMT_UINT8, ACPI_RHCT2_OFFSET (Reserved), "Reserved", 0},2342{ACPI_DMT_UINT8, ACPI_RHCT2_OFFSET (MmuType), "MMU Type", 0},2343ACPI_DMT_TERMINATOR2344};23452346/* 0xFFFF: Hart Info type */23472348ACPI_DMTABLE_INFO AcpiDmTableInfoRhctHartInfo1[] =2349{2350{ACPI_DMT_UINT16, ACPI_RHCTFFFF_OFFSET (NumOffsets), "Number of offsets", 0},2351{ACPI_DMT_UINT32, ACPI_RHCTFFFF_OFFSET (Uid), "Processor UID", 0},2352ACPI_DMT_TERMINATOR2353};235423552356ACPI_DMTABLE_INFO AcpiDmTableInfoRhctHartInfo2[] =2357{2358{ACPI_DMT_UINT32, 0, "Nodes", DT_OPTIONAL},2359ACPI_DMT_TERMINATOR2360};236123622363/*******************************************************************************2364*2365* RIMT - RISC-V IO Mapping Table2366*2367* https://github.com/riscv-non-isa/riscv-acpi-rimt2368*2369******************************************************************************/23702371ACPI_DMTABLE_INFO AcpiDmTableInfoRimt[] =2372{2373{ACPI_DMT_UINT32, ACPI_RIMT_OFFSET (NumNodes), "Number of RIMT Nodes", 0},2374{ACPI_DMT_UINT32, ACPI_RIMT_OFFSET (NodeOffset), "Offset to RIMT Node Array", 0},2375{ACPI_DMT_UINT32, ACPI_RIMT_OFFSET (Reserved), "Reserved", 0},2376ACPI_DMT_TERMINATOR2377};237823792380/* Common Subtable header (one per Subtable) */23812382ACPI_DMTABLE_INFO AcpiDmTableInfoRimtNodeHdr[] =2383{2384{ACPI_DMT_UINT8, ACPI_RIMTH_OFFSET (Type), "Type", 0},2385{ACPI_DMT_UINT8, ACPI_RIMTH_OFFSET (Revision), "Revision", 0},2386{ACPI_DMT_UINT16, ACPI_RIMTH_OFFSET (Length), "Length", 0},2387{ACPI_DMT_UINT16, ACPI_RIMTH_OFFSET (Reserved), "Reserved", 0},2388{ACPI_DMT_UINT16, ACPI_RIMTH_OFFSET (Id), "ID", 0},2389ACPI_DMT_TERMINATOR2390};23912392/* 0: IOMMU Node type */23932394ACPI_DMTABLE_INFO AcpiDmTableInfoRimtIommu[] =2395{2396{ACPI_DMT_NAME8, ACPI_RIMTI_OFFSET (HardwareId), "Hardware ID", 0},2397{ACPI_DMT_UINT64, ACPI_RIMTI_OFFSET (BaseAddress), "Base Address", 0},2398{ACPI_DMT_UINT32, ACPI_RIMTI_OFFSET (Flags), "Flags", 0},2399{ACPI_DMT_UINT32, ACPI_RIMTI_OFFSET (ProximityDomain), "Proximity Domain", 0},2400{ACPI_DMT_UINT16, ACPI_RIMTI_OFFSET (PcieSegmentNumber), "PCIe Segment number", 0},2401{ACPI_DMT_UINT16, ACPI_RIMTI_OFFSET (PcieBdf), "PCIe B/D/F", 0},2402{ACPI_DMT_UINT16, ACPI_RIMTI_OFFSET (NumInterruptWires), "Number of interrupt wires", 0},2403{ACPI_DMT_UINT16, ACPI_RIMTI_OFFSET (InterruptWireOffset), "Interrupt wire array offset", 0},2404ACPI_DMT_TERMINATOR2405};240624072408ACPI_DMTABLE_INFO AcpiDmTableInfoRimtIommuWire[] =2409{2410{ACPI_DMT_UINT32, ACPI_RIMTW_OFFSET (IrqNum), "Interrupt Number", 0},2411{ACPI_DMT_UINT32, ACPI_RIMTW_OFFSET (Flags), "Flags", 0},2412ACPI_DMT_TERMINATOR2413};24142415/* 1: PCIE Root Complex Node type */24162417ACPI_DMTABLE_INFO AcpiDmTableInfoRimtPcieRc[] =2418{2419{ACPI_DMT_UINT32, ACPI_RIMTP_OFFSET (Flags), "Flags", 0},2420{ACPI_DMT_UINT16, ACPI_RIMTP_OFFSET (Reserved), "Reserved", 0},2421{ACPI_DMT_UINT16, ACPI_RIMTP_OFFSET (PcieSegmentNumber), "PCIe Segment number", 0},2422{ACPI_DMT_UINT16, ACPI_RIMTP_OFFSET (IdMappingOffset), "ID mapping array offset", 0},2423{ACPI_DMT_UINT16, ACPI_RIMTP_OFFSET (NumIdMappings), "Number of ID mappings", 0},2424ACPI_DMT_TERMINATOR2425};24262427ACPI_DMTABLE_INFO AcpiDmTableInfoRimtIdMapping[] =2428{2429{ACPI_DMT_UINT32, ACPI_RIMTM_OFFSET (SourceIdBase), "Source ID Base", 0},2430{ACPI_DMT_UINT32, ACPI_RIMTM_OFFSET (NumIds), "Number of IDs", 0},2431{ACPI_DMT_UINT32, ACPI_RIMTM_OFFSET (DestIdBase), "Destination Device ID Base", 0},2432{ACPI_DMT_UINT32, ACPI_RIMTM_OFFSET (DestOffset), "Destination IOMMU Offset", 0},2433{ACPI_DMT_UINT32, ACPI_RIMTM_OFFSET (Flags), "Flags", 0},2434ACPI_DMT_TERMINATOR2435};24362437/* 2: Platform Device Node type */24382439ACPI_DMTABLE_INFO AcpiDmTableInfoRimtPlatDev[] =2440{2441{ACPI_DMT_UINT16, ACPI_RIMTN_OFFSET (IdMappingOffset), "ID mapping array offset", 0},2442{ACPI_DMT_UINT16, ACPI_RIMTN_OFFSET (NumIdMappings), "Number of ID mappings", 0},2443{ACPI_DMT_STRING, ACPI_RIMTN_OFFSET (DeviceName[0]), "Device Object Name", 0},2444ACPI_DMT_TERMINATOR2445};24462447ACPI_DMTABLE_INFO AcpiDmTableInfoRimtPlatDevPad[] =2448{2449{ACPI_DMT_RAW_BUFFER, 0, "Padding", DT_OPTIONAL},2450ACPI_DMT_TERMINATOR2451};245224532454/*******************************************************************************2455*2456* S3PT - S3 Performance Table2457*2458******************************************************************************/24592460ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt[] =2461{2462{ACPI_DMT_SIG, ACPI_S3PT_OFFSET (Signature[0]), "Signature", 0},2463{ACPI_DMT_UINT32, ACPI_S3PT_OFFSET (Length), "Length", DT_LENGTH},2464ACPI_DMT_TERMINATOR2465};24662467/* S3PT subtable header */24682469ACPI_DMTABLE_INFO AcpiDmTableInfoS3ptHdr[] =2470{2471{ACPI_DMT_UINT16, ACPI_S3PTH_OFFSET (Type), "Type", 0},2472{ACPI_DMT_UINT8, ACPI_S3PTH_OFFSET (Length), "Length", DT_LENGTH},2473{ACPI_DMT_UINT8, ACPI_S3PTH_OFFSET (Revision), "Revision", 0},2474ACPI_DMT_TERMINATOR2475};24762477/* 0: Basic S3 Resume Performance Record */24782479ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt0[] =2480{2481{ACPI_DMT_UINT32, ACPI_S3PT0_OFFSET (ResumeCount), "Resume Count", 0},2482{ACPI_DMT_UINT64, ACPI_S3PT0_OFFSET (FullResume), "Full Resume", 0},2483{ACPI_DMT_UINT64, ACPI_S3PT0_OFFSET (AverageResume), "Average Resume", 0},2484ACPI_DMT_TERMINATOR2485};24862487/* 1: Basic S3 Suspend Performance Record */24882489ACPI_DMTABLE_INFO AcpiDmTableInfoS3pt1[] =2490{2491{ACPI_DMT_UINT64, ACPI_S3PT1_OFFSET (SuspendStart), "Suspend Start", 0},2492{ACPI_DMT_UINT64, ACPI_S3PT1_OFFSET (SuspendEnd), "Suspend End", 0},2493ACPI_DMT_TERMINATOR2494};249524962497/*******************************************************************************2498*2499* SBST - Smart Battery Specification Table2500*2501******************************************************************************/25022503ACPI_DMTABLE_INFO AcpiDmTableInfoSbst[] =2504{2505{ACPI_DMT_UINT32, ACPI_SBST_OFFSET (WarningLevel), "Warning Level", 0},2506{ACPI_DMT_UINT32, ACPI_SBST_OFFSET (LowLevel), "Low Level", 0},2507{ACPI_DMT_UINT32, ACPI_SBST_OFFSET (CriticalLevel), "Critical Level", 0},2508ACPI_DMT_TERMINATOR2509};251025112512/*******************************************************************************2513*2514* SDEI - Software Delegated Exception Interface Descriptor Table2515*2516******************************************************************************/25172518ACPI_DMTABLE_INFO AcpiDmTableInfoSdei[] =2519{2520ACPI_DMT_TERMINATOR2521};252225232524/*******************************************************************************2525*2526* SDEV - Secure Devices Table (ACPI 6.2)2527*2528******************************************************************************/25292530ACPI_DMTABLE_INFO AcpiDmTableInfoSdev[] =2531{2532ACPI_DMT_TERMINATOR2533};25342535/* Common Subtable header (one per Subtable) */25362537ACPI_DMTABLE_INFO AcpiDmTableInfoSdevHdr[] =2538{2539{ACPI_DMT_SDEV, ACPI_SDEVH_OFFSET (Type), "Subtable Type", 0},2540{ACPI_DMT_UINT8, ACPI_SDEVH_OFFSET (Flags), "Flags (decoded below)", 0},2541{ACPI_DMT_FLAG0, ACPI_SDEVH_FLAG_OFFSET (Flags,0), "Allow handoff to unsecure OS", 0},2542{ACPI_DMT_FLAG1, ACPI_SDEVH_FLAG_OFFSET (Flags,0), "Secure access components present", 0},2543{ACPI_DMT_UINT16, ACPI_SDEVH_OFFSET (Length), "Length", DT_LENGTH},2544ACPI_DMT_TERMINATOR2545};25462547/* SDEV Subtables */25482549/* 0: Namespace Device Based Secure Device Structure */25502551ACPI_DMTABLE_INFO AcpiDmTableInfoSdev0[] =2552{2553{ACPI_DMT_UINT16, ACPI_SDEV0_OFFSET (DeviceIdOffset), "Device ID Offset", 0},2554{ACPI_DMT_UINT16, ACPI_SDEV0_OFFSET (DeviceIdLength), "Device ID Length", 0},2555{ACPI_DMT_UINT16, ACPI_SDEV0_OFFSET (VendorDataOffset), "Vendor Data Offset", 0},2556{ACPI_DMT_UINT16, ACPI_SDEV0_OFFSET (VendorDataLength), "Vendor Data Length", 0},2557ACPI_DMT_TERMINATOR2558};25592560ACPI_DMTABLE_INFO AcpiDmTableInfoSdev0a[] =2561{2562{ACPI_DMT_STRING, 0, "Namepath", 0},2563ACPI_DMT_TERMINATOR2564};25652566ACPI_DMTABLE_INFO AcpiDmTableInfoSdev0b[] =2567{2568{ACPI_DMT_UINT16, ACPI_SDEV0B_OFFSET (SecureComponentOffset), "Secure Access Components Offset", 0},2569{ACPI_DMT_UINT16, ACPI_SDEV0B_OFFSET (SecureComponentLength), "Secure Access Components Length", 0},2570ACPI_DMT_TERMINATOR2571};25722573/* Secure access components */25742575/* Common secure access components header secure access component */25762577ACPI_DMTABLE_INFO AcpiDmTableInfoSdevSecCompHdr[] =2578{2579{ACPI_DMT_UINT8, ACPI_SDEVCH_OFFSET (Type), "Secure Component Type", 0},2580{ACPI_DMT_UINT8, ACPI_SDEVCH_OFFSET (Flags), "Flags (decoded below)", 0},2581{ACPI_DMT_UINT16, ACPI_SDEVCH_OFFSET (Length), "Length", 0},2582ACPI_DMT_TERMINATOR2583};25842585/* 0: Identification Based Secure Access Component */25862587ACPI_DMTABLE_INFO AcpiDmTableInfoSdevSecCompId[] =2588{2589{ACPI_DMT_UINT16, ACPI_SDEVC0_OFFSET (HardwareIdOffset), "Hardware ID Offset", 0},2590{ACPI_DMT_UINT16, ACPI_SDEVC0_OFFSET (HardwareIdLength), "Hardware ID Length", 0},2591{ACPI_DMT_UINT16, ACPI_SDEVC0_OFFSET (SubsystemIdOffset), "Subsystem ID Offset", 0},2592{ACPI_DMT_UINT16, ACPI_SDEVC0_OFFSET (SubsystemIdLength), "Subsystem ID Length", 0},2593{ACPI_DMT_UINT16, ACPI_SDEVC0_OFFSET (HardwareRevision), "Hardware Revision", 0},2594{ACPI_DMT_UINT8, ACPI_SDEVC0_OFFSET (HardwareRevPresent), "Hardware Rev Present", 0},2595{ACPI_DMT_UINT8, ACPI_SDEVC0_OFFSET (ClassCodePresent), "Class Code Present", 0},2596{ACPI_DMT_UINT8, ACPI_SDEVC0_OFFSET (PciBaseClass), "PCI Base Class", 0},2597{ACPI_DMT_UINT8, ACPI_SDEVC0_OFFSET (PciSubClass), "PCI SubClass", 0},2598{ACPI_DMT_UINT8, ACPI_SDEVC0_OFFSET (PciProgrammingXface), "PCI Programming Xface", 0},2599ACPI_DMT_TERMINATOR2600};26012602/* 1: Memory Based Secure Access Component */26032604ACPI_DMTABLE_INFO AcpiDmTableInfoSdevSecCompMem[] =2605{2606{ACPI_DMT_UINT32, ACPI_SDEVC1_OFFSET (Reserved), "Reserved", 0},2607{ACPI_DMT_UINT64, ACPI_SDEVC1_OFFSET (MemoryBaseAddress), "Memory Base Address", 0},2608{ACPI_DMT_UINT64, ACPI_SDEVC1_OFFSET (MemoryLength), "Memory Length", 0},2609ACPI_DMT_TERMINATOR2610};261126122613/* 1: PCIe Endpoint Device Based Device Structure */26142615ACPI_DMTABLE_INFO AcpiDmTableInfoSdev1[] =2616{2617{ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (Segment), "Segment", 0},2618{ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (StartBus), "Start Bus", 0},2619{ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (PathOffset), "Path Offset", 0},2620{ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (PathLength), "Path Length", 0},2621{ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (VendorDataOffset), "Vendor Data Offset", 0},2622{ACPI_DMT_UINT16, ACPI_SDEV1_OFFSET (VendorDataLength), "Vendor Data Length", 0},2623ACPI_DMT_TERMINATOR2624};26252626ACPI_DMTABLE_INFO AcpiDmTableInfoSdev1a[] =2627{2628{ACPI_DMT_UINT8, ACPI_SDEV1A_OFFSET (Device), "Device", 0},2629{ACPI_DMT_UINT8, ACPI_SDEV1A_OFFSET (Function), "Function", 0},2630ACPI_DMT_TERMINATOR2631};26322633ACPI_DMTABLE_INFO AcpiDmTableInfoSdev1b[] =2634{2635{ACPI_DMT_RAW_BUFFER, 0, "Vendor Data", 0}, /*, DT_OPTIONAL}, */2636ACPI_DMT_TERMINATOR2637};26382639/*! [End] no source code translation !*/264026412642