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freebsd
GitHub Repository: freebsd/freebsd-src
Path: blob/main/sys/contrib/dev/athk/ath10k/core.c
105221 views
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// SPDX-License-Identifier: ISC
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/*
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* Copyright (c) 2005-2011 Atheros Communications Inc.
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* Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
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* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
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* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
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*/
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#if defined(__FreeBSD__)
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#define LINUXKPI_PARAM_PREFIX ath10k_core_
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#endif
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#include <linux/export.h>
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#include <linux/module.h>
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#include <linux/firmware.h>
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#include <linux/of.h>
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#include <linux/property.h>
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#include <linux/dmi.h>
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#include <linux/ctype.h>
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#include <linux/pm_qos.h>
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#include <linux/nvmem-consumer.h>
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#include <asm/byteorder.h>
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#include "core.h"
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#include "mac.h"
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#include "htc.h"
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#include "hif.h"
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#include "wmi.h"
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#include "bmi.h"
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#include "debug.h"
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#include "htt.h"
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#include "testmode.h"
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#include "wmi-ops.h"
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#include "coredump.h"
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#if defined(CONFIG_FWLOG)
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#include "fwlog.h"
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#endif
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#include "leds.h"
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unsigned int ath10k_debug_mask;
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EXPORT_SYMBOL(ath10k_debug_mask);
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static unsigned int ath10k_cryptmode_param;
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static bool uart_print;
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static bool skip_otp;
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static bool fw_diag_log;
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/* frame mode values are mapped as per enum ath10k_hw_txrx_mode */
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unsigned int ath10k_frame_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
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unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) |
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BIT(ATH10K_FW_CRASH_DUMP_CE_DATA);
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/* FIXME: most of these should be readonly */
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module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
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module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
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module_param(uart_print, bool, 0644);
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module_param(skip_otp, bool, 0644);
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module_param(fw_diag_log, bool, 0644);
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module_param_named(frame_mode, ath10k_frame_mode, uint, 0644);
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module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444);
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MODULE_PARM_DESC(debug_mask, "Debugging mask");
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MODULE_PARM_DESC(uart_print, "Uart target debugging");
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MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
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MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
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MODULE_PARM_DESC(frame_mode,
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"Datapath frame mode (0: raw, 1: native wifi (default), 2: ethernet)");
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MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file");
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MODULE_PARM_DESC(fw_diag_log, "Diag based fw log debugging");
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static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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{
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.id = QCA988X_HW_2_0_VERSION,
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.dev_id = QCA988X_2_0_DEVICE_ID,
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.bus = ATH10K_BUS_PCI,
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.name = "qca988x hw2.0",
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.patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
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.uart_pin = 7,
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.led_pin = 1,
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.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
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.otp_exe_param = 0,
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.channel_counters_freq_hz = 88000,
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.max_probe_resp_desc_thres = 0,
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.cal_data_len = 2116,
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.fw = {
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.dir = QCA988X_HW_2_0_FW_DIR,
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.board_size = QCA988X_BOARD_DATA_SZ,
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.board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
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},
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.rx_desc_ops = &qca988x_rx_desc_ops,
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.hw_ops = &qca988x_ops,
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.decap_align_bytes = 4,
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.spectral_bin_discard = 0,
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.spectral_bin_offset = 0,
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.vht160_mcs_rx_highest = 0,
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.vht160_mcs_tx_highest = 0,
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.n_cipher_suites = 8,
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.ast_skid_limit = 0x10,
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.num_wds_entries = 0x20,
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.target_64bit = false,
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.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
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.shadow_reg_support = false,
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.rri_on_ddr = false,
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.hw_filter_reset_required = true,
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.fw_diag_ce_download = false,
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.credit_size_workaround = false,
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.tx_stats_over_pktlog = true,
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.dynamic_sar_support = false,
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.hw_restart_disconnect = false,
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.use_fw_tx_credits = true,
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.delay_unmap_buffer = false,
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.mcast_frame_registration = false,
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},
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{
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.id = QCA988X_HW_2_0_VERSION,
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.dev_id = QCA988X_2_0_DEVICE_ID_UBNT,
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.name = "qca988x hw2.0 ubiquiti",
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.patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
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.uart_pin = 7,
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.led_pin = 0,
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.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
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.otp_exe_param = 0,
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.channel_counters_freq_hz = 88000,
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.max_probe_resp_desc_thres = 0,
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.cal_data_len = 2116,
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.fw = {
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.dir = QCA988X_HW_2_0_FW_DIR,
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.board_size = QCA988X_BOARD_DATA_SZ,
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.board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
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},
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.rx_desc_ops = &qca988x_rx_desc_ops,
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.hw_ops = &qca988x_ops,
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.decap_align_bytes = 4,
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.spectral_bin_discard = 0,
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.spectral_bin_offset = 0,
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.vht160_mcs_rx_highest = 0,
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.vht160_mcs_tx_highest = 0,
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.n_cipher_suites = 8,
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.ast_skid_limit = 0x10,
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.num_wds_entries = 0x20,
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.target_64bit = false,
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.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
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.shadow_reg_support = false,
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.rri_on_ddr = false,
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.hw_filter_reset_required = true,
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.fw_diag_ce_download = false,
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.credit_size_workaround = false,
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.tx_stats_over_pktlog = true,
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.dynamic_sar_support = false,
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.hw_restart_disconnect = false,
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.use_fw_tx_credits = true,
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.delay_unmap_buffer = false,
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.mcast_frame_registration = false,
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},
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{
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.id = QCA9887_HW_1_0_VERSION,
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.dev_id = QCA9887_1_0_DEVICE_ID,
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.bus = ATH10K_BUS_PCI,
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.name = "qca9887 hw1.0",
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.patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
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.uart_pin = 7,
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.led_pin = 1,
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.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
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.otp_exe_param = 0,
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.channel_counters_freq_hz = 88000,
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.max_probe_resp_desc_thres = 0,
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.cal_data_len = 2116,
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.fw = {
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.dir = QCA9887_HW_1_0_FW_DIR,
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.board_size = QCA9887_BOARD_DATA_SZ,
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.board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
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},
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.rx_desc_ops = &qca988x_rx_desc_ops,
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.hw_ops = &qca988x_ops,
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.decap_align_bytes = 4,
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.spectral_bin_discard = 0,
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.spectral_bin_offset = 0,
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.vht160_mcs_rx_highest = 0,
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.vht160_mcs_tx_highest = 0,
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.n_cipher_suites = 8,
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.ast_skid_limit = 0x10,
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.num_wds_entries = 0x20,
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.target_64bit = false,
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.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
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.shadow_reg_support = false,
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.rri_on_ddr = false,
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.hw_filter_reset_required = true,
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.fw_diag_ce_download = false,
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.credit_size_workaround = false,
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.tx_stats_over_pktlog = false,
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.dynamic_sar_support = false,
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.hw_restart_disconnect = false,
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.use_fw_tx_credits = true,
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.delay_unmap_buffer = false,
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.mcast_frame_registration = false,
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},
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{
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.id = QCA6174_HW_3_2_VERSION,
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.dev_id = QCA6174_3_2_DEVICE_ID,
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.bus = ATH10K_BUS_SDIO,
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.name = "qca6174 hw3.2 sdio",
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.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
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.uart_pin = 19,
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.led_pin = 0,
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.otp_exe_param = 0,
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.channel_counters_freq_hz = 88000,
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.max_probe_resp_desc_thres = 0,
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.cal_data_len = 0,
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.fw = {
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.dir = QCA6174_HW_3_0_FW_DIR,
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.board_size = QCA6174_BOARD_DATA_SZ,
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.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
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},
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.rx_desc_ops = &qca988x_rx_desc_ops,
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.hw_ops = &qca6174_sdio_ops,
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.hw_clk = qca6174_clk,
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.target_cpu_freq = 176000000,
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.decap_align_bytes = 4,
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.n_cipher_suites = 8,
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.num_peers = 10,
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.ast_skid_limit = 0x10,
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.num_wds_entries = 0x20,
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.uart_pin_workaround = true,
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.tx_stats_over_pktlog = false,
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.credit_size_workaround = false,
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.bmi_large_size_download = true,
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.supports_peer_stats_info = true,
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.dynamic_sar_support = true,
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.hw_restart_disconnect = false,
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.use_fw_tx_credits = true,
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.delay_unmap_buffer = false,
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.mcast_frame_registration = false,
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},
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{
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.id = QCA6174_HW_2_1_VERSION,
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.dev_id = QCA6164_2_1_DEVICE_ID,
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.bus = ATH10K_BUS_PCI,
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.name = "qca6164 hw2.1",
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.patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
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.uart_pin = 6,
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.led_pin = 0,
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.otp_exe_param = 0,
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.channel_counters_freq_hz = 88000,
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.max_probe_resp_desc_thres = 0,
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.cal_data_len = 8124,
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.fw = {
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.dir = QCA6174_HW_2_1_FW_DIR,
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.board_size = QCA6174_BOARD_DATA_SZ,
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.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
251
},
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.rx_desc_ops = &qca988x_rx_desc_ops,
253
.hw_ops = &qca988x_ops,
254
.decap_align_bytes = 4,
255
.spectral_bin_discard = 0,
256
.spectral_bin_offset = 0,
257
.vht160_mcs_rx_highest = 0,
258
.vht160_mcs_tx_highest = 0,
259
.n_cipher_suites = 8,
260
.ast_skid_limit = 0x10,
261
.num_wds_entries = 0x20,
262
.target_64bit = false,
263
.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
264
.shadow_reg_support = false,
265
.rri_on_ddr = false,
266
.hw_filter_reset_required = true,
267
.fw_diag_ce_download = false,
268
.credit_size_workaround = false,
269
.tx_stats_over_pktlog = false,
270
.dynamic_sar_support = false,
271
.hw_restart_disconnect = false,
272
.use_fw_tx_credits = true,
273
.delay_unmap_buffer = false,
274
.mcast_frame_registration = false,
275
},
276
{
277
.id = QCA6174_HW_2_1_VERSION,
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.dev_id = QCA6174_2_1_DEVICE_ID,
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.bus = ATH10K_BUS_PCI,
280
.name = "qca6174 hw2.1",
281
.patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
282
.uart_pin = 6,
283
.led_pin = 0,
284
.otp_exe_param = 0,
285
.channel_counters_freq_hz = 88000,
286
.max_probe_resp_desc_thres = 0,
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.cal_data_len = 8124,
288
.fw = {
289
.dir = QCA6174_HW_2_1_FW_DIR,
290
.board_size = QCA6174_BOARD_DATA_SZ,
291
.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
292
},
293
.rx_desc_ops = &qca988x_rx_desc_ops,
294
.hw_ops = &qca988x_ops,
295
.decap_align_bytes = 4,
296
.spectral_bin_discard = 0,
297
.spectral_bin_offset = 0,
298
.vht160_mcs_rx_highest = 0,
299
.vht160_mcs_tx_highest = 0,
300
.n_cipher_suites = 8,
301
.ast_skid_limit = 0x10,
302
.num_wds_entries = 0x20,
303
.target_64bit = false,
304
.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
305
.shadow_reg_support = false,
306
.rri_on_ddr = false,
307
.hw_filter_reset_required = true,
308
.fw_diag_ce_download = false,
309
.credit_size_workaround = false,
310
.tx_stats_over_pktlog = false,
311
.dynamic_sar_support = false,
312
.hw_restart_disconnect = false,
313
.use_fw_tx_credits = true,
314
.delay_unmap_buffer = false,
315
.mcast_frame_registration = false,
316
},
317
{
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.id = QCA6174_HW_3_0_VERSION,
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.dev_id = QCA6174_2_1_DEVICE_ID,
320
.bus = ATH10K_BUS_PCI,
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.name = "qca6174 hw3.0",
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.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
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.uart_pin = 6,
324
.led_pin = 0,
325
.otp_exe_param = 0,
326
.channel_counters_freq_hz = 88000,
327
.max_probe_resp_desc_thres = 0,
328
.cal_data_len = 8124,
329
.fw = {
330
.dir = QCA6174_HW_3_0_FW_DIR,
331
.board_size = QCA6174_BOARD_DATA_SZ,
332
.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
333
},
334
.rx_desc_ops = &qca988x_rx_desc_ops,
335
.hw_ops = &qca988x_ops,
336
.decap_align_bytes = 4,
337
.spectral_bin_discard = 0,
338
.spectral_bin_offset = 0,
339
.vht160_mcs_rx_highest = 0,
340
.vht160_mcs_tx_highest = 0,
341
.n_cipher_suites = 8,
342
.ast_skid_limit = 0x10,
343
.num_wds_entries = 0x20,
344
.target_64bit = false,
345
.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
346
.shadow_reg_support = false,
347
.rri_on_ddr = false,
348
.hw_filter_reset_required = true,
349
.fw_diag_ce_download = false,
350
.credit_size_workaround = false,
351
.tx_stats_over_pktlog = false,
352
.dynamic_sar_support = false,
353
.hw_restart_disconnect = false,
354
.use_fw_tx_credits = true,
355
.delay_unmap_buffer = false,
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.mcast_frame_registration = false,
357
},
358
{
359
.id = QCA6174_HW_3_2_VERSION,
360
.dev_id = QCA6174_2_1_DEVICE_ID,
361
.bus = ATH10K_BUS_PCI,
362
.name = "qca6174 hw3.2",
363
.patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
364
.uart_pin = 6,
365
.led_pin = 0,
366
.otp_exe_param = 0,
367
.channel_counters_freq_hz = 88000,
368
.max_probe_resp_desc_thres = 0,
369
.cal_data_len = 8124,
370
.fw = {
371
/* uses same binaries as hw3.0 */
372
.dir = QCA6174_HW_3_0_FW_DIR,
373
.board_size = QCA6174_BOARD_DATA_SZ,
374
.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
375
},
376
.rx_desc_ops = &qca988x_rx_desc_ops,
377
.hw_ops = &qca6174_ops,
378
.hw_clk = qca6174_clk,
379
.target_cpu_freq = 176000000,
380
.decap_align_bytes = 4,
381
.spectral_bin_discard = 0,
382
.spectral_bin_offset = 0,
383
.vht160_mcs_rx_highest = 0,
384
.vht160_mcs_tx_highest = 0,
385
.n_cipher_suites = 8,
386
.ast_skid_limit = 0x10,
387
.num_wds_entries = 0x20,
388
.target_64bit = false,
389
.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
390
.shadow_reg_support = false,
391
.rri_on_ddr = false,
392
.hw_filter_reset_required = true,
393
.fw_diag_ce_download = true,
394
.credit_size_workaround = false,
395
.tx_stats_over_pktlog = false,
396
.supports_peer_stats_info = true,
397
.dynamic_sar_support = true,
398
.hw_restart_disconnect = false,
399
.use_fw_tx_credits = true,
400
.delay_unmap_buffer = false,
401
.mcast_frame_registration = true,
402
},
403
{
404
.id = QCA99X0_HW_2_0_DEV_VERSION,
405
.dev_id = QCA99X0_2_0_DEVICE_ID,
406
.bus = ATH10K_BUS_PCI,
407
.name = "qca99x0 hw2.0",
408
.patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
409
.uart_pin = 7,
410
.led_pin = 17,
411
.otp_exe_param = 0x00000700,
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.continuous_frag_desc = true,
413
.cck_rate_map_rev2 = true,
414
.channel_counters_freq_hz = 150000,
415
.max_probe_resp_desc_thres = 24,
416
.tx_chain_mask = 0xf,
417
.rx_chain_mask = 0xf,
418
.max_spatial_stream = 4,
419
.cal_data_len = 12064,
420
.fw = {
421
.dir = QCA99X0_HW_2_0_FW_DIR,
422
.board_size = QCA99X0_BOARD_DATA_SZ,
423
.board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
424
},
425
.sw_decrypt_mcast_mgmt = true,
426
.rx_desc_ops = &qca99x0_rx_desc_ops,
427
.hw_ops = &qca99x0_ops,
428
.decap_align_bytes = 1,
429
.spectral_bin_discard = 4,
430
.spectral_bin_offset = 0,
431
.vht160_mcs_rx_highest = 0,
432
.vht160_mcs_tx_highest = 0,
433
.n_cipher_suites = 11,
434
.ast_skid_limit = 0x10,
435
.num_wds_entries = 0x20,
436
.target_64bit = false,
437
.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
438
.shadow_reg_support = false,
439
.rri_on_ddr = false,
440
.hw_filter_reset_required = true,
441
.fw_diag_ce_download = false,
442
.credit_size_workaround = false,
443
.tx_stats_over_pktlog = false,
444
.dynamic_sar_support = false,
445
.hw_restart_disconnect = false,
446
.use_fw_tx_credits = true,
447
.delay_unmap_buffer = false,
448
.mcast_frame_registration = false,
449
},
450
{
451
.id = QCA9984_HW_1_0_DEV_VERSION,
452
.dev_id = QCA9984_1_0_DEVICE_ID,
453
.bus = ATH10K_BUS_PCI,
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.name = "qca9984/qca9994 hw1.0",
455
.patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
456
.uart_pin = 7,
457
.led_pin = 17,
458
.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
459
.otp_exe_param = 0x00000700,
460
.continuous_frag_desc = true,
461
.cck_rate_map_rev2 = true,
462
.channel_counters_freq_hz = 150000,
463
.max_probe_resp_desc_thres = 24,
464
.tx_chain_mask = 0xf,
465
.rx_chain_mask = 0xf,
466
.max_spatial_stream = 4,
467
.cal_data_len = 12064,
468
.fw = {
469
.dir = QCA9984_HW_1_0_FW_DIR,
470
.board_size = QCA99X0_BOARD_DATA_SZ,
471
.board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
472
.ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ,
473
},
474
.sw_decrypt_mcast_mgmt = true,
475
.rx_desc_ops = &qca99x0_rx_desc_ops,
476
.hw_ops = &qca99x0_ops,
477
.decap_align_bytes = 1,
478
.spectral_bin_discard = 12,
479
.spectral_bin_offset = 8,
480
481
/* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz
482
* or 2x2 160Mhz, long-guard-interval.
483
*/
484
.vht160_mcs_rx_highest = 1560,
485
.vht160_mcs_tx_highest = 1560,
486
.n_cipher_suites = 11,
487
.ast_skid_limit = 0x10,
488
.num_wds_entries = 0x20,
489
.target_64bit = false,
490
.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
491
.shadow_reg_support = false,
492
.rri_on_ddr = false,
493
.hw_filter_reset_required = true,
494
.fw_diag_ce_download = false,
495
.credit_size_workaround = false,
496
.tx_stats_over_pktlog = false,
497
.dynamic_sar_support = false,
498
.hw_restart_disconnect = false,
499
.use_fw_tx_credits = true,
500
.delay_unmap_buffer = false,
501
.mcast_frame_registration = false,
502
},
503
{
504
.id = QCA9888_HW_2_0_DEV_VERSION,
505
.dev_id = QCA9888_2_0_DEVICE_ID,
506
.bus = ATH10K_BUS_PCI,
507
.name = "qca9888 hw2.0",
508
.patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
509
.uart_pin = 7,
510
.led_pin = 17,
511
.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
512
.otp_exe_param = 0x00000700,
513
.continuous_frag_desc = true,
514
.channel_counters_freq_hz = 150000,
515
.max_probe_resp_desc_thres = 24,
516
.tx_chain_mask = 3,
517
.rx_chain_mask = 3,
518
.max_spatial_stream = 2,
519
.cal_data_len = 12064,
520
.fw = {
521
.dir = QCA9888_HW_2_0_FW_DIR,
522
.board_size = QCA99X0_BOARD_DATA_SZ,
523
.board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
524
},
525
.sw_decrypt_mcast_mgmt = true,
526
.rx_desc_ops = &qca99x0_rx_desc_ops,
527
.hw_ops = &qca99x0_ops,
528
.decap_align_bytes = 1,
529
.spectral_bin_discard = 12,
530
.spectral_bin_offset = 8,
531
532
/* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or
533
* 1x1 160Mhz, long-guard-interval.
534
*/
535
.vht160_mcs_rx_highest = 780,
536
.vht160_mcs_tx_highest = 780,
537
.n_cipher_suites = 11,
538
.ast_skid_limit = 0x10,
539
.num_wds_entries = 0x20,
540
.target_64bit = false,
541
.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
542
.shadow_reg_support = false,
543
.rri_on_ddr = false,
544
.hw_filter_reset_required = true,
545
.fw_diag_ce_download = false,
546
.credit_size_workaround = false,
547
.tx_stats_over_pktlog = false,
548
.dynamic_sar_support = false,
549
.hw_restart_disconnect = false,
550
.use_fw_tx_credits = true,
551
.delay_unmap_buffer = false,
552
.mcast_frame_registration = false,
553
},
554
{
555
.id = QCA9377_HW_1_0_DEV_VERSION,
556
.dev_id = QCA9377_1_0_DEVICE_ID,
557
.bus = ATH10K_BUS_PCI,
558
.name = "qca9377 hw1.0",
559
.patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
560
.uart_pin = 6,
561
.led_pin = 0,
562
.otp_exe_param = 0,
563
.channel_counters_freq_hz = 88000,
564
.max_probe_resp_desc_thres = 0,
565
.cal_data_len = 8124,
566
.fw = {
567
.dir = QCA9377_HW_1_0_FW_DIR,
568
.board_size = QCA9377_BOARD_DATA_SZ,
569
.board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
570
},
571
.rx_desc_ops = &qca988x_rx_desc_ops,
572
.hw_ops = &qca988x_ops,
573
.decap_align_bytes = 4,
574
.spectral_bin_discard = 0,
575
.spectral_bin_offset = 0,
576
.vht160_mcs_rx_highest = 0,
577
.vht160_mcs_tx_highest = 0,
578
.n_cipher_suites = 8,
579
.ast_skid_limit = 0x10,
580
.num_wds_entries = 0x20,
581
.target_64bit = false,
582
.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
583
.shadow_reg_support = false,
584
.rri_on_ddr = false,
585
.hw_filter_reset_required = true,
586
.fw_diag_ce_download = false,
587
.credit_size_workaround = false,
588
.tx_stats_over_pktlog = false,
589
.dynamic_sar_support = false,
590
.hw_restart_disconnect = false,
591
.use_fw_tx_credits = true,
592
.delay_unmap_buffer = false,
593
.mcast_frame_registration = false,
594
},
595
{
596
.id = QCA9377_HW_1_1_DEV_VERSION,
597
.dev_id = QCA9377_1_0_DEVICE_ID,
598
.bus = ATH10K_BUS_PCI,
599
.name = "qca9377 hw1.1",
600
.patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
601
.uart_pin = 6,
602
.led_pin = 0,
603
.otp_exe_param = 0,
604
.channel_counters_freq_hz = 88000,
605
.max_probe_resp_desc_thres = 0,
606
.cal_data_len = 8124,
607
.fw = {
608
.dir = QCA9377_HW_1_0_FW_DIR,
609
.board_size = QCA9377_BOARD_DATA_SZ,
610
.board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
611
},
612
.rx_desc_ops = &qca988x_rx_desc_ops,
613
.hw_ops = &qca6174_ops,
614
.hw_clk = qca6174_clk,
615
.target_cpu_freq = 176000000,
616
.decap_align_bytes = 4,
617
.spectral_bin_discard = 0,
618
.spectral_bin_offset = 0,
619
.vht160_mcs_rx_highest = 0,
620
.vht160_mcs_tx_highest = 0,
621
.n_cipher_suites = 8,
622
.ast_skid_limit = 0x10,
623
.num_wds_entries = 0x20,
624
.target_64bit = false,
625
.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
626
.shadow_reg_support = false,
627
.rri_on_ddr = false,
628
.hw_filter_reset_required = true,
629
.fw_diag_ce_download = true,
630
.credit_size_workaround = false,
631
.tx_stats_over_pktlog = false,
632
.dynamic_sar_support = false,
633
.hw_restart_disconnect = false,
634
.use_fw_tx_credits = true,
635
.delay_unmap_buffer = false,
636
.mcast_frame_registration = false,
637
},
638
{
639
.id = QCA9377_HW_1_1_DEV_VERSION,
640
.dev_id = QCA9377_1_0_DEVICE_ID,
641
.bus = ATH10K_BUS_SDIO,
642
.name = "qca9377 hw1.1 sdio",
643
.patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
644
.uart_pin = 19,
645
.led_pin = 0,
646
.otp_exe_param = 0,
647
.channel_counters_freq_hz = 88000,
648
.max_probe_resp_desc_thres = 0,
649
.cal_data_len = 8124,
650
.fw = {
651
.dir = QCA9377_HW_1_0_FW_DIR,
652
.board_size = QCA9377_BOARD_DATA_SZ,
653
.board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
654
},
655
.rx_desc_ops = &qca988x_rx_desc_ops,
656
.hw_ops = &qca6174_ops,
657
.hw_clk = qca6174_clk,
658
.target_cpu_freq = 176000000,
659
.decap_align_bytes = 4,
660
.n_cipher_suites = 8,
661
.num_peers = TARGET_QCA9377_HL_NUM_PEERS,
662
.ast_skid_limit = 0x10,
663
.num_wds_entries = 0x20,
664
.uart_pin_workaround = true,
665
.credit_size_workaround = true,
666
.dynamic_sar_support = false,
667
.hw_restart_disconnect = false,
668
.use_fw_tx_credits = true,
669
.delay_unmap_buffer = false,
670
.mcast_frame_registration = false,
671
},
672
{
673
.id = QCA4019_HW_1_0_DEV_VERSION,
674
.dev_id = 0,
675
.bus = ATH10K_BUS_AHB,
676
.name = "qca4019 hw1.0",
677
.patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
678
.uart_pin = 7,
679
.led_pin = 0,
680
.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
681
.otp_exe_param = 0x0010000,
682
.continuous_frag_desc = true,
683
.cck_rate_map_rev2 = true,
684
.channel_counters_freq_hz = 125000,
685
.max_probe_resp_desc_thres = 24,
686
.tx_chain_mask = 0x3,
687
.rx_chain_mask = 0x3,
688
.max_spatial_stream = 2,
689
.cal_data_len = 12064,
690
.fw = {
691
.dir = QCA4019_HW_1_0_FW_DIR,
692
.board_size = QCA4019_BOARD_DATA_SZ,
693
.board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
694
},
695
.sw_decrypt_mcast_mgmt = true,
696
.rx_desc_ops = &qca99x0_rx_desc_ops,
697
.hw_ops = &qca99x0_ops,
698
.decap_align_bytes = 1,
699
.spectral_bin_discard = 4,
700
.spectral_bin_offset = 0,
701
.vht160_mcs_rx_highest = 0,
702
.vht160_mcs_tx_highest = 0,
703
.n_cipher_suites = 11,
704
.ast_skid_limit = 0x10,
705
.num_wds_entries = 0x20,
706
.target_64bit = false,
707
.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL,
708
.shadow_reg_support = false,
709
.rri_on_ddr = false,
710
.hw_filter_reset_required = true,
711
.fw_diag_ce_download = false,
712
.credit_size_workaround = false,
713
.tx_stats_over_pktlog = false,
714
.dynamic_sar_support = false,
715
.hw_restart_disconnect = false,
716
.use_fw_tx_credits = true,
717
.delay_unmap_buffer = false,
718
.mcast_frame_registration = false,
719
},
720
{
721
.id = WCN3990_HW_1_0_DEV_VERSION,
722
.dev_id = 0,
723
.bus = ATH10K_BUS_SNOC,
724
.name = "wcn3990 hw1.0",
725
.led_pin = 0,
726
.continuous_frag_desc = true,
727
.tx_chain_mask = 0x7,
728
.rx_chain_mask = 0x7,
729
.max_spatial_stream = 4,
730
.fw = {
731
.dir = WCN3990_HW_1_0_FW_DIR,
732
.board_size = WCN3990_BOARD_DATA_SZ,
733
.board_ext_size = WCN3990_BOARD_EXT_DATA_SZ,
734
},
735
.sw_decrypt_mcast_mgmt = true,
736
.rx_desc_ops = &wcn3990_rx_desc_ops,
737
.hw_ops = &wcn3990_ops,
738
.decap_align_bytes = 1,
739
.num_peers = TARGET_HL_TLV_NUM_PEERS,
740
.n_cipher_suites = 11,
741
.ast_skid_limit = TARGET_HL_TLV_AST_SKID_LIMIT,
742
.num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES,
743
.target_64bit = true,
744
.rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC,
745
.shadow_reg_support = true,
746
.rri_on_ddr = true,
747
.hw_filter_reset_required = false,
748
.fw_diag_ce_download = false,
749
.credit_size_workaround = false,
750
.tx_stats_over_pktlog = false,
751
.dynamic_sar_support = true,
752
.hw_restart_disconnect = true,
753
.use_fw_tx_credits = false,
754
.delay_unmap_buffer = true,
755
.mcast_frame_registration = false,
756
},
757
};
758
759
static const char *const ath10k_core_fw_feature_str[] = {
760
[ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
761
[ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
762
[ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
763
[ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
764
[ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
765
[ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
766
[ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
767
[ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
768
[ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
769
[ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
770
[ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
771
[ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
772
[ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
773
[ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
774
[ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
775
[ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
776
[ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast",
777
[ATH10K_FW_FEATURE_NO_PS] = "no-ps",
778
[ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference",
779
[ATH10K_FW_FEATURE_NON_BMI] = "non-bmi",
780
[ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel",
781
[ATH10K_FW_FEATURE_PEER_FIXED_RATE] = "peer-fixed-rate",
782
[ATH10K_FW_FEATURE_IRAM_RECOVERY] = "iram-recovery",
783
};
784
785
static unsigned int ath10k_core_get_fw_feature_str(char *buf,
786
size_t buf_len,
787
enum ath10k_fw_features feat)
788
{
789
/* make sure that ath10k_core_fw_feature_str[] gets updated */
790
BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
791
ATH10K_FW_FEATURE_COUNT);
792
793
if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
794
WARN_ON(!ath10k_core_fw_feature_str[feat])) {
795
return scnprintf(buf, buf_len, "bit%d", feat);
796
}
797
798
return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
799
}
800
801
void ath10k_core_get_fw_features_str(struct ath10k *ar,
802
char *buf,
803
size_t buf_len)
804
{
805
size_t len = 0;
806
int i;
807
808
for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
809
if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
810
if (len > 0)
811
len += scnprintf(buf + len, buf_len - len, ",");
812
813
len += ath10k_core_get_fw_feature_str(buf + len,
814
buf_len - len,
815
i);
816
}
817
}
818
}
819
820
static void ath10k_send_suspend_complete(struct ath10k *ar)
821
{
822
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
823
824
complete(&ar->target_suspend);
825
}
826
827
static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode)
828
{
829
bool mtu_workaround = ar->hw_params.credit_size_workaround;
830
int ret;
831
u32 param = 0;
832
833
ret = ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256);
834
if (ret)
835
return ret;
836
837
ret = ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99);
838
if (ret)
839
return ret;
840
841
ret = ath10k_bmi_read32(ar, hi_acs_flags, &param);
842
if (ret)
843
return ret;
844
845
param |= HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET;
846
847
if (mode == ATH10K_FIRMWARE_MODE_NORMAL && !mtu_workaround)
848
param |= HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
849
else
850
param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE;
851
852
if (mode == ATH10K_FIRMWARE_MODE_UTF)
853
param &= ~HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
854
else
855
param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;
856
857
ret = ath10k_bmi_write32(ar, hi_acs_flags, param);
858
if (ret)
859
return ret;
860
861
ret = ath10k_bmi_read32(ar, hi_option_flag2, &param);
862
if (ret)
863
return ret;
864
865
param |= HI_OPTION_SDIO_CRASH_DUMP_ENHANCEMENT_HOST;
866
867
ret = ath10k_bmi_write32(ar, hi_option_flag2, param);
868
if (ret)
869
return ret;
870
871
return 0;
872
}
873
874
static int ath10k_init_configure_target(struct ath10k *ar)
875
{
876
u32 param_host;
877
int ret;
878
879
/* tell target which HTC version it is used*/
880
ret = ath10k_bmi_write32(ar, hi_app_host_interest,
881
HTC_PROTOCOL_VERSION);
882
if (ret) {
883
ath10k_err(ar, "settings HTC version failed\n");
884
return ret;
885
}
886
887
/* set the firmware mode to STA/IBSS/AP */
888
ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
889
if (ret) {
890
ath10k_err(ar, "setting firmware mode (1/2) failed\n");
891
return ret;
892
}
893
894
/* TODO following parameters need to be re-visited. */
895
/* num_device */
896
param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
897
/* Firmware mode */
898
/* FIXME: Why FW_MODE_AP ??.*/
899
param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
900
/* mac_addr_method */
901
param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
902
/* firmware_bridge */
903
param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
904
/* fwsubmode */
905
param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
906
907
ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
908
if (ret) {
909
ath10k_err(ar, "setting firmware mode (2/2) failed\n");
910
return ret;
911
}
912
913
/* We do all byte-swapping on the host */
914
ret = ath10k_bmi_write32(ar, hi_be, 0);
915
if (ret) {
916
ath10k_err(ar, "setting host CPU BE mode failed\n");
917
return ret;
918
}
919
920
/* FW descriptor/Data swap flags */
921
ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
922
923
if (ret) {
924
ath10k_err(ar, "setting FW data/desc swap flags failed\n");
925
return ret;
926
}
927
928
/* Some devices have a special sanity check that verifies the PCI
929
* Device ID is written to this host interest var. It is known to be
930
* required to boot QCA6164.
931
*/
932
ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
933
ar->dev_id);
934
if (ret) {
935
ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
936
return ret;
937
}
938
939
return 0;
940
}
941
942
static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
943
const char *dir,
944
const char *file)
945
{
946
char filename[100];
947
const struct firmware *fw;
948
int ret;
949
950
if (file == NULL)
951
return ERR_PTR(-ENOENT);
952
953
if (dir == NULL)
954
dir = ".";
955
956
if (ar->board_name) {
957
snprintf(filename, sizeof(filename), "%s/%s/%s",
958
dir, ar->board_name, file);
959
ret = firmware_request_nowarn(&fw, filename, ar->dev);
960
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
961
filename, ret);
962
if (!ret)
963
return fw;
964
}
965
966
snprintf(filename, sizeof(filename), "%s/%s", dir, file);
967
ret = firmware_request_nowarn(&fw, filename, ar->dev);
968
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
969
filename, ret);
970
if (ret)
971
return ERR_PTR(ret);
972
973
return fw;
974
}
975
976
#if defined(__linux__)
977
static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
978
#elif defined(__FreeBSD__)
979
static int ath10k_push_board_ext_data(struct ath10k *ar, const u8 *data,
980
#endif
981
size_t data_len)
982
{
983
u32 board_data_size = ar->hw_params.fw.board_size;
984
u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
985
u32 board_ext_data_addr;
986
int ret;
987
988
ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
989
if (ret) {
990
ath10k_err(ar, "could not read board ext data addr (%d)\n",
991
ret);
992
return ret;
993
}
994
995
ath10k_dbg(ar, ATH10K_DBG_BOOT,
996
"boot push board extended data addr 0x%x\n",
997
board_ext_data_addr);
998
999
if (board_ext_data_addr == 0)
1000
return 0;
1001
1002
if (data_len != (board_data_size + board_ext_data_size)) {
1003
ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
1004
data_len, board_data_size, board_ext_data_size);
1005
return -EINVAL;
1006
}
1007
1008
ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
1009
data + board_data_size,
1010
board_ext_data_size);
1011
if (ret) {
1012
ath10k_err(ar, "could not write board ext data (%d)\n", ret);
1013
return ret;
1014
}
1015
1016
ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
1017
(board_ext_data_size << 16) | 1);
1018
if (ret) {
1019
ath10k_err(ar, "could not write board ext data bit (%d)\n",
1020
ret);
1021
return ret;
1022
}
1023
1024
return 0;
1025
}
1026
1027
static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
1028
{
1029
u32 result, address;
1030
u8 board_id, chip_id;
1031
bool ext_bid_support;
1032
int ret, bmi_board_id_param;
1033
1034
address = ar->hw_params.patch_load_addr;
1035
1036
if (!ar->normal_mode_fw.fw_file.otp_data ||
1037
!ar->normal_mode_fw.fw_file.otp_len) {
1038
ath10k_warn(ar,
1039
"failed to retrieve board id because of invalid otp\n");
1040
return -ENODATA;
1041
}
1042
1043
if (ar->id.bmi_ids_valid) {
1044
ath10k_dbg(ar, ATH10K_DBG_BOOT,
1045
"boot already acquired valid otp board id,skip download, board_id %d chip_id %d\n",
1046
ar->id.bmi_board_id, ar->id.bmi_chip_id);
1047
goto skip_otp_download;
1048
}
1049
1050
ath10k_dbg(ar, ATH10K_DBG_BOOT,
1051
"boot upload otp to 0x%x len %zd for board id\n",
1052
address, ar->normal_mode_fw.fw_file.otp_len);
1053
1054
ret = ath10k_bmi_fast_download(ar, address,
1055
ar->normal_mode_fw.fw_file.otp_data,
1056
ar->normal_mode_fw.fw_file.otp_len);
1057
if (ret) {
1058
ath10k_err(ar, "could not write otp for board id check: %d\n",
1059
ret);
1060
return ret;
1061
}
1062
1063
if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
1064
ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE ||
1065
ar->cal_mode == ATH10K_PRE_CAL_MODE_NVMEM)
1066
bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID;
1067
else
1068
bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID;
1069
1070
ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result);
1071
if (ret) {
1072
ath10k_err(ar, "could not execute otp for board id check: %d\n",
1073
ret);
1074
return ret;
1075
}
1076
1077
board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
1078
chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
1079
ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT);
1080
1081
ath10k_dbg(ar, ATH10K_DBG_BOOT,
1082
"boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n",
1083
result, board_id, chip_id, ext_bid_support);
1084
1085
ar->id.ext_bid_supported = ext_bid_support;
1086
1087
if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
1088
(board_id == 0)) {
1089
ath10k_dbg(ar, ATH10K_DBG_BOOT,
1090
"board id does not exist in otp, ignore it\n");
1091
return -EOPNOTSUPP;
1092
}
1093
1094
ar->id.bmi_ids_valid = true;
1095
ar->id.bmi_board_id = board_id;
1096
ar->id.bmi_chip_id = chip_id;
1097
1098
skip_otp_download:
1099
1100
return 0;
1101
}
1102
1103
static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data)
1104
{
1105
struct ath10k *ar = data;
1106
const char *bdf_ext;
1107
const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC;
1108
u8 bdf_enabled;
1109
int i;
1110
1111
if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE)
1112
return;
1113
1114
if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) {
1115
ath10k_dbg(ar, ATH10K_DBG_BOOT,
1116
"wrong smbios bdf ext type length (%d).\n",
1117
hdr->length);
1118
return;
1119
}
1120
1121
#if defined(__linux__)
1122
bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
1123
#elif defined(__FreeBSD__)
1124
bdf_enabled = *((const u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
1125
#endif
1126
if (!bdf_enabled) {
1127
ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n");
1128
return;
1129
}
1130
1131
/* Only one string exists (per spec) */
1132
#if defined(__linux__)
1133
bdf_ext = (char *)hdr + hdr->length;
1134
#elif defined(__FreeBSD__)
1135
bdf_ext = (const char *)hdr + hdr->length;
1136
#endif
1137
1138
if (memcmp(bdf_ext, magic, strlen(magic)) != 0) {
1139
ath10k_dbg(ar, ATH10K_DBG_BOOT,
1140
"bdf variant magic does not match.\n");
1141
return;
1142
}
1143
1144
for (i = 0; i < strlen(bdf_ext); i++) {
1145
if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) {
1146
ath10k_dbg(ar, ATH10K_DBG_BOOT,
1147
"bdf variant name contains non ascii chars.\n");
1148
return;
1149
}
1150
}
1151
1152
/* Copy extension name without magic suffix */
1153
if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic),
1154
sizeof(ar->id.bdf_ext)) < 0) {
1155
ath10k_dbg(ar, ATH10K_DBG_BOOT,
1156
"bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1157
bdf_ext);
1158
return;
1159
}
1160
1161
ath10k_dbg(ar, ATH10K_DBG_BOOT,
1162
"found and validated bdf variant smbios_type 0x%x bdf %s\n",
1163
ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext);
1164
}
1165
1166
static int ath10k_core_check_smbios(struct ath10k *ar)
1167
{
1168
ar->id.bdf_ext[0] = '\0';
1169
dmi_walk(ath10k_core_check_bdfext, ar);
1170
1171
if (ar->id.bdf_ext[0] == '\0')
1172
return -ENODATA;
1173
1174
return 0;
1175
}
1176
1177
int ath10k_core_check_dt(struct ath10k *ar)
1178
{
1179
#if defined(__linux__) || (defined(__FreeBSD__) && defined(CONFIG_OF))
1180
struct device_node *node;
1181
const char *variant = NULL;
1182
1183
node = ar->dev->of_node;
1184
if (!node)
1185
return -ENOENT;
1186
1187
of_property_read_string(node, "qcom,calibration-variant",
1188
&variant);
1189
if (!variant)
1190
of_property_read_string(node, "qcom,ath10k-calibration-variant",
1191
&variant);
1192
if (!variant)
1193
return -ENODATA;
1194
1195
if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0)
1196
ath10k_dbg(ar, ATH10K_DBG_BOOT,
1197
"bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
1198
variant);
1199
1200
return 0;
1201
#else
1202
return -ENOENT;
1203
#endif
1204
}
1205
EXPORT_SYMBOL(ath10k_core_check_dt);
1206
1207
static int ath10k_download_fw(struct ath10k *ar)
1208
{
1209
u32 address, data_len;
1210
const void *data;
1211
int ret;
1212
struct pm_qos_request latency_qos = {};
1213
1214
address = ar->hw_params.patch_load_addr;
1215
1216
data = ar->running_fw->fw_file.firmware_data;
1217
data_len = ar->running_fw->fw_file.firmware_len;
1218
1219
ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
1220
if (ret) {
1221
ath10k_err(ar, "failed to configure fw code swap: %d\n",
1222
ret);
1223
return ret;
1224
}
1225
1226
ath10k_dbg(ar, ATH10K_DBG_BOOT,
1227
"boot uploading firmware image %p len %d\n",
1228
data, data_len);
1229
1230
/* Check if device supports to download firmware via
1231
* diag copy engine. Downloading firmware via diag CE
1232
* greatly reduces the time to download firmware.
1233
*/
1234
if (ar->hw_params.fw_diag_ce_download) {
1235
ret = ath10k_hw_diag_fast_download(ar, address,
1236
data, data_len);
1237
if (ret == 0)
1238
/* firmware upload via diag ce was successful */
1239
return 0;
1240
1241
ath10k_warn(ar,
1242
"failed to upload firmware via diag ce, trying BMI: %d",
1243
ret);
1244
}
1245
1246
cpu_latency_qos_add_request(&latency_qos, 0);
1247
1248
ret = ath10k_bmi_fast_download(ar, address, data, data_len);
1249
1250
cpu_latency_qos_remove_request(&latency_qos);
1251
1252
return ret;
1253
}
1254
1255
void ath10k_core_free_board_files(struct ath10k *ar)
1256
{
1257
if (!IS_ERR(ar->normal_mode_fw.board))
1258
release_firmware(ar->normal_mode_fw.board);
1259
1260
if (!IS_ERR(ar->normal_mode_fw.ext_board))
1261
release_firmware(ar->normal_mode_fw.ext_board);
1262
1263
ar->normal_mode_fw.board = NULL;
1264
ar->normal_mode_fw.board_data = NULL;
1265
ar->normal_mode_fw.board_len = 0;
1266
ar->normal_mode_fw.ext_board = NULL;
1267
ar->normal_mode_fw.ext_board_data = NULL;
1268
ar->normal_mode_fw.ext_board_len = 0;
1269
}
1270
EXPORT_SYMBOL(ath10k_core_free_board_files);
1271
1272
static void ath10k_core_free_firmware_files(struct ath10k *ar)
1273
{
1274
if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
1275
release_firmware(ar->normal_mode_fw.fw_file.firmware);
1276
1277
if (!IS_ERR(ar->cal_file))
1278
release_firmware(ar->cal_file);
1279
1280
if (!IS_ERR(ar->pre_cal_file))
1281
release_firmware(ar->pre_cal_file);
1282
1283
ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
1284
1285
ar->normal_mode_fw.fw_file.otp_data = NULL;
1286
ar->normal_mode_fw.fw_file.otp_len = 0;
1287
1288
ar->normal_mode_fw.fw_file.firmware = NULL;
1289
ar->normal_mode_fw.fw_file.firmware_data = NULL;
1290
ar->normal_mode_fw.fw_file.firmware_len = 0;
1291
1292
ar->cal_file = NULL;
1293
ar->pre_cal_file = NULL;
1294
}
1295
1296
static int ath10k_fetch_cal_file(struct ath10k *ar)
1297
{
1298
char filename[100];
1299
1300
/* pre-cal-<bus>-<id>.bin */
1301
scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
1302
ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1303
1304
ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1305
if (!IS_ERR(ar->pre_cal_file))
1306
goto success;
1307
1308
/* cal-<bus>-<id>.bin */
1309
scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
1310
ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1311
1312
ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
1313
if (IS_ERR(ar->cal_file))
1314
/* calibration file is optional, don't print any warnings */
1315
return PTR_ERR(ar->cal_file);
1316
success:
1317
ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
1318
ATH10K_FW_DIR, filename);
1319
1320
return 0;
1321
}
1322
1323
static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type)
1324
{
1325
const struct firmware *fw;
1326
char boardname[100];
1327
1328
if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1329
scnprintf(boardname, sizeof(boardname), "board-%s-%s.bin",
1330
ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
1331
1332
ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1333
ar->hw_params.fw.dir,
1334
boardname);
1335
if (IS_ERR(ar->normal_mode_fw.board)) {
1336
fw = ath10k_fetch_fw_file(ar,
1337
ar->hw_params.fw.dir,
1338
ATH10K_BOARD_DATA_FILE);
1339
ar->normal_mode_fw.board = fw;
1340
}
1341
1342
if (IS_ERR(ar->normal_mode_fw.board))
1343
return PTR_ERR(ar->normal_mode_fw.board);
1344
1345
ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
1346
ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
1347
} else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1348
fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1349
ATH10K_EBOARD_DATA_FILE);
1350
ar->normal_mode_fw.ext_board = fw;
1351
if (IS_ERR(ar->normal_mode_fw.ext_board))
1352
return PTR_ERR(ar->normal_mode_fw.ext_board);
1353
1354
ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data;
1355
ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size;
1356
}
1357
1358
return 0;
1359
}
1360
1361
static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
1362
#if defined(__linux__)
1363
const void *buf, size_t buf_len,
1364
#elif defined(__FreeBSD__)
1365
const u8 *buf, size_t buf_len,
1366
#endif
1367
const char *boardname,
1368
int bd_ie_type)
1369
{
1370
const struct ath10k_fw_ie *hdr;
1371
bool name_match_found;
1372
int ret, board_ie_id;
1373
size_t board_ie_len;
1374
const void *board_ie_data;
1375
1376
name_match_found = false;
1377
1378
/* go through ATH10K_BD_IE_BOARD_ elements */
1379
while (buf_len > sizeof(struct ath10k_fw_ie)) {
1380
#if defined(__linux__)
1381
hdr = buf;
1382
#elif defined(__FreeBSD__)
1383
hdr = (const void *)buf;
1384
#endif
1385
board_ie_id = le32_to_cpu(hdr->id);
1386
board_ie_len = le32_to_cpu(hdr->len);
1387
board_ie_data = hdr->data;
1388
1389
buf_len -= sizeof(*hdr);
1390
buf += sizeof(*hdr);
1391
1392
if (buf_len < ALIGN(board_ie_len, 4)) {
1393
ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
1394
buf_len, ALIGN(board_ie_len, 4));
1395
ret = -EINVAL;
1396
goto out;
1397
}
1398
1399
switch (board_ie_id) {
1400
case ATH10K_BD_IE_BOARD_NAME:
1401
ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
1402
board_ie_data, board_ie_len);
1403
1404
if (board_ie_len != strlen(boardname))
1405
break;
1406
1407
ret = memcmp(board_ie_data, boardname, strlen(boardname));
1408
if (ret)
1409
break;
1410
1411
name_match_found = true;
1412
ath10k_dbg(ar, ATH10K_DBG_BOOT,
1413
"boot found match for name '%s'",
1414
boardname);
1415
break;
1416
case ATH10K_BD_IE_BOARD_DATA:
1417
if (!name_match_found)
1418
/* no match found */
1419
break;
1420
1421
if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1422
ath10k_dbg(ar, ATH10K_DBG_BOOT,
1423
"boot found board data for '%s'",
1424
boardname);
1425
1426
ar->normal_mode_fw.board_data = board_ie_data;
1427
ar->normal_mode_fw.board_len = board_ie_len;
1428
} else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1429
ath10k_dbg(ar, ATH10K_DBG_BOOT,
1430
"boot found eboard data for '%s'",
1431
boardname);
1432
1433
ar->normal_mode_fw.ext_board_data = board_ie_data;
1434
ar->normal_mode_fw.ext_board_len = board_ie_len;
1435
}
1436
1437
ret = 0;
1438
goto out;
1439
default:
1440
ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
1441
board_ie_id);
1442
break;
1443
}
1444
1445
/* jump over the padding */
1446
board_ie_len = ALIGN(board_ie_len, 4);
1447
1448
buf_len -= board_ie_len;
1449
buf += board_ie_len;
1450
}
1451
1452
/* no match found */
1453
ret = -ENOENT;
1454
1455
out:
1456
return ret;
1457
}
1458
1459
static int ath10k_core_search_bd(struct ath10k *ar,
1460
const char *boardname,
1461
const u8 *data,
1462
size_t len)
1463
{
1464
size_t ie_len;
1465
#if defined(__linux__)
1466
struct ath10k_fw_ie *hdr;
1467
#elif defined(__FreeBSD__)
1468
const struct ath10k_fw_ie *hdr;
1469
#endif
1470
int ret = -ENOENT, ie_id;
1471
1472
while (len > sizeof(struct ath10k_fw_ie)) {
1473
#if defined(__linux__)
1474
hdr = (struct ath10k_fw_ie *)data;
1475
#elif defined(__FreeBSD__)
1476
hdr = (const struct ath10k_fw_ie *)data;
1477
#endif
1478
ie_id = le32_to_cpu(hdr->id);
1479
ie_len = le32_to_cpu(hdr->len);
1480
1481
len -= sizeof(*hdr);
1482
data = hdr->data;
1483
1484
if (len < ALIGN(ie_len, 4)) {
1485
ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1486
ie_id, ie_len, len);
1487
return -EINVAL;
1488
}
1489
1490
switch (ie_id) {
1491
case ATH10K_BD_IE_BOARD:
1492
ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1493
boardname,
1494
ATH10K_BD_IE_BOARD);
1495
if (ret == -ENOENT)
1496
/* no match found, continue */
1497
break;
1498
1499
/* either found or error, so stop searching */
1500
goto out;
1501
case ATH10K_BD_IE_BOARD_EXT:
1502
ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1503
boardname,
1504
ATH10K_BD_IE_BOARD_EXT);
1505
if (ret == -ENOENT)
1506
/* no match found, continue */
1507
break;
1508
1509
/* either found or error, so stop searching */
1510
goto out;
1511
}
1512
1513
/* jump over the padding */
1514
ie_len = ALIGN(ie_len, 4);
1515
1516
len -= ie_len;
1517
data += ie_len;
1518
}
1519
1520
out:
1521
/* return result of parse_bd_ie_board() or -ENOENT */
1522
return ret;
1523
}
1524
1525
static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
1526
const char *boardname,
1527
const char *fallback_boardname1,
1528
const char *fallback_boardname2,
1529
const char *filename)
1530
{
1531
size_t len, magic_len;
1532
const u8 *data;
1533
int ret;
1534
1535
/* Skip if already fetched during board data download */
1536
if (!ar->normal_mode_fw.board)
1537
ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1538
ar->hw_params.fw.dir,
1539
filename);
1540
if (IS_ERR(ar->normal_mode_fw.board))
1541
return PTR_ERR(ar->normal_mode_fw.board);
1542
1543
data = ar->normal_mode_fw.board->data;
1544
len = ar->normal_mode_fw.board->size;
1545
1546
/* magic has extra null byte padded */
1547
magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
1548
if (len < magic_len) {
1549
ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
1550
ar->hw_params.fw.dir, filename, len);
1551
ret = -EINVAL;
1552
goto err;
1553
}
1554
1555
if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
1556
ath10k_err(ar, "found invalid board magic\n");
1557
ret = -EINVAL;
1558
goto err;
1559
}
1560
1561
/* magic is padded to 4 bytes */
1562
magic_len = ALIGN(magic_len, 4);
1563
if (len < magic_len) {
1564
ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
1565
ar->hw_params.fw.dir, filename, len);
1566
ret = -EINVAL;
1567
goto err;
1568
}
1569
1570
data += magic_len;
1571
len -= magic_len;
1572
1573
/* attempt to find boardname in the IE list */
1574
ret = ath10k_core_search_bd(ar, boardname, data, len);
1575
1576
/* if we didn't find it and have a fallback name, try that */
1577
if (ret == -ENOENT && fallback_boardname1)
1578
ret = ath10k_core_search_bd(ar, fallback_boardname1, data, len);
1579
1580
if (ret == -ENOENT && fallback_boardname2)
1581
ret = ath10k_core_search_bd(ar, fallback_boardname2, data, len);
1582
1583
if (ret == -ENOENT) {
1584
ath10k_err(ar,
1585
"failed to fetch board data for %s from %s/%s\n",
1586
boardname, ar->hw_params.fw.dir, filename);
1587
ret = -ENODATA;
1588
}
1589
1590
if (ret)
1591
goto err;
1592
1593
return 0;
1594
1595
err:
1596
ath10k_core_free_board_files(ar);
1597
return ret;
1598
}
1599
1600
static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1601
size_t name_len, bool with_variant,
1602
bool with_chip_id)
1603
{
1604
/* strlen(',variant=') + strlen(ar->id.bdf_ext) */
1605
char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = {};
1606
1607
if (with_variant && ar->id.bdf_ext[0] != '\0')
1608
scnprintf(variant, sizeof(variant), ",variant=%s",
1609
ar->id.bdf_ext);
1610
1611
if (ar->id.bmi_ids_valid) {
1612
scnprintf(name, name_len,
1613
"bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s",
1614
ath10k_bus_str(ar->hif.bus),
1615
ar->id.bmi_chip_id,
1616
ar->id.bmi_board_id, variant);
1617
goto out;
1618
}
1619
1620
if (ar->id.qmi_ids_valid) {
1621
if (with_chip_id)
1622
scnprintf(name, name_len,
1623
"bus=%s,qmi-board-id=%x,qmi-chip-id=%x%s",
1624
ath10k_bus_str(ar->hif.bus),
1625
ar->id.qmi_board_id, ar->id.qmi_chip_id,
1626
variant);
1627
else
1628
scnprintf(name, name_len,
1629
"bus=%s,qmi-board-id=%x",
1630
ath10k_bus_str(ar->hif.bus),
1631
ar->id.qmi_board_id);
1632
goto out;
1633
}
1634
1635
scnprintf(name, name_len,
1636
"bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s",
1637
ath10k_bus_str(ar->hif.bus),
1638
ar->id.vendor, ar->id.device,
1639
ar->id.subsystem_vendor, ar->id.subsystem_device, variant);
1640
out:
1641
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1642
1643
return 0;
1644
}
1645
1646
static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name,
1647
size_t name_len)
1648
{
1649
if (ar->id.bmi_ids_valid) {
1650
scnprintf(name, name_len,
1651
"bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d",
1652
ath10k_bus_str(ar->hif.bus),
1653
ar->id.bmi_chip_id,
1654
ar->id.bmi_eboard_id);
1655
1656
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name);
1657
return 0;
1658
}
1659
/* Fallback if returned board id is zero */
1660
return -1;
1661
}
1662
1663
int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type)
1664
{
1665
char boardname[100], fallback_boardname1[100], fallback_boardname2[100];
1666
int ret;
1667
1668
if (bd_ie_type == ATH10K_BD_IE_BOARD) {
1669
/* With variant and chip id */
1670
ret = ath10k_core_create_board_name(ar, boardname,
1671
sizeof(boardname), true,
1672
true);
1673
if (ret) {
1674
ath10k_err(ar, "failed to create board name: %d", ret);
1675
return ret;
1676
}
1677
1678
/* Without variant and only chip-id */
1679
ret = ath10k_core_create_board_name(ar, fallback_boardname1,
1680
sizeof(boardname), false,
1681
true);
1682
if (ret) {
1683
ath10k_err(ar, "failed to create 1st fallback board name: %d",
1684
ret);
1685
return ret;
1686
}
1687
1688
/* Without variant and without chip-id */
1689
ret = ath10k_core_create_board_name(ar, fallback_boardname2,
1690
sizeof(boardname), false,
1691
false);
1692
if (ret) {
1693
ath10k_err(ar, "failed to create 2nd fallback board name: %d",
1694
ret);
1695
return ret;
1696
}
1697
} else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) {
1698
ret = ath10k_core_create_eboard_name(ar, boardname,
1699
sizeof(boardname));
1700
if (ret) {
1701
ath10k_err(ar, "fallback to eboard.bin since board id 0");
1702
goto fallback;
1703
}
1704
}
1705
1706
ar->bd_api = 2;
1707
ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1708
fallback_boardname1,
1709
fallback_boardname2,
1710
ATH10K_BOARD_API2_FILE);
1711
if (!ret)
1712
goto success;
1713
1714
fallback:
1715
ar->bd_api = 1;
1716
ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type);
1717
if (ret) {
1718
ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n",
1719
ar->hw_params.fw.dir);
1720
return ret;
1721
}
1722
1723
success:
1724
ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1725
return 0;
1726
}
1727
EXPORT_SYMBOL(ath10k_core_fetch_board_file);
1728
1729
static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar)
1730
{
1731
u32 result, address;
1732
u8 ext_board_id;
1733
int ret;
1734
1735
address = ar->hw_params.patch_load_addr;
1736
1737
if (!ar->normal_mode_fw.fw_file.otp_data ||
1738
!ar->normal_mode_fw.fw_file.otp_len) {
1739
ath10k_warn(ar,
1740
"failed to retrieve extended board id due to otp binary missing\n");
1741
return -ENODATA;
1742
}
1743
1744
ath10k_dbg(ar, ATH10K_DBG_BOOT,
1745
"boot upload otp to 0x%x len %zd for ext board id\n",
1746
address, ar->normal_mode_fw.fw_file.otp_len);
1747
1748
ret = ath10k_bmi_fast_download(ar, address,
1749
ar->normal_mode_fw.fw_file.otp_data,
1750
ar->normal_mode_fw.fw_file.otp_len);
1751
if (ret) {
1752
ath10k_err(ar, "could not write otp for ext board id check: %d\n",
1753
ret);
1754
return ret;
1755
}
1756
1757
ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result);
1758
if (ret) {
1759
ath10k_err(ar, "could not execute otp for ext board id check: %d\n",
1760
ret);
1761
return ret;
1762
}
1763
1764
if (!result) {
1765
ath10k_dbg(ar, ATH10K_DBG_BOOT,
1766
"ext board id does not exist in otp, ignore it\n");
1767
return -EOPNOTSUPP;
1768
}
1769
1770
ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK;
1771
1772
ath10k_dbg(ar, ATH10K_DBG_BOOT,
1773
"boot get otp ext board id result 0x%08x ext_board_id %d\n",
1774
result, ext_board_id);
1775
1776
ar->id.bmi_eboard_id = ext_board_id;
1777
1778
return 0;
1779
}
1780
1781
static int ath10k_download_board_data(struct ath10k *ar, const void *data,
1782
size_t data_len)
1783
{
1784
u32 board_data_size = ar->hw_params.fw.board_size;
1785
u32 eboard_data_size = ar->hw_params.fw.ext_board_size;
1786
u32 board_address;
1787
u32 ext_board_address;
1788
int ret;
1789
1790
ret = ath10k_push_board_ext_data(ar, data, data_len);
1791
if (ret) {
1792
ath10k_err(ar, "could not push board ext data (%d)\n", ret);
1793
goto exit;
1794
}
1795
1796
ret = ath10k_bmi_read32(ar, hi_board_data, &board_address);
1797
if (ret) {
1798
ath10k_err(ar, "could not read board data addr (%d)\n", ret);
1799
goto exit;
1800
}
1801
1802
ret = ath10k_bmi_write_memory(ar, board_address, data,
1803
min_t(u32, board_data_size,
1804
data_len));
1805
if (ret) {
1806
ath10k_err(ar, "could not write board data (%d)\n", ret);
1807
goto exit;
1808
}
1809
1810
ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
1811
if (ret) {
1812
ath10k_err(ar, "could not write board data bit (%d)\n", ret);
1813
goto exit;
1814
}
1815
1816
if (!ar->id.ext_bid_supported)
1817
goto exit;
1818
1819
/* Extended board data download */
1820
ret = ath10k_core_get_ext_board_id_from_otp(ar);
1821
if (ret == -EOPNOTSUPP) {
1822
/* Not fetching ext_board_data if ext board id is 0 */
1823
ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n");
1824
return 0;
1825
} else if (ret) {
1826
ath10k_err(ar, "failed to get extended board id: %d\n", ret);
1827
goto exit;
1828
}
1829
1830
ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT);
1831
if (ret)
1832
goto exit;
1833
1834
if (ar->normal_mode_fw.ext_board_data) {
1835
ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET;
1836
ath10k_dbg(ar, ATH10K_DBG_BOOT,
1837
"boot writing ext board data to addr 0x%x",
1838
ext_board_address);
1839
ret = ath10k_bmi_write_memory(ar, ext_board_address,
1840
ar->normal_mode_fw.ext_board_data,
1841
min_t(u32, eboard_data_size, data_len));
1842
if (ret)
1843
ath10k_err(ar, "failed to write ext board data: %d\n", ret);
1844
}
1845
1846
exit:
1847
return ret;
1848
}
1849
1850
static int ath10k_download_and_run_otp(struct ath10k *ar)
1851
{
1852
u32 result, address = ar->hw_params.patch_load_addr;
1853
u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
1854
int ret;
1855
1856
ret = ath10k_download_board_data(ar,
1857
ar->running_fw->board_data,
1858
ar->running_fw->board_len);
1859
if (ret) {
1860
ath10k_err(ar, "failed to download board data: %d\n", ret);
1861
return ret;
1862
}
1863
1864
/* OTP is optional */
1865
1866
if (!ar->running_fw->fw_file.otp_data ||
1867
!ar->running_fw->fw_file.otp_len) {
1868
ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
1869
ar->running_fw->fw_file.otp_data,
1870
ar->running_fw->fw_file.otp_len);
1871
return 0;
1872
}
1873
1874
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
1875
address, ar->running_fw->fw_file.otp_len);
1876
1877
ret = ath10k_bmi_fast_download(ar, address,
1878
ar->running_fw->fw_file.otp_data,
1879
ar->running_fw->fw_file.otp_len);
1880
if (ret) {
1881
ath10k_err(ar, "could not write otp (%d)\n", ret);
1882
return ret;
1883
}
1884
1885
/* As of now pre-cal is valid for 10_4 variants */
1886
if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT ||
1887
ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE ||
1888
ar->cal_mode == ATH10K_PRE_CAL_MODE_NVMEM)
1889
bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL;
1890
1891
ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
1892
if (ret) {
1893
ath10k_err(ar, "could not execute otp (%d)\n", ret);
1894
return ret;
1895
}
1896
1897
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
1898
1899
if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
1900
ar->running_fw->fw_file.fw_features)) &&
1901
result != 0) {
1902
ath10k_err(ar, "otp calibration failed: %d", result);
1903
return -EINVAL;
1904
}
1905
1906
return 0;
1907
}
1908
1909
static int ath10k_download_cal_file(struct ath10k *ar,
1910
const struct firmware *file)
1911
{
1912
int ret;
1913
1914
if (!file)
1915
return -ENOENT;
1916
1917
if (IS_ERR(file))
1918
return PTR_ERR(file);
1919
1920
ret = ath10k_download_board_data(ar, file->data, file->size);
1921
if (ret) {
1922
ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
1923
return ret;
1924
}
1925
1926
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
1927
1928
return 0;
1929
}
1930
1931
static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
1932
{
1933
#if defined(__linux__) || (defined(__FreeBSD__) && defined(CONFIG_OF))
1934
struct device_node *node;
1935
int data_len;
1936
void *data;
1937
int ret;
1938
1939
node = ar->dev->of_node;
1940
if (!node)
1941
/* Device Tree is optional, don't print any warnings if
1942
* there's no node for ath10k.
1943
*/
1944
return -ENOENT;
1945
1946
if (!of_get_property(node, dt_name, &data_len)) {
1947
/* The calibration data node is optional */
1948
return -ENOENT;
1949
}
1950
1951
if (data_len != ar->hw_params.cal_data_len) {
1952
ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
1953
data_len);
1954
ret = -EMSGSIZE;
1955
goto out;
1956
}
1957
1958
data = kmalloc(data_len, GFP_KERNEL);
1959
if (!data) {
1960
ret = -ENOMEM;
1961
goto out;
1962
}
1963
1964
ret = of_property_read_u8_array(node, dt_name, data, data_len);
1965
if (ret) {
1966
ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
1967
ret);
1968
goto out_free;
1969
}
1970
1971
ret = ath10k_download_board_data(ar, data, data_len);
1972
if (ret) {
1973
ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
1974
ret);
1975
goto out_free;
1976
}
1977
1978
ret = 0;
1979
1980
out_free:
1981
kfree(data);
1982
1983
out:
1984
return ret;
1985
#else
1986
return -ENOENT;
1987
#endif
1988
}
1989
1990
static int ath10k_download_cal_eeprom(struct ath10k *ar)
1991
{
1992
size_t data_len;
1993
void *data = NULL;
1994
int ret;
1995
1996
ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
1997
if (ret) {
1998
if (ret != -EOPNOTSUPP)
1999
ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
2000
ret);
2001
goto out_free;
2002
}
2003
2004
ret = ath10k_download_board_data(ar, data, data_len);
2005
if (ret) {
2006
ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
2007
ret);
2008
goto out_free;
2009
}
2010
2011
ret = 0;
2012
2013
out_free:
2014
kfree(data);
2015
2016
return ret;
2017
}
2018
2019
static int ath10k_download_cal_nvmem(struct ath10k *ar, const char *cell_name)
2020
{
2021
#if defined(__linux__)
2022
struct nvmem_cell *cell;
2023
void *buf;
2024
size_t len;
2025
#endif
2026
int ret;
2027
2028
#if defined(__linux__)
2029
cell = devm_nvmem_cell_get(ar->dev, cell_name);
2030
if (IS_ERR(cell)) {
2031
ret = PTR_ERR(cell);
2032
return ret;
2033
}
2034
2035
buf = nvmem_cell_read(cell, &len);
2036
if (IS_ERR(buf))
2037
return PTR_ERR(buf);
2038
2039
if (ar->hw_params.cal_data_len != len) {
2040
kfree(buf);
2041
ath10k_warn(ar, "invalid calibration data length in nvmem-cell '%s': %zu != %u\n",
2042
cell_name, len, ar->hw_params.cal_data_len);
2043
return -EMSGSIZE;
2044
}
2045
2046
ret = ath10k_download_board_data(ar, buf, len);
2047
kfree(buf);
2048
#elif defined(__FreeBSD__)
2049
ret = -EOPNOTSUPP;
2050
#endif
2051
if (ret)
2052
ath10k_warn(ar, "failed to download calibration data from nvmem-cell '%s': %d\n",
2053
cell_name, ret);
2054
2055
return ret;
2056
}
2057
2058
int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
2059
struct ath10k_fw_file *fw_file)
2060
{
2061
size_t magic_len, len, ie_len;
2062
int ie_id, i, index, bit, ret;
2063
#if defined(__linux__)
2064
struct ath10k_fw_ie *hdr;
2065
#elif defined(__FreeBSD__)
2066
const struct ath10k_fw_ie *hdr;
2067
#endif
2068
const u8 *data;
2069
#if defined(__linux__)
2070
__le32 *timestamp, *version;
2071
#elif defined(__FreeBSD__)
2072
const __le32 *timestamp, *version;
2073
#endif
2074
2075
/* first fetch the firmware file (firmware-*.bin) */
2076
fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
2077
name);
2078
if (IS_ERR(fw_file->firmware))
2079
return PTR_ERR(fw_file->firmware);
2080
2081
data = fw_file->firmware->data;
2082
len = fw_file->firmware->size;
2083
2084
/* magic also includes the null byte, check that as well */
2085
magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
2086
2087
if (len < magic_len) {
2088
ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
2089
ar->hw_params.fw.dir, name, len);
2090
ret = -EINVAL;
2091
goto err;
2092
}
2093
2094
if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
2095
ath10k_err(ar, "invalid firmware magic\n");
2096
ret = -EINVAL;
2097
goto err;
2098
}
2099
2100
/* jump over the padding */
2101
magic_len = ALIGN(magic_len, 4);
2102
2103
len -= magic_len;
2104
data += magic_len;
2105
2106
/* loop elements */
2107
while (len > sizeof(struct ath10k_fw_ie)) {
2108
#if defined(__linux__)
2109
hdr = (struct ath10k_fw_ie *)data;
2110
#elif defined(__FreeBSD__)
2111
hdr = (const struct ath10k_fw_ie *)data;
2112
#endif
2113
2114
ie_id = le32_to_cpu(hdr->id);
2115
ie_len = le32_to_cpu(hdr->len);
2116
2117
len -= sizeof(*hdr);
2118
data += sizeof(*hdr);
2119
2120
if (len < ie_len) {
2121
ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
2122
ie_id, len, ie_len);
2123
ret = -EINVAL;
2124
goto err;
2125
}
2126
2127
switch (ie_id) {
2128
case ATH10K_FW_IE_FW_VERSION:
2129
if (ie_len > sizeof(fw_file->fw_version) - 1)
2130
break;
2131
2132
memcpy(fw_file->fw_version, data, ie_len);
2133
fw_file->fw_version[ie_len] = '\0';
2134
2135
ath10k_dbg(ar, ATH10K_DBG_BOOT,
2136
"found fw version %s\n",
2137
fw_file->fw_version);
2138
break;
2139
case ATH10K_FW_IE_TIMESTAMP:
2140
if (ie_len != sizeof(u32))
2141
break;
2142
2143
#if defined(__linux__)
2144
timestamp = (__le32 *)data;
2145
#elif defined(__FreeBSD__)
2146
timestamp = (const __le32 *)data;
2147
#endif
2148
2149
ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
2150
le32_to_cpup(timestamp));
2151
break;
2152
case ATH10K_FW_IE_FEATURES:
2153
ath10k_dbg(ar, ATH10K_DBG_BOOT,
2154
"found firmware features ie (%zd B)\n",
2155
ie_len);
2156
2157
for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
2158
index = i / 8;
2159
bit = i % 8;
2160
2161
if (index == ie_len)
2162
break;
2163
2164
if (data[index] & (1 << bit)) {
2165
ath10k_dbg(ar, ATH10K_DBG_BOOT,
2166
"Enabling feature bit: %i\n",
2167
i);
2168
__set_bit(i, fw_file->fw_features);
2169
}
2170
}
2171
2172
ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
2173
fw_file->fw_features,
2174
sizeof(fw_file->fw_features));
2175
break;
2176
case ATH10K_FW_IE_FW_IMAGE:
2177
ath10k_dbg(ar, ATH10K_DBG_BOOT,
2178
"found fw image ie (%zd B)\n",
2179
ie_len);
2180
2181
fw_file->firmware_data = data;
2182
fw_file->firmware_len = ie_len;
2183
2184
break;
2185
case ATH10K_FW_IE_OTP_IMAGE:
2186
ath10k_dbg(ar, ATH10K_DBG_BOOT,
2187
"found otp image ie (%zd B)\n",
2188
ie_len);
2189
2190
fw_file->otp_data = data;
2191
fw_file->otp_len = ie_len;
2192
2193
break;
2194
case ATH10K_FW_IE_WMI_OP_VERSION:
2195
if (ie_len != sizeof(u32))
2196
break;
2197
2198
#if defined(__linux__)
2199
version = (__le32 *)data;
2200
#elif defined(__FreeBSD__)
2201
version = (const __le32 *)data;
2202
#endif
2203
2204
fw_file->wmi_op_version = le32_to_cpup(version);
2205
2206
ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
2207
fw_file->wmi_op_version);
2208
break;
2209
case ATH10K_FW_IE_HTT_OP_VERSION:
2210
if (ie_len != sizeof(u32))
2211
break;
2212
2213
#if defined(__linux__)
2214
version = (__le32 *)data;
2215
#elif defined(__FreeBSD__)
2216
version = (const __le32 *)data;
2217
#endif
2218
2219
fw_file->htt_op_version = le32_to_cpup(version);
2220
2221
ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
2222
fw_file->htt_op_version);
2223
break;
2224
case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
2225
ath10k_dbg(ar, ATH10K_DBG_BOOT,
2226
"found fw code swap image ie (%zd B)\n",
2227
ie_len);
2228
fw_file->codeswap_data = data;
2229
fw_file->codeswap_len = ie_len;
2230
break;
2231
default:
2232
ath10k_warn(ar, "Unknown FW IE: %u\n",
2233
le32_to_cpu(hdr->id));
2234
break;
2235
}
2236
2237
/* jump over the padding */
2238
ie_len = ALIGN(ie_len, 4);
2239
2240
len -= ie_len;
2241
data += ie_len;
2242
}
2243
2244
if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) &&
2245
(!fw_file->firmware_data || !fw_file->firmware_len)) {
2246
ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
2247
ar->hw_params.fw.dir, name);
2248
ret = -ENOMEDIUM;
2249
goto err;
2250
}
2251
2252
return 0;
2253
2254
err:
2255
ath10k_core_free_firmware_files(ar);
2256
return ret;
2257
}
2258
2259
static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name,
2260
size_t fw_name_len, int fw_api)
2261
{
2262
switch (ar->hif.bus) {
2263
case ATH10K_BUS_SDIO:
2264
case ATH10K_BUS_USB:
2265
scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin",
2266
ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus),
2267
fw_api);
2268
break;
2269
case ATH10K_BUS_PCI:
2270
case ATH10K_BUS_AHB:
2271
case ATH10K_BUS_SNOC:
2272
scnprintf(fw_name, fw_name_len, "%s-%d.bin",
2273
ATH10K_FW_FILE_BASE, fw_api);
2274
break;
2275
}
2276
}
2277
2278
static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
2279
{
2280
int ret, i;
2281
char fw_name[100];
2282
2283
/* calibration file is optional, don't check for any errors */
2284
ath10k_fetch_cal_file(ar);
2285
2286
for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) {
2287
ar->fw_api = i;
2288
ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n",
2289
ar->fw_api);
2290
2291
ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api);
2292
ret = ath10k_core_fetch_firmware_api_n(ar, fw_name,
2293
&ar->normal_mode_fw.fw_file);
2294
if (!ret)
2295
goto success;
2296
}
2297
2298
/* we end up here if we couldn't fetch any firmware */
2299
2300
ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d",
2301
ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir,
2302
ret);
2303
2304
return ret;
2305
2306
success:
2307
ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
2308
2309
return 0;
2310
}
2311
2312
static int ath10k_core_pre_cal_download(struct ath10k *ar)
2313
{
2314
int ret;
2315
2316
ret = ath10k_download_cal_nvmem(ar, "pre-calibration");
2317
if (ret == 0) {
2318
ar->cal_mode = ATH10K_PRE_CAL_MODE_NVMEM;
2319
goto success;
2320
} else if (ret == -EPROBE_DEFER) {
2321
return ret;
2322
}
2323
2324
ath10k_dbg(ar, ATH10K_DBG_BOOT,
2325
"boot did not find a pre-calibration nvmem-cell, try file next: %d\n",
2326
ret);
2327
2328
ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
2329
if (ret == 0) {
2330
ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
2331
goto success;
2332
}
2333
2334
ath10k_dbg(ar, ATH10K_DBG_BOOT,
2335
"boot did not find a pre calibration file, try DT next: %d\n",
2336
ret);
2337
2338
ret = ath10k_download_cal_dt(ar, "qcom,pre-calibration-data");
2339
if (ret == -ENOENT)
2340
ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
2341
if (ret) {
2342
ath10k_dbg(ar, ATH10K_DBG_BOOT,
2343
"unable to load pre cal data from DT: %d\n", ret);
2344
return ret;
2345
}
2346
ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
2347
2348
success:
2349
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2350
ath10k_cal_mode_str(ar->cal_mode));
2351
2352
return 0;
2353
}
2354
2355
static int ath10k_core_pre_cal_config(struct ath10k *ar)
2356
{
2357
int ret;
2358
2359
ret = ath10k_core_pre_cal_download(ar);
2360
if (ret) {
2361
ath10k_dbg(ar, ATH10K_DBG_BOOT,
2362
"failed to load pre cal data: %d\n", ret);
2363
return ret;
2364
}
2365
2366
ret = ath10k_core_get_board_id_from_otp(ar);
2367
if (ret) {
2368
ath10k_err(ar, "failed to get board id: %d\n", ret);
2369
return ret;
2370
}
2371
2372
ret = ath10k_download_and_run_otp(ar);
2373
if (ret) {
2374
ath10k_err(ar, "failed to run otp: %d\n", ret);
2375
return ret;
2376
}
2377
2378
ath10k_dbg(ar, ATH10K_DBG_BOOT,
2379
"pre cal configuration done successfully\n");
2380
2381
return 0;
2382
}
2383
2384
static int ath10k_download_cal_data(struct ath10k *ar)
2385
{
2386
int ret;
2387
2388
ret = ath10k_core_pre_cal_config(ar);
2389
if (ret == 0)
2390
return 0;
2391
2392
ath10k_dbg(ar, ATH10K_DBG_BOOT,
2393
"pre cal download procedure failed, try cal file: %d\n",
2394
ret);
2395
2396
ret = ath10k_download_cal_nvmem(ar, "calibration");
2397
if (ret == 0) {
2398
ar->cal_mode = ATH10K_CAL_MODE_NVMEM;
2399
goto done;
2400
} else if (ret == -EPROBE_DEFER) {
2401
return ret;
2402
}
2403
2404
ath10k_dbg(ar, ATH10K_DBG_BOOT,
2405
"boot did not find a calibration nvmem-cell, try file next: %d\n",
2406
ret);
2407
2408
ret = ath10k_download_cal_file(ar, ar->cal_file);
2409
if (ret == 0) {
2410
ar->cal_mode = ATH10K_CAL_MODE_FILE;
2411
goto done;
2412
}
2413
2414
ath10k_dbg(ar, ATH10K_DBG_BOOT,
2415
"boot did not find a calibration file, try DT next: %d\n",
2416
ret);
2417
2418
ret = ath10k_download_cal_dt(ar, "qcom,calibration-data");
2419
if (ret == -ENOENT)
2420
ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
2421
if (ret == 0) {
2422
ar->cal_mode = ATH10K_CAL_MODE_DT;
2423
goto done;
2424
}
2425
2426
ath10k_dbg(ar, ATH10K_DBG_BOOT,
2427
"boot did not find DT entry, try target EEPROM next: %d\n",
2428
ret);
2429
2430
ret = ath10k_download_cal_eeprom(ar);
2431
if (ret == 0) {
2432
ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
2433
goto done;
2434
}
2435
2436
ath10k_dbg(ar, ATH10K_DBG_BOOT,
2437
"boot did not find target EEPROM entry, try OTP next: %d\n",
2438
ret);
2439
2440
ret = ath10k_download_and_run_otp(ar);
2441
if (ret) {
2442
ath10k_err(ar, "failed to run otp: %d\n", ret);
2443
return ret;
2444
}
2445
2446
ar->cal_mode = ATH10K_CAL_MODE_OTP;
2447
2448
done:
2449
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
2450
ath10k_cal_mode_str(ar->cal_mode));
2451
return 0;
2452
}
2453
2454
static void ath10k_core_fetch_btcoex_dt(struct ath10k *ar)
2455
{
2456
#if defined(__linux__) || (defined(__FreeBSD__) && defined(CONFIG_OF))
2457
struct device_node *node;
2458
u8 coex_support = 0;
2459
int ret;
2460
2461
node = ar->dev->of_node;
2462
if (!node)
2463
goto out;
2464
2465
ret = of_property_read_u8(node, "qcom,coexist-support", &coex_support);
2466
if (ret) {
2467
ar->coex_support = true;
2468
goto out;
2469
}
2470
2471
if (coex_support) {
2472
ar->coex_support = true;
2473
} else {
2474
ar->coex_support = false;
2475
ar->coex_gpio_pin = -1;
2476
goto out;
2477
}
2478
2479
ret = of_property_read_u32(node, "qcom,coexist-gpio-pin",
2480
&ar->coex_gpio_pin);
2481
if (ret)
2482
ar->coex_gpio_pin = -1;
2483
2484
out:
2485
#endif
2486
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot coex_support %d coex_gpio_pin %d\n",
2487
ar->coex_support, ar->coex_gpio_pin);
2488
}
2489
2490
static int ath10k_init_uart(struct ath10k *ar)
2491
{
2492
int ret;
2493
2494
/*
2495
* Explicitly setting UART prints to zero as target turns it on
2496
* based on scratch registers.
2497
*/
2498
ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
2499
if (ret) {
2500
ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
2501
return ret;
2502
}
2503
2504
if (!uart_print) {
2505
if (ar->hw_params.uart_pin_workaround) {
2506
ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin,
2507
ar->hw_params.uart_pin);
2508
if (ret) {
2509
ath10k_warn(ar, "failed to set UART TX pin: %d",
2510
ret);
2511
return ret;
2512
}
2513
}
2514
2515
return 0;
2516
}
2517
2518
ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
2519
if (ret) {
2520
ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2521
return ret;
2522
}
2523
2524
ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
2525
if (ret) {
2526
ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
2527
return ret;
2528
}
2529
2530
/* Set the UART baud rate to 19200. */
2531
ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
2532
if (ret) {
2533
ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
2534
return ret;
2535
}
2536
2537
ath10k_info(ar, "UART prints enabled\n");
2538
return 0;
2539
}
2540
2541
static int ath10k_init_hw_params(struct ath10k *ar)
2542
{
2543
const struct ath10k_hw_params *hw_params;
2544
int i;
2545
2546
for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
2547
hw_params = &ath10k_hw_params_list[i];
2548
2549
if (hw_params->bus == ar->hif.bus &&
2550
hw_params->id == ar->target_version &&
2551
hw_params->dev_id == ar->dev_id)
2552
break;
2553
}
2554
2555
if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
2556
ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
2557
ar->target_version);
2558
return -EINVAL;
2559
}
2560
2561
ar->hw_params = *hw_params;
2562
2563
ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
2564
ar->hw_params.name, ar->target_version);
2565
2566
return 0;
2567
}
2568
2569
static void ath10k_core_recovery_check_work(struct work_struct *work)
2570
{
2571
struct ath10k *ar = container_of(work, struct ath10k, recovery_check_work);
2572
long time_left;
2573
2574
/* Sometimes the recovery will fail and then the next all recovery fail,
2575
* so avoid infinite recovery.
2576
*/
2577
if (atomic_read(&ar->fail_cont_count) >= ATH10K_RECOVERY_MAX_FAIL_COUNT) {
2578
ath10k_err(ar, "consecutive fail %d times, will shutdown driver!",
2579
atomic_read(&ar->fail_cont_count));
2580
ar->state = ATH10K_STATE_WEDGED;
2581
return;
2582
}
2583
2584
ath10k_dbg(ar, ATH10K_DBG_BOOT, "total recovery count: %d", ++ar->recovery_count);
2585
2586
if (atomic_read(&ar->pending_recovery)) {
2587
/* Sometimes it happened another recovery work before the previous one
2588
* completed, then the second recovery work will destroy the previous
2589
* one, thus below is to avoid that.
2590
*/
2591
time_left = wait_for_completion_timeout(&ar->driver_recovery,
2592
ATH10K_RECOVERY_TIMEOUT_HZ);
2593
if (time_left) {
2594
ath10k_warn(ar, "previous recovery succeeded, skip this!\n");
2595
return;
2596
}
2597
2598
/* Record the continuous recovery fail count when recovery failed. */
2599
atomic_inc(&ar->fail_cont_count);
2600
2601
/* Avoid having multiple recoveries at the same time. */
2602
return;
2603
}
2604
2605
atomic_inc(&ar->pending_recovery);
2606
queue_work(ar->workqueue, &ar->restart_work);
2607
}
2608
2609
void ath10k_core_start_recovery(struct ath10k *ar)
2610
{
2611
/* Use workqueue_aux to avoid blocking recovery tracking */
2612
queue_work(ar->workqueue_aux, &ar->recovery_check_work);
2613
}
2614
EXPORT_SYMBOL(ath10k_core_start_recovery);
2615
2616
void ath10k_core_napi_enable(struct ath10k *ar)
2617
{
2618
lockdep_assert_held(&ar->conf_mutex);
2619
2620
if (test_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags))
2621
return;
2622
2623
napi_enable(&ar->napi);
2624
set_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags);
2625
}
2626
EXPORT_SYMBOL(ath10k_core_napi_enable);
2627
2628
void ath10k_core_napi_sync_disable(struct ath10k *ar)
2629
{
2630
lockdep_assert_held(&ar->conf_mutex);
2631
2632
if (!test_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags))
2633
return;
2634
2635
napi_synchronize(&ar->napi);
2636
napi_disable(&ar->napi);
2637
clear_bit(ATH10K_FLAG_NAPI_ENABLED, &ar->dev_flags);
2638
}
2639
EXPORT_SYMBOL(ath10k_core_napi_sync_disable);
2640
2641
static void ath10k_core_restart(struct work_struct *work)
2642
{
2643
struct ath10k *ar = container_of(work, struct ath10k, restart_work);
2644
int ret;
2645
2646
reinit_completion(&ar->driver_recovery);
2647
2648
set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
2649
2650
/* Place a barrier to make sure the compiler doesn't reorder
2651
* CRASH_FLUSH and calling other functions.
2652
*/
2653
barrier();
2654
2655
ieee80211_stop_queues(ar->hw);
2656
ath10k_drain_tx(ar);
2657
complete(&ar->scan.started);
2658
complete(&ar->scan.completed);
2659
complete(&ar->scan.on_channel);
2660
complete(&ar->offchan_tx_completed);
2661
complete(&ar->install_key_done);
2662
complete(&ar->vdev_setup_done);
2663
complete(&ar->vdev_delete_done);
2664
complete(&ar->thermal.wmi_sync);
2665
complete(&ar->bss_survey_done);
2666
wake_up(&ar->htt.empty_tx_wq);
2667
wake_up(&ar->wmi.tx_credits_wq);
2668
wake_up(&ar->peer_mapping_wq);
2669
2670
/* TODO: We can have one instance of cancelling coverage_class_work by
2671
* moving it to ath10k_halt(), so that both stop() and restart() would
2672
* call that but it takes conf_mutex() and if we call cancel_work_sync()
2673
* with conf_mutex it will deadlock.
2674
*/
2675
cancel_work_sync(&ar->set_coverage_class_work);
2676
2677
mutex_lock(&ar->conf_mutex);
2678
2679
switch (ar->state) {
2680
case ATH10K_STATE_ON:
2681
ar->state = ATH10K_STATE_RESTARTING;
2682
ath10k_halt(ar);
2683
ath10k_scan_finish(ar);
2684
ieee80211_restart_hw(ar->hw);
2685
break;
2686
case ATH10K_STATE_OFF:
2687
/* this can happen if driver is being unloaded
2688
* or if the crash happens during FW probing
2689
*/
2690
ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
2691
break;
2692
case ATH10K_STATE_RESTARTING:
2693
/* hw restart might be requested from multiple places */
2694
break;
2695
case ATH10K_STATE_RESTARTED:
2696
ar->state = ATH10K_STATE_WEDGED;
2697
fallthrough;
2698
case ATH10K_STATE_WEDGED:
2699
ath10k_warn(ar, "device is wedged, will not restart\n");
2700
break;
2701
case ATH10K_STATE_UTF:
2702
ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
2703
break;
2704
}
2705
2706
mutex_unlock(&ar->conf_mutex);
2707
2708
ret = ath10k_coredump_submit(ar);
2709
if (ret)
2710
ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",
2711
ret);
2712
}
2713
2714
static void ath10k_core_set_coverage_class_work(struct work_struct *work)
2715
{
2716
struct ath10k *ar = container_of(work, struct ath10k,
2717
set_coverage_class_work);
2718
2719
if (ar->hw_params.hw_ops->set_coverage_class)
2720
ar->hw_params.hw_ops->set_coverage_class(ar, -1, -1);
2721
}
2722
2723
static int ath10k_core_init_firmware_features(struct ath10k *ar)
2724
{
2725
struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2726
int max_num_peers;
2727
2728
if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
2729
!test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2730
ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
2731
return -EINVAL;
2732
}
2733
2734
if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
2735
ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
2736
ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
2737
return -EINVAL;
2738
}
2739
2740
ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
2741
switch (ath10k_cryptmode_param) {
2742
case ATH10K_CRYPT_MODE_HW:
2743
clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2744
clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2745
break;
2746
case ATH10K_CRYPT_MODE_SW:
2747
if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2748
fw_file->fw_features)) {
2749
ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
2750
return -EINVAL;
2751
}
2752
2753
set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2754
set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
2755
break;
2756
default:
2757
ath10k_info(ar, "invalid cryptmode: %d\n",
2758
ath10k_cryptmode_param);
2759
return -EINVAL;
2760
}
2761
2762
ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
2763
ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
2764
2765
if (ath10k_frame_mode == ATH10K_HW_TXRX_RAW) {
2766
if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
2767
fw_file->fw_features)) {
2768
ath10k_err(ar, "rawmode = 1 requires support from firmware");
2769
return -EINVAL;
2770
}
2771
set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
2772
}
2773
2774
if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
2775
ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
2776
2777
/* Workaround:
2778
*
2779
* Firmware A-MSDU aggregation breaks with RAW Tx encap mode
2780
* and causes enormous performance issues (malformed frames,
2781
* etc).
2782
*
2783
* Disabling A-MSDU makes RAW mode stable with heavy traffic
2784
* albeit a bit slower compared to regular operation.
2785
*/
2786
ar->htt.max_num_amsdu = 1;
2787
}
2788
2789
/* Backwards compatibility for firmwares without
2790
* ATH10K_FW_IE_WMI_OP_VERSION.
2791
*/
2792
if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
2793
if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
2794
if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
2795
fw_file->fw_features))
2796
fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
2797
else
2798
fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
2799
} else {
2800
fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
2801
}
2802
}
2803
2804
switch (fw_file->wmi_op_version) {
2805
case ATH10K_FW_WMI_OP_VERSION_MAIN:
2806
max_num_peers = TARGET_NUM_PEERS;
2807
ar->max_num_stations = TARGET_NUM_STATIONS;
2808
ar->max_num_vdevs = TARGET_NUM_VDEVS;
2809
ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
2810
ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
2811
WMI_STAT_PEER;
2812
ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2813
break;
2814
case ATH10K_FW_WMI_OP_VERSION_10_1:
2815
case ATH10K_FW_WMI_OP_VERSION_10_2:
2816
case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2817
if (ath10k_peer_stats_enabled(ar)) {
2818
max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
2819
ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
2820
} else {
2821
max_num_peers = TARGET_10X_NUM_PEERS;
2822
ar->max_num_stations = TARGET_10X_NUM_STATIONS;
2823
}
2824
ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
2825
ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
2826
ar->fw_stats_req_mask = WMI_STAT_PEER;
2827
ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2828
#if defined(CONFIG_FWLOG)
2829
ar->fwlog_max_moduleid = ATH10K_FWLOG_MODULE_ID_MAX_10_2_4;
2830
#endif
2831
break;
2832
case ATH10K_FW_WMI_OP_VERSION_TLV:
2833
max_num_peers = TARGET_TLV_NUM_PEERS;
2834
ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
2835
ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
2836
ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
2837
if (ar->hif.bus == ATH10K_BUS_SDIO)
2838
ar->htt.max_num_pending_tx =
2839
TARGET_TLV_NUM_MSDU_DESC_HL;
2840
else
2841
ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
2842
ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
2843
ar->fw_stats_req_mask = WMI_TLV_STAT_PDEV | WMI_TLV_STAT_VDEV |
2844
WMI_TLV_STAT_PEER | WMI_TLV_STAT_PEER_EXTD;
2845
ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
2846
ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC;
2847
break;
2848
case ATH10K_FW_WMI_OP_VERSION_10_4:
2849
max_num_peers = TARGET_10_4_NUM_PEERS;
2850
ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
2851
ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
2852
ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
2853
ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
2854
ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
2855
WMI_10_4_STAT_PEER_EXTD |
2856
WMI_10_4_STAT_VDEV_EXTD;
2857
ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
2858
ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS;
2859
2860
if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
2861
fw_file->fw_features))
2862
ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
2863
else
2864
ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
2865
break;
2866
case ATH10K_FW_WMI_OP_VERSION_UNSET:
2867
case ATH10K_FW_WMI_OP_VERSION_MAX:
2868
default:
2869
WARN_ON(1);
2870
return -EINVAL;
2871
}
2872
2873
if (ar->hw_params.num_peers)
2874
ar->max_num_peers = ar->hw_params.num_peers;
2875
else
2876
ar->max_num_peers = max_num_peers;
2877
2878
/* Backwards compatibility for firmwares without
2879
* ATH10K_FW_IE_HTT_OP_VERSION.
2880
*/
2881
if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
2882
switch (fw_file->wmi_op_version) {
2883
case ATH10K_FW_WMI_OP_VERSION_MAIN:
2884
fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
2885
break;
2886
case ATH10K_FW_WMI_OP_VERSION_10_1:
2887
case ATH10K_FW_WMI_OP_VERSION_10_2:
2888
case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2889
fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
2890
break;
2891
case ATH10K_FW_WMI_OP_VERSION_TLV:
2892
fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
2893
break;
2894
case ATH10K_FW_WMI_OP_VERSION_10_4:
2895
case ATH10K_FW_WMI_OP_VERSION_UNSET:
2896
case ATH10K_FW_WMI_OP_VERSION_MAX:
2897
ath10k_err(ar, "htt op version not found from fw meta data");
2898
return -EINVAL;
2899
}
2900
}
2901
2902
return 0;
2903
}
2904
2905
static int ath10k_core_reset_rx_filter(struct ath10k *ar)
2906
{
2907
int ret;
2908
int vdev_id;
2909
int vdev_type;
2910
int vdev_subtype;
2911
const u8 *vdev_addr;
2912
2913
vdev_id = 0;
2914
vdev_type = WMI_VDEV_TYPE_STA;
2915
vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
2916
vdev_addr = ar->mac_addr;
2917
2918
ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
2919
vdev_addr);
2920
if (ret) {
2921
ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
2922
return ret;
2923
}
2924
2925
ret = ath10k_wmi_vdev_delete(ar, vdev_id);
2926
if (ret) {
2927
ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
2928
return ret;
2929
}
2930
2931
/* WMI and HTT may use separate HIF pipes and are not guaranteed to be
2932
* serialized properly implicitly.
2933
*
2934
* Moreover (most) WMI commands have no explicit acknowledges. It is
2935
* possible to infer it implicitly by poking firmware with echo
2936
* command - getting a reply means all preceding comments have been
2937
* (mostly) processed.
2938
*
2939
* In case of vdev create/delete this is sufficient.
2940
*
2941
* Without this it's possible to end up with a race when HTT Rx ring is
2942
* started before vdev create/delete hack is complete allowing a short
2943
* window of opportunity to receive (and Tx ACK) a bunch of frames.
2944
*/
2945
ret = ath10k_wmi_barrier(ar);
2946
if (ret) {
2947
ath10k_err(ar, "failed to ping firmware: %d\n", ret);
2948
return ret;
2949
}
2950
2951
return 0;
2952
}
2953
2954
static int ath10k_core_compat_services(struct ath10k *ar)
2955
{
2956
struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
2957
2958
/* all 10.x firmware versions support thermal throttling but don't
2959
* advertise the support via service flags so we have to hardcode
2960
* it here
2961
*/
2962
switch (fw_file->wmi_op_version) {
2963
case ATH10K_FW_WMI_OP_VERSION_10_1:
2964
case ATH10K_FW_WMI_OP_VERSION_10_2:
2965
case ATH10K_FW_WMI_OP_VERSION_10_2_4:
2966
case ATH10K_FW_WMI_OP_VERSION_10_4:
2967
set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map);
2968
break;
2969
default:
2970
break;
2971
}
2972
2973
return 0;
2974
}
2975
2976
#define TGT_IRAM_READ_PER_ITR (8 * 1024)
2977
2978
static int ath10k_core_copy_target_iram(struct ath10k *ar)
2979
{
2980
const struct ath10k_hw_mem_layout *hw_mem;
2981
const struct ath10k_mem_region *tmp, *mem_region = NULL;
2982
dma_addr_t paddr;
2983
void *vaddr = NULL;
2984
u8 num_read_itr;
2985
int i, ret;
2986
u32 len, remaining_len;
2987
2988
/* copy target iram feature must work also when
2989
* ATH10K_FW_CRASH_DUMP_RAM_DATA is disabled, so
2990
* _ath10k_coredump_get_mem_layout() to accomplist that
2991
*/
2992
hw_mem = _ath10k_coredump_get_mem_layout(ar);
2993
if (!hw_mem)
2994
/* if CONFIG_DEV_COREDUMP is disabled we get NULL, then
2995
* just silently disable the feature by doing nothing
2996
*/
2997
return 0;
2998
2999
for (i = 0; i < hw_mem->region_table.size; i++) {
3000
tmp = &hw_mem->region_table.regions[i];
3001
if (tmp->type == ATH10K_MEM_REGION_TYPE_REG) {
3002
mem_region = tmp;
3003
break;
3004
}
3005
}
3006
3007
if (!mem_region)
3008
return -ENOMEM;
3009
3010
for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
3011
if (ar->wmi.mem_chunks[i].req_id ==
3012
WMI_IRAM_RECOVERY_HOST_MEM_REQ_ID) {
3013
vaddr = ar->wmi.mem_chunks[i].vaddr;
3014
len = ar->wmi.mem_chunks[i].len;
3015
break;
3016
}
3017
}
3018
3019
if (!vaddr || !len) {
3020
ath10k_warn(ar, "No allocated memory for IRAM back up");
3021
return -ENOMEM;
3022
}
3023
3024
len = (len < mem_region->len) ? len : mem_region->len;
3025
paddr = mem_region->start;
3026
num_read_itr = len / TGT_IRAM_READ_PER_ITR;
3027
remaining_len = len % TGT_IRAM_READ_PER_ITR;
3028
for (i = 0; i < num_read_itr; i++) {
3029
ret = ath10k_hif_diag_read(ar, paddr, vaddr,
3030
TGT_IRAM_READ_PER_ITR);
3031
if (ret) {
3032
ath10k_warn(ar, "failed to copy firmware IRAM contents: %d",
3033
ret);
3034
return ret;
3035
}
3036
3037
paddr += TGT_IRAM_READ_PER_ITR;
3038
#if defined(__linux__)
3039
vaddr += TGT_IRAM_READ_PER_ITR;
3040
#elif defined(__FreeBSD__)
3041
vaddr = (void *)((uintptr_t)vaddr + TGT_IRAM_READ_PER_ITR);
3042
#endif
3043
}
3044
3045
if (remaining_len) {
3046
ret = ath10k_hif_diag_read(ar, paddr, vaddr, remaining_len);
3047
if (ret) {
3048
ath10k_warn(ar, "failed to copy firmware IRAM contents: %d",
3049
ret);
3050
return ret;
3051
}
3052
}
3053
3054
ath10k_dbg(ar, ATH10K_DBG_BOOT, "target IRAM back up completed\n");
3055
3056
return 0;
3057
}
3058
3059
int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
3060
const struct ath10k_fw_components *fw)
3061
{
3062
int status;
3063
u32 val;
3064
3065
lockdep_assert_held(&ar->conf_mutex);
3066
3067
clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
3068
3069
ar->running_fw = fw;
3070
3071
if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3072
ar->running_fw->fw_file.fw_features)) {
3073
ath10k_bmi_start(ar);
3074
3075
/* Enable hardware clock to speed up firmware download */
3076
if (ar->hw_params.hw_ops->enable_pll_clk) {
3077
status = ar->hw_params.hw_ops->enable_pll_clk(ar);
3078
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot enable pll ret %d\n",
3079
status);
3080
}
3081
3082
if (ath10k_init_configure_target(ar)) {
3083
status = -EINVAL;
3084
goto err;
3085
}
3086
3087
status = ath10k_download_cal_data(ar);
3088
if (status)
3089
goto err;
3090
3091
/* Some of qca988x solutions are having global reset issue
3092
* during target initialization. Bypassing PLL setting before
3093
* downloading firmware and letting the SoC run on REF_CLK is
3094
* fixing the problem. Corresponding firmware change is also
3095
* needed to set the clock source once the target is
3096
* initialized.
3097
*/
3098
if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
3099
ar->running_fw->fw_file.fw_features)) {
3100
status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
3101
if (status) {
3102
ath10k_err(ar, "could not write to skip_clock_init: %d\n",
3103
status);
3104
goto err;
3105
}
3106
}
3107
3108
status = ath10k_download_fw(ar);
3109
if (status)
3110
goto err;
3111
3112
status = ath10k_init_uart(ar);
3113
if (status)
3114
goto err;
3115
3116
if (ar->hif.bus == ATH10K_BUS_SDIO) {
3117
status = ath10k_init_sdio(ar, mode);
3118
if (status) {
3119
ath10k_err(ar, "failed to init SDIO: %d\n", status);
3120
goto err;
3121
}
3122
}
3123
}
3124
3125
ar->htc.htc_ops.target_send_suspend_complete =
3126
ath10k_send_suspend_complete;
3127
3128
status = ath10k_htc_init(ar);
3129
if (status) {
3130
ath10k_err(ar, "could not init HTC (%d)\n", status);
3131
goto err;
3132
}
3133
3134
if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3135
ar->running_fw->fw_file.fw_features)) {
3136
status = ath10k_bmi_done(ar);
3137
if (status)
3138
goto err;
3139
}
3140
3141
status = ath10k_wmi_attach(ar);
3142
if (status) {
3143
ath10k_err(ar, "WMI attach failed: %d\n", status);
3144
goto err;
3145
}
3146
3147
status = ath10k_htt_init(ar);
3148
if (status) {
3149
ath10k_err(ar, "failed to init htt: %d\n", status);
3150
goto err_wmi_detach;
3151
}
3152
3153
status = ath10k_htt_tx_start(&ar->htt);
3154
if (status) {
3155
ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
3156
goto err_wmi_detach;
3157
}
3158
3159
/* If firmware indicates Full Rx Reorder support it must be used in a
3160
* slightly different manner. Let HTT code know.
3161
*/
3162
ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
3163
ar->wmi.svc_map));
3164
3165
status = ath10k_htt_rx_alloc(&ar->htt);
3166
if (status) {
3167
ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
3168
goto err_htt_tx_detach;
3169
}
3170
3171
status = ath10k_hif_start(ar);
3172
if (status) {
3173
ath10k_err(ar, "could not start HIF: %d\n", status);
3174
goto err_htt_rx_detach;
3175
}
3176
3177
status = ath10k_htc_wait_target(&ar->htc);
3178
if (status) {
3179
ath10k_err(ar, "failed to connect to HTC: %d\n", status);
3180
goto err_hif_stop;
3181
}
3182
3183
status = ath10k_hif_start_post(ar);
3184
if (status) {
3185
ath10k_err(ar, "failed to swap mailbox: %d\n", status);
3186
goto err_hif_stop;
3187
}
3188
3189
if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3190
status = ath10k_htt_connect(&ar->htt);
3191
if (status) {
3192
ath10k_err(ar, "failed to connect htt (%d)\n", status);
3193
goto err_hif_stop;
3194
}
3195
}
3196
3197
status = ath10k_wmi_connect(ar);
3198
if (status) {
3199
ath10k_err(ar, "could not connect wmi: %d\n", status);
3200
goto err_hif_stop;
3201
}
3202
3203
status = ath10k_htc_start(&ar->htc);
3204
if (status) {
3205
ath10k_err(ar, "failed to start htc: %d\n", status);
3206
goto err_hif_stop;
3207
}
3208
3209
if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3210
status = ath10k_wmi_wait_for_service_ready(ar);
3211
if (status) {
3212
ath10k_warn(ar, "wmi service ready event not received");
3213
goto err_hif_stop;
3214
}
3215
}
3216
3217
ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
3218
ar->hw->wiphy->fw_version);
3219
3220
if (test_bit(ATH10K_FW_FEATURE_IRAM_RECOVERY,
3221
ar->running_fw->fw_file.fw_features)) {
3222
status = ath10k_core_copy_target_iram(ar);
3223
if (status) {
3224
ath10k_warn(ar, "failed to copy target iram contents: %d",
3225
status);
3226
goto err_hif_stop;
3227
}
3228
}
3229
3230
if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) &&
3231
mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3232
val = 0;
3233
if (ath10k_peer_stats_enabled(ar))
3234
val = WMI_10_4_PEER_STATS;
3235
3236
/* Enable vdev stats by default */
3237
val |= WMI_10_4_VDEV_STATS;
3238
3239
if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
3240
val |= WMI_10_4_BSS_CHANNEL_INFO_64;
3241
3242
ath10k_core_fetch_btcoex_dt(ar);
3243
3244
/* 10.4 firmware supports BT-Coex without reloading firmware
3245
* via pdev param. To support Bluetooth coexistence pdev param,
3246
* WMI_COEX_GPIO_SUPPORT of extended resource config should be
3247
* enabled always.
3248
*
3249
* We can still enable BTCOEX if firmware has the support
3250
* even though btceox_support value is
3251
* ATH10K_DT_BTCOEX_NOT_FOUND
3252
*/
3253
3254
if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
3255
test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
3256
ar->running_fw->fw_file.fw_features) &&
3257
ar->coex_support)
3258
val |= WMI_10_4_COEX_GPIO_SUPPORT;
3259
3260
if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY,
3261
ar->wmi.svc_map))
3262
val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY;
3263
3264
if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
3265
ar->wmi.svc_map))
3266
val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA;
3267
3268
if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI,
3269
ar->wmi.svc_map))
3270
val |= WMI_10_4_TX_DATA_ACK_RSSI;
3271
3272
if (test_bit(WMI_SERVICE_REPORT_AIRTIME, ar->wmi.svc_map))
3273
val |= WMI_10_4_REPORT_AIRTIME;
3274
3275
if (test_bit(WMI_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT,
3276
ar->wmi.svc_map))
3277
val |= WMI_10_4_EXT_PEER_TID_CONFIGS_SUPPORT;
3278
3279
status = ath10k_mac_ext_resource_config(ar, val);
3280
if (status) {
3281
ath10k_err(ar,
3282
"failed to send ext resource cfg command : %d\n",
3283
status);
3284
goto err_hif_stop;
3285
}
3286
}
3287
3288
status = ath10k_wmi_cmd_init(ar);
3289
if (status) {
3290
ath10k_err(ar, "could not send WMI init command (%d)\n",
3291
status);
3292
goto err_hif_stop;
3293
}
3294
3295
status = ath10k_wmi_wait_for_unified_ready(ar);
3296
if (status) {
3297
ath10k_err(ar, "wmi unified ready event not received\n");
3298
goto err_hif_stop;
3299
}
3300
3301
status = ath10k_core_compat_services(ar);
3302
if (status) {
3303
ath10k_err(ar, "compat services failed: %d\n", status);
3304
goto err_hif_stop;
3305
}
3306
3307
status = ath10k_wmi_pdev_set_base_macaddr(ar, ar->mac_addr);
3308
if (status && status != -EOPNOTSUPP) {
3309
ath10k_err(ar,
3310
"failed to set base mac address: %d\n", status);
3311
goto err_hif_stop;
3312
}
3313
3314
/* Some firmware revisions do not properly set up hardware rx filter
3315
* registers.
3316
*
3317
* A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
3318
* is filled with 0s instead of 1s allowing HW to respond with ACKs to
3319
* any frames that matches MAC_PCU_RX_FILTER which is also
3320
* misconfigured to accept anything.
3321
*
3322
* The ADDR1 is programmed using internal firmware structure field and
3323
* can't be (easily/sanely) reached from the driver explicitly. It is
3324
* possible to implicitly make it correct by creating a dummy vdev and
3325
* then deleting it.
3326
*/
3327
if (ar->hw_params.hw_filter_reset_required &&
3328
mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3329
status = ath10k_core_reset_rx_filter(ar);
3330
if (status) {
3331
ath10k_err(ar,
3332
"failed to reset rx filter: %d\n", status);
3333
goto err_hif_stop;
3334
}
3335
}
3336
3337
status = ath10k_htt_rx_ring_refill(ar);
3338
if (status) {
3339
ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
3340
goto err_hif_stop;
3341
}
3342
3343
if (ar->max_num_vdevs >= 64)
3344
ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
3345
else
3346
ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
3347
3348
INIT_LIST_HEAD(&ar->arvifs);
3349
3350
/* we don't care about HTT in UTF mode */
3351
if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
3352
status = ath10k_htt_setup(&ar->htt);
3353
if (status) {
3354
ath10k_err(ar, "failed to setup htt: %d\n", status);
3355
goto err_hif_stop;
3356
}
3357
}
3358
3359
status = ath10k_debug_start(ar);
3360
if (status)
3361
goto err_hif_stop;
3362
3363
status = ath10k_hif_set_target_log_mode(ar, fw_diag_log);
3364
if (status && status != -EOPNOTSUPP) {
3365
ath10k_warn(ar, "set target log mode failed: %d\n", status);
3366
goto err_hif_stop;
3367
}
3368
3369
status = ath10k_leds_start(ar);
3370
if (status)
3371
goto err_hif_stop;
3372
3373
return 0;
3374
3375
err_hif_stop:
3376
ath10k_hif_stop(ar);
3377
err_htt_rx_detach:
3378
ath10k_htt_rx_free(&ar->htt);
3379
err_htt_tx_detach:
3380
ath10k_htt_tx_free(&ar->htt);
3381
err_wmi_detach:
3382
ath10k_wmi_detach(ar);
3383
err:
3384
return status;
3385
}
3386
EXPORT_SYMBOL(ath10k_core_start);
3387
3388
int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
3389
{
3390
int ret;
3391
unsigned long time_left;
3392
3393
reinit_completion(&ar->target_suspend);
3394
3395
ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
3396
if (ret) {
3397
ath10k_warn(ar, "could not suspend target (%d)\n", ret);
3398
return ret;
3399
}
3400
3401
time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
3402
3403
if (!time_left) {
3404
ath10k_warn(ar, "suspend timed out - target pause event never came\n");
3405
return -ETIMEDOUT;
3406
}
3407
3408
return 0;
3409
}
3410
3411
void ath10k_core_stop(struct ath10k *ar)
3412
{
3413
lockdep_assert_held(&ar->conf_mutex);
3414
ath10k_debug_stop(ar);
3415
3416
/* try to suspend target */
3417
if (ar->state != ATH10K_STATE_RESTARTING &&
3418
ar->state != ATH10K_STATE_UTF)
3419
ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
3420
3421
ath10k_hif_stop(ar);
3422
ath10k_htt_tx_stop(&ar->htt);
3423
ath10k_htt_rx_free(&ar->htt);
3424
ath10k_wmi_detach(ar);
3425
3426
ar->id.bmi_ids_valid = false;
3427
}
3428
EXPORT_SYMBOL(ath10k_core_stop);
3429
3430
/* mac80211 manages fw/hw initialization through start/stop hooks. However in
3431
* order to know what hw capabilities should be advertised to mac80211 it is
3432
* necessary to load the firmware (and tear it down immediately since start
3433
* hook will try to init it again) before registering
3434
*/
3435
static int ath10k_core_probe_fw(struct ath10k *ar)
3436
{
3437
struct bmi_target_info target_info = {};
3438
int ret = 0;
3439
3440
ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL);
3441
if (ret) {
3442
ath10k_err(ar, "could not power on hif bus (%d)\n", ret);
3443
return ret;
3444
}
3445
3446
switch (ar->hif.bus) {
3447
case ATH10K_BUS_SDIO:
3448
ret = ath10k_bmi_get_target_info_sdio(ar, &target_info);
3449
if (ret) {
3450
ath10k_err(ar, "could not get target info (%d)\n", ret);
3451
goto err_power_down;
3452
}
3453
ar->target_version = target_info.version;
3454
ar->hw->wiphy->hw_version = target_info.version;
3455
break;
3456
case ATH10K_BUS_PCI:
3457
case ATH10K_BUS_AHB:
3458
case ATH10K_BUS_USB:
3459
ret = ath10k_bmi_get_target_info(ar, &target_info);
3460
if (ret) {
3461
ath10k_err(ar, "could not get target info (%d)\n", ret);
3462
goto err_power_down;
3463
}
3464
ar->target_version = target_info.version;
3465
ar->hw->wiphy->hw_version = target_info.version;
3466
break;
3467
case ATH10K_BUS_SNOC:
3468
ret = ath10k_hif_get_target_info(ar, &target_info);
3469
if (ret) {
3470
ath10k_err(ar, "could not get target info (%d)\n", ret);
3471
goto err_power_down;
3472
}
3473
ar->target_version = target_info.version;
3474
ar->hw->wiphy->hw_version = target_info.version;
3475
break;
3476
default:
3477
ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus);
3478
}
3479
3480
ret = ath10k_init_hw_params(ar);
3481
if (ret) {
3482
ath10k_err(ar, "could not get hw params (%d)\n", ret);
3483
goto err_power_down;
3484
}
3485
3486
ret = ath10k_core_fetch_firmware_files(ar);
3487
if (ret) {
3488
ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
3489
goto err_power_down;
3490
}
3491
3492
BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
3493
sizeof(ar->normal_mode_fw.fw_file.fw_version));
3494
memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
3495
sizeof(ar->hw->wiphy->fw_version));
3496
3497
ath10k_debug_print_hwfw_info(ar);
3498
3499
if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3500
ar->normal_mode_fw.fw_file.fw_features)) {
3501
ret = ath10k_core_pre_cal_download(ar);
3502
if (ret) {
3503
/* pre calibration data download is not necessary
3504
* for all the chipsets. Ignore failures and continue.
3505
*/
3506
ath10k_dbg(ar, ATH10K_DBG_BOOT,
3507
"could not load pre cal data: %d\n", ret);
3508
}
3509
3510
ret = ath10k_core_get_board_id_from_otp(ar);
3511
if (ret && ret != -EOPNOTSUPP) {
3512
ath10k_err(ar, "failed to get board id from otp: %d\n",
3513
ret);
3514
goto err_free_firmware_files;
3515
}
3516
3517
ret = ath10k_core_check_smbios(ar);
3518
if (ret)
3519
ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n");
3520
3521
ret = ath10k_core_check_dt(ar);
3522
if (ret)
3523
ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n");
3524
3525
ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD);
3526
if (ret) {
3527
ath10k_err(ar, "failed to fetch board file: %d\n", ret);
3528
goto err_free_firmware_files;
3529
}
3530
3531
ath10k_debug_print_board_info(ar);
3532
}
3533
3534
device_get_mac_address(ar->dev, ar->mac_addr);
3535
3536
ret = ath10k_core_init_firmware_features(ar);
3537
if (ret) {
3538
ath10k_err(ar, "fatal problem with firmware features: %d\n",
3539
ret);
3540
goto err_free_firmware_files;
3541
}
3542
3543
if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
3544
ar->normal_mode_fw.fw_file.fw_features)) {
3545
ret = ath10k_swap_code_seg_init(ar,
3546
&ar->normal_mode_fw.fw_file);
3547
if (ret) {
3548
ath10k_err(ar, "failed to initialize code swap segment: %d\n",
3549
ret);
3550
goto err_free_firmware_files;
3551
}
3552
}
3553
3554
mutex_lock(&ar->conf_mutex);
3555
3556
ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
3557
&ar->normal_mode_fw);
3558
if (ret) {
3559
ath10k_err(ar, "could not init core (%d)\n", ret);
3560
goto err_unlock;
3561
}
3562
3563
ath10k_debug_print_boot_info(ar);
3564
ath10k_core_stop(ar);
3565
3566
mutex_unlock(&ar->conf_mutex);
3567
3568
ath10k_hif_power_down(ar);
3569
return 0;
3570
3571
err_unlock:
3572
mutex_unlock(&ar->conf_mutex);
3573
3574
err_free_firmware_files:
3575
ath10k_core_free_firmware_files(ar);
3576
3577
err_power_down:
3578
ath10k_hif_power_down(ar);
3579
3580
return ret;
3581
}
3582
3583
static void ath10k_core_register_work(struct work_struct *work)
3584
{
3585
struct ath10k *ar = container_of(work, struct ath10k, register_work);
3586
int status;
3587
3588
/* peer stats are enabled by default */
3589
set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
3590
3591
status = ath10k_core_probe_fw(ar);
3592
if (status) {
3593
ath10k_err(ar, "could not probe fw (%d)\n", status);
3594
goto err;
3595
}
3596
3597
status = ath10k_mac_register(ar);
3598
if (status) {
3599
ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
3600
goto err_release_fw;
3601
}
3602
3603
status = ath10k_coredump_register(ar);
3604
if (status) {
3605
ath10k_err(ar, "unable to register coredump\n");
3606
goto err_unregister_mac;
3607
}
3608
3609
status = ath10k_debug_register(ar);
3610
if (status) {
3611
ath10k_err(ar, "unable to initialize debugfs\n");
3612
goto err_unregister_coredump;
3613
}
3614
3615
status = ath10k_spectral_create(ar);
3616
if (status) {
3617
ath10k_err(ar, "failed to initialize spectral\n");
3618
goto err_debug_destroy;
3619
}
3620
3621
status = ath10k_thermal_register(ar);
3622
if (status) {
3623
ath10k_err(ar, "could not register thermal device: %d\n",
3624
status);
3625
goto err_spectral_destroy;
3626
}
3627
#if defined(CONFIG_FWLOG)
3628
ath10k_fwlog_register(ar);
3629
#endif
3630
3631
status = ath10k_leds_register(ar);
3632
if (status) {
3633
ath10k_err(ar, "could not register leds: %d\n",
3634
status);
3635
goto err_thermal_unregister;
3636
}
3637
3638
set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
3639
return;
3640
3641
err_thermal_unregister:
3642
ath10k_thermal_unregister(ar);
3643
err_spectral_destroy:
3644
ath10k_spectral_destroy(ar);
3645
err_debug_destroy:
3646
ath10k_debug_destroy(ar);
3647
err_unregister_coredump:
3648
ath10k_coredump_unregister(ar);
3649
err_unregister_mac:
3650
ath10k_mac_unregister(ar);
3651
err_release_fw:
3652
ath10k_core_free_firmware_files(ar);
3653
err:
3654
/* TODO: It's probably a good idea to release device from the driver
3655
* but calling device_release_driver() here will cause a deadlock.
3656
*/
3657
return;
3658
}
3659
3660
int ath10k_core_register(struct ath10k *ar,
3661
const struct ath10k_bus_params *bus_params)
3662
{
3663
ar->bus_param = *bus_params;
3664
3665
queue_work(ar->workqueue, &ar->register_work);
3666
3667
return 0;
3668
}
3669
EXPORT_SYMBOL(ath10k_core_register);
3670
3671
void ath10k_core_unregister(struct ath10k *ar)
3672
{
3673
cancel_work_sync(&ar->register_work);
3674
3675
if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
3676
return;
3677
3678
ath10k_leds_unregister(ar);
3679
3680
ath10k_thermal_unregister(ar);
3681
/* Stop spectral before unregistering from mac80211 to remove the
3682
* relayfs debugfs file cleanly. Otherwise the parent debugfs tree
3683
* would be already be free'd recursively, leading to a double free.
3684
*/
3685
ath10k_spectral_destroy(ar);
3686
3687
/* We must unregister from mac80211 before we stop HTC and HIF.
3688
* Otherwise we will fail to submit commands to FW and mac80211 will be
3689
* unhappy about callback failures.
3690
*/
3691
ath10k_mac_unregister(ar);
3692
3693
ath10k_testmode_destroy(ar);
3694
3695
ath10k_core_free_firmware_files(ar);
3696
ath10k_core_free_board_files(ar);
3697
3698
ath10k_debug_unregister(ar);
3699
#if defined(CONFIG_FWLOG)
3700
ath10k_fwlog_unregister(ar);
3701
#endif
3702
}
3703
EXPORT_SYMBOL(ath10k_core_unregister);
3704
3705
struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
3706
enum ath10k_bus bus,
3707
enum ath10k_hw_rev hw_rev,
3708
const struct ath10k_hif_ops *hif_ops)
3709
{
3710
struct ath10k *ar;
3711
int ret;
3712
3713
ar = ath10k_mac_create(priv_size);
3714
if (!ar)
3715
return NULL;
3716
3717
ar->ath_common.priv = ar;
3718
ar->ath_common.hw = ar->hw;
3719
ar->dev = dev;
3720
ar->hw_rev = hw_rev;
3721
ar->hif.ops = hif_ops;
3722
ar->hif.bus = bus;
3723
3724
switch (hw_rev) {
3725
case ATH10K_HW_QCA988X:
3726
case ATH10K_HW_QCA9887:
3727
ar->regs = &qca988x_regs;
3728
ar->hw_ce_regs = &qcax_ce_regs;
3729
ar->hw_values = &qca988x_values;
3730
break;
3731
case ATH10K_HW_QCA6174:
3732
case ATH10K_HW_QCA9377:
3733
ar->regs = &qca6174_regs;
3734
ar->hw_ce_regs = &qcax_ce_regs;
3735
ar->hw_values = &qca6174_values;
3736
break;
3737
case ATH10K_HW_QCA99X0:
3738
case ATH10K_HW_QCA9984:
3739
ar->regs = &qca99x0_regs;
3740
ar->hw_ce_regs = &qcax_ce_regs;
3741
ar->hw_values = &qca99x0_values;
3742
break;
3743
case ATH10K_HW_QCA9888:
3744
ar->regs = &qca99x0_regs;
3745
ar->hw_ce_regs = &qcax_ce_regs;
3746
ar->hw_values = &qca9888_values;
3747
break;
3748
case ATH10K_HW_QCA4019:
3749
ar->regs = &qca4019_regs;
3750
ar->hw_ce_regs = &qcax_ce_regs;
3751
ar->hw_values = &qca4019_values;
3752
break;
3753
case ATH10K_HW_WCN3990:
3754
ar->regs = &wcn3990_regs;
3755
ar->hw_ce_regs = &wcn3990_ce_regs;
3756
ar->hw_values = &wcn3990_values;
3757
break;
3758
default:
3759
ath10k_err(ar, "unsupported core hardware revision %d\n",
3760
hw_rev);
3761
ret = -EOPNOTSUPP;
3762
goto err_free_mac;
3763
}
3764
3765
init_completion(&ar->scan.started);
3766
init_completion(&ar->scan.completed);
3767
init_completion(&ar->scan.on_channel);
3768
init_completion(&ar->target_suspend);
3769
init_completion(&ar->driver_recovery);
3770
init_completion(&ar->wow.wakeup_completed);
3771
3772
init_completion(&ar->install_key_done);
3773
init_completion(&ar->vdev_setup_done);
3774
init_completion(&ar->vdev_delete_done);
3775
init_completion(&ar->thermal.wmi_sync);
3776
init_completion(&ar->bss_survey_done);
3777
init_completion(&ar->peer_delete_done);
3778
init_completion(&ar->peer_stats_info_complete);
3779
3780
INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
3781
3782
ar->workqueue = create_singlethread_workqueue("ath10k_wq");
3783
if (!ar->workqueue)
3784
goto err_free_mac;
3785
3786
ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
3787
if (!ar->workqueue_aux)
3788
goto err_free_wq;
3789
3790
ar->workqueue_tx_complete =
3791
create_singlethread_workqueue("ath10k_tx_complete_wq");
3792
if (!ar->workqueue_tx_complete)
3793
goto err_free_aux_wq;
3794
3795
mutex_init(&ar->conf_mutex);
3796
mutex_init(&ar->dump_mutex);
3797
spin_lock_init(&ar->data_lock);
3798
3799
for (int ac = 0; ac < IEEE80211_NUM_ACS; ac++)
3800
spin_lock_init(&ar->queue_lock[ac]);
3801
3802
INIT_LIST_HEAD(&ar->peers);
3803
init_waitqueue_head(&ar->peer_mapping_wq);
3804
init_waitqueue_head(&ar->htt.empty_tx_wq);
3805
init_waitqueue_head(&ar->wmi.tx_credits_wq);
3806
3807
skb_queue_head_init(&ar->htt.rx_indication_head);
3808
3809
init_completion(&ar->offchan_tx_completed);
3810
INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
3811
skb_queue_head_init(&ar->offchan_tx_queue);
3812
3813
INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
3814
skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
3815
3816
INIT_WORK(&ar->register_work, ath10k_core_register_work);
3817
INIT_WORK(&ar->restart_work, ath10k_core_restart);
3818
INIT_WORK(&ar->recovery_check_work, ath10k_core_recovery_check_work);
3819
INIT_WORK(&ar->set_coverage_class_work,
3820
ath10k_core_set_coverage_class_work);
3821
3822
ar->napi_dev = alloc_netdev_dummy(0);
3823
if (!ar->napi_dev)
3824
goto err_free_tx_complete;
3825
3826
ret = ath10k_coredump_create(ar);
3827
if (ret)
3828
goto err_free_netdev;
3829
3830
ret = ath10k_debug_create(ar);
3831
if (ret)
3832
goto err_free_coredump;
3833
3834
return ar;
3835
3836
err_free_coredump:
3837
ath10k_coredump_destroy(ar);
3838
err_free_netdev:
3839
free_netdev(ar->napi_dev);
3840
err_free_tx_complete:
3841
destroy_workqueue(ar->workqueue_tx_complete);
3842
err_free_aux_wq:
3843
destroy_workqueue(ar->workqueue_aux);
3844
err_free_wq:
3845
destroy_workqueue(ar->workqueue);
3846
err_free_mac:
3847
ath10k_mac_destroy(ar);
3848
3849
return NULL;
3850
}
3851
EXPORT_SYMBOL(ath10k_core_create);
3852
3853
void ath10k_core_destroy(struct ath10k *ar)
3854
{
3855
destroy_workqueue(ar->workqueue);
3856
3857
destroy_workqueue(ar->workqueue_aux);
3858
3859
destroy_workqueue(ar->workqueue_tx_complete);
3860
3861
free_netdev(ar->napi_dev);
3862
ath10k_debug_destroy(ar);
3863
ath10k_coredump_destroy(ar);
3864
ath10k_htt_tx_destroy(&ar->htt);
3865
ath10k_wmi_free_host_mem(ar);
3866
ath10k_mac_destroy(ar);
3867
}
3868
EXPORT_SYMBOL(ath10k_core_destroy);
3869
3870
MODULE_AUTHOR("Qualcomm Atheros");
3871
MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
3872
MODULE_LICENSE("Dual BSD/GPL");
3873
#if defined(__FreeBSD__)
3874
MODULE_VERSION(ath10k, 1);
3875
MODULE_DEPEND(ath10k, linuxkpi, 1, 1, 1);
3876
MODULE_DEPEND(ath10k, linuxkpi_wlan, 1, 1, 1);
3877
MODULE_DEPEND(ath10k, athk_common, 1, 1, 1);
3878
#endif
3879
3880