CoCalc -- coredump.c

GitHub Repository: freebsd/freebsd-src
Path: blob/main/sys/contrib/dev/athk/ath10k/coredump.c
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1
// SPDX-License-Identifier: ISC
2
/*
3
 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
4
 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
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 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
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 */
8

9
#include "coredump.h"
10

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#include <linux/devcoredump.h>
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#include <linux/export.h>
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#include <linux/kernel.h>
14
#include <linux/types.h>
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#include <linux/utsname.h>
16

17
#include "debug.h"
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#include "hw.h"
19

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static const struct ath10k_mem_section qca6174_hw21_register_sections[] = {
21
	{0x800, 0x810},
22
	{0x820, 0x82C},
23
	{0x830, 0x8F4},
24
	{0x90C, 0x91C},
25
	{0xA14, 0xA18},
26
	{0xA84, 0xA94},
27
	{0xAA8, 0xAD4},
28
	{0xADC, 0xB40},
29
	{0x1000, 0x10A4},
30
	{0x10BC, 0x111C},
31
	{0x1134, 0x1138},
32
	{0x1144, 0x114C},
33
	{0x1150, 0x115C},
34
	{0x1160, 0x1178},
35
	{0x1240, 0x1260},
36
	{0x2000, 0x207C},
37
	{0x3000, 0x3014},
38
	{0x4000, 0x4014},
39
	{0x5000, 0x5124},
40
	{0x6000, 0x6040},
41
	{0x6080, 0x60CC},
42
	{0x6100, 0x611C},
43
	{0x6140, 0x61D8},
44
	{0x6200, 0x6238},
45
	{0x6240, 0x628C},
46
	{0x62C0, 0x62EC},
47
	{0x6380, 0x63E8},
48
	{0x6400, 0x6440},
49
	{0x6480, 0x64CC},
50
	{0x6500, 0x651C},
51
	{0x6540, 0x6580},
52
	{0x6600, 0x6638},
53
	{0x6640, 0x668C},
54
	{0x66C0, 0x66EC},
55
	{0x6780, 0x67E8},
56
	{0x7080, 0x708C},
57
	{0x70C0, 0x70C8},
58
	{0x7400, 0x741C},
59
	{0x7440, 0x7454},
60
	{0x7800, 0x7818},
61
	{0x8000, 0x8004},
62
	{0x8010, 0x8064},
63
	{0x8080, 0x8084},
64
	{0x80A0, 0x80A4},
65
	{0x80C0, 0x80C4},
66
	{0x80E0, 0x80F4},
67
	{0x8100, 0x8104},
68
	{0x8110, 0x812C},
69
	{0x9000, 0x9004},
70
	{0x9800, 0x982C},
71
	{0x9830, 0x9838},
72
	{0x9840, 0x986C},
73
	{0x9870, 0x9898},
74
	{0x9A00, 0x9C00},
75
	{0xD580, 0xD59C},
76
	{0xF000, 0xF0E0},
77
	{0xF140, 0xF190},
78
	{0xF250, 0xF25C},
79
	{0xF260, 0xF268},
80
	{0xF26C, 0xF2A8},
81
	{0x10008, 0x1000C},
82
	{0x10014, 0x10018},
83
	{0x1001C, 0x10020},
84
	{0x10024, 0x10028},
85
	{0x10030, 0x10034},
86
	{0x10040, 0x10054},
87
	{0x10058, 0x1007C},
88
	{0x10080, 0x100C4},
89
	{0x100C8, 0x10114},
90
	{0x1012C, 0x10130},
91
	{0x10138, 0x10144},
92
	{0x10200, 0x10220},
93
	{0x10230, 0x10250},
94
	{0x10260, 0x10280},
95
	{0x10290, 0x102B0},
96
	{0x102C0, 0x102DC},
97
	{0x102E0, 0x102F4},
98
	{0x102FC, 0x1037C},
99
	{0x10380, 0x10390},
100
	{0x10800, 0x10828},
101
	{0x10840, 0x10844},
102
	{0x10880, 0x10884},
103
	{0x108C0, 0x108E8},
104
	{0x10900, 0x10928},
105
	{0x10940, 0x10944},
106
	{0x10980, 0x10984},
107
	{0x109C0, 0x109E8},
108
	{0x10A00, 0x10A28},
109
	{0x10A40, 0x10A50},
110
	{0x11000, 0x11028},
111
	{0x11030, 0x11034},
112
	{0x11038, 0x11068},
113
	{0x11070, 0x11074},
114
	{0x11078, 0x110A8},
115
	{0x110B0, 0x110B4},
116
	{0x110B8, 0x110E8},
117
	{0x110F0, 0x110F4},
118
	{0x110F8, 0x11128},
119
	{0x11138, 0x11144},
120
	{0x11178, 0x11180},
121
	{0x111B8, 0x111C0},
122
	{0x111F8, 0x11200},
123
	{0x11238, 0x1123C},
124
	{0x11270, 0x11274},
125
	{0x11278, 0x1127C},
126
	{0x112B0, 0x112B4},
127
	{0x112B8, 0x112BC},
128
	{0x112F0, 0x112F4},
129
	{0x112F8, 0x112FC},
130
	{0x11338, 0x1133C},
131
	{0x11378, 0x1137C},
132
	{0x113B8, 0x113BC},
133
	{0x113F8, 0x113FC},
134
	{0x11438, 0x11440},
135
	{0x11478, 0x11480},
136
	{0x114B8, 0x114BC},
137
	{0x114F8, 0x114FC},
138
	{0x11538, 0x1153C},
139
	{0x11578, 0x1157C},
140
	{0x115B8, 0x115BC},
141
	{0x115F8, 0x115FC},
142
	{0x11638, 0x1163C},
143
	{0x11678, 0x1167C},
144
	{0x116B8, 0x116BC},
145
	{0x116F8, 0x116FC},
146
	{0x11738, 0x1173C},
147
	{0x11778, 0x1177C},
148
	{0x117B8, 0x117BC},
149
	{0x117F8, 0x117FC},
150
	{0x17000, 0x1701C},
151
	{0x17020, 0x170AC},
152
	{0x18000, 0x18050},
153
	{0x18054, 0x18074},
154
	{0x18080, 0x180D4},
155
	{0x180DC, 0x18104},
156
	{0x18108, 0x1813C},
157
	{0x18144, 0x18148},
158
	{0x18168, 0x18174},
159
	{0x18178, 0x18180},
160
	{0x181C8, 0x181E0},
161
	{0x181E4, 0x181E8},
162
	{0x181EC, 0x1820C},
163
	{0x1825C, 0x18280},
164
	{0x18284, 0x18290},
165
	{0x18294, 0x182A0},
166
	{0x18300, 0x18304},
167
	{0x18314, 0x18320},
168
	{0x18328, 0x18350},
169
	{0x1835C, 0x1836C},
170
	{0x18370, 0x18390},
171
	{0x18398, 0x183AC},
172
	{0x183BC, 0x183D8},
173
	{0x183DC, 0x183F4},
174
	{0x18400, 0x186F4},
175
	{0x186F8, 0x1871C},
176
	{0x18720, 0x18790},
177
	{0x19800, 0x19830},
178
	{0x19834, 0x19840},
179
	{0x19880, 0x1989C},
180
	{0x198A4, 0x198B0},
181
	{0x198BC, 0x19900},
182
	{0x19C00, 0x19C88},
183
	{0x19D00, 0x19D20},
184
	{0x19E00, 0x19E7C},
185
	{0x19E80, 0x19E94},
186
	{0x19E98, 0x19EAC},
187
	{0x19EB0, 0x19EBC},
188
	{0x19F70, 0x19F74},
189
	{0x19F80, 0x19F8C},
190
	{0x19FA0, 0x19FB4},
191
	{0x19FC0, 0x19FD8},
192
	{0x1A000, 0x1A200},
193
	{0x1A204, 0x1A210},
194
	{0x1A228, 0x1A22C},
195
	{0x1A230, 0x1A248},
196
	{0x1A250, 0x1A270},
197
	{0x1A280, 0x1A290},
198
	{0x1A2A0, 0x1A2A4},
199
	{0x1A2C0, 0x1A2EC},
200
	{0x1A300, 0x1A3BC},
201
	{0x1A3F0, 0x1A3F4},
202
	{0x1A3F8, 0x1A434},
203
	{0x1A438, 0x1A444},
204
	{0x1A448, 0x1A468},
205
	{0x1A580, 0x1A58C},
206
	{0x1A644, 0x1A654},
207
	{0x1A670, 0x1A698},
208
	{0x1A6AC, 0x1A6B0},
209
	{0x1A6D0, 0x1A6D4},
210
	{0x1A6EC, 0x1A70C},
211
	{0x1A710, 0x1A738},
212
	{0x1A7C0, 0x1A7D0},
213
	{0x1A7D4, 0x1A7D8},
214
	{0x1A7DC, 0x1A7E4},
215
	{0x1A7F0, 0x1A7F8},
216
	{0x1A888, 0x1A89C},
217
	{0x1A8A8, 0x1A8AC},
218
	{0x1A8C0, 0x1A8DC},
219
	{0x1A8F0, 0x1A8FC},
220
	{0x1AE04, 0x1AE08},
221
	{0x1AE18, 0x1AE24},
222
	{0x1AF80, 0x1AF8C},
223
	{0x1AFA0, 0x1AFB4},
224
	{0x1B000, 0x1B200},
225
	{0x1B284, 0x1B288},
226
	{0x1B2D0, 0x1B2D8},
227
	{0x1B2DC, 0x1B2EC},
228
	{0x1B300, 0x1B340},
229
	{0x1B374, 0x1B378},
230
	{0x1B380, 0x1B384},
231
	{0x1B388, 0x1B38C},
232
	{0x1B404, 0x1B408},
233
	{0x1B420, 0x1B428},
234
	{0x1B440, 0x1B444},
235
	{0x1B448, 0x1B44C},
236
	{0x1B450, 0x1B458},
237
	{0x1B45C, 0x1B468},
238
	{0x1B584, 0x1B58C},
239
	{0x1B68C, 0x1B690},
240
	{0x1B6AC, 0x1B6B0},
241
	{0x1B7F0, 0x1B7F8},
242
	{0x1C800, 0x1CC00},
243
	{0x1CE00, 0x1CE04},
244
	{0x1CF80, 0x1CF84},
245
	{0x1D200, 0x1D800},
246
	{0x1E000, 0x20014},
247
	{0x20100, 0x20124},
248
	{0x21400, 0x217A8},
249
	{0x21800, 0x21BA8},
250
	{0x21C00, 0x21FA8},
251
	{0x22000, 0x223A8},
252
	{0x22400, 0x227A8},
253
	{0x22800, 0x22BA8},
254
	{0x22C00, 0x22FA8},
255
	{0x23000, 0x233A8},
256
	{0x24000, 0x24034},
257
	{0x26000, 0x26064},
258
	{0x27000, 0x27024},
259
	{0x34000, 0x3400C},
260
	{0x34400, 0x3445C},
261
	{0x34800, 0x3485C},
262
	{0x34C00, 0x34C5C},
263
	{0x35000, 0x3505C},
264
	{0x35400, 0x3545C},
265
	{0x35800, 0x3585C},
266
	{0x35C00, 0x35C5C},
267
	{0x36000, 0x3605C},
268
	{0x38000, 0x38064},
269
	{0x38070, 0x380E0},
270
	{0x3A000, 0x3A064},
271
	{0x40000, 0x400A4},
272
	{0x80000, 0x8000C},
273
	{0x80010, 0x80020},
274
};
275

276
static const struct ath10k_mem_section qca6174_hw30_sdio_register_sections[] = {
277
	{0x800, 0x810},
278
	{0x820, 0x82C},
279
	{0x830, 0x8F4},
280
	{0x90C, 0x91C},
281
	{0xA14, 0xA18},
282
	{0xA84, 0xA94},
283
	{0xAA8, 0xAD4},
284
	{0xADC, 0xB40},
285
	{0x1000, 0x10A4},
286
	{0x10BC, 0x111C},
287
	{0x1134, 0x1138},
288
	{0x1144, 0x114C},
289
	{0x1150, 0x115C},
290
	{0x1160, 0x1178},
291
	{0x1240, 0x1260},
292
	{0x2000, 0x207C},
293
	{0x3000, 0x3014},
294
	{0x4000, 0x4014},
295
	{0x5000, 0x5124},
296
	{0x6000, 0x6040},
297
	{0x6080, 0x60CC},
298
	{0x6100, 0x611C},
299
	{0x6140, 0x61D8},
300
	{0x6200, 0x6238},
301
	{0x6240, 0x628C},
302
	{0x62C0, 0x62EC},
303
	{0x6380, 0x63E8},
304
	{0x6400, 0x6440},
305
	{0x6480, 0x64CC},
306
	{0x6500, 0x651C},
307
	{0x6540, 0x6580},
308
	{0x6600, 0x6638},
309
	{0x6640, 0x668C},
310
	{0x66C0, 0x66EC},
311
	{0x6780, 0x67E8},
312
	{0x7080, 0x708C},
313
	{0x70C0, 0x70C8},
314
	{0x7400, 0x741C},
315
	{0x7440, 0x7454},
316
	{0x7800, 0x7818},
317
	{0x8010, 0x8060},
318
	{0x8080, 0x8084},
319
	{0x80A0, 0x80A4},
320
	{0x80C0, 0x80C4},
321
	{0x80E0, 0x80ec},
322
	{0x8110, 0x8128},
323
	{0x9000, 0x9004},
324
	{0xF000, 0xF0E0},
325
	{0xF140, 0xF190},
326
	{0xF250, 0xF25C},
327
	{0xF260, 0xF268},
328
	{0xF26C, 0xF2A8},
329
	{0x10008, 0x1000C},
330
	{0x10014, 0x10018},
331
	{0x1001C, 0x10020},
332
	{0x10024, 0x10028},
333
	{0x10030, 0x10034},
334
	{0x10040, 0x10054},
335
	{0x10058, 0x1007C},
336
	{0x10080, 0x100C4},
337
	{0x100C8, 0x10114},
338
	{0x1012C, 0x10130},
339
	{0x10138, 0x10144},
340
	{0x10200, 0x10220},
341
	{0x10230, 0x10250},
342
	{0x10260, 0x10280},
343
	{0x10290, 0x102B0},
344
	{0x102C0, 0x102DC},
345
	{0x102E0, 0x102F4},
346
	{0x102FC, 0x1037C},
347
	{0x10380, 0x10390},
348
	{0x10800, 0x10828},
349
	{0x10840, 0x10844},
350
	{0x10880, 0x10884},
351
	{0x108C0, 0x108E8},
352
	{0x10900, 0x10928},
353
	{0x10940, 0x10944},
354
	{0x10980, 0x10984},
355
	{0x109C0, 0x109E8},
356
	{0x10A00, 0x10A28},
357
	{0x10A40, 0x10A50},
358
	{0x11000, 0x11028},
359
	{0x11030, 0x11034},
360
	{0x11038, 0x11068},
361
	{0x11070, 0x11074},
362
	{0x11078, 0x110A8},
363
	{0x110B0, 0x110B4},
364
	{0x110B8, 0x110E8},
365
	{0x110F0, 0x110F4},
366
	{0x110F8, 0x11128},
367
	{0x11138, 0x11144},
368
	{0x11178, 0x11180},
369
	{0x111B8, 0x111C0},
370
	{0x111F8, 0x11200},
371
	{0x11238, 0x1123C},
372
	{0x11270, 0x11274},
373
	{0x11278, 0x1127C},
374
	{0x112B0, 0x112B4},
375
	{0x112B8, 0x112BC},
376
	{0x112F0, 0x112F4},
377
	{0x112F8, 0x112FC},
378
	{0x11338, 0x1133C},
379
	{0x11378, 0x1137C},
380
	{0x113B8, 0x113BC},
381
	{0x113F8, 0x113FC},
382
	{0x11438, 0x11440},
383
	{0x11478, 0x11480},
384
	{0x114B8, 0x114BC},
385
	{0x114F8, 0x114FC},
386
	{0x11538, 0x1153C},
387
	{0x11578, 0x1157C},
388
	{0x115B8, 0x115BC},
389
	{0x115F8, 0x115FC},
390
	{0x11638, 0x1163C},
391
	{0x11678, 0x1167C},
392
	{0x116B8, 0x116BC},
393
	{0x116F8, 0x116FC},
394
	{0x11738, 0x1173C},
395
	{0x11778, 0x1177C},
396
	{0x117B8, 0x117BC},
397
	{0x117F8, 0x117FC},
398
	{0x17000, 0x1701C},
399
	{0x17020, 0x170AC},
400
	{0x18000, 0x18050},
401
	{0x18054, 0x18074},
402
	{0x18080, 0x180D4},
403
	{0x180DC, 0x18104},
404
	{0x18108, 0x1813C},
405
	{0x18144, 0x18148},
406
	{0x18168, 0x18174},
407
	{0x18178, 0x18180},
408
	{0x181C8, 0x181E0},
409
	{0x181E4, 0x181E8},
410
	{0x181EC, 0x1820C},
411
	{0x1825C, 0x18280},
412
	{0x18284, 0x18290},
413
	{0x18294, 0x182A0},
414
	{0x18300, 0x18304},
415
	{0x18314, 0x18320},
416
	{0x18328, 0x18350},
417
	{0x1835C, 0x1836C},
418
	{0x18370, 0x18390},
419
	{0x18398, 0x183AC},
420
	{0x183BC, 0x183D8},
421
	{0x183DC, 0x183F4},
422
	{0x18400, 0x186F4},
423
	{0x186F8, 0x1871C},
424
	{0x18720, 0x18790},
425
	{0x19800, 0x19830},
426
	{0x19834, 0x19840},
427
	{0x19880, 0x1989C},
428
	{0x198A4, 0x198B0},
429
	{0x198BC, 0x19900},
430
	{0x19C00, 0x19C88},
431
	{0x19D00, 0x19D20},
432
	{0x19E00, 0x19E7C},
433
	{0x19E80, 0x19E94},
434
	{0x19E98, 0x19EAC},
435
	{0x19EB0, 0x19EBC},
436
	{0x19F70, 0x19F74},
437
	{0x19F80, 0x19F8C},
438
	{0x19FA0, 0x19FB4},
439
	{0x19FC0, 0x19FD8},
440
	{0x1A000, 0x1A200},
441
	{0x1A204, 0x1A210},
442
	{0x1A228, 0x1A22C},
443
	{0x1A230, 0x1A248},
444
	{0x1A250, 0x1A270},
445
	{0x1A280, 0x1A290},
446
	{0x1A2A0, 0x1A2A4},
447
	{0x1A2C0, 0x1A2EC},
448
	{0x1A300, 0x1A3BC},
449
	{0x1A3F0, 0x1A3F4},
450
	{0x1A3F8, 0x1A434},
451
	{0x1A438, 0x1A444},
452
	{0x1A448, 0x1A468},
453
	{0x1A580, 0x1A58C},
454
	{0x1A644, 0x1A654},
455
	{0x1A670, 0x1A698},
456
	{0x1A6AC, 0x1A6B0},
457
	{0x1A6D0, 0x1A6D4},
458
	{0x1A6EC, 0x1A70C},
459
	{0x1A710, 0x1A738},
460
	{0x1A7C0, 0x1A7D0},
461
	{0x1A7D4, 0x1A7D8},
462
	{0x1A7DC, 0x1A7E4},
463
	{0x1A7F0, 0x1A7F8},
464
	{0x1A888, 0x1A89C},
465
	{0x1A8A8, 0x1A8AC},
466
	{0x1A8C0, 0x1A8DC},
467
	{0x1A8F0, 0x1A8FC},
468
	{0x1AE04, 0x1AE08},
469
	{0x1AE18, 0x1AE24},
470
	{0x1AF80, 0x1AF8C},
471
	{0x1AFA0, 0x1AFB4},
472
	{0x1B000, 0x1B200},
473
	{0x1B284, 0x1B288},
474
	{0x1B2D0, 0x1B2D8},
475
	{0x1B2DC, 0x1B2EC},
476
	{0x1B300, 0x1B340},
477
	{0x1B374, 0x1B378},
478
	{0x1B380, 0x1B384},
479
	{0x1B388, 0x1B38C},
480
	{0x1B404, 0x1B408},
481
	{0x1B420, 0x1B428},
482
	{0x1B440, 0x1B444},
483
	{0x1B448, 0x1B44C},
484
	{0x1B450, 0x1B458},
485
	{0x1B45C, 0x1B468},
486
	{0x1B584, 0x1B58C},
487
	{0x1B68C, 0x1B690},
488
	{0x1B6AC, 0x1B6B0},
489
	{0x1B7F0, 0x1B7F8},
490
	{0x1C800, 0x1CC00},
491
	{0x1CE00, 0x1CE04},
492
	{0x1CF80, 0x1CF84},
493
	{0x1D200, 0x1D800},
494
	{0x1E000, 0x20014},
495
	{0x20100, 0x20124},
496
	{0x21400, 0x217A8},
497
	{0x21800, 0x21BA8},
498
	{0x21C00, 0x21FA8},
499
	{0x22000, 0x223A8},
500
	{0x22400, 0x227A8},
501
	{0x22800, 0x22BA8},
502
	{0x22C00, 0x22FA8},
503
	{0x23000, 0x233A8},
504
	{0x24000, 0x24034},
505

506
	/* EFUSE0,1,2 is disabled here
507
	 * because its state may be reset
508
	 *
509
	 * {0x24800, 0x24804},
510
	 * {0x25000, 0x25004},
511
	 * {0x25800, 0x25804},
512
	 */
513

514
	{0x26000, 0x26064},
515
	{0x27000, 0x27024},
516
	{0x34000, 0x3400C},
517
	{0x34400, 0x3445C},
518
	{0x34800, 0x3485C},
519
	{0x34C00, 0x34C5C},
520
	{0x35000, 0x3505C},
521
	{0x35400, 0x3545C},
522
	{0x35800, 0x3585C},
523
	{0x35C00, 0x35C5C},
524
	{0x36000, 0x3605C},
525
	{0x38000, 0x38064},
526
	{0x38070, 0x380E0},
527
	{0x3A000, 0x3A074},
528

529
	/* DBI windows is skipped here, it can be only accessed when pcie
530
	 * is active (not in reset) and CORE_CTRL_PCIE_LTSSM_EN = 0 &&
531
	 * PCIE_CTRL_APP_LTSSM_ENALBE=0.
532
	 * {0x3C000 , 0x3C004},
533
	 */
534

535
	{0x40000, 0x400A4},
536

537
	/* SI register is skipped here.
538
	 * Because it will cause bus hang
539
	 *
540
	 * {0x50000, 0x50018},
541
	 */
542

543
	{0x80000, 0x8000C},
544
	{0x80010, 0x80020},
545
};
546

547
static const struct ath10k_mem_section qca6174_hw30_register_sections[] = {
548
	{0x800, 0x810},
549
	{0x820, 0x82C},
550
	{0x830, 0x8F4},
551
	{0x90C, 0x91C},
552
	{0xA14, 0xA18},
553
	{0xA84, 0xA94},
554
	{0xAA8, 0xAD4},
555
	{0xADC, 0xB40},
556
	{0x1000, 0x10A4},
557
	{0x10BC, 0x111C},
558
	{0x1134, 0x1138},
559
	{0x1144, 0x114C},
560
	{0x1150, 0x115C},
561
	{0x1160, 0x1178},
562
	{0x1240, 0x1260},
563
	{0x2000, 0x207C},
564
	{0x3000, 0x3014},
565
	{0x4000, 0x4014},
566
	{0x5000, 0x5124},
567
	{0x6000, 0x6040},
568
	{0x6080, 0x60CC},
569
	{0x6100, 0x611C},
570
	{0x6140, 0x61D8},
571
	{0x6200, 0x6238},
572
	{0x6240, 0x628C},
573
	{0x62C0, 0x62EC},
574
	{0x6380, 0x63E8},
575
	{0x6400, 0x6440},
576
	{0x6480, 0x64CC},
577
	{0x6500, 0x651C},
578
	{0x6540, 0x6580},
579
	{0x6600, 0x6638},
580
	{0x6640, 0x668C},
581
	{0x66C0, 0x66EC},
582
	{0x6780, 0x67E8},
583
	{0x7080, 0x708C},
584
	{0x70C0, 0x70C8},
585
	{0x7400, 0x741C},
586
	{0x7440, 0x7454},
587
	{0x7800, 0x7818},
588
	{0x8000, 0x8004},
589
	{0x8010, 0x8064},
590
	{0x8080, 0x8084},
591
	{0x80A0, 0x80A4},
592
	{0x80C0, 0x80C4},
593
	{0x80E0, 0x80F4},
594
	{0x8100, 0x8104},
595
	{0x8110, 0x812C},
596
	{0x9000, 0x9004},
597
	{0x9800, 0x982C},
598
	{0x9830, 0x9838},
599
	{0x9840, 0x986C},
600
	{0x9870, 0x9898},
601
	{0x9A00, 0x9C00},
602
	{0xD580, 0xD59C},
603
	{0xF000, 0xF0E0},
604
	{0xF140, 0xF190},
605
	{0xF250, 0xF25C},
606
	{0xF260, 0xF268},
607
	{0xF26C, 0xF2A8},
608
	{0x10008, 0x1000C},
609
	{0x10014, 0x10018},
610
	{0x1001C, 0x10020},
611
	{0x10024, 0x10028},
612
	{0x10030, 0x10034},
613
	{0x10040, 0x10054},
614
	{0x10058, 0x1007C},
615
	{0x10080, 0x100C4},
616
	{0x100C8, 0x10114},
617
	{0x1012C, 0x10130},
618
	{0x10138, 0x10144},
619
	{0x10200, 0x10220},
620
	{0x10230, 0x10250},
621
	{0x10260, 0x10280},
622
	{0x10290, 0x102B0},
623
	{0x102C0, 0x102DC},
624
	{0x102E0, 0x102F4},
625
	{0x102FC, 0x1037C},
626
	{0x10380, 0x10390},
627
	{0x10800, 0x10828},
628
	{0x10840, 0x10844},
629
	{0x10880, 0x10884},
630
	{0x108C0, 0x108E8},
631
	{0x10900, 0x10928},
632
	{0x10940, 0x10944},
633
	{0x10980, 0x10984},
634
	{0x109C0, 0x109E8},
635
	{0x10A00, 0x10A28},
636
	{0x10A40, 0x10A50},
637
	{0x11000, 0x11028},
638
	{0x11030, 0x11034},
639
	{0x11038, 0x11068},
640
	{0x11070, 0x11074},
641
	{0x11078, 0x110A8},
642
	{0x110B0, 0x110B4},
643
	{0x110B8, 0x110E8},
644
	{0x110F0, 0x110F4},
645
	{0x110F8, 0x11128},
646
	{0x11138, 0x11144},
647
	{0x11178, 0x11180},
648
	{0x111B8, 0x111C0},
649
	{0x111F8, 0x11200},
650
	{0x11238, 0x1123C},
651
	{0x11270, 0x11274},
652
	{0x11278, 0x1127C},
653
	{0x112B0, 0x112B4},
654
	{0x112B8, 0x112BC},
655
	{0x112F0, 0x112F4},
656
	{0x112F8, 0x112FC},
657
	{0x11338, 0x1133C},
658
	{0x11378, 0x1137C},
659
	{0x113B8, 0x113BC},
660
	{0x113F8, 0x113FC},
661
	{0x11438, 0x11440},
662
	{0x11478, 0x11480},
663
	{0x114B8, 0x114BC},
664
	{0x114F8, 0x114FC},
665
	{0x11538, 0x1153C},
666
	{0x11578, 0x1157C},
667
	{0x115B8, 0x115BC},
668
	{0x115F8, 0x115FC},
669
	{0x11638, 0x1163C},
670
	{0x11678, 0x1167C},
671
	{0x116B8, 0x116BC},
672
	{0x116F8, 0x116FC},
673
	{0x11738, 0x1173C},
674
	{0x11778, 0x1177C},
675
	{0x117B8, 0x117BC},
676
	{0x117F8, 0x117FC},
677
	{0x17000, 0x1701C},
678
	{0x17020, 0x170AC},
679
	{0x18000, 0x18050},
680
	{0x18054, 0x18074},
681
	{0x18080, 0x180D4},
682
	{0x180DC, 0x18104},
683
	{0x18108, 0x1813C},
684
	{0x18144, 0x18148},
685
	{0x18168, 0x18174},
686
	{0x18178, 0x18180},
687
	{0x181C8, 0x181E0},
688
	{0x181E4, 0x181E8},
689
	{0x181EC, 0x1820C},
690
	{0x1825C, 0x18280},
691
	{0x18284, 0x18290},
692
	{0x18294, 0x182A0},
693
	{0x18300, 0x18304},
694
	{0x18314, 0x18320},
695
	{0x18328, 0x18350},
696
	{0x1835C, 0x1836C},
697
	{0x18370, 0x18390},
698
	{0x18398, 0x183AC},
699
	{0x183BC, 0x183D8},
700
	{0x183DC, 0x183F4},
701
	{0x18400, 0x186F4},
702
	{0x186F8, 0x1871C},
703
	{0x18720, 0x18790},
704
	{0x19800, 0x19830},
705
	{0x19834, 0x19840},
706
	{0x19880, 0x1989C},
707
	{0x198A4, 0x198B0},
708
	{0x198BC, 0x19900},
709
	{0x19C00, 0x19C88},
710
	{0x19D00, 0x19D20},
711
	{0x19E00, 0x19E7C},
712
	{0x19E80, 0x19E94},
713
	{0x19E98, 0x19EAC},
714
	{0x19EB0, 0x19EBC},
715
	{0x19F70, 0x19F74},
716
	{0x19F80, 0x19F8C},
717
	{0x19FA0, 0x19FB4},
718
	{0x19FC0, 0x19FD8},
719
	{0x1A000, 0x1A200},
720
	{0x1A204, 0x1A210},
721
	{0x1A228, 0x1A22C},
722
	{0x1A230, 0x1A248},
723
	{0x1A250, 0x1A270},
724
	{0x1A280, 0x1A290},
725
	{0x1A2A0, 0x1A2A4},
726
	{0x1A2C0, 0x1A2EC},
727
	{0x1A300, 0x1A3BC},
728
	{0x1A3F0, 0x1A3F4},
729
	{0x1A3F8, 0x1A434},
730
	{0x1A438, 0x1A444},
731
	{0x1A448, 0x1A468},
732
	{0x1A580, 0x1A58C},
733
	{0x1A644, 0x1A654},
734
	{0x1A670, 0x1A698},
735
	{0x1A6AC, 0x1A6B0},
736
	{0x1A6D0, 0x1A6D4},
737
	{0x1A6EC, 0x1A70C},
738
	{0x1A710, 0x1A738},
739
	{0x1A7C0, 0x1A7D0},
740
	{0x1A7D4, 0x1A7D8},
741
	{0x1A7DC, 0x1A7E4},
742
	{0x1A7F0, 0x1A7F8},
743
	{0x1A888, 0x1A89C},
744
	{0x1A8A8, 0x1A8AC},
745
	{0x1A8C0, 0x1A8DC},
746
	{0x1A8F0, 0x1A8FC},
747
	{0x1AE04, 0x1AE08},
748
	{0x1AE18, 0x1AE24},
749
	{0x1AF80, 0x1AF8C},
750
	{0x1AFA0, 0x1AFB4},
751
	{0x1B000, 0x1B200},
752
	{0x1B284, 0x1B288},
753
	{0x1B2D0, 0x1B2D8},
754
	{0x1B2DC, 0x1B2EC},
755
	{0x1B300, 0x1B340},
756
	{0x1B374, 0x1B378},
757
	{0x1B380, 0x1B384},
758
	{0x1B388, 0x1B38C},
759
	{0x1B404, 0x1B408},
760
	{0x1B420, 0x1B428},
761
	{0x1B440, 0x1B444},
762
	{0x1B448, 0x1B44C},
763
	{0x1B450, 0x1B458},
764
	{0x1B45C, 0x1B468},
765
	{0x1B584, 0x1B58C},
766
	{0x1B68C, 0x1B690},
767
	{0x1B6AC, 0x1B6B0},
768
	{0x1B7F0, 0x1B7F8},
769
	{0x1C800, 0x1CC00},
770
	{0x1CE00, 0x1CE04},
771
	{0x1CF80, 0x1CF84},
772
	{0x1D200, 0x1D800},
773
	{0x1E000, 0x20014},
774
	{0x20100, 0x20124},
775
	{0x21400, 0x217A8},
776
	{0x21800, 0x21BA8},
777
	{0x21C00, 0x21FA8},
778
	{0x22000, 0x223A8},
779
	{0x22400, 0x227A8},
780
	{0x22800, 0x22BA8},
781
	{0x22C00, 0x22FA8},
782
	{0x23000, 0x233A8},
783
	{0x24000, 0x24034},
784
	{0x26000, 0x26064},
785
	{0x27000, 0x27024},
786
	{0x34000, 0x3400C},
787
	{0x34400, 0x3445C},
788
	{0x34800, 0x3485C},
789
	{0x34C00, 0x34C5C},
790
	{0x35000, 0x3505C},
791
	{0x35400, 0x3545C},
792
	{0x35800, 0x3585C},
793
	{0x35C00, 0x35C5C},
794
	{0x36000, 0x3605C},
795
	{0x38000, 0x38064},
796
	{0x38070, 0x380E0},
797
	{0x3A000, 0x3A074},
798
	{0x40000, 0x400A4},
799
	{0x80000, 0x8000C},
800
	{0x80010, 0x80020},
801
};
802

803
static const struct ath10k_mem_region qca6174_hw10_mem_regions[] = {
804
	{
805
		.type = ATH10K_MEM_REGION_TYPE_DRAM,
806
		.start = 0x400000,
807
		.len = 0x70000,
808
		.name = "DRAM",
809
		.section_table = {
810
			.sections = NULL,
811
			.size = 0,
812
		},
813
	},
814
	{
815
		.type = ATH10K_MEM_REGION_TYPE_REG,
816

817
		/* RTC_SOC_BASE_ADDRESS */
818
		.start = 0x0,
819

820
		/* WLAN_MBOX_BASE_ADDRESS - RTC_SOC_BASE_ADDRESS */
821
		.len = 0x800 - 0x0,
822

823
		.name = "REG_PART1",
824
		.section_table = {
825
			.sections = NULL,
826
			.size = 0,
827
		},
828
	},
829
	{
830
		.type = ATH10K_MEM_REGION_TYPE_REG,
831

832
		/* STEREO_BASE_ADDRESS */
833
		.start = 0x27000,
834

835
		/* USB_BASE_ADDRESS - STEREO_BASE_ADDRESS */
836
		.len = 0x60000 - 0x27000,
837

838
		.name = "REG_PART2",
839
		.section_table = {
840
			.sections = NULL,
841
			.size = 0,
842
		},
843
	},
844
};
845

846
static const struct ath10k_mem_region qca6174_hw21_mem_regions[] = {
847
	{
848
		.type = ATH10K_MEM_REGION_TYPE_DRAM,
849
		.start = 0x400000,
850
		.len = 0x70000,
851
		.name = "DRAM",
852
		.section_table = {
853
			.sections = NULL,
854
			.size = 0,
855
		},
856
	},
857
	{
858
		.type = ATH10K_MEM_REGION_TYPE_AXI,
859
		.start = 0xa0000,
860
		.len = 0x18000,
861
		.name = "AXI",
862
		.section_table = {
863
			.sections = NULL,
864
			.size = 0,
865
		},
866
	},
867
	{
868
		.type = ATH10K_MEM_REGION_TYPE_REG,
869
		.start = 0x800,
870
		.len = 0x80020 - 0x800,
871
		.name = "REG_TOTAL",
872
		.section_table = {
873
			.sections = qca6174_hw21_register_sections,
874
			.size = ARRAY_SIZE(qca6174_hw21_register_sections),
875
		},
876
	},
877
};
878

879
static const struct ath10k_mem_region qca6174_hw30_sdio_mem_regions[] = {
880
	{
881
		.type = ATH10K_MEM_REGION_TYPE_DRAM,
882
		.start = 0x400000,
883
		.len = 0xa8000,
884
		.name = "DRAM",
885
		.section_table = {
886
			.sections = NULL,
887
			.size = 0,
888
		},
889
	},
890
	{
891
		.type = ATH10K_MEM_REGION_TYPE_AXI,
892
		.start = 0xa0000,
893
		.len = 0x18000,
894
		.name = "AXI",
895
		.section_table = {
896
			.sections = NULL,
897
			.size = 0,
898
		},
899
	},
900
	{
901
		.type = ATH10K_MEM_REGION_TYPE_IRAM1,
902
		.start = 0x00980000,
903
		.len = 0x00080000,
904
		.name = "IRAM1",
905
		.section_table = {
906
			.sections = NULL,
907
			.size = 0,
908
		},
909
	},
910
	{
911
		.type = ATH10K_MEM_REGION_TYPE_IRAM2,
912
		.start = 0x00a00000,
913
		.len = 0x00040000,
914
		.name = "IRAM2",
915
		.section_table = {
916
			.sections = NULL,
917
			.size = 0,
918
		},
919
	},
920
	{
921
		.type = ATH10K_MEM_REGION_TYPE_REG,
922
		.start = 0x800,
923
		.len = 0x80020 - 0x800,
924
		.name = "REG_TOTAL",
925
		.section_table = {
926
			.sections = qca6174_hw30_sdio_register_sections,
927
			.size = ARRAY_SIZE(qca6174_hw30_sdio_register_sections),
928
		},
929
	},
930
};
931

932
static const struct ath10k_mem_region qca6174_hw30_mem_regions[] = {
933
	{
934
		.type = ATH10K_MEM_REGION_TYPE_DRAM,
935
		.start = 0x400000,
936
		.len = 0xa8000,
937
		.name = "DRAM",
938
		.section_table = {
939
			.sections = NULL,
940
			.size = 0,
941
		},
942
	},
943
	{
944
		.type = ATH10K_MEM_REGION_TYPE_AXI,
945
		.start = 0xa0000,
946
		.len = 0x18000,
947
		.name = "AXI",
948
		.section_table = {
949
			.sections = NULL,
950
			.size = 0,
951
		},
952
	},
953
	{
954
		.type = ATH10K_MEM_REGION_TYPE_REG,
955
		.start = 0x800,
956
		.len = 0x80020 - 0x800,
957
		.name = "REG_TOTAL",
958
		.section_table = {
959
			.sections = qca6174_hw30_register_sections,
960
			.size = ARRAY_SIZE(qca6174_hw30_register_sections),
961
		},
962
	},
963

964
	/* IRAM dump must be put last */
965
	{
966
		.type = ATH10K_MEM_REGION_TYPE_IRAM1,
967
		.start = 0x00980000,
968
		.len = 0x00080000,
969
		.name = "IRAM1",
970
		.section_table = {
971
			.sections = NULL,
972
			.size = 0,
973
		},
974
	},
975
	{
976
		.type = ATH10K_MEM_REGION_TYPE_IRAM2,
977
		.start = 0x00a00000,
978
		.len = 0x00040000,
979
		.name = "IRAM2",
980
		.section_table = {
981
			.sections = NULL,
982
			.size = 0,
983
		},
984
	},
985
};
986

987
static const struct ath10k_mem_region qca988x_hw20_mem_regions[] = {
988
	{
989
		.type = ATH10K_MEM_REGION_TYPE_DRAM,
990
		.start = 0x400000,
991
		.len = 0x50000,
992
		.name = "DRAM",
993
		.section_table = {
994
			.sections = NULL,
995
			.size = 0,
996
		},
997
	},
998
	{
999
		.type = ATH10K_MEM_REGION_TYPE_REG,
1000
		.start = 0x4000,
1001
		.len = 0x2000,
1002
		.name = "REG_PART1",
1003
		.section_table = {
1004
			.sections = NULL,
1005
			.size = 0,
1006
		},
1007
	},
1008
	{
1009
		.type = ATH10K_MEM_REGION_TYPE_REG,
1010
		.start = 0x8000,
1011
		.len = 0x58000,
1012
		.name = "REG_PART2",
1013
		.section_table = {
1014
			.sections = NULL,
1015
			.size = 0,
1016
		},
1017
	},
1018
};
1019

1020
static const struct ath10k_mem_region qca99x0_hw20_mem_regions[] = {
1021
	{
1022
		.type = ATH10K_MEM_REGION_TYPE_DRAM,
1023
		.start = 0x400000,
1024
		.len = 0x60000,
1025
		.name = "DRAM",
1026
		.section_table = {
1027
			.sections = NULL,
1028
			.size = 0,
1029
		},
1030
	},
1031
	{
1032
		.type = ATH10K_MEM_REGION_TYPE_REG,
1033
		.start = 0x980000,
1034
		.len = 0x50000,
1035
		.name = "IRAM",
1036
		.section_table = {
1037
			.sections = NULL,
1038
			.size = 0,
1039
		},
1040
	},
1041
	{
1042
		.type = ATH10K_MEM_REGION_TYPE_IOSRAM,
1043
		.start = 0xC0000,
1044
		.len = 0x40000,
1045
		.name = "SRAM",
1046
		.section_table = {
1047
			.sections = NULL,
1048
			.size = 0,
1049
		},
1050
	},
1051
	{
1052
		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1053
		.start = 0x30000,
1054
		.len = 0x7000,
1055
		.name = "APB REG 1",
1056
		.section_table = {
1057
			.sections = NULL,
1058
			.size = 0,
1059
		},
1060
	},
1061
	{
1062
		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1063
		.start = 0x3f000,
1064
		.len = 0x3000,
1065
		.name = "APB REG 2",
1066
		.section_table = {
1067
			.sections = NULL,
1068
			.size = 0,
1069
		},
1070
	},
1071
	{
1072
		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1073
		.start = 0x43000,
1074
		.len = 0x3000,
1075
		.name = "WIFI REG",
1076
		.section_table = {
1077
			.sections = NULL,
1078
			.size = 0,
1079
		},
1080
	},
1081
	{
1082
		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1083
		.start = 0x4A000,
1084
		.len = 0x5000,
1085
		.name = "CE REG",
1086
		.section_table = {
1087
			.sections = NULL,
1088
			.size = 0,
1089
		},
1090
	},
1091
	{
1092
		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1093
		.start = 0x80000,
1094
		.len = 0x6000,
1095
		.name = "SOC REG",
1096
		.section_table = {
1097
			.sections = NULL,
1098
			.size = 0,
1099
		},
1100
	},
1101
};
1102

1103
static const struct ath10k_mem_region qca9984_hw10_mem_regions[] = {
1104
	{
1105
		.type = ATH10K_MEM_REGION_TYPE_DRAM,
1106
		.start = 0x400000,
1107
		.len = 0x80000,
1108
		.name = "DRAM",
1109
		.section_table = {
1110
			.sections = NULL,
1111
			.size = 0,
1112
		},
1113
	},
1114
	{
1115
		.type = ATH10K_MEM_REGION_TYPE_REG,
1116
		.start = 0x980000,
1117
		.len = 0x50000,
1118
		.name = "IRAM",
1119
		.section_table = {
1120
			.sections = NULL,
1121
			.size = 0,
1122
		},
1123
	},
1124
	{
1125
		.type = ATH10K_MEM_REGION_TYPE_IOSRAM,
1126
		.start = 0xC0000,
1127
		.len = 0x40000,
1128
		.name = "SRAM",
1129
		.section_table = {
1130
			.sections = NULL,
1131
			.size = 0,
1132
		},
1133
	},
1134
	{
1135
		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1136
		.start = 0x30000,
1137
		.len = 0x7000,
1138
		.name = "APB REG 1",
1139
		.section_table = {
1140
			.sections = NULL,
1141
			.size = 0,
1142
		},
1143
	},
1144
	{
1145
		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1146
		.start = 0x3f000,
1147
		.len = 0x3000,
1148
		.name = "APB REG 2",
1149
		.section_table = {
1150
			.sections = NULL,
1151
			.size = 0,
1152
		},
1153
	},
1154
	{
1155
		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1156
		.start = 0x43000,
1157
		.len = 0x3000,
1158
		.name = "WIFI REG",
1159
		.section_table = {
1160
			.sections = NULL,
1161
			.size = 0,
1162
		},
1163
	},
1164
	{
1165
		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1166
		.start = 0x4A000,
1167
		.len = 0x5000,
1168
		.name = "CE REG",
1169
		.section_table = {
1170
			.sections = NULL,
1171
			.size = 0,
1172
		},
1173
	},
1174
	{
1175
		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1176
		.start = 0x80000,
1177
		.len = 0x6000,
1178
		.name = "SOC REG",
1179
		.section_table = {
1180
			.sections = NULL,
1181
			.size = 0,
1182
		},
1183
	},
1184
};
1185

1186
static const struct ath10k_mem_section ipq4019_soc_reg_range[] = {
1187
	{0x080000, 0x080004},
1188
	{0x080020, 0x080024},
1189
	{0x080028, 0x080050},
1190
	{0x0800d4, 0x0800ec},
1191
	{0x08010c, 0x080118},
1192
	{0x080284, 0x080290},
1193
	{0x0802a8, 0x0802b8},
1194
	{0x0802dc, 0x08030c},
1195
	{0x082000, 0x083fff}
1196
};
1197

1198
static const struct ath10k_mem_region qca4019_hw10_mem_regions[] = {
1199
	{
1200
		.type = ATH10K_MEM_REGION_TYPE_DRAM,
1201
		.start = 0x400000,
1202
		.len = 0x68000,
1203
		.name = "DRAM",
1204
		.section_table = {
1205
			.sections = NULL,
1206
			.size = 0,
1207
		},
1208
	},
1209
	{
1210
		.type = ATH10K_MEM_REGION_TYPE_REG,
1211
		.start = 0xC0000,
1212
		.len = 0x40000,
1213
		.name = "SRAM",
1214
		.section_table = {
1215
			.sections = NULL,
1216
			.size = 0,
1217
		},
1218
	},
1219
	{
1220
		.type = ATH10K_MEM_REGION_TYPE_REG,
1221
		.start = 0x980000,
1222
		.len = 0x50000,
1223
		.name = "IRAM",
1224
		.section_table = {
1225
			.sections = NULL,
1226
			.size = 0,
1227
		},
1228
	},
1229
	{
1230
		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1231
		.start = 0x30000,
1232
		.len = 0x7000,
1233
		.name = "APB REG 1",
1234
		.section_table = {
1235
			.sections = NULL,
1236
			.size = 0,
1237
		},
1238
	},
1239
	{
1240
		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1241
		.start = 0x3f000,
1242
		.len = 0x3000,
1243
		.name = "APB REG 2",
1244
		.section_table = {
1245
			.sections = NULL,
1246
			.size = 0,
1247
		},
1248
	},
1249
	{
1250
		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1251
		.start = 0x43000,
1252
		.len = 0x3000,
1253
		.name = "WIFI REG",
1254
		.section_table = {
1255
			.sections = NULL,
1256
			.size = 0,
1257
		},
1258
	},
1259
	{
1260
		.type = ATH10K_MEM_REGION_TYPE_IOREG,
1261
		.start = 0x4A000,
1262
		.len = 0x5000,
1263
		.name = "CE REG",
1264
		.section_table = {
1265
			.sections = NULL,
1266
			.size = 0,
1267
		},
1268
	},
1269
	{
1270
		.type = ATH10K_MEM_REGION_TYPE_REG,
1271
		.start = 0x080000,
1272
		.len = 0x083fff - 0x080000,
1273
		.name = "REG_TOTAL",
1274
		.section_table = {
1275
			.sections = ipq4019_soc_reg_range,
1276
			.size = ARRAY_SIZE(ipq4019_soc_reg_range),
1277
		},
1278
	},
1279
};
1280

1281
static const struct ath10k_mem_region wcn399x_hw10_mem_regions[] = {
1282
	{
1283
		/* MSA region start is not fixed, hence it is assigned at runtime */
1284
		.type = ATH10K_MEM_REGION_TYPE_MSA,
1285
		.len = 0x100000,
1286
		.name = "DRAM",
1287
		.section_table = {
1288
			.sections = NULL,
1289
			.size = 0,
1290
		},
1291
	},
1292
};
1293

1294
static const struct ath10k_hw_mem_layout hw_mem_layouts[] = {
1295
	{
1296
		.hw_id = QCA6174_HW_1_0_VERSION,
1297
		.hw_rev = ATH10K_HW_QCA6174,
1298
		.bus = ATH10K_BUS_PCI,
1299
		.region_table = {
1300
			.regions = qca6174_hw10_mem_regions,
1301
			.size = ARRAY_SIZE(qca6174_hw10_mem_regions),
1302
		},
1303
	},
1304
	{
1305
		.hw_id = QCA6174_HW_1_1_VERSION,
1306
		.hw_rev = ATH10K_HW_QCA6174,
1307
		.bus = ATH10K_BUS_PCI,
1308
		.region_table = {
1309
			.regions = qca6174_hw10_mem_regions,
1310
			.size = ARRAY_SIZE(qca6174_hw10_mem_regions),
1311
		},
1312
	},
1313
	{
1314
		.hw_id = QCA6174_HW_1_3_VERSION,
1315
		.hw_rev = ATH10K_HW_QCA6174,
1316
		.bus = ATH10K_BUS_PCI,
1317
		.region_table = {
1318
			.regions = qca6174_hw10_mem_regions,
1319
			.size = ARRAY_SIZE(qca6174_hw10_mem_regions),
1320
		},
1321
	},
1322
	{
1323
		.hw_id = QCA6174_HW_2_1_VERSION,
1324
		.hw_rev = ATH10K_HW_QCA6174,
1325
		.bus = ATH10K_BUS_PCI,
1326
		.region_table = {
1327
			.regions = qca6174_hw21_mem_regions,
1328
			.size = ARRAY_SIZE(qca6174_hw21_mem_regions),
1329
		},
1330
	},
1331
	{
1332
		.hw_id = QCA6174_HW_3_0_VERSION,
1333
		.hw_rev = ATH10K_HW_QCA6174,
1334
		.bus = ATH10K_BUS_PCI,
1335
		.region_table = {
1336
			.regions = qca6174_hw30_mem_regions,
1337
			.size = ARRAY_SIZE(qca6174_hw30_mem_regions),
1338
		},
1339
	},
1340
	{
1341
		.hw_id = QCA6174_HW_3_2_VERSION,
1342
		.hw_rev = ATH10K_HW_QCA6174,
1343
		.bus = ATH10K_BUS_PCI,
1344
		.region_table = {
1345
			.regions = qca6174_hw30_mem_regions,
1346
			.size = ARRAY_SIZE(qca6174_hw30_mem_regions),
1347
		},
1348
	},
1349
	{
1350
		.hw_id = QCA6174_HW_3_2_VERSION,
1351
		.hw_rev = ATH10K_HW_QCA6174,
1352
		.bus = ATH10K_BUS_SDIO,
1353
		.region_table = {
1354
			.regions = qca6174_hw30_sdio_mem_regions,
1355
			.size = ARRAY_SIZE(qca6174_hw30_sdio_mem_regions),
1356
		},
1357
	},
1358
	{
1359
		.hw_id = QCA9377_HW_1_1_DEV_VERSION,
1360
		.hw_rev = ATH10K_HW_QCA9377,
1361
		.bus = ATH10K_BUS_PCI,
1362
		.region_table = {
1363
			.regions = qca6174_hw30_mem_regions,
1364
			.size = ARRAY_SIZE(qca6174_hw30_mem_regions),
1365
		},
1366
	},
1367
	{
1368
		.hw_id = QCA988X_HW_2_0_VERSION,
1369
		.hw_rev = ATH10K_HW_QCA988X,
1370
		.bus = ATH10K_BUS_PCI,
1371
		.region_table = {
1372
			.regions = qca988x_hw20_mem_regions,
1373
			.size = ARRAY_SIZE(qca988x_hw20_mem_regions),
1374
		},
1375
	},
1376
	{
1377
		.hw_id = QCA9984_HW_1_0_DEV_VERSION,
1378
		.hw_rev = ATH10K_HW_QCA9984,
1379
		.bus = ATH10K_BUS_PCI,
1380
		.region_table = {
1381
			.regions = qca9984_hw10_mem_regions,
1382
			.size = ARRAY_SIZE(qca9984_hw10_mem_regions),
1383
		},
1384
	},
1385
	{
1386
		.hw_id = QCA9888_HW_2_0_DEV_VERSION,
1387
		.hw_rev = ATH10K_HW_QCA9888,
1388
		.bus = ATH10K_BUS_PCI,
1389
		.region_table = {
1390
			.regions = qca9984_hw10_mem_regions,
1391
			.size = ARRAY_SIZE(qca9984_hw10_mem_regions),
1392
		},
1393
	},
1394
	{
1395
		.hw_id = QCA99X0_HW_2_0_DEV_VERSION,
1396
		.hw_rev = ATH10K_HW_QCA99X0,
1397
		.bus = ATH10K_BUS_PCI,
1398
		.region_table = {
1399
			.regions = qca99x0_hw20_mem_regions,
1400
			.size = ARRAY_SIZE(qca99x0_hw20_mem_regions),
1401
		},
1402
	},
1403
	{
1404
		.hw_id = QCA4019_HW_1_0_DEV_VERSION,
1405
		.hw_rev = ATH10K_HW_QCA4019,
1406
		.bus = ATH10K_BUS_AHB,
1407
		.region_table = {
1408
			.regions = qca4019_hw10_mem_regions,
1409
			.size = ARRAY_SIZE(qca4019_hw10_mem_regions),
1410
		},
1411
	},
1412
	{
1413
		.hw_id = WCN3990_HW_1_0_DEV_VERSION,
1414
		.hw_rev = ATH10K_HW_WCN3990,
1415
		.bus = ATH10K_BUS_SNOC,
1416
		.region_table = {
1417
			.regions = wcn399x_hw10_mem_regions,
1418
			.size = ARRAY_SIZE(wcn399x_hw10_mem_regions),
1419
		},
1420
	},
1421
};
1422

1423
static u32 ath10k_coredump_get_ramdump_size(struct ath10k *ar)
1424
{
1425
	const struct ath10k_hw_mem_layout *hw;
1426
	const struct ath10k_mem_region *mem_region;
1427
	size_t size = 0;
1428
	int i;
1429

1430
	hw = ath10k_coredump_get_mem_layout(ar);
1431

1432
	if (!hw)
1433
		return 0;
1434

1435
	mem_region = &hw->region_table.regions[0];
1436

1437
	for (i = 0; i < hw->region_table.size; i++) {
1438
		size += mem_region->len;
1439
		mem_region++;
1440
	}
1441

1442
	/* reserve space for the headers */
1443
	size += hw->region_table.size * sizeof(struct ath10k_dump_ram_data_hdr);
1444

1445
	/* make sure it is aligned 16 bytes for debug message print out */
1446
	size = ALIGN(size, 16);
1447

1448
	return size;
1449
}
1450

1451
const struct ath10k_hw_mem_layout *ath10k_coredump_get_mem_layout(struct ath10k *ar)
1452
{
1453
	if (!test_bit(ATH10K_FW_CRASH_DUMP_RAM_DATA, &ath10k_coredump_mask))
1454
		return NULL;
1455

1456
	return _ath10k_coredump_get_mem_layout(ar);
1457
}
1458
EXPORT_SYMBOL(ath10k_coredump_get_mem_layout);
1459

1460
const struct ath10k_hw_mem_layout *_ath10k_coredump_get_mem_layout(struct ath10k *ar)
1461
{
1462
	int i;
1463

1464
	if (WARN_ON(ar->target_version == 0))
1465
		return NULL;
1466

1467
	for (i = 0; i < ARRAY_SIZE(hw_mem_layouts); i++) {
1468
		if (ar->target_version == hw_mem_layouts[i].hw_id &&
1469
		    ar->hw_rev == hw_mem_layouts[i].hw_rev &&
1470
		    hw_mem_layouts[i].bus == ar->hif.bus)
1471
			return &hw_mem_layouts[i];
1472
	}
1473

1474
	return NULL;
1475
}
1476

1477
struct ath10k_fw_crash_data *ath10k_coredump_new(struct ath10k *ar)
1478
{
1479
	struct ath10k_fw_crash_data *crash_data = ar->coredump.fw_crash_data;
1480

1481
	lockdep_assert_held(&ar->dump_mutex);
1482

1483
	if (ath10k_coredump_mask == 0)
1484
		/* coredump disabled */
1485
		return NULL;
1486

1487
	guid_gen(&crash_data->guid);
1488
	ktime_get_real_ts64(&crash_data->timestamp);
1489

1490
	return crash_data;
1491
}
1492
EXPORT_SYMBOL(ath10k_coredump_new);
1493

1494
static struct ath10k_dump_file_data *ath10k_coredump_build(struct ath10k *ar)
1495
{
1496
	struct ath10k_fw_crash_data *crash_data = ar->coredump.fw_crash_data;
1497
	struct ath10k_ce_crash_hdr *ce_hdr;
1498
	struct ath10k_dump_file_data *dump_data;
1499
	struct ath10k_tlv_dump_data *dump_tlv;
1500
	size_t hdr_len = sizeof(*dump_data);
1501
	size_t len, sofar = 0;
1502
	unsigned char *buf;
1503

1504
	len = hdr_len;
1505

1506
	if (test_bit(ATH10K_FW_CRASH_DUMP_REGISTERS, &ath10k_coredump_mask))
1507
		len += sizeof(*dump_tlv) + sizeof(crash_data->registers);
1508

1509
	if (test_bit(ATH10K_FW_CRASH_DUMP_CE_DATA, &ath10k_coredump_mask))
1510
		len += sizeof(*dump_tlv) + sizeof(*ce_hdr) +
1511
			CE_COUNT * sizeof(ce_hdr->entries[0]);
1512

1513
	if (test_bit(ATH10K_FW_CRASH_DUMP_RAM_DATA, &ath10k_coredump_mask))
1514
		len += sizeof(*dump_tlv) + crash_data->ramdump_buf_len;
1515

1516
	sofar += hdr_len;
1517

1518
	/* This is going to get big when we start dumping FW RAM and such,
1519
	 * so go ahead and use vmalloc.
1520
	 */
1521
	buf = vzalloc(len);
1522
	if (!buf)
1523
		return NULL;
1524

1525
	mutex_lock(&ar->dump_mutex);
1526

1527
	dump_data = (struct ath10k_dump_file_data *)(buf);
1528
	strscpy(dump_data->df_magic, "ATH10K-FW-DUMP",
1529
		sizeof(dump_data->df_magic));
1530
	dump_data->len = cpu_to_le32(len);
1531

1532
	dump_data->version = cpu_to_le32(ATH10K_FW_CRASH_DUMP_VERSION);
1533

1534
	guid_copy(&dump_data->guid, &crash_data->guid);
1535
	dump_data->chip_id = cpu_to_le32(ar->bus_param.chip_id);
1536
	dump_data->bus_type = cpu_to_le32(0);
1537
	dump_data->target_version = cpu_to_le32(ar->target_version);
1538
	dump_data->fw_version_major = cpu_to_le32(ar->fw_version_major);
1539
	dump_data->fw_version_minor = cpu_to_le32(ar->fw_version_minor);
1540
	dump_data->fw_version_release = cpu_to_le32(ar->fw_version_release);
1541
	dump_data->fw_version_build = cpu_to_le32(ar->fw_version_build);
1542
	dump_data->phy_capability = cpu_to_le32(ar->phy_capability);
1543
	dump_data->hw_min_tx_power = cpu_to_le32(ar->hw_min_tx_power);
1544
	dump_data->hw_max_tx_power = cpu_to_le32(ar->hw_max_tx_power);
1545
	dump_data->ht_cap_info = cpu_to_le32(ar->ht_cap_info);
1546
	dump_data->vht_cap_info = cpu_to_le32(ar->vht_cap_info);
1547
	dump_data->num_rf_chains = cpu_to_le32(ar->num_rf_chains);
1548

1549
	strscpy(dump_data->fw_ver, ar->hw->wiphy->fw_version,
1550
		sizeof(dump_data->fw_ver));
1551

1552
	dump_data->kernel_ver_code = 0;
1553
	strscpy(dump_data->kernel_ver, init_utsname()->release,
1554
		sizeof(dump_data->kernel_ver));
1555

1556
	dump_data->tv_sec = cpu_to_le64(crash_data->timestamp.tv_sec);
1557
	dump_data->tv_nsec = cpu_to_le64(crash_data->timestamp.tv_nsec);
1558

1559
	if (test_bit(ATH10K_FW_CRASH_DUMP_REGISTERS, &ath10k_coredump_mask)) {
1560
		dump_tlv = (struct ath10k_tlv_dump_data *)(buf + sofar);
1561
		dump_tlv->type = cpu_to_le32(ATH10K_FW_CRASH_DUMP_REGISTERS);
1562
		dump_tlv->tlv_len = cpu_to_le32(sizeof(crash_data->registers));
1563
		memcpy(dump_tlv->tlv_data, &crash_data->registers,
1564
		       sizeof(crash_data->registers));
1565
		sofar += sizeof(*dump_tlv) + sizeof(crash_data->registers);
1566
	}
1567

1568
	if (test_bit(ATH10K_FW_CRASH_DUMP_CE_DATA, &ath10k_coredump_mask)) {
1569
		dump_tlv = (struct ath10k_tlv_dump_data *)(buf + sofar);
1570
		dump_tlv->type = cpu_to_le32(ATH10K_FW_CRASH_DUMP_CE_DATA);
1571
		dump_tlv->tlv_len = cpu_to_le32(struct_size(ce_hdr, entries,
1572
							    CE_COUNT));
1573
		ce_hdr = (struct ath10k_ce_crash_hdr *)(dump_tlv->tlv_data);
1574
		ce_hdr->ce_count = cpu_to_le32(CE_COUNT);
1575
		memset(ce_hdr->reserved, 0, sizeof(ce_hdr->reserved));
1576
		memcpy(ce_hdr->entries, crash_data->ce_crash_data,
1577
		       CE_COUNT * sizeof(ce_hdr->entries[0]));
1578
		sofar += sizeof(*dump_tlv) + sizeof(*ce_hdr) +
1579
			CE_COUNT * sizeof(ce_hdr->entries[0]);
1580
	}
1581

1582
	/* Gather ram dump */
1583
	if (test_bit(ATH10K_FW_CRASH_DUMP_RAM_DATA, &ath10k_coredump_mask)) {
1584
		dump_tlv = (struct ath10k_tlv_dump_data *)(buf + sofar);
1585
		dump_tlv->type = cpu_to_le32(ATH10K_FW_CRASH_DUMP_RAM_DATA);
1586
		dump_tlv->tlv_len = cpu_to_le32(crash_data->ramdump_buf_len);
1587
		if (crash_data->ramdump_buf_len) {
1588
			memcpy(dump_tlv->tlv_data, crash_data->ramdump_buf,
1589
			       crash_data->ramdump_buf_len);
1590
			sofar += sizeof(*dump_tlv) + crash_data->ramdump_buf_len;
1591
		}
1592
	}
1593

1594
	mutex_unlock(&ar->dump_mutex);
1595

1596
	return dump_data;
1597
}
1598

1599
int ath10k_coredump_submit(struct ath10k *ar)
1600
{
1601
	struct ath10k_dump_file_data *dump;
1602

1603
	if (ath10k_coredump_mask == 0)
1604
		/* coredump disabled */
1605
		return 0;
1606

1607
	dump = ath10k_coredump_build(ar);
1608
	if (!dump) {
1609
		ath10k_warn(ar, "no crash dump data found for devcoredump");
1610
		return -ENODATA;
1611
	}
1612

1613
	dev_coredumpv(ar->dev, dump, le32_to_cpu(dump->len), GFP_KERNEL);
1614

1615
	return 0;
1616
}
1617

1618
int ath10k_coredump_create(struct ath10k *ar)
1619
{
1620
	if (ath10k_coredump_mask == 0)
1621
		/* coredump disabled */
1622
		return 0;
1623

1624
	ar->coredump.fw_crash_data = vzalloc(sizeof(*ar->coredump.fw_crash_data));
1625
	if (!ar->coredump.fw_crash_data)
1626
		return -ENOMEM;
1627

1628
	return 0;
1629
}
1630

1631
int ath10k_coredump_register(struct ath10k *ar)
1632
{
1633
	struct ath10k_fw_crash_data *crash_data = ar->coredump.fw_crash_data;
1634

1635
	if (test_bit(ATH10K_FW_CRASH_DUMP_RAM_DATA, &ath10k_coredump_mask)) {
1636
		crash_data->ramdump_buf_len = ath10k_coredump_get_ramdump_size(ar);
1637

1638
		if (!crash_data->ramdump_buf_len)
1639
			return 0;
1640

1641
		crash_data->ramdump_buf = vzalloc(crash_data->ramdump_buf_len);
1642
		if (!crash_data->ramdump_buf)
1643
			return -ENOMEM;
1644
	}
1645

1646
	return 0;
1647
}
1648

1649
void ath10k_coredump_unregister(struct ath10k *ar)
1650
{
1651
	struct ath10k_fw_crash_data *crash_data = ar->coredump.fw_crash_data;
1652

1653
	vfree(crash_data->ramdump_buf);
1654
}
1655

1656
void ath10k_coredump_destroy(struct ath10k *ar)
1657
{
1658
	if (ar->coredump.fw_crash_data->ramdump_buf) {
1659
		vfree(ar->coredump.fw_crash_data->ramdump_buf);
1660
		ar->coredump.fw_crash_data->ramdump_buf = NULL;
1661
		ar->coredump.fw_crash_data->ramdump_buf_len = 0;
1662
	}
1663

1664
	vfree(ar->coredump.fw_crash_data);
1665
	ar->coredump.fw_crash_data = NULL;
1666
}
1667

1668
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