Path: blob/main/sys/contrib/dev/athk/ath11k/dp_rx.c
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// SPDX-License-Identifier: BSD-3-Clause-Clear1/*2* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.3*/45#include <linux/ieee80211.h>6#include <linux/kernel.h>7#include <linux/skbuff.h>8#include <crypto/hash.h>9#include "core.h"10#include "debug.h"11#include "debugfs_htt_stats.h"12#include "debugfs_sta.h"13#include "hal_desc.h"14#include "hw.h"15#include "dp_rx.h"16#include "hal_rx.h"17#include "dp_tx.h"18#include "peer.h"1920#define ATH11K_DP_RX_FRAGMENT_TIMEOUT_MS (2 * HZ)2122static inline23u8 *ath11k_dp_rx_h_80211_hdr(struct ath11k_base *ab, struct hal_rx_desc *desc)24{25return ab->hw_params.hw_ops->rx_desc_get_hdr_status(desc);26}2728static inline29enum hal_encrypt_type ath11k_dp_rx_h_mpdu_start_enctype(struct ath11k_base *ab,30struct hal_rx_desc *desc)31{32if (!ab->hw_params.hw_ops->rx_desc_encrypt_valid(desc))33return HAL_ENCRYPT_TYPE_OPEN;3435return ab->hw_params.hw_ops->rx_desc_get_encrypt_type(desc);36}3738static inline u8 ath11k_dp_rx_h_msdu_start_decap_type(struct ath11k_base *ab,39struct hal_rx_desc *desc)40{41return ab->hw_params.hw_ops->rx_desc_get_decap_type(desc);42}4344static inline45bool ath11k_dp_rx_h_msdu_start_ldpc_support(struct ath11k_base *ab,46struct hal_rx_desc *desc)47{48return ab->hw_params.hw_ops->rx_desc_get_ldpc_support(desc);49}5051static inline52u8 ath11k_dp_rx_h_msdu_start_mesh_ctl_present(struct ath11k_base *ab,53struct hal_rx_desc *desc)54{55return ab->hw_params.hw_ops->rx_desc_get_mesh_ctl(desc);56}5758static inline59bool ath11k_dp_rx_h_mpdu_start_seq_ctrl_valid(struct ath11k_base *ab,60struct hal_rx_desc *desc)61{62return ab->hw_params.hw_ops->rx_desc_get_mpdu_seq_ctl_vld(desc);63}6465static inline bool ath11k_dp_rx_h_mpdu_start_fc_valid(struct ath11k_base *ab,66struct hal_rx_desc *desc)67{68return ab->hw_params.hw_ops->rx_desc_get_mpdu_fc_valid(desc);69}7071static inline bool ath11k_dp_rx_h_mpdu_start_more_frags(struct ath11k_base *ab,72struct sk_buff *skb)73{74struct ieee80211_hdr *hdr;7576hdr = (struct ieee80211_hdr *)(skb->data + ab->hw_params.hal_desc_sz);77return ieee80211_has_morefrags(hdr->frame_control);78}7980static inline u16 ath11k_dp_rx_h_mpdu_start_frag_no(struct ath11k_base *ab,81struct sk_buff *skb)82{83struct ieee80211_hdr *hdr;8485hdr = (struct ieee80211_hdr *)(skb->data + ab->hw_params.hal_desc_sz);86return le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG;87}8889static inline u16 ath11k_dp_rx_h_mpdu_start_seq_no(struct ath11k_base *ab,90struct hal_rx_desc *desc)91{92return ab->hw_params.hw_ops->rx_desc_get_mpdu_start_seq_no(desc);93}9495static inline void *ath11k_dp_rx_get_attention(struct ath11k_base *ab,96struct hal_rx_desc *desc)97{98return ab->hw_params.hw_ops->rx_desc_get_attention(desc);99}100101static inline bool ath11k_dp_rx_h_attn_msdu_done(struct rx_attention *attn)102{103return !!FIELD_GET(RX_ATTENTION_INFO2_MSDU_DONE,104__le32_to_cpu(attn->info2));105}106107static inline bool ath11k_dp_rx_h_attn_l4_cksum_fail(struct rx_attention *attn)108{109return !!FIELD_GET(RX_ATTENTION_INFO1_TCP_UDP_CKSUM_FAIL,110__le32_to_cpu(attn->info1));111}112113static inline bool ath11k_dp_rx_h_attn_ip_cksum_fail(struct rx_attention *attn)114{115return !!FIELD_GET(RX_ATTENTION_INFO1_IP_CKSUM_FAIL,116__le32_to_cpu(attn->info1));117}118119static inline bool ath11k_dp_rx_h_attn_is_decrypted(struct rx_attention *attn)120{121return (FIELD_GET(RX_ATTENTION_INFO2_DCRYPT_STATUS_CODE,122__le32_to_cpu(attn->info2)) ==123RX_DESC_DECRYPT_STATUS_CODE_OK);124}125126static u32 ath11k_dp_rx_h_attn_mpdu_err(struct rx_attention *attn)127{128u32 info = __le32_to_cpu(attn->info1);129u32 errmap = 0;130131if (info & RX_ATTENTION_INFO1_FCS_ERR)132errmap |= DP_RX_MPDU_ERR_FCS;133134if (info & RX_ATTENTION_INFO1_DECRYPT_ERR)135errmap |= DP_RX_MPDU_ERR_DECRYPT;136137if (info & RX_ATTENTION_INFO1_TKIP_MIC_ERR)138errmap |= DP_RX_MPDU_ERR_TKIP_MIC;139140if (info & RX_ATTENTION_INFO1_A_MSDU_ERROR)141errmap |= DP_RX_MPDU_ERR_AMSDU_ERR;142143if (info & RX_ATTENTION_INFO1_OVERFLOW_ERR)144errmap |= DP_RX_MPDU_ERR_OVERFLOW;145146if (info & RX_ATTENTION_INFO1_MSDU_LEN_ERR)147errmap |= DP_RX_MPDU_ERR_MSDU_LEN;148149if (info & RX_ATTENTION_INFO1_MPDU_LEN_ERR)150errmap |= DP_RX_MPDU_ERR_MPDU_LEN;151152return errmap;153}154155static bool ath11k_dp_rx_h_attn_msdu_len_err(struct ath11k_base *ab,156struct hal_rx_desc *desc)157{158struct rx_attention *rx_attention;159u32 errmap;160161rx_attention = ath11k_dp_rx_get_attention(ab, desc);162errmap = ath11k_dp_rx_h_attn_mpdu_err(rx_attention);163164return errmap & DP_RX_MPDU_ERR_MSDU_LEN;165}166167static inline u16 ath11k_dp_rx_h_msdu_start_msdu_len(struct ath11k_base *ab,168struct hal_rx_desc *desc)169{170return ab->hw_params.hw_ops->rx_desc_get_msdu_len(desc);171}172173static inline u8 ath11k_dp_rx_h_msdu_start_sgi(struct ath11k_base *ab,174struct hal_rx_desc *desc)175{176return ab->hw_params.hw_ops->rx_desc_get_msdu_sgi(desc);177}178179static inline u8 ath11k_dp_rx_h_msdu_start_rate_mcs(struct ath11k_base *ab,180struct hal_rx_desc *desc)181{182return ab->hw_params.hw_ops->rx_desc_get_msdu_rate_mcs(desc);183}184185static inline u8 ath11k_dp_rx_h_msdu_start_rx_bw(struct ath11k_base *ab,186struct hal_rx_desc *desc)187{188return ab->hw_params.hw_ops->rx_desc_get_msdu_rx_bw(desc);189}190191static inline u32 ath11k_dp_rx_h_msdu_start_freq(struct ath11k_base *ab,192struct hal_rx_desc *desc)193{194return ab->hw_params.hw_ops->rx_desc_get_msdu_freq(desc);195}196197static inline u8 ath11k_dp_rx_h_msdu_start_pkt_type(struct ath11k_base *ab,198struct hal_rx_desc *desc)199{200return ab->hw_params.hw_ops->rx_desc_get_msdu_pkt_type(desc);201}202203static inline u8 ath11k_dp_rx_h_msdu_start_nss(struct ath11k_base *ab,204struct hal_rx_desc *desc)205{206return hweight8(ab->hw_params.hw_ops->rx_desc_get_msdu_nss(desc));207}208209static inline u8 ath11k_dp_rx_h_mpdu_start_tid(struct ath11k_base *ab,210struct hal_rx_desc *desc)211{212return ab->hw_params.hw_ops->rx_desc_get_mpdu_tid(desc);213}214215static inline u16 ath11k_dp_rx_h_mpdu_start_peer_id(struct ath11k_base *ab,216struct hal_rx_desc *desc)217{218return ab->hw_params.hw_ops->rx_desc_get_mpdu_peer_id(desc);219}220221static inline u8 ath11k_dp_rx_h_msdu_end_l3pad(struct ath11k_base *ab,222struct hal_rx_desc *desc)223{224return ab->hw_params.hw_ops->rx_desc_get_l3_pad_bytes(desc);225}226227static inline bool ath11k_dp_rx_h_msdu_end_first_msdu(struct ath11k_base *ab,228struct hal_rx_desc *desc)229{230return ab->hw_params.hw_ops->rx_desc_get_first_msdu(desc);231}232233static bool ath11k_dp_rx_h_msdu_end_last_msdu(struct ath11k_base *ab,234struct hal_rx_desc *desc)235{236return ab->hw_params.hw_ops->rx_desc_get_last_msdu(desc);237}238239static void ath11k_dp_rx_desc_end_tlv_copy(struct ath11k_base *ab,240struct hal_rx_desc *fdesc,241struct hal_rx_desc *ldesc)242{243ab->hw_params.hw_ops->rx_desc_copy_attn_end_tlv(fdesc, ldesc);244}245246static inline u32 ath11k_dp_rxdesc_get_mpdulen_err(struct rx_attention *attn)247{248return FIELD_GET(RX_ATTENTION_INFO1_MPDU_LEN_ERR,249__le32_to_cpu(attn->info1));250}251252static inline u8 *ath11k_dp_rxdesc_get_80211hdr(struct ath11k_base *ab,253struct hal_rx_desc *rx_desc)254{255u8 *rx_pkt_hdr;256257rx_pkt_hdr = ab->hw_params.hw_ops->rx_desc_get_msdu_payload(rx_desc);258259return rx_pkt_hdr;260}261262static inline bool ath11k_dp_rxdesc_mpdu_valid(struct ath11k_base *ab,263struct hal_rx_desc *rx_desc)264{265u32 tlv_tag;266267tlv_tag = ab->hw_params.hw_ops->rx_desc_get_mpdu_start_tag(rx_desc);268269return tlv_tag == HAL_RX_MPDU_START;270}271272static inline u32 ath11k_dp_rxdesc_get_ppduid(struct ath11k_base *ab,273struct hal_rx_desc *rx_desc)274{275return ab->hw_params.hw_ops->rx_desc_get_mpdu_ppdu_id(rx_desc);276}277278static inline void ath11k_dp_rxdesc_set_msdu_len(struct ath11k_base *ab,279struct hal_rx_desc *desc,280u16 len)281{282ab->hw_params.hw_ops->rx_desc_set_msdu_len(desc, len);283}284285static bool ath11k_dp_rx_h_attn_is_mcbc(struct ath11k_base *ab,286struct hal_rx_desc *desc)287{288struct rx_attention *attn = ath11k_dp_rx_get_attention(ab, desc);289290return ath11k_dp_rx_h_msdu_end_first_msdu(ab, desc) &&291(!!FIELD_GET(RX_ATTENTION_INFO1_MCAST_BCAST,292__le32_to_cpu(attn->info1)));293}294295static bool ath11k_dp_rxdesc_mac_addr2_valid(struct ath11k_base *ab,296struct hal_rx_desc *desc)297{298return ab->hw_params.hw_ops->rx_desc_mac_addr2_valid(desc);299}300301static u8 *ath11k_dp_rxdesc_mpdu_start_addr2(struct ath11k_base *ab,302struct hal_rx_desc *desc)303{304return ab->hw_params.hw_ops->rx_desc_mpdu_start_addr2(desc);305}306307static void ath11k_dp_service_mon_ring(struct timer_list *t)308{309struct ath11k_base *ab = from_timer(ab, t, mon_reap_timer);310int i;311312for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++)313ath11k_dp_rx_process_mon_rings(ab, i, NULL, DP_MON_SERVICE_BUDGET);314315mod_timer(&ab->mon_reap_timer, jiffies +316msecs_to_jiffies(ATH11K_MON_TIMER_INTERVAL));317}318319static int ath11k_dp_purge_mon_ring(struct ath11k_base *ab)320{321int i, reaped = 0;322unsigned long timeout = jiffies + msecs_to_jiffies(DP_MON_PURGE_TIMEOUT_MS);323324do {325for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++)326reaped += ath11k_dp_rx_process_mon_rings(ab, i,327NULL,328DP_MON_SERVICE_BUDGET);329330/* nothing more to reap */331if (reaped < DP_MON_SERVICE_BUDGET)332return 0;333334} while (time_before(jiffies, timeout));335336ath11k_warn(ab, "dp mon ring purge timeout");337338return -ETIMEDOUT;339}340341/* Returns number of Rx buffers replenished */342int ath11k_dp_rxbufs_replenish(struct ath11k_base *ab, int mac_id,343struct dp_rxdma_ring *rx_ring,344int req_entries,345enum hal_rx_buf_return_buf_manager mgr)346{347struct hal_srng *srng;348u32 *desc;349struct sk_buff *skb;350int num_free;351int num_remain;352int buf_id;353u32 cookie;354dma_addr_t paddr;355356req_entries = min(req_entries, rx_ring->bufs_max);357358srng = &ab->hal.srng_list[rx_ring->refill_buf_ring.ring_id];359360spin_lock_bh(&srng->lock);361362ath11k_hal_srng_access_begin(ab, srng);363364num_free = ath11k_hal_srng_src_num_free(ab, srng, true);365if (!req_entries && (num_free > (rx_ring->bufs_max * 3) / 4))366req_entries = num_free;367368req_entries = min(num_free, req_entries);369num_remain = req_entries;370371while (num_remain > 0) {372skb = dev_alloc_skb(DP_RX_BUFFER_SIZE +373DP_RX_BUFFER_ALIGN_SIZE);374if (!skb)375break;376377if (!IS_ALIGNED((unsigned long)skb->data,378DP_RX_BUFFER_ALIGN_SIZE)) {379skb_pull(skb,380PTR_ALIGN(skb->data, DP_RX_BUFFER_ALIGN_SIZE) -381skb->data);382}383384paddr = dma_map_single(ab->dev, skb->data,385skb->len + skb_tailroom(skb),386DMA_FROM_DEVICE);387if (dma_mapping_error(ab->dev, paddr))388goto fail_free_skb;389390spin_lock_bh(&rx_ring->idr_lock);391buf_id = idr_alloc(&rx_ring->bufs_idr, skb, 1,392(rx_ring->bufs_max * 3) + 1, GFP_ATOMIC);393spin_unlock_bh(&rx_ring->idr_lock);394if (buf_id <= 0)395goto fail_dma_unmap;396397desc = ath11k_hal_srng_src_get_next_entry(ab, srng);398if (!desc)399goto fail_idr_remove;400401ATH11K_SKB_RXCB(skb)->paddr = paddr;402403cookie = FIELD_PREP(DP_RXDMA_BUF_COOKIE_PDEV_ID, mac_id) |404FIELD_PREP(DP_RXDMA_BUF_COOKIE_BUF_ID, buf_id);405406num_remain--;407408ath11k_hal_rx_buf_addr_info_set(desc, paddr, cookie, mgr);409}410411ath11k_hal_srng_access_end(ab, srng);412413spin_unlock_bh(&srng->lock);414415return req_entries - num_remain;416417fail_idr_remove:418spin_lock_bh(&rx_ring->idr_lock);419idr_remove(&rx_ring->bufs_idr, buf_id);420spin_unlock_bh(&rx_ring->idr_lock);421fail_dma_unmap:422dma_unmap_single(ab->dev, paddr, skb->len + skb_tailroom(skb),423DMA_FROM_DEVICE);424fail_free_skb:425dev_kfree_skb_any(skb);426427ath11k_hal_srng_access_end(ab, srng);428429spin_unlock_bh(&srng->lock);430431return req_entries - num_remain;432}433434static int ath11k_dp_rxdma_buf_ring_free(struct ath11k *ar,435struct dp_rxdma_ring *rx_ring)436{437struct sk_buff *skb;438int buf_id;439440spin_lock_bh(&rx_ring->idr_lock);441idr_for_each_entry(&rx_ring->bufs_idr, skb, buf_id) {442idr_remove(&rx_ring->bufs_idr, buf_id);443/* TODO: Understand where internal driver does this dma_unmap444* of rxdma_buffer.445*/446dma_unmap_single(ar->ab->dev, ATH11K_SKB_RXCB(skb)->paddr,447skb->len + skb_tailroom(skb), DMA_FROM_DEVICE);448dev_kfree_skb_any(skb);449}450451idr_destroy(&rx_ring->bufs_idr);452spin_unlock_bh(&rx_ring->idr_lock);453454return 0;455}456457static int ath11k_dp_rxdma_pdev_buf_free(struct ath11k *ar)458{459struct ath11k_pdev_dp *dp = &ar->dp;460struct ath11k_base *ab = ar->ab;461struct dp_rxdma_ring *rx_ring = &dp->rx_refill_buf_ring;462int i;463464ath11k_dp_rxdma_buf_ring_free(ar, rx_ring);465466rx_ring = &dp->rxdma_mon_buf_ring;467ath11k_dp_rxdma_buf_ring_free(ar, rx_ring);468469for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {470rx_ring = &dp->rx_mon_status_refill_ring[i];471ath11k_dp_rxdma_buf_ring_free(ar, rx_ring);472}473474return 0;475}476477static int ath11k_dp_rxdma_ring_buf_setup(struct ath11k *ar,478struct dp_rxdma_ring *rx_ring,479u32 ringtype)480{481struct ath11k_pdev_dp *dp = &ar->dp;482int num_entries;483484num_entries = rx_ring->refill_buf_ring.size /485ath11k_hal_srng_get_entrysize(ar->ab, ringtype);486487rx_ring->bufs_max = num_entries;488ath11k_dp_rxbufs_replenish(ar->ab, dp->mac_id, rx_ring, num_entries,489ar->ab->hw_params.hal_params->rx_buf_rbm);490return 0;491}492493static int ath11k_dp_rxdma_pdev_buf_setup(struct ath11k *ar)494{495struct ath11k_pdev_dp *dp = &ar->dp;496struct ath11k_base *ab = ar->ab;497struct dp_rxdma_ring *rx_ring = &dp->rx_refill_buf_ring;498int i;499500ath11k_dp_rxdma_ring_buf_setup(ar, rx_ring, HAL_RXDMA_BUF);501502if (ar->ab->hw_params.rxdma1_enable) {503rx_ring = &dp->rxdma_mon_buf_ring;504ath11k_dp_rxdma_ring_buf_setup(ar, rx_ring, HAL_RXDMA_MONITOR_BUF);505}506507for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {508rx_ring = &dp->rx_mon_status_refill_ring[i];509ath11k_dp_rxdma_ring_buf_setup(ar, rx_ring, HAL_RXDMA_MONITOR_STATUS);510}511512return 0;513}514515static void ath11k_dp_rx_pdev_srng_free(struct ath11k *ar)516{517struct ath11k_pdev_dp *dp = &ar->dp;518struct ath11k_base *ab = ar->ab;519int i;520521ath11k_dp_srng_cleanup(ab, &dp->rx_refill_buf_ring.refill_buf_ring);522523for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {524if (ab->hw_params.rx_mac_buf_ring)525ath11k_dp_srng_cleanup(ab, &dp->rx_mac_buf_ring[i]);526527ath11k_dp_srng_cleanup(ab, &dp->rxdma_err_dst_ring[i]);528ath11k_dp_srng_cleanup(ab,529&dp->rx_mon_status_refill_ring[i].refill_buf_ring);530}531532ath11k_dp_srng_cleanup(ab, &dp->rxdma_mon_buf_ring.refill_buf_ring);533}534535void ath11k_dp_pdev_reo_cleanup(struct ath11k_base *ab)536{537struct ath11k_dp *dp = &ab->dp;538int i;539540for (i = 0; i < DP_REO_DST_RING_MAX; i++)541ath11k_dp_srng_cleanup(ab, &dp->reo_dst_ring[i]);542}543544int ath11k_dp_pdev_reo_setup(struct ath11k_base *ab)545{546struct ath11k_dp *dp = &ab->dp;547int ret;548int i;549550for (i = 0; i < DP_REO_DST_RING_MAX; i++) {551ret = ath11k_dp_srng_setup(ab, &dp->reo_dst_ring[i],552HAL_REO_DST, i, 0,553DP_REO_DST_RING_SIZE);554if (ret) {555ath11k_warn(ab, "failed to setup reo_dst_ring\n");556goto err_reo_cleanup;557}558}559560return 0;561562err_reo_cleanup:563ath11k_dp_pdev_reo_cleanup(ab);564565return ret;566}567568static int ath11k_dp_rx_pdev_srng_alloc(struct ath11k *ar)569{570struct ath11k_pdev_dp *dp = &ar->dp;571struct ath11k_base *ab = ar->ab;572struct dp_srng *srng = NULL;573int i;574int ret;575576ret = ath11k_dp_srng_setup(ar->ab,577&dp->rx_refill_buf_ring.refill_buf_ring,578HAL_RXDMA_BUF, 0,579dp->mac_id, DP_RXDMA_BUF_RING_SIZE);580if (ret) {581ath11k_warn(ar->ab, "failed to setup rx_refill_buf_ring\n");582return ret;583}584585if (ar->ab->hw_params.rx_mac_buf_ring) {586for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {587ret = ath11k_dp_srng_setup(ar->ab,588&dp->rx_mac_buf_ring[i],589HAL_RXDMA_BUF, 1,590dp->mac_id + i, 1024);591if (ret) {592ath11k_warn(ar->ab, "failed to setup rx_mac_buf_ring %d\n",593i);594return ret;595}596}597}598599for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {600ret = ath11k_dp_srng_setup(ar->ab, &dp->rxdma_err_dst_ring[i],601HAL_RXDMA_DST, 0, dp->mac_id + i,602DP_RXDMA_ERR_DST_RING_SIZE);603if (ret) {604ath11k_warn(ar->ab, "failed to setup rxdma_err_dst_ring %d\n", i);605return ret;606}607}608609for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {610srng = &dp->rx_mon_status_refill_ring[i].refill_buf_ring;611ret = ath11k_dp_srng_setup(ar->ab,612srng,613HAL_RXDMA_MONITOR_STATUS, 0, dp->mac_id + i,614DP_RXDMA_MON_STATUS_RING_SIZE);615if (ret) {616ath11k_warn(ar->ab,617"failed to setup rx_mon_status_refill_ring %d\n", i);618return ret;619}620}621622/* if rxdma1_enable is false, then it doesn't need623* to setup rxdam_mon_buf_ring, rxdma_mon_dst_ring624* and rxdma_mon_desc_ring.625* init reap timer for QCA6390.626*/627if (!ar->ab->hw_params.rxdma1_enable) {628//init mon status buffer reap timer629timer_setup(&ar->ab->mon_reap_timer,630ath11k_dp_service_mon_ring, 0);631return 0;632}633634ret = ath11k_dp_srng_setup(ar->ab,635&dp->rxdma_mon_buf_ring.refill_buf_ring,636HAL_RXDMA_MONITOR_BUF, 0, dp->mac_id,637DP_RXDMA_MONITOR_BUF_RING_SIZE);638if (ret) {639ath11k_warn(ar->ab,640"failed to setup HAL_RXDMA_MONITOR_BUF\n");641return ret;642}643644ret = ath11k_dp_srng_setup(ar->ab, &dp->rxdma_mon_dst_ring,645HAL_RXDMA_MONITOR_DST, 0, dp->mac_id,646DP_RXDMA_MONITOR_DST_RING_SIZE);647if (ret) {648ath11k_warn(ar->ab,649"failed to setup HAL_RXDMA_MONITOR_DST\n");650return ret;651}652653ret = ath11k_dp_srng_setup(ar->ab, &dp->rxdma_mon_desc_ring,654HAL_RXDMA_MONITOR_DESC, 0, dp->mac_id,655DP_RXDMA_MONITOR_DESC_RING_SIZE);656if (ret) {657ath11k_warn(ar->ab,658"failed to setup HAL_RXDMA_MONITOR_DESC\n");659return ret;660}661662return 0;663}664665void ath11k_dp_reo_cmd_list_cleanup(struct ath11k_base *ab)666{667struct ath11k_dp *dp = &ab->dp;668struct dp_reo_cmd *cmd, *tmp;669struct dp_reo_cache_flush_elem *cmd_cache, *tmp_cache;670struct dp_rx_tid *rx_tid;671672spin_lock_bh(&dp->reo_cmd_lock);673list_for_each_entry_safe(cmd, tmp, &dp->reo_cmd_list, list) {674list_del(&cmd->list);675rx_tid = &cmd->data;676if (rx_tid->vaddr) {677dma_unmap_single(ab->dev, rx_tid->paddr,678rx_tid->size, DMA_BIDIRECTIONAL);679kfree(rx_tid->vaddr);680rx_tid->vaddr = NULL;681}682kfree(cmd);683}684685list_for_each_entry_safe(cmd_cache, tmp_cache,686&dp->reo_cmd_cache_flush_list, list) {687list_del(&cmd_cache->list);688dp->reo_cmd_cache_flush_count--;689rx_tid = &cmd_cache->data;690if (rx_tid->vaddr) {691dma_unmap_single(ab->dev, rx_tid->paddr,692rx_tid->size, DMA_BIDIRECTIONAL);693kfree(rx_tid->vaddr);694rx_tid->vaddr = NULL;695}696kfree(cmd_cache);697}698spin_unlock_bh(&dp->reo_cmd_lock);699}700701static void ath11k_dp_reo_cmd_free(struct ath11k_dp *dp, void *ctx,702enum hal_reo_cmd_status status)703{704struct dp_rx_tid *rx_tid = ctx;705706if (status != HAL_REO_CMD_SUCCESS)707ath11k_warn(dp->ab, "failed to flush rx tid hw desc, tid %d status %d\n",708rx_tid->tid, status);709if (rx_tid->vaddr) {710dma_unmap_single(dp->ab->dev, rx_tid->paddr, rx_tid->size,711DMA_BIDIRECTIONAL);712kfree(rx_tid->vaddr);713rx_tid->vaddr = NULL;714}715}716717static void ath11k_dp_reo_cache_flush(struct ath11k_base *ab,718struct dp_rx_tid *rx_tid)719{720struct ath11k_hal_reo_cmd cmd = {0};721unsigned long tot_desc_sz, desc_sz;722int ret;723724tot_desc_sz = rx_tid->size;725desc_sz = ath11k_hal_reo_qdesc_size(0, HAL_DESC_REO_NON_QOS_TID);726727while (tot_desc_sz > desc_sz) {728tot_desc_sz -= desc_sz;729cmd.addr_lo = lower_32_bits(rx_tid->paddr + tot_desc_sz);730cmd.addr_hi = upper_32_bits(rx_tid->paddr);731ret = ath11k_dp_tx_send_reo_cmd(ab, rx_tid,732HAL_REO_CMD_FLUSH_CACHE, &cmd,733NULL);734if (ret)735ath11k_warn(ab,736"failed to send HAL_REO_CMD_FLUSH_CACHE, tid %d (%d)\n",737rx_tid->tid, ret);738}739740memset(&cmd, 0, sizeof(cmd));741cmd.addr_lo = lower_32_bits(rx_tid->paddr);742cmd.addr_hi = upper_32_bits(rx_tid->paddr);743cmd.flag |= HAL_REO_CMD_FLG_NEED_STATUS;744ret = ath11k_dp_tx_send_reo_cmd(ab, rx_tid,745HAL_REO_CMD_FLUSH_CACHE,746&cmd, ath11k_dp_reo_cmd_free);747if (ret) {748ath11k_err(ab, "failed to send HAL_REO_CMD_FLUSH_CACHE cmd, tid %d (%d)\n",749rx_tid->tid, ret);750dma_unmap_single(ab->dev, rx_tid->paddr, rx_tid->size,751DMA_BIDIRECTIONAL);752kfree(rx_tid->vaddr);753rx_tid->vaddr = NULL;754}755}756757static void ath11k_dp_rx_tid_del_func(struct ath11k_dp *dp, void *ctx,758enum hal_reo_cmd_status status)759{760struct ath11k_base *ab = dp->ab;761struct dp_rx_tid *rx_tid = ctx;762struct dp_reo_cache_flush_elem *elem, *tmp;763764if (status == HAL_REO_CMD_DRAIN) {765goto free_desc;766} else if (status != HAL_REO_CMD_SUCCESS) {767/* Shouldn't happen! Cleanup in case of other failure? */768ath11k_warn(ab, "failed to delete rx tid %d hw descriptor %d\n",769rx_tid->tid, status);770return;771}772773elem = kzalloc(sizeof(*elem), GFP_ATOMIC);774if (!elem)775goto free_desc;776777elem->ts = jiffies;778memcpy(&elem->data, rx_tid, sizeof(*rx_tid));779780spin_lock_bh(&dp->reo_cmd_lock);781list_add_tail(&elem->list, &dp->reo_cmd_cache_flush_list);782dp->reo_cmd_cache_flush_count++;783784/* Flush and invalidate aged REO desc from HW cache */785list_for_each_entry_safe(elem, tmp, &dp->reo_cmd_cache_flush_list,786list) {787if (dp->reo_cmd_cache_flush_count > DP_REO_DESC_FREE_THRESHOLD ||788time_after(jiffies, elem->ts +789msecs_to_jiffies(DP_REO_DESC_FREE_TIMEOUT_MS))) {790list_del(&elem->list);791dp->reo_cmd_cache_flush_count--;792spin_unlock_bh(&dp->reo_cmd_lock);793794ath11k_dp_reo_cache_flush(ab, &elem->data);795kfree(elem);796spin_lock_bh(&dp->reo_cmd_lock);797}798}799spin_unlock_bh(&dp->reo_cmd_lock);800801return;802free_desc:803dma_unmap_single(ab->dev, rx_tid->paddr, rx_tid->size,804DMA_BIDIRECTIONAL);805kfree(rx_tid->vaddr);806rx_tid->vaddr = NULL;807}808809void ath11k_peer_rx_tid_delete(struct ath11k *ar,810struct ath11k_peer *peer, u8 tid)811{812struct ath11k_hal_reo_cmd cmd = {0};813struct dp_rx_tid *rx_tid = &peer->rx_tid[tid];814int ret;815816if (!rx_tid->active)817return;818819rx_tid->active = false;820821cmd.flag = HAL_REO_CMD_FLG_NEED_STATUS;822cmd.addr_lo = lower_32_bits(rx_tid->paddr);823cmd.addr_hi = upper_32_bits(rx_tid->paddr);824cmd.upd0 |= HAL_REO_CMD_UPD0_VLD;825ret = ath11k_dp_tx_send_reo_cmd(ar->ab, rx_tid,826HAL_REO_CMD_UPDATE_RX_QUEUE, &cmd,827ath11k_dp_rx_tid_del_func);828if (ret) {829if (ret != -ESHUTDOWN)830ath11k_err(ar->ab, "failed to send HAL_REO_CMD_UPDATE_RX_QUEUE cmd, tid %d (%d)\n",831tid, ret);832dma_unmap_single(ar->ab->dev, rx_tid->paddr, rx_tid->size,833DMA_BIDIRECTIONAL);834kfree(rx_tid->vaddr);835rx_tid->vaddr = NULL;836}837838rx_tid->paddr = 0;839rx_tid->size = 0;840}841842static int ath11k_dp_rx_link_desc_return(struct ath11k_base *ab,843u32 *link_desc,844enum hal_wbm_rel_bm_act action)845{846struct ath11k_dp *dp = &ab->dp;847struct hal_srng *srng;848u32 *desc;849int ret = 0;850851srng = &ab->hal.srng_list[dp->wbm_desc_rel_ring.ring_id];852853spin_lock_bh(&srng->lock);854855ath11k_hal_srng_access_begin(ab, srng);856857desc = ath11k_hal_srng_src_get_next_entry(ab, srng);858if (!desc) {859ret = -ENOBUFS;860goto exit;861}862863ath11k_hal_rx_msdu_link_desc_set(ab, (void *)desc, (void *)link_desc,864action);865866exit:867ath11k_hal_srng_access_end(ab, srng);868869spin_unlock_bh(&srng->lock);870871return ret;872}873874static void ath11k_dp_rx_frags_cleanup(struct dp_rx_tid *rx_tid, bool rel_link_desc)875{876struct ath11k_base *ab = rx_tid->ab;877878lockdep_assert_held(&ab->base_lock);879880if (rx_tid->dst_ring_desc) {881if (rel_link_desc)882ath11k_dp_rx_link_desc_return(ab, (u32 *)rx_tid->dst_ring_desc,883HAL_WBM_REL_BM_ACT_PUT_IN_IDLE);884kfree(rx_tid->dst_ring_desc);885rx_tid->dst_ring_desc = NULL;886}887888rx_tid->cur_sn = 0;889rx_tid->last_frag_no = 0;890rx_tid->rx_frag_bitmap = 0;891__skb_queue_purge(&rx_tid->rx_frags);892}893894void ath11k_peer_frags_flush(struct ath11k *ar, struct ath11k_peer *peer)895{896struct dp_rx_tid *rx_tid;897int i;898899lockdep_assert_held(&ar->ab->base_lock);900901for (i = 0; i <= IEEE80211_NUM_TIDS; i++) {902rx_tid = &peer->rx_tid[i];903904spin_unlock_bh(&ar->ab->base_lock);905del_timer_sync(&rx_tid->frag_timer);906spin_lock_bh(&ar->ab->base_lock);907908ath11k_dp_rx_frags_cleanup(rx_tid, true);909}910}911912void ath11k_peer_rx_tid_cleanup(struct ath11k *ar, struct ath11k_peer *peer)913{914struct dp_rx_tid *rx_tid;915int i;916917lockdep_assert_held(&ar->ab->base_lock);918919for (i = 0; i <= IEEE80211_NUM_TIDS; i++) {920rx_tid = &peer->rx_tid[i];921922ath11k_peer_rx_tid_delete(ar, peer, i);923ath11k_dp_rx_frags_cleanup(rx_tid, true);924925spin_unlock_bh(&ar->ab->base_lock);926del_timer_sync(&rx_tid->frag_timer);927spin_lock_bh(&ar->ab->base_lock);928}929}930931static int ath11k_peer_rx_tid_reo_update(struct ath11k *ar,932struct ath11k_peer *peer,933struct dp_rx_tid *rx_tid,934u32 ba_win_sz, u16 ssn,935bool update_ssn)936{937struct ath11k_hal_reo_cmd cmd = {0};938int ret;939940cmd.addr_lo = lower_32_bits(rx_tid->paddr);941cmd.addr_hi = upper_32_bits(rx_tid->paddr);942cmd.flag = HAL_REO_CMD_FLG_NEED_STATUS;943cmd.upd0 = HAL_REO_CMD_UPD0_BA_WINDOW_SIZE;944cmd.ba_window_size = ba_win_sz;945946if (update_ssn) {947cmd.upd0 |= HAL_REO_CMD_UPD0_SSN;948cmd.upd2 = FIELD_PREP(HAL_REO_CMD_UPD2_SSN, ssn);949}950951ret = ath11k_dp_tx_send_reo_cmd(ar->ab, rx_tid,952HAL_REO_CMD_UPDATE_RX_QUEUE, &cmd,953NULL);954if (ret) {955ath11k_warn(ar->ab, "failed to update rx tid queue, tid %d (%d)\n",956rx_tid->tid, ret);957return ret;958}959960rx_tid->ba_win_sz = ba_win_sz;961962return 0;963}964965static void ath11k_dp_rx_tid_mem_free(struct ath11k_base *ab,966const u8 *peer_mac, int vdev_id, u8 tid)967{968struct ath11k_peer *peer;969struct dp_rx_tid *rx_tid;970971spin_lock_bh(&ab->base_lock);972973peer = ath11k_peer_find(ab, vdev_id, peer_mac);974if (!peer) {975ath11k_warn(ab, "failed to find the peer to free up rx tid mem\n");976goto unlock_exit;977}978979rx_tid = &peer->rx_tid[tid];980if (!rx_tid->active)981goto unlock_exit;982983dma_unmap_single(ab->dev, rx_tid->paddr, rx_tid->size,984DMA_BIDIRECTIONAL);985kfree(rx_tid->vaddr);986rx_tid->vaddr = NULL;987988rx_tid->active = false;989990unlock_exit:991spin_unlock_bh(&ab->base_lock);992}993994int ath11k_peer_rx_tid_setup(struct ath11k *ar, const u8 *peer_mac, int vdev_id,995u8 tid, u32 ba_win_sz, u16 ssn,996enum hal_pn_type pn_type)997{998struct ath11k_base *ab = ar->ab;999struct ath11k_peer *peer;1000struct dp_rx_tid *rx_tid;1001u32 hw_desc_sz;1002u32 *addr_aligned;1003void *vaddr;1004dma_addr_t paddr;1005int ret;10061007spin_lock_bh(&ab->base_lock);10081009peer = ath11k_peer_find(ab, vdev_id, peer_mac);1010if (!peer) {1011ath11k_warn(ab, "failed to find the peer %pM to set up rx tid\n",1012peer_mac);1013spin_unlock_bh(&ab->base_lock);1014return -ENOENT;1015}10161017rx_tid = &peer->rx_tid[tid];1018/* Update the tid queue if it is already setup */1019if (rx_tid->active) {1020paddr = rx_tid->paddr;1021ret = ath11k_peer_rx_tid_reo_update(ar, peer, rx_tid,1022ba_win_sz, ssn, true);1023spin_unlock_bh(&ab->base_lock);1024if (ret) {1025ath11k_warn(ab, "failed to update reo for peer %pM rx tid %d\n: %d",1026peer_mac, tid, ret);1027return ret;1028}10291030ret = ath11k_wmi_peer_rx_reorder_queue_setup(ar, vdev_id,1031peer_mac, paddr,1032tid, 1, ba_win_sz);1033if (ret)1034ath11k_warn(ab, "failed to send wmi rx reorder queue for peer %pM tid %d: %d\n",1035peer_mac, tid, ret);1036return ret;1037}10381039rx_tid->tid = tid;10401041rx_tid->ba_win_sz = ba_win_sz;10421043/* TODO: Optimize the memory allocation for qos tid based on1044* the actual BA window size in REO tid update path.1045*/1046if (tid == HAL_DESC_REO_NON_QOS_TID)1047hw_desc_sz = ath11k_hal_reo_qdesc_size(ba_win_sz, tid);1048else1049hw_desc_sz = ath11k_hal_reo_qdesc_size(DP_BA_WIN_SZ_MAX, tid);10501051vaddr = kzalloc(hw_desc_sz + HAL_LINK_DESC_ALIGN - 1, GFP_ATOMIC);1052if (!vaddr) {1053spin_unlock_bh(&ab->base_lock);1054return -ENOMEM;1055}10561057addr_aligned = PTR_ALIGN(vaddr, HAL_LINK_DESC_ALIGN);10581059ath11k_hal_reo_qdesc_setup(addr_aligned, tid, ba_win_sz,1060ssn, pn_type);10611062paddr = dma_map_single(ab->dev, addr_aligned, hw_desc_sz,1063DMA_BIDIRECTIONAL);10641065ret = dma_mapping_error(ab->dev, paddr);1066if (ret) {1067spin_unlock_bh(&ab->base_lock);1068ath11k_warn(ab, "failed to setup dma map for peer %pM rx tid %d: %d\n",1069peer_mac, tid, ret);1070goto err_mem_free;1071}10721073rx_tid->vaddr = vaddr;1074rx_tid->paddr = paddr;1075rx_tid->size = hw_desc_sz;1076rx_tid->active = true;10771078spin_unlock_bh(&ab->base_lock);10791080ret = ath11k_wmi_peer_rx_reorder_queue_setup(ar, vdev_id, peer_mac,1081paddr, tid, 1, ba_win_sz);1082if (ret) {1083ath11k_warn(ar->ab, "failed to setup rx reorder queue for peer %pM tid %d: %d\n",1084peer_mac, tid, ret);1085ath11k_dp_rx_tid_mem_free(ab, peer_mac, vdev_id, tid);1086}10871088return ret;10891090err_mem_free:1091kfree(rx_tid->vaddr);1092rx_tid->vaddr = NULL;10931094return ret;1095}10961097int ath11k_dp_rx_ampdu_start(struct ath11k *ar,1098struct ieee80211_ampdu_params *params)1099{1100struct ath11k_base *ab = ar->ab;1101struct ath11k_sta *arsta = (void *)params->sta->drv_priv;1102int vdev_id = arsta->arvif->vdev_id;1103int ret;11041105ret = ath11k_peer_rx_tid_setup(ar, params->sta->addr, vdev_id,1106params->tid, params->buf_size,1107params->ssn, arsta->pn_type);1108if (ret)1109ath11k_warn(ab, "failed to setup rx tid %d\n", ret);11101111return ret;1112}11131114int ath11k_dp_rx_ampdu_stop(struct ath11k *ar,1115struct ieee80211_ampdu_params *params)1116{1117struct ath11k_base *ab = ar->ab;1118struct ath11k_peer *peer;1119struct ath11k_sta *arsta = (void *)params->sta->drv_priv;1120int vdev_id = arsta->arvif->vdev_id;1121dma_addr_t paddr;1122bool active;1123int ret;11241125spin_lock_bh(&ab->base_lock);11261127peer = ath11k_peer_find(ab, vdev_id, params->sta->addr);1128if (!peer) {1129ath11k_warn(ab, "failed to find the peer to stop rx aggregation\n");1130spin_unlock_bh(&ab->base_lock);1131return -ENOENT;1132}11331134paddr = peer->rx_tid[params->tid].paddr;1135active = peer->rx_tid[params->tid].active;11361137if (!active) {1138spin_unlock_bh(&ab->base_lock);1139return 0;1140}11411142ret = ath11k_peer_rx_tid_reo_update(ar, peer, peer->rx_tid, 1, 0, false);1143spin_unlock_bh(&ab->base_lock);1144if (ret) {1145ath11k_warn(ab, "failed to update reo for rx tid %d: %d\n",1146params->tid, ret);1147return ret;1148}11491150ret = ath11k_wmi_peer_rx_reorder_queue_setup(ar, vdev_id,1151params->sta->addr, paddr,1152params->tid, 1, 1);1153if (ret)1154ath11k_warn(ab, "failed to send wmi to delete rx tid %d\n",1155ret);11561157return ret;1158}11591160int ath11k_dp_peer_rx_pn_replay_config(struct ath11k_vif *arvif,1161const u8 *peer_addr,1162enum set_key_cmd key_cmd,1163struct ieee80211_key_conf *key)1164{1165struct ath11k *ar = arvif->ar;1166struct ath11k_base *ab = ar->ab;1167struct ath11k_hal_reo_cmd cmd = {0};1168struct ath11k_peer *peer;1169struct dp_rx_tid *rx_tid;1170u8 tid;1171int ret = 0;11721173/* NOTE: Enable PN/TSC replay check offload only for unicast frames.1174* We use mac80211 PN/TSC replay check functionality for bcast/mcast1175* for now.1176*/1177if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))1178return 0;11791180cmd.flag |= HAL_REO_CMD_FLG_NEED_STATUS;1181cmd.upd0 |= HAL_REO_CMD_UPD0_PN |1182HAL_REO_CMD_UPD0_PN_SIZE |1183HAL_REO_CMD_UPD0_PN_VALID |1184HAL_REO_CMD_UPD0_PN_CHECK |1185HAL_REO_CMD_UPD0_SVLD;11861187switch (key->cipher) {1188case WLAN_CIPHER_SUITE_TKIP:1189case WLAN_CIPHER_SUITE_CCMP:1190case WLAN_CIPHER_SUITE_CCMP_256:1191case WLAN_CIPHER_SUITE_GCMP:1192case WLAN_CIPHER_SUITE_GCMP_256:1193if (key_cmd == SET_KEY) {1194cmd.upd1 |= HAL_REO_CMD_UPD1_PN_CHECK;1195cmd.pn_size = 48;1196}1197break;1198default:1199break;1200}12011202spin_lock_bh(&ab->base_lock);12031204peer = ath11k_peer_find(ab, arvif->vdev_id, peer_addr);1205if (!peer) {1206ath11k_warn(ab, "failed to find the peer to configure pn replay detection\n");1207spin_unlock_bh(&ab->base_lock);1208return -ENOENT;1209}12101211for (tid = 0; tid <= IEEE80211_NUM_TIDS; tid++) {1212rx_tid = &peer->rx_tid[tid];1213if (!rx_tid->active)1214continue;1215cmd.addr_lo = lower_32_bits(rx_tid->paddr);1216cmd.addr_hi = upper_32_bits(rx_tid->paddr);1217ret = ath11k_dp_tx_send_reo_cmd(ab, rx_tid,1218HAL_REO_CMD_UPDATE_RX_QUEUE,1219&cmd, NULL);1220if (ret) {1221ath11k_warn(ab, "failed to configure rx tid %d queue for pn replay detection %d\n",1222tid, ret);1223break;1224}1225}12261227spin_unlock_bh(&ab->base_lock);12281229return ret;1230}12311232static inline int ath11k_get_ppdu_user_index(struct htt_ppdu_stats *ppdu_stats,1233u16 peer_id)1234{1235int i;12361237for (i = 0; i < HTT_PPDU_STATS_MAX_USERS - 1; i++) {1238if (ppdu_stats->user_stats[i].is_valid_peer_id) {1239if (peer_id == ppdu_stats->user_stats[i].peer_id)1240return i;1241} else {1242return i;1243}1244}12451246return -EINVAL;1247}12481249static int ath11k_htt_tlv_ppdu_stats_parse(struct ath11k_base *ab,1250u16 tag, u16 len, const void *ptr,1251void *data)1252{1253struct htt_ppdu_stats_info *ppdu_info;1254struct htt_ppdu_user_stats *user_stats;1255int cur_user;1256u16 peer_id;12571258ppdu_info = (struct htt_ppdu_stats_info *)data;12591260switch (tag) {1261case HTT_PPDU_STATS_TAG_COMMON:1262if (len < sizeof(struct htt_ppdu_stats_common)) {1263ath11k_warn(ab, "Invalid len %d for the tag 0x%x\n",1264len, tag);1265return -EINVAL;1266}1267memcpy((void *)&ppdu_info->ppdu_stats.common, ptr,1268sizeof(struct htt_ppdu_stats_common));1269break;1270case HTT_PPDU_STATS_TAG_USR_RATE:1271if (len < sizeof(struct htt_ppdu_stats_user_rate)) {1272ath11k_warn(ab, "Invalid len %d for the tag 0x%x\n",1273len, tag);1274return -EINVAL;1275}12761277#if defined(__linux__)1278peer_id = ((struct htt_ppdu_stats_user_rate *)ptr)->sw_peer_id;1279#elif defined(__FreeBSD__)1280peer_id = ((const struct htt_ppdu_stats_user_rate *)ptr)->sw_peer_id;1281#endif1282cur_user = ath11k_get_ppdu_user_index(&ppdu_info->ppdu_stats,1283peer_id);1284if (cur_user < 0)1285return -EINVAL;1286user_stats = &ppdu_info->ppdu_stats.user_stats[cur_user];1287user_stats->peer_id = peer_id;1288user_stats->is_valid_peer_id = true;1289memcpy((void *)&user_stats->rate, ptr,1290sizeof(struct htt_ppdu_stats_user_rate));1291user_stats->tlv_flags |= BIT(tag);1292break;1293case HTT_PPDU_STATS_TAG_USR_COMPLTN_COMMON:1294if (len < sizeof(struct htt_ppdu_stats_usr_cmpltn_cmn)) {1295ath11k_warn(ab, "Invalid len %d for the tag 0x%x\n",1296len, tag);1297return -EINVAL;1298}12991300#if defined(__linux__)1301peer_id = ((struct htt_ppdu_stats_usr_cmpltn_cmn *)ptr)->sw_peer_id;1302#elif defined(__FreeBSD__)1303peer_id = ((const struct htt_ppdu_stats_usr_cmpltn_cmn *)ptr)->sw_peer_id;1304#endif1305cur_user = ath11k_get_ppdu_user_index(&ppdu_info->ppdu_stats,1306peer_id);1307if (cur_user < 0)1308return -EINVAL;1309user_stats = &ppdu_info->ppdu_stats.user_stats[cur_user];1310user_stats->peer_id = peer_id;1311user_stats->is_valid_peer_id = true;1312memcpy((void *)&user_stats->cmpltn_cmn, ptr,1313sizeof(struct htt_ppdu_stats_usr_cmpltn_cmn));1314user_stats->tlv_flags |= BIT(tag);1315break;1316case HTT_PPDU_STATS_TAG_USR_COMPLTN_ACK_BA_STATUS:1317if (len <1318sizeof(struct htt_ppdu_stats_usr_cmpltn_ack_ba_status)) {1319ath11k_warn(ab, "Invalid len %d for the tag 0x%x\n",1320len, tag);1321return -EINVAL;1322}13231324peer_id =1325#if defined(__linux__)1326((struct htt_ppdu_stats_usr_cmpltn_ack_ba_status *)ptr)->sw_peer_id;1327#elif defined(__FreeBSD__)1328((const struct htt_ppdu_stats_usr_cmpltn_ack_ba_status *)ptr)->sw_peer_id;1329#endif1330cur_user = ath11k_get_ppdu_user_index(&ppdu_info->ppdu_stats,1331peer_id);1332if (cur_user < 0)1333return -EINVAL;1334user_stats = &ppdu_info->ppdu_stats.user_stats[cur_user];1335user_stats->peer_id = peer_id;1336user_stats->is_valid_peer_id = true;1337memcpy((void *)&user_stats->ack_ba, ptr,1338sizeof(struct htt_ppdu_stats_usr_cmpltn_ack_ba_status));1339user_stats->tlv_flags |= BIT(tag);1340break;1341}1342return 0;1343}13441345#if defined(__linux__)1346int ath11k_dp_htt_tlv_iter(struct ath11k_base *ab, const void *ptr, size_t len,1347#elif defined(__FreeBSD__)1348int ath11k_dp_htt_tlv_iter(struct ath11k_base *ab, const u8 *ptr, size_t len,1349#endif1350int (*iter)(struct ath11k_base *ar, u16 tag, u16 len,1351const void *ptr, void *data),1352void *data)1353{1354const struct htt_tlv *tlv;1355#if defined(__linux__)1356const void *begin = ptr;1357#elif defined(__FreeBSD__)1358const u8 *begin = ptr;1359#endif1360u16 tlv_tag, tlv_len;1361int ret = -EINVAL;13621363while (len > 0) {1364if (len < sizeof(*tlv)) {1365ath11k_err(ab, "htt tlv parse failure at byte %zd (%zu bytes left, %zu expected)\n",1366ptr - begin, len, sizeof(*tlv));1367return -EINVAL;1368}1369#if defined(__linux__)1370tlv = (struct htt_tlv *)ptr;1371#elif defined(__FreeBSD__)1372tlv = (const struct htt_tlv *)(const void *)ptr;1373#endif1374tlv_tag = FIELD_GET(HTT_TLV_TAG, tlv->header);1375tlv_len = FIELD_GET(HTT_TLV_LEN, tlv->header);1376ptr += sizeof(*tlv);1377len -= sizeof(*tlv);13781379if (tlv_len > len) {1380ath11k_err(ab, "htt tlv parse failure of tag %u at byte %zd (%zu bytes left, %u expected)\n",1381tlv_tag, ptr - begin, len, tlv_len);1382return -EINVAL;1383}1384ret = iter(ab, tlv_tag, tlv_len, ptr, data);1385if (ret == -ENOMEM)1386return ret;13871388ptr += tlv_len;1389len -= tlv_len;1390}1391return 0;1392}13931394static void1395ath11k_update_per_peer_tx_stats(struct ath11k *ar,1396struct htt_ppdu_stats *ppdu_stats, u8 user)1397{1398struct ath11k_base *ab = ar->ab;1399struct ath11k_peer *peer;1400struct ieee80211_sta *sta;1401struct ath11k_sta *arsta;1402struct htt_ppdu_stats_user_rate *user_rate;1403struct ath11k_per_peer_tx_stats *peer_stats = &ar->peer_tx_stats;1404struct htt_ppdu_user_stats *usr_stats = &ppdu_stats->user_stats[user];1405struct htt_ppdu_stats_common *common = &ppdu_stats->common;1406int ret;1407u8 flags, mcs, nss, bw, sgi, dcm, rate_idx = 0;1408u32 succ_bytes = 0;1409u16 rate = 0, succ_pkts = 0;1410u32 tx_duration = 0;1411u8 tid = HTT_PPDU_STATS_NON_QOS_TID;1412bool is_ampdu = false;14131414if (!usr_stats)1415return;14161417if (!(usr_stats->tlv_flags & BIT(HTT_PPDU_STATS_TAG_USR_RATE)))1418return;14191420if (usr_stats->tlv_flags & BIT(HTT_PPDU_STATS_TAG_USR_COMPLTN_COMMON))1421is_ampdu =1422HTT_USR_CMPLTN_IS_AMPDU(usr_stats->cmpltn_cmn.flags);14231424if (usr_stats->tlv_flags &1425BIT(HTT_PPDU_STATS_TAG_USR_COMPLTN_ACK_BA_STATUS)) {1426succ_bytes = usr_stats->ack_ba.success_bytes;1427succ_pkts = FIELD_GET(HTT_PPDU_STATS_ACK_BA_INFO_NUM_MSDU_M,1428usr_stats->ack_ba.info);1429tid = FIELD_GET(HTT_PPDU_STATS_ACK_BA_INFO_TID_NUM,1430usr_stats->ack_ba.info);1431}14321433if (common->fes_duration_us)1434tx_duration = common->fes_duration_us;14351436user_rate = &usr_stats->rate;1437flags = HTT_USR_RATE_PREAMBLE(user_rate->rate_flags);1438bw = HTT_USR_RATE_BW(user_rate->rate_flags) - 2;1439nss = HTT_USR_RATE_NSS(user_rate->rate_flags) + 1;1440mcs = HTT_USR_RATE_MCS(user_rate->rate_flags);1441sgi = HTT_USR_RATE_GI(user_rate->rate_flags);1442dcm = HTT_USR_RATE_DCM(user_rate->rate_flags);14431444/* Note: If host configured fixed rates and in some other special1445* cases, the broadcast/management frames are sent in different rates.1446* Firmware rate's control to be skipped for this?1447*/14481449if (flags == WMI_RATE_PREAMBLE_HE && mcs > ATH11K_HE_MCS_MAX) {1450ath11k_warn(ab, "Invalid HE mcs %d peer stats", mcs);1451return;1452}14531454if (flags == WMI_RATE_PREAMBLE_VHT && mcs > ATH11K_VHT_MCS_MAX) {1455ath11k_warn(ab, "Invalid VHT mcs %d peer stats", mcs);1456return;1457}14581459if (flags == WMI_RATE_PREAMBLE_HT && (mcs > ATH11K_HT_MCS_MAX || nss < 1)) {1460ath11k_warn(ab, "Invalid HT mcs %d nss %d peer stats",1461mcs, nss);1462return;1463}14641465if (flags == WMI_RATE_PREAMBLE_CCK || flags == WMI_RATE_PREAMBLE_OFDM) {1466ret = ath11k_mac_hw_ratecode_to_legacy_rate(mcs,1467flags,1468&rate_idx,1469&rate);1470if (ret < 0)1471return;1472}14731474rcu_read_lock();1475spin_lock_bh(&ab->base_lock);1476peer = ath11k_peer_find_by_id(ab, usr_stats->peer_id);14771478if (!peer || !peer->sta) {1479spin_unlock_bh(&ab->base_lock);1480rcu_read_unlock();1481return;1482}14831484sta = peer->sta;1485arsta = (struct ath11k_sta *)sta->drv_priv;14861487memset(&arsta->txrate, 0, sizeof(arsta->txrate));14881489switch (flags) {1490case WMI_RATE_PREAMBLE_OFDM:1491arsta->txrate.legacy = rate;1492break;1493case WMI_RATE_PREAMBLE_CCK:1494arsta->txrate.legacy = rate;1495break;1496case WMI_RATE_PREAMBLE_HT:1497arsta->txrate.mcs = mcs + 8 * (nss - 1);1498arsta->txrate.flags = RATE_INFO_FLAGS_MCS;1499if (sgi)1500arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;1501break;1502case WMI_RATE_PREAMBLE_VHT:1503arsta->txrate.mcs = mcs;1504arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS;1505if (sgi)1506arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;1507break;1508case WMI_RATE_PREAMBLE_HE:1509arsta->txrate.mcs = mcs;1510arsta->txrate.flags = RATE_INFO_FLAGS_HE_MCS;1511arsta->txrate.he_dcm = dcm;1512arsta->txrate.he_gi = ath11k_mac_he_gi_to_nl80211_he_gi(sgi);1513arsta->txrate.he_ru_alloc = ath11k_mac_phy_he_ru_to_nl80211_he_ru_alloc1514((user_rate->ru_end -1515user_rate->ru_start) + 1);1516break;1517}15181519arsta->txrate.nss = nss;15201521arsta->txrate.bw = ath11k_mac_bw_to_mac80211_bw(bw);1522arsta->tx_duration += tx_duration;1523memcpy(&arsta->last_txrate, &arsta->txrate, sizeof(struct rate_info));15241525/* PPDU stats reported for mgmt packet doesn't have valid tx bytes.1526* So skip peer stats update for mgmt packets.1527*/1528if (tid < HTT_PPDU_STATS_NON_QOS_TID) {1529memset(peer_stats, 0, sizeof(*peer_stats));1530peer_stats->succ_pkts = succ_pkts;1531peer_stats->succ_bytes = succ_bytes;1532peer_stats->is_ampdu = is_ampdu;1533peer_stats->duration = tx_duration;1534peer_stats->ba_fails =1535HTT_USR_CMPLTN_LONG_RETRY(usr_stats->cmpltn_cmn.flags) +1536HTT_USR_CMPLTN_SHORT_RETRY(usr_stats->cmpltn_cmn.flags);15371538if (ath11k_debugfs_is_extd_tx_stats_enabled(ar))1539ath11k_debugfs_sta_add_tx_stats(arsta, peer_stats, rate_idx);1540}15411542spin_unlock_bh(&ab->base_lock);1543rcu_read_unlock();1544}15451546static void ath11k_htt_update_ppdu_stats(struct ath11k *ar,1547struct htt_ppdu_stats *ppdu_stats)1548{1549u8 user;15501551for (user = 0; user < HTT_PPDU_STATS_MAX_USERS - 1; user++)1552ath11k_update_per_peer_tx_stats(ar, ppdu_stats, user);1553}15541555static1556struct htt_ppdu_stats_info *ath11k_dp_htt_get_ppdu_desc(struct ath11k *ar,1557u32 ppdu_id)1558{1559struct htt_ppdu_stats_info *ppdu_info;15601561lockdep_assert_held(&ar->data_lock);15621563if (!list_empty(&ar->ppdu_stats_info)) {1564list_for_each_entry(ppdu_info, &ar->ppdu_stats_info, list) {1565if (ppdu_info->ppdu_id == ppdu_id)1566return ppdu_info;1567}15681569if (ar->ppdu_stat_list_depth > HTT_PPDU_DESC_MAX_DEPTH) {1570ppdu_info = list_first_entry(&ar->ppdu_stats_info,1571typeof(*ppdu_info), list);1572list_del(&ppdu_info->list);1573ar->ppdu_stat_list_depth--;1574ath11k_htt_update_ppdu_stats(ar, &ppdu_info->ppdu_stats);1575kfree(ppdu_info);1576}1577}15781579ppdu_info = kzalloc(sizeof(*ppdu_info), GFP_ATOMIC);1580if (!ppdu_info)1581return NULL;15821583list_add_tail(&ppdu_info->list, &ar->ppdu_stats_info);1584ar->ppdu_stat_list_depth++;15851586return ppdu_info;1587}15881589static int ath11k_htt_pull_ppdu_stats(struct ath11k_base *ab,1590struct sk_buff *skb)1591{1592struct ath11k_htt_ppdu_stats_msg *msg;1593struct htt_ppdu_stats_info *ppdu_info;1594struct ath11k *ar;1595int ret;1596u8 pdev_id;1597u32 ppdu_id, len;15981599msg = (struct ath11k_htt_ppdu_stats_msg *)skb->data;1600len = FIELD_GET(HTT_T2H_PPDU_STATS_INFO_PAYLOAD_SIZE, msg->info);1601pdev_id = FIELD_GET(HTT_T2H_PPDU_STATS_INFO_PDEV_ID, msg->info);1602ppdu_id = msg->ppdu_id;16031604rcu_read_lock();1605ar = ath11k_mac_get_ar_by_pdev_id(ab, pdev_id);1606if (!ar) {1607ret = -EINVAL;1608goto out;1609}16101611if (ath11k_debugfs_is_pktlog_lite_mode_enabled(ar))1612trace_ath11k_htt_ppdu_stats(ar, skb->data, len);16131614spin_lock_bh(&ar->data_lock);1615ppdu_info = ath11k_dp_htt_get_ppdu_desc(ar, ppdu_id);1616if (!ppdu_info) {1617ret = -EINVAL;1618goto out_unlock_data;1619}16201621ppdu_info->ppdu_id = ppdu_id;1622ret = ath11k_dp_htt_tlv_iter(ab, msg->data, len,1623ath11k_htt_tlv_ppdu_stats_parse,1624(void *)ppdu_info);1625if (ret) {1626ath11k_warn(ab, "Failed to parse tlv %d\n", ret);1627goto out_unlock_data;1628}16291630out_unlock_data:1631spin_unlock_bh(&ar->data_lock);16321633out:1634rcu_read_unlock();16351636return ret;1637}16381639static void ath11k_htt_pktlog(struct ath11k_base *ab, struct sk_buff *skb)1640{1641struct htt_pktlog_msg *data = (struct htt_pktlog_msg *)skb->data;1642struct ath_pktlog_hdr *hdr = (struct ath_pktlog_hdr *)data;1643struct ath11k *ar;1644u8 pdev_id;16451646pdev_id = FIELD_GET(HTT_T2H_PPDU_STATS_INFO_PDEV_ID, data->hdr);1647ar = ath11k_mac_get_ar_by_pdev_id(ab, pdev_id);1648if (!ar) {1649ath11k_warn(ab, "invalid pdev id %d on htt pktlog\n", pdev_id);1650return;1651}16521653trace_ath11k_htt_pktlog(ar, data->payload, hdr->size,1654ar->ab->pktlog_defs_checksum);1655}16561657static void ath11k_htt_backpressure_event_handler(struct ath11k_base *ab,1658struct sk_buff *skb)1659{1660u32 *data = (u32 *)skb->data;1661u8 pdev_id, ring_type, ring_id, pdev_idx;1662u16 hp, tp;1663u32 backpressure_time;1664struct ath11k_bp_stats *bp_stats;16651666pdev_id = FIELD_GET(HTT_BACKPRESSURE_EVENT_PDEV_ID_M, *data);1667ring_type = FIELD_GET(HTT_BACKPRESSURE_EVENT_RING_TYPE_M, *data);1668ring_id = FIELD_GET(HTT_BACKPRESSURE_EVENT_RING_ID_M, *data);1669++data;16701671hp = FIELD_GET(HTT_BACKPRESSURE_EVENT_HP_M, *data);1672tp = FIELD_GET(HTT_BACKPRESSURE_EVENT_TP_M, *data);1673++data;16741675backpressure_time = *data;16761677ath11k_dbg(ab, ATH11K_DBG_DP_HTT, "backpressure event, pdev %d, ring type %d,ring id %d, hp %d tp %d, backpressure time %d\n",1678pdev_id, ring_type, ring_id, hp, tp, backpressure_time);16791680if (ring_type == HTT_BACKPRESSURE_UMAC_RING_TYPE) {1681if (ring_id >= HTT_SW_UMAC_RING_IDX_MAX)1682return;16831684bp_stats = &ab->soc_stats.bp_stats.umac_ring_bp_stats[ring_id];1685} else if (ring_type == HTT_BACKPRESSURE_LMAC_RING_TYPE) {1686pdev_idx = DP_HW2SW_MACID(pdev_id);16871688if (ring_id >= HTT_SW_LMAC_RING_IDX_MAX || pdev_idx >= MAX_RADIOS)1689return;16901691bp_stats = &ab->soc_stats.bp_stats.lmac_ring_bp_stats[ring_id][pdev_idx];1692} else {1693ath11k_warn(ab, "unknown ring type received in htt bp event %d\n",1694ring_type);1695return;1696}16971698spin_lock_bh(&ab->base_lock);1699bp_stats->hp = hp;1700bp_stats->tp = tp;1701bp_stats->count++;1702bp_stats->jiffies = jiffies;1703spin_unlock_bh(&ab->base_lock);1704}17051706void ath11k_dp_htt_htc_t2h_msg_handler(struct ath11k_base *ab,1707struct sk_buff *skb)1708{1709struct ath11k_dp *dp = &ab->dp;1710struct htt_resp_msg *resp = (struct htt_resp_msg *)skb->data;1711enum htt_t2h_msg_type type = FIELD_GET(HTT_T2H_MSG_TYPE, *(u32 *)resp);1712u16 peer_id;1713u8 vdev_id;1714u8 mac_addr[ETH_ALEN];1715u16 peer_mac_h16;1716u16 ast_hash;1717u16 hw_peer_id;17181719ath11k_dbg(ab, ATH11K_DBG_DP_HTT, "dp_htt rx msg type :0x%0x\n", type);17201721switch (type) {1722case HTT_T2H_MSG_TYPE_VERSION_CONF:1723dp->htt_tgt_ver_major = FIELD_GET(HTT_T2H_VERSION_CONF_MAJOR,1724resp->version_msg.version);1725dp->htt_tgt_ver_minor = FIELD_GET(HTT_T2H_VERSION_CONF_MINOR,1726resp->version_msg.version);1727complete(&dp->htt_tgt_version_received);1728break;1729case HTT_T2H_MSG_TYPE_PEER_MAP:1730vdev_id = FIELD_GET(HTT_T2H_PEER_MAP_INFO_VDEV_ID,1731resp->peer_map_ev.info);1732peer_id = FIELD_GET(HTT_T2H_PEER_MAP_INFO_PEER_ID,1733resp->peer_map_ev.info);1734peer_mac_h16 = FIELD_GET(HTT_T2H_PEER_MAP_INFO1_MAC_ADDR_H16,1735resp->peer_map_ev.info1);1736ath11k_dp_get_mac_addr(resp->peer_map_ev.mac_addr_l32,1737peer_mac_h16, mac_addr);1738ath11k_peer_map_event(ab, vdev_id, peer_id, mac_addr, 0, 0);1739break;1740case HTT_T2H_MSG_TYPE_PEER_MAP2:1741vdev_id = FIELD_GET(HTT_T2H_PEER_MAP_INFO_VDEV_ID,1742resp->peer_map_ev.info);1743peer_id = FIELD_GET(HTT_T2H_PEER_MAP_INFO_PEER_ID,1744resp->peer_map_ev.info);1745peer_mac_h16 = FIELD_GET(HTT_T2H_PEER_MAP_INFO1_MAC_ADDR_H16,1746resp->peer_map_ev.info1);1747ath11k_dp_get_mac_addr(resp->peer_map_ev.mac_addr_l32,1748peer_mac_h16, mac_addr);1749ast_hash = FIELD_GET(HTT_T2H_PEER_MAP_INFO2_AST_HASH_VAL,1750resp->peer_map_ev.info2);1751hw_peer_id = FIELD_GET(HTT_T2H_PEER_MAP_INFO1_HW_PEER_ID,1752resp->peer_map_ev.info1);1753ath11k_peer_map_event(ab, vdev_id, peer_id, mac_addr, ast_hash,1754hw_peer_id);1755break;1756case HTT_T2H_MSG_TYPE_PEER_UNMAP:1757case HTT_T2H_MSG_TYPE_PEER_UNMAP2:1758peer_id = FIELD_GET(HTT_T2H_PEER_UNMAP_INFO_PEER_ID,1759resp->peer_unmap_ev.info);1760ath11k_peer_unmap_event(ab, peer_id);1761break;1762case HTT_T2H_MSG_TYPE_PPDU_STATS_IND:1763ath11k_htt_pull_ppdu_stats(ab, skb);1764break;1765case HTT_T2H_MSG_TYPE_EXT_STATS_CONF:1766ath11k_debugfs_htt_ext_stats_handler(ab, skb);1767break;1768case HTT_T2H_MSG_TYPE_PKTLOG:1769ath11k_htt_pktlog(ab, skb);1770break;1771case HTT_T2H_MSG_TYPE_BKPRESSURE_EVENT_IND:1772ath11k_htt_backpressure_event_handler(ab, skb);1773break;1774default:1775ath11k_warn(ab, "htt event %d not handled\n", type);1776break;1777}17781779dev_kfree_skb_any(skb);1780}17811782static int ath11k_dp_rx_msdu_coalesce(struct ath11k *ar,1783struct sk_buff_head *msdu_list,1784struct sk_buff *first, struct sk_buff *last,1785u8 l3pad_bytes, int msdu_len)1786{1787struct ath11k_base *ab = ar->ab;1788struct sk_buff *skb;1789struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(first);1790int buf_first_hdr_len, buf_first_len;1791struct hal_rx_desc *ldesc;1792int space_extra, rem_len, buf_len;1793u32 hal_rx_desc_sz = ar->ab->hw_params.hal_desc_sz;17941795/* As the msdu is spread across multiple rx buffers,1796* find the offset to the start of msdu for computing1797* the length of the msdu in the first buffer.1798*/1799buf_first_hdr_len = hal_rx_desc_sz + l3pad_bytes;1800buf_first_len = DP_RX_BUFFER_SIZE - buf_first_hdr_len;18011802if (WARN_ON_ONCE(msdu_len <= buf_first_len)) {1803skb_put(first, buf_first_hdr_len + msdu_len);1804skb_pull(first, buf_first_hdr_len);1805return 0;1806}18071808ldesc = (struct hal_rx_desc *)last->data;1809rxcb->is_first_msdu = ath11k_dp_rx_h_msdu_end_first_msdu(ab, ldesc);1810rxcb->is_last_msdu = ath11k_dp_rx_h_msdu_end_last_msdu(ab, ldesc);18111812/* MSDU spans over multiple buffers because the length of the MSDU1813* exceeds DP_RX_BUFFER_SIZE - HAL_RX_DESC_SIZE. So assume the data1814* in the first buf is of length DP_RX_BUFFER_SIZE - HAL_RX_DESC_SIZE.1815*/1816skb_put(first, DP_RX_BUFFER_SIZE);1817skb_pull(first, buf_first_hdr_len);18181819/* When an MSDU spread over multiple buffers attention, MSDU_END and1820* MPDU_END tlvs are valid only in the last buffer. Copy those tlvs.1821*/1822ath11k_dp_rx_desc_end_tlv_copy(ab, rxcb->rx_desc, ldesc);18231824space_extra = msdu_len - (buf_first_len + skb_tailroom(first));1825if (space_extra > 0 &&1826(pskb_expand_head(first, 0, space_extra, GFP_ATOMIC) < 0)) {1827/* Free up all buffers of the MSDU */1828while ((skb = __skb_dequeue(msdu_list)) != NULL) {1829rxcb = ATH11K_SKB_RXCB(skb);1830if (!rxcb->is_continuation) {1831dev_kfree_skb_any(skb);1832break;1833}1834dev_kfree_skb_any(skb);1835}1836return -ENOMEM;1837}18381839rem_len = msdu_len - buf_first_len;1840while ((skb = __skb_dequeue(msdu_list)) != NULL && rem_len > 0) {1841rxcb = ATH11K_SKB_RXCB(skb);1842if (rxcb->is_continuation)1843buf_len = DP_RX_BUFFER_SIZE - hal_rx_desc_sz;1844else1845buf_len = rem_len;18461847if (buf_len > (DP_RX_BUFFER_SIZE - hal_rx_desc_sz)) {1848WARN_ON_ONCE(1);1849dev_kfree_skb_any(skb);1850return -EINVAL;1851}18521853skb_put(skb, buf_len + hal_rx_desc_sz);1854skb_pull(skb, hal_rx_desc_sz);1855skb_copy_from_linear_data(skb, skb_put(first, buf_len),1856buf_len);1857dev_kfree_skb_any(skb);18581859rem_len -= buf_len;1860if (!rxcb->is_continuation)1861break;1862}18631864return 0;1865}18661867static struct sk_buff *ath11k_dp_rx_get_msdu_last_buf(struct sk_buff_head *msdu_list,1868struct sk_buff *first)1869{1870struct sk_buff *skb;1871struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(first);18721873if (!rxcb->is_continuation)1874return first;18751876skb_queue_walk(msdu_list, skb) {1877rxcb = ATH11K_SKB_RXCB(skb);1878if (!rxcb->is_continuation)1879return skb;1880}18811882return NULL;1883}18841885static void ath11k_dp_rx_h_csum_offload(struct ath11k *ar, struct sk_buff *msdu)1886{1887struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);1888struct rx_attention *rx_attention;1889bool ip_csum_fail, l4_csum_fail;18901891rx_attention = ath11k_dp_rx_get_attention(ar->ab, rxcb->rx_desc);1892ip_csum_fail = ath11k_dp_rx_h_attn_ip_cksum_fail(rx_attention);1893l4_csum_fail = ath11k_dp_rx_h_attn_l4_cksum_fail(rx_attention);18941895msdu->ip_summed = (ip_csum_fail || l4_csum_fail) ?1896CHECKSUM_NONE : CHECKSUM_UNNECESSARY;1897}18981899static int ath11k_dp_rx_crypto_mic_len(struct ath11k *ar,1900enum hal_encrypt_type enctype)1901{1902switch (enctype) {1903case HAL_ENCRYPT_TYPE_OPEN:1904case HAL_ENCRYPT_TYPE_TKIP_NO_MIC:1905case HAL_ENCRYPT_TYPE_TKIP_MIC:1906return 0;1907case HAL_ENCRYPT_TYPE_CCMP_128:1908return IEEE80211_CCMP_MIC_LEN;1909case HAL_ENCRYPT_TYPE_CCMP_256:1910return IEEE80211_CCMP_256_MIC_LEN;1911case HAL_ENCRYPT_TYPE_GCMP_128:1912case HAL_ENCRYPT_TYPE_AES_GCMP_256:1913return IEEE80211_GCMP_MIC_LEN;1914case HAL_ENCRYPT_TYPE_WEP_40:1915case HAL_ENCRYPT_TYPE_WEP_104:1916case HAL_ENCRYPT_TYPE_WEP_128:1917case HAL_ENCRYPT_TYPE_WAPI_GCM_SM4:1918case HAL_ENCRYPT_TYPE_WAPI:1919break;1920}19211922ath11k_warn(ar->ab, "unsupported encryption type %d for mic len\n", enctype);1923return 0;1924}19251926static int ath11k_dp_rx_crypto_param_len(struct ath11k *ar,1927enum hal_encrypt_type enctype)1928{1929switch (enctype) {1930case HAL_ENCRYPT_TYPE_OPEN:1931return 0;1932case HAL_ENCRYPT_TYPE_TKIP_NO_MIC:1933case HAL_ENCRYPT_TYPE_TKIP_MIC:1934return IEEE80211_TKIP_IV_LEN;1935case HAL_ENCRYPT_TYPE_CCMP_128:1936return IEEE80211_CCMP_HDR_LEN;1937case HAL_ENCRYPT_TYPE_CCMP_256:1938return IEEE80211_CCMP_256_HDR_LEN;1939case HAL_ENCRYPT_TYPE_GCMP_128:1940case HAL_ENCRYPT_TYPE_AES_GCMP_256:1941return IEEE80211_GCMP_HDR_LEN;1942case HAL_ENCRYPT_TYPE_WEP_40:1943case HAL_ENCRYPT_TYPE_WEP_104:1944case HAL_ENCRYPT_TYPE_WEP_128:1945case HAL_ENCRYPT_TYPE_WAPI_GCM_SM4:1946case HAL_ENCRYPT_TYPE_WAPI:1947break;1948}19491950ath11k_warn(ar->ab, "unsupported encryption type %d\n", enctype);1951return 0;1952}19531954static int ath11k_dp_rx_crypto_icv_len(struct ath11k *ar,1955enum hal_encrypt_type enctype)1956{1957switch (enctype) {1958case HAL_ENCRYPT_TYPE_OPEN:1959case HAL_ENCRYPT_TYPE_CCMP_128:1960case HAL_ENCRYPT_TYPE_CCMP_256:1961case HAL_ENCRYPT_TYPE_GCMP_128:1962case HAL_ENCRYPT_TYPE_AES_GCMP_256:1963return 0;1964case HAL_ENCRYPT_TYPE_TKIP_NO_MIC:1965case HAL_ENCRYPT_TYPE_TKIP_MIC:1966return IEEE80211_TKIP_ICV_LEN;1967case HAL_ENCRYPT_TYPE_WEP_40:1968case HAL_ENCRYPT_TYPE_WEP_104:1969case HAL_ENCRYPT_TYPE_WEP_128:1970case HAL_ENCRYPT_TYPE_WAPI_GCM_SM4:1971case HAL_ENCRYPT_TYPE_WAPI:1972break;1973}19741975ath11k_warn(ar->ab, "unsupported encryption type %d\n", enctype);1976return 0;1977}19781979static void ath11k_dp_rx_h_undecap_nwifi(struct ath11k *ar,1980struct sk_buff *msdu,1981u8 *first_hdr,1982enum hal_encrypt_type enctype,1983struct ieee80211_rx_status *status)1984{1985struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);1986u8 decap_hdr[DP_MAX_NWIFI_HDR_LEN];1987struct ieee80211_hdr *hdr;1988size_t hdr_len;1989u8 da[ETH_ALEN];1990u8 sa[ETH_ALEN];1991u16 qos_ctl = 0;1992u8 *qos;19931994/* copy SA & DA and pull decapped header */1995hdr = (struct ieee80211_hdr *)msdu->data;1996hdr_len = ieee80211_hdrlen(hdr->frame_control);1997ether_addr_copy(da, ieee80211_get_DA(hdr));1998ether_addr_copy(sa, ieee80211_get_SA(hdr));1999skb_pull(msdu, ieee80211_hdrlen(hdr->frame_control));20002001if (rxcb->is_first_msdu) {2002/* original 802.11 header is valid for the first msdu2003* hence we can reuse the same header2004*/2005hdr = (struct ieee80211_hdr *)first_hdr;2006hdr_len = ieee80211_hdrlen(hdr->frame_control);20072008/* Each A-MSDU subframe will be reported as a separate MSDU,2009* so strip the A-MSDU bit from QoS Ctl.2010*/2011if (ieee80211_is_data_qos(hdr->frame_control)) {2012qos = ieee80211_get_qos_ctl(hdr);2013qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;2014}2015} else {2016/* Rebuild qos header if this is a middle/last msdu */2017hdr->frame_control |= __cpu_to_le16(IEEE80211_STYPE_QOS_DATA);20182019/* Reset the order bit as the HT_Control header is stripped */2020hdr->frame_control &= ~(__cpu_to_le16(IEEE80211_FCTL_ORDER));20212022qos_ctl = rxcb->tid;20232024if (ath11k_dp_rx_h_msdu_start_mesh_ctl_present(ar->ab, rxcb->rx_desc))2025qos_ctl |= IEEE80211_QOS_CTL_MESH_CONTROL_PRESENT;20262027/* TODO Add other QoS ctl fields when required */20282029/* copy decap header before overwriting for reuse below */2030memcpy(decap_hdr, (uint8_t *)hdr, hdr_len);2031}20322033if (!(status->flag & RX_FLAG_IV_STRIPPED)) {2034memcpy(skb_push(msdu,2035ath11k_dp_rx_crypto_param_len(ar, enctype)),2036#if defined(__linux__)2037(void *)hdr + hdr_len,2038#elif defined(__FreeBSD__)2039(u8 *)hdr + hdr_len,2040#endif2041ath11k_dp_rx_crypto_param_len(ar, enctype));2042}20432044if (!rxcb->is_first_msdu) {2045memcpy(skb_push(msdu,2046IEEE80211_QOS_CTL_LEN), &qos_ctl,2047IEEE80211_QOS_CTL_LEN);2048memcpy(skb_push(msdu, hdr_len), decap_hdr, hdr_len);2049return;2050}20512052memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);20532054/* original 802.11 header has a different DA and in2055* case of 4addr it may also have different SA2056*/2057hdr = (struct ieee80211_hdr *)msdu->data;2058ether_addr_copy(ieee80211_get_DA(hdr), da);2059ether_addr_copy(ieee80211_get_SA(hdr), sa);2060}20612062static void ath11k_dp_rx_h_undecap_raw(struct ath11k *ar, struct sk_buff *msdu,2063enum hal_encrypt_type enctype,2064struct ieee80211_rx_status *status,2065bool decrypted)2066{2067struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);2068struct ieee80211_hdr *hdr;2069size_t hdr_len;2070size_t crypto_len;20712072if (!rxcb->is_first_msdu ||2073!(rxcb->is_first_msdu && rxcb->is_last_msdu)) {2074WARN_ON_ONCE(1);2075return;2076}20772078skb_trim(msdu, msdu->len - FCS_LEN);20792080if (!decrypted)2081return;20822083hdr = (void *)msdu->data;20842085/* Tail */2086if (status->flag & RX_FLAG_IV_STRIPPED) {2087skb_trim(msdu, msdu->len -2088ath11k_dp_rx_crypto_mic_len(ar, enctype));20892090skb_trim(msdu, msdu->len -2091ath11k_dp_rx_crypto_icv_len(ar, enctype));2092} else {2093/* MIC */2094if (status->flag & RX_FLAG_MIC_STRIPPED)2095skb_trim(msdu, msdu->len -2096ath11k_dp_rx_crypto_mic_len(ar, enctype));20972098/* ICV */2099if (status->flag & RX_FLAG_ICV_STRIPPED)2100skb_trim(msdu, msdu->len -2101ath11k_dp_rx_crypto_icv_len(ar, enctype));2102}21032104/* MMIC */2105if ((status->flag & RX_FLAG_MMIC_STRIPPED) &&2106!ieee80211_has_morefrags(hdr->frame_control) &&2107enctype == HAL_ENCRYPT_TYPE_TKIP_MIC)2108skb_trim(msdu, msdu->len - IEEE80211_CCMP_MIC_LEN);21092110/* Head */2111if (status->flag & RX_FLAG_IV_STRIPPED) {2112hdr_len = ieee80211_hdrlen(hdr->frame_control);2113crypto_len = ath11k_dp_rx_crypto_param_len(ar, enctype);21142115#if defined(__linux__)2116memmove((void *)msdu->data + crypto_len,2117(void *)msdu->data, hdr_len);2118#elif defined(__FreeBSD__)2119memmove((u8 *)msdu->data + crypto_len,2120(u8 *)msdu->data, hdr_len);2121#endif2122skb_pull(msdu, crypto_len);2123}2124}21252126static void *ath11k_dp_rx_h_find_rfc1042(struct ath11k *ar,2127struct sk_buff *msdu,2128enum hal_encrypt_type enctype)2129{2130struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);2131struct ieee80211_hdr *hdr;2132size_t hdr_len, crypto_len;2133#if defined(__linux__)2134void *rfc1042;2135#elif defined(__FreeBSD__)2136u8 *rfc1042;2137#endif2138bool is_amsdu;21392140is_amsdu = !(rxcb->is_first_msdu && rxcb->is_last_msdu);2141hdr = (struct ieee80211_hdr *)ath11k_dp_rx_h_80211_hdr(ar->ab, rxcb->rx_desc);2142#if defined(__linux__)2143rfc1042 = hdr;2144#elif defined(__FreeBSD__)2145rfc1042 = (void *)hdr;2146#endif21472148if (rxcb->is_first_msdu) {2149hdr_len = ieee80211_hdrlen(hdr->frame_control);2150crypto_len = ath11k_dp_rx_crypto_param_len(ar, enctype);21512152rfc1042 += hdr_len + crypto_len;2153}21542155if (is_amsdu)2156rfc1042 += sizeof(struct ath11k_dp_amsdu_subframe_hdr);21572158return rfc1042;2159}21602161static void ath11k_dp_rx_h_undecap_eth(struct ath11k *ar,2162struct sk_buff *msdu,2163u8 *first_hdr,2164enum hal_encrypt_type enctype,2165struct ieee80211_rx_status *status)2166{2167struct ieee80211_hdr *hdr;2168struct ethhdr *eth;2169size_t hdr_len;2170u8 da[ETH_ALEN];2171u8 sa[ETH_ALEN];2172void *rfc1042;21732174rfc1042 = ath11k_dp_rx_h_find_rfc1042(ar, msdu, enctype);2175if (WARN_ON_ONCE(!rfc1042))2176return;21772178/* pull decapped header and copy SA & DA */2179eth = (struct ethhdr *)msdu->data;2180ether_addr_copy(da, eth->h_dest);2181ether_addr_copy(sa, eth->h_source);2182skb_pull(msdu, sizeof(struct ethhdr));21832184/* push rfc1042/llc/snap */2185memcpy(skb_push(msdu, sizeof(struct ath11k_dp_rfc1042_hdr)), rfc1042,2186sizeof(struct ath11k_dp_rfc1042_hdr));21872188/* push original 802.11 header */2189hdr = (struct ieee80211_hdr *)first_hdr;2190hdr_len = ieee80211_hdrlen(hdr->frame_control);21912192if (!(status->flag & RX_FLAG_IV_STRIPPED)) {2193memcpy(skb_push(msdu,2194ath11k_dp_rx_crypto_param_len(ar, enctype)),2195#if defined(__linux__)2196(void *)hdr + hdr_len,2197#elif defined(__FreeBSD__)2198(u8 *)hdr + hdr_len,2199#endif2200ath11k_dp_rx_crypto_param_len(ar, enctype));2201}22022203memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);22042205/* original 802.11 header has a different DA and in2206* case of 4addr it may also have different SA2207*/2208hdr = (struct ieee80211_hdr *)msdu->data;2209ether_addr_copy(ieee80211_get_DA(hdr), da);2210ether_addr_copy(ieee80211_get_SA(hdr), sa);2211}22122213static void ath11k_dp_rx_h_undecap(struct ath11k *ar, struct sk_buff *msdu,2214struct hal_rx_desc *rx_desc,2215enum hal_encrypt_type enctype,2216struct ieee80211_rx_status *status,2217bool decrypted)2218{2219u8 *first_hdr;2220u8 decap;2221struct ethhdr *ehdr;22222223first_hdr = ath11k_dp_rx_h_80211_hdr(ar->ab, rx_desc);2224decap = ath11k_dp_rx_h_msdu_start_decap_type(ar->ab, rx_desc);22252226switch (decap) {2227case DP_RX_DECAP_TYPE_NATIVE_WIFI:2228ath11k_dp_rx_h_undecap_nwifi(ar, msdu, first_hdr,2229enctype, status);2230break;2231case DP_RX_DECAP_TYPE_RAW:2232ath11k_dp_rx_h_undecap_raw(ar, msdu, enctype, status,2233decrypted);2234break;2235case DP_RX_DECAP_TYPE_ETHERNET2_DIX:2236ehdr = (struct ethhdr *)msdu->data;22372238/* mac80211 allows fast path only for authorized STA */2239if (ehdr->h_proto == cpu_to_be16(ETH_P_PAE)) {2240ATH11K_SKB_RXCB(msdu)->is_eapol = true;2241ath11k_dp_rx_h_undecap_eth(ar, msdu, first_hdr,2242enctype, status);2243break;2244}22452246/* PN for mcast packets will be validated in mac80211;2247* remove eth header and add 802.11 header.2248*/2249if (ATH11K_SKB_RXCB(msdu)->is_mcbc && decrypted)2250ath11k_dp_rx_h_undecap_eth(ar, msdu, first_hdr,2251enctype, status);2252break;2253case DP_RX_DECAP_TYPE_8023:2254/* TODO: Handle undecap for these formats */2255break;2256}2257}22582259static struct ath11k_peer *2260ath11k_dp_rx_h_find_peer(struct ath11k_base *ab, struct sk_buff *msdu)2261{2262struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);2263struct hal_rx_desc *rx_desc = rxcb->rx_desc;2264struct ath11k_peer *peer = NULL;22652266lockdep_assert_held(&ab->base_lock);22672268if (rxcb->peer_id)2269peer = ath11k_peer_find_by_id(ab, rxcb->peer_id);22702271if (peer)2272return peer;22732274if (!rx_desc || !(ath11k_dp_rxdesc_mac_addr2_valid(ab, rx_desc)))2275return NULL;22762277peer = ath11k_peer_find_by_addr(ab,2278ath11k_dp_rxdesc_mpdu_start_addr2(ab, rx_desc));2279return peer;2280}22812282static void ath11k_dp_rx_h_mpdu(struct ath11k *ar,2283struct sk_buff *msdu,2284struct hal_rx_desc *rx_desc,2285struct ieee80211_rx_status *rx_status)2286{2287bool fill_crypto_hdr;2288enum hal_encrypt_type enctype;2289bool is_decrypted = false;2290struct ath11k_skb_rxcb *rxcb;2291struct ieee80211_hdr *hdr;2292struct ath11k_peer *peer;2293struct rx_attention *rx_attention;2294u32 err_bitmap;22952296/* PN for multicast packets will be checked in mac80211 */2297rxcb = ATH11K_SKB_RXCB(msdu);2298fill_crypto_hdr = ath11k_dp_rx_h_attn_is_mcbc(ar->ab, rx_desc);2299rxcb->is_mcbc = fill_crypto_hdr;23002301if (rxcb->is_mcbc) {2302rxcb->peer_id = ath11k_dp_rx_h_mpdu_start_peer_id(ar->ab, rx_desc);2303rxcb->seq_no = ath11k_dp_rx_h_mpdu_start_seq_no(ar->ab, rx_desc);2304}23052306spin_lock_bh(&ar->ab->base_lock);2307peer = ath11k_dp_rx_h_find_peer(ar->ab, msdu);2308if (peer) {2309if (rxcb->is_mcbc)2310enctype = peer->sec_type_grp;2311else2312enctype = peer->sec_type;2313} else {2314enctype = ath11k_dp_rx_h_mpdu_start_enctype(ar->ab, rx_desc);2315}2316spin_unlock_bh(&ar->ab->base_lock);23172318rx_attention = ath11k_dp_rx_get_attention(ar->ab, rx_desc);2319err_bitmap = ath11k_dp_rx_h_attn_mpdu_err(rx_attention);2320if (enctype != HAL_ENCRYPT_TYPE_OPEN && !err_bitmap)2321is_decrypted = ath11k_dp_rx_h_attn_is_decrypted(rx_attention);23222323/* Clear per-MPDU flags while leaving per-PPDU flags intact */2324rx_status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |2325RX_FLAG_MMIC_ERROR |2326RX_FLAG_DECRYPTED |2327RX_FLAG_IV_STRIPPED |2328RX_FLAG_MMIC_STRIPPED);23292330if (err_bitmap & DP_RX_MPDU_ERR_FCS)2331rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;2332if (err_bitmap & DP_RX_MPDU_ERR_TKIP_MIC)2333rx_status->flag |= RX_FLAG_MMIC_ERROR;23342335if (is_decrypted) {2336rx_status->flag |= RX_FLAG_DECRYPTED | RX_FLAG_MMIC_STRIPPED;23372338if (fill_crypto_hdr)2339rx_status->flag |= RX_FLAG_MIC_STRIPPED |2340RX_FLAG_ICV_STRIPPED;2341else2342rx_status->flag |= RX_FLAG_IV_STRIPPED |2343RX_FLAG_PN_VALIDATED;2344}23452346ath11k_dp_rx_h_csum_offload(ar, msdu);2347ath11k_dp_rx_h_undecap(ar, msdu, rx_desc,2348enctype, rx_status, is_decrypted);23492350if (!is_decrypted || fill_crypto_hdr)2351return;23522353if (ath11k_dp_rx_h_msdu_start_decap_type(ar->ab, rx_desc) !=2354DP_RX_DECAP_TYPE_ETHERNET2_DIX) {2355hdr = (void *)msdu->data;2356hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);2357}2358}23592360static void ath11k_dp_rx_h_rate(struct ath11k *ar, struct hal_rx_desc *rx_desc,2361struct ieee80211_rx_status *rx_status)2362{2363struct ieee80211_supported_band *sband;2364enum rx_msdu_start_pkt_type pkt_type;2365u8 bw;2366u8 rate_mcs, nss;2367u8 sgi;2368bool is_cck, is_ldpc;23692370pkt_type = ath11k_dp_rx_h_msdu_start_pkt_type(ar->ab, rx_desc);2371bw = ath11k_dp_rx_h_msdu_start_rx_bw(ar->ab, rx_desc);2372rate_mcs = ath11k_dp_rx_h_msdu_start_rate_mcs(ar->ab, rx_desc);2373nss = ath11k_dp_rx_h_msdu_start_nss(ar->ab, rx_desc);2374sgi = ath11k_dp_rx_h_msdu_start_sgi(ar->ab, rx_desc);23752376switch (pkt_type) {2377case RX_MSDU_START_PKT_TYPE_11A:2378case RX_MSDU_START_PKT_TYPE_11B:2379is_cck = (pkt_type == RX_MSDU_START_PKT_TYPE_11B);2380sband = &ar->mac.sbands[rx_status->band];2381rx_status->rate_idx = ath11k_mac_hw_rate_to_idx(sband, rate_mcs,2382is_cck);2383break;2384case RX_MSDU_START_PKT_TYPE_11N:2385rx_status->encoding = RX_ENC_HT;2386if (rate_mcs > ATH11K_HT_MCS_MAX) {2387ath11k_warn(ar->ab,2388"Received with invalid mcs in HT mode %d\n",2389rate_mcs);2390break;2391}2392rx_status->rate_idx = rate_mcs + (8 * (nss - 1));2393if (sgi)2394rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;2395rx_status->bw = ath11k_mac_bw_to_mac80211_bw(bw);2396break;2397case RX_MSDU_START_PKT_TYPE_11AC:2398rx_status->encoding = RX_ENC_VHT;2399rx_status->rate_idx = rate_mcs;2400if (rate_mcs > ATH11K_VHT_MCS_MAX) {2401ath11k_warn(ar->ab,2402"Received with invalid mcs in VHT mode %d\n",2403rate_mcs);2404break;2405}2406rx_status->nss = nss;2407if (sgi)2408rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;2409rx_status->bw = ath11k_mac_bw_to_mac80211_bw(bw);2410is_ldpc = ath11k_dp_rx_h_msdu_start_ldpc_support(ar->ab, rx_desc);2411if (is_ldpc)2412rx_status->enc_flags |= RX_ENC_FLAG_LDPC;2413break;2414case RX_MSDU_START_PKT_TYPE_11AX:2415rx_status->rate_idx = rate_mcs;2416if (rate_mcs > ATH11K_HE_MCS_MAX) {2417ath11k_warn(ar->ab,2418"Received with invalid mcs in HE mode %d\n",2419rate_mcs);2420break;2421}2422rx_status->encoding = RX_ENC_HE;2423rx_status->nss = nss;2424rx_status->he_gi = ath11k_mac_he_gi_to_nl80211_he_gi(sgi);2425rx_status->bw = ath11k_mac_bw_to_mac80211_bw(bw);2426break;2427}2428}24292430static void ath11k_dp_rx_h_ppdu(struct ath11k *ar, struct hal_rx_desc *rx_desc,2431struct ieee80211_rx_status *rx_status)2432{2433u8 channel_num;2434u32 center_freq, meta_data;2435struct ieee80211_channel *channel;24362437rx_status->freq = 0;2438rx_status->rate_idx = 0;2439rx_status->nss = 0;2440rx_status->encoding = RX_ENC_LEGACY;2441rx_status->bw = RATE_INFO_BW_20;24422443rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;24442445meta_data = ath11k_dp_rx_h_msdu_start_freq(ar->ab, rx_desc);2446channel_num = meta_data;2447center_freq = meta_data >> 16;24482449if (center_freq >= ATH11K_MIN_6G_FREQ &&2450center_freq <= ATH11K_MAX_6G_FREQ) {2451rx_status->band = NL80211_BAND_6GHZ;2452rx_status->freq = center_freq;2453} else if (channel_num >= 1 && channel_num <= 14) {2454rx_status->band = NL80211_BAND_2GHZ;2455} else if (channel_num >= 36 && channel_num <= 177) {2456rx_status->band = NL80211_BAND_5GHZ;2457} else {2458spin_lock_bh(&ar->data_lock);2459channel = ar->rx_channel;2460if (channel) {2461rx_status->band = channel->band;2462channel_num =2463ieee80211_frequency_to_channel(channel->center_freq);2464}2465spin_unlock_bh(&ar->data_lock);2466ath11k_dbg_dump(ar->ab, ATH11K_DBG_DATA, NULL, "rx_desc: ",2467rx_desc, sizeof(struct hal_rx_desc));2468}24692470if (rx_status->band != NL80211_BAND_6GHZ)2471rx_status->freq = ieee80211_channel_to_frequency(channel_num,2472rx_status->band);24732474ath11k_dp_rx_h_rate(ar, rx_desc, rx_status);2475}24762477static void ath11k_dp_rx_deliver_msdu(struct ath11k *ar, struct napi_struct *napi,2478struct sk_buff *msdu,2479struct ieee80211_rx_status *status)2480{2481static const struct ieee80211_radiotap_he known = {2482.data1 = cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA1_DATA_MCS_KNOWN |2483IEEE80211_RADIOTAP_HE_DATA1_BW_RU_ALLOC_KNOWN),2484.data2 = cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA2_GI_KNOWN),2485};2486struct ieee80211_rx_status *rx_status;2487struct ieee80211_radiotap_he *he = NULL;2488struct ieee80211_sta *pubsta = NULL;2489struct ath11k_peer *peer;2490struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);2491u8 decap = DP_RX_DECAP_TYPE_RAW;2492bool is_mcbc = rxcb->is_mcbc;2493bool is_eapol = rxcb->is_eapol;24942495if (status->encoding == RX_ENC_HE &&2496!(status->flag & RX_FLAG_RADIOTAP_HE) &&2497!(status->flag & RX_FLAG_SKIP_MONITOR)) {2498he = skb_push(msdu, sizeof(known));2499memcpy(he, &known, sizeof(known));2500status->flag |= RX_FLAG_RADIOTAP_HE;2501}25022503if (!(status->flag & RX_FLAG_ONLY_MONITOR))2504decap = ath11k_dp_rx_h_msdu_start_decap_type(ar->ab, rxcb->rx_desc);25052506spin_lock_bh(&ar->ab->base_lock);2507peer = ath11k_dp_rx_h_find_peer(ar->ab, msdu);2508if (peer && peer->sta)2509pubsta = peer->sta;2510spin_unlock_bh(&ar->ab->base_lock);25112512ath11k_dbg(ar->ab, ATH11K_DBG_DATA,2513"rx skb %p len %u peer %pM %d %s sn %u %s%s%s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",2514msdu,2515msdu->len,2516peer ? peer->addr : NULL,2517rxcb->tid,2518is_mcbc ? "mcast" : "ucast",2519rxcb->seq_no,2520(status->encoding == RX_ENC_LEGACY) ? "legacy" : "",2521(status->encoding == RX_ENC_HT) ? "ht" : "",2522(status->encoding == RX_ENC_VHT) ? "vht" : "",2523(status->encoding == RX_ENC_HE) ? "he" : "",2524(status->bw == RATE_INFO_BW_40) ? "40" : "",2525(status->bw == RATE_INFO_BW_80) ? "80" : "",2526(status->bw == RATE_INFO_BW_160) ? "160" : "",2527status->enc_flags & RX_ENC_FLAG_SHORT_GI ? "sgi " : "",2528status->rate_idx,2529status->nss,2530status->freq,2531status->band, status->flag,2532!!(status->flag & RX_FLAG_FAILED_FCS_CRC),2533!!(status->flag & RX_FLAG_MMIC_ERROR),2534!!(status->flag & RX_FLAG_AMSDU_MORE));25352536ath11k_dbg_dump(ar->ab, ATH11K_DBG_DP_RX, NULL, "dp rx msdu: ",2537msdu->data, msdu->len);25382539rx_status = IEEE80211_SKB_RXCB(msdu);2540*rx_status = *status;25412542/* TODO: trace rx packet */25432544/* PN for multicast packets are not validate in HW,2545* so skip 802.3 rx path2546* Also, fast_rx expects the STA to be authorized, hence2547* eapol packets are sent in slow path.2548*/2549if (decap == DP_RX_DECAP_TYPE_ETHERNET2_DIX && !is_eapol &&2550!(is_mcbc && rx_status->flag & RX_FLAG_DECRYPTED))2551rx_status->flag |= RX_FLAG_8023;25522553ieee80211_rx_napi(ar->hw, pubsta, msdu, napi);2554}25552556static int ath11k_dp_rx_process_msdu(struct ath11k *ar,2557struct sk_buff *msdu,2558struct sk_buff_head *msdu_list,2559struct ieee80211_rx_status *rx_status)2560{2561struct ath11k_base *ab = ar->ab;2562struct hal_rx_desc *rx_desc, *lrx_desc;2563struct rx_attention *rx_attention;2564struct ath11k_skb_rxcb *rxcb;2565struct sk_buff *last_buf;2566u8 l3_pad_bytes;2567u8 *hdr_status;2568u16 msdu_len;2569int ret;2570u32 hal_rx_desc_sz = ar->ab->hw_params.hal_desc_sz;25712572last_buf = ath11k_dp_rx_get_msdu_last_buf(msdu_list, msdu);2573if (!last_buf) {2574ath11k_warn(ab,2575"No valid Rx buffer to access Atten/MSDU_END/MPDU_END tlvs\n");2576ret = -EIO;2577goto free_out;2578}25792580rx_desc = (struct hal_rx_desc *)msdu->data;2581if (ath11k_dp_rx_h_attn_msdu_len_err(ab, rx_desc)) {2582ath11k_warn(ar->ab, "msdu len not valid\n");2583ret = -EIO;2584goto free_out;2585}25862587lrx_desc = (struct hal_rx_desc *)last_buf->data;2588rx_attention = ath11k_dp_rx_get_attention(ab, lrx_desc);2589if (!ath11k_dp_rx_h_attn_msdu_done(rx_attention)) {2590ath11k_warn(ab, "msdu_done bit in attention is not set\n");2591ret = -EIO;2592goto free_out;2593}25942595rxcb = ATH11K_SKB_RXCB(msdu);2596rxcb->rx_desc = rx_desc;2597msdu_len = ath11k_dp_rx_h_msdu_start_msdu_len(ab, rx_desc);2598l3_pad_bytes = ath11k_dp_rx_h_msdu_end_l3pad(ab, lrx_desc);25992600if (rxcb->is_frag) {2601skb_pull(msdu, hal_rx_desc_sz);2602} else if (!rxcb->is_continuation) {2603if ((msdu_len + hal_rx_desc_sz) > DP_RX_BUFFER_SIZE) {2604hdr_status = ath11k_dp_rx_h_80211_hdr(ab, rx_desc);2605ret = -EINVAL;2606ath11k_warn(ab, "invalid msdu len %u\n", msdu_len);2607ath11k_dbg_dump(ab, ATH11K_DBG_DATA, NULL, "", hdr_status,2608sizeof(struct ieee80211_hdr));2609ath11k_dbg_dump(ab, ATH11K_DBG_DATA, NULL, "", rx_desc,2610sizeof(struct hal_rx_desc));2611goto free_out;2612}2613skb_put(msdu, hal_rx_desc_sz + l3_pad_bytes + msdu_len);2614skb_pull(msdu, hal_rx_desc_sz + l3_pad_bytes);2615} else {2616ret = ath11k_dp_rx_msdu_coalesce(ar, msdu_list,2617msdu, last_buf,2618l3_pad_bytes, msdu_len);2619if (ret) {2620ath11k_warn(ab,2621"failed to coalesce msdu rx buffer%d\n", ret);2622goto free_out;2623}2624}26252626ath11k_dp_rx_h_ppdu(ar, rx_desc, rx_status);2627ath11k_dp_rx_h_mpdu(ar, msdu, rx_desc, rx_status);26282629rx_status->flag |= RX_FLAG_SKIP_MONITOR | RX_FLAG_DUP_VALIDATED;26302631return 0;26322633free_out:2634return ret;2635}26362637static void ath11k_dp_rx_process_received_packets(struct ath11k_base *ab,2638struct napi_struct *napi,2639struct sk_buff_head *msdu_list,2640int mac_id)2641{2642struct sk_buff *msdu;2643struct ath11k *ar;2644struct ieee80211_rx_status rx_status = {0};2645int ret;26462647if (skb_queue_empty(msdu_list))2648return;26492650if (unlikely(!rcu_access_pointer(ab->pdevs_active[mac_id]))) {2651__skb_queue_purge(msdu_list);2652return;2653}26542655ar = ab->pdevs[mac_id].ar;2656if (unlikely(test_bit(ATH11K_CAC_RUNNING, &ar->dev_flags))) {2657__skb_queue_purge(msdu_list);2658return;2659}26602661while ((msdu = __skb_dequeue(msdu_list))) {2662ret = ath11k_dp_rx_process_msdu(ar, msdu, msdu_list, &rx_status);2663if (unlikely(ret)) {2664ath11k_dbg(ab, ATH11K_DBG_DATA,2665"Unable to process msdu %d", ret);2666dev_kfree_skb_any(msdu);2667continue;2668}26692670ath11k_dp_rx_deliver_msdu(ar, napi, msdu, &rx_status);2671}2672}26732674int ath11k_dp_process_rx(struct ath11k_base *ab, int ring_id,2675struct napi_struct *napi, int budget)2676{2677struct ath11k_dp *dp = &ab->dp;2678struct dp_rxdma_ring *rx_ring;2679int num_buffs_reaped[MAX_RADIOS] = {0};2680struct sk_buff_head msdu_list[MAX_RADIOS];2681struct ath11k_skb_rxcb *rxcb;2682int total_msdu_reaped = 0;2683struct hal_srng *srng;2684struct sk_buff *msdu;2685bool done = false;2686int buf_id, mac_id;2687struct ath11k *ar;2688struct hal_reo_dest_ring *desc;2689enum hal_reo_dest_ring_push_reason push_reason;2690u32 cookie;2691int i;26922693for (i = 0; i < MAX_RADIOS; i++)2694__skb_queue_head_init(&msdu_list[i]);26952696srng = &ab->hal.srng_list[dp->reo_dst_ring[ring_id].ring_id];26972698spin_lock_bh(&srng->lock);26992700try_again:2701ath11k_hal_srng_access_begin(ab, srng);27022703while (likely(desc =2704(struct hal_reo_dest_ring *)ath11k_hal_srng_dst_get_next_entry(ab,2705srng))) {2706cookie = FIELD_GET(BUFFER_ADDR_INFO1_SW_COOKIE,2707desc->buf_addr_info.info1);2708buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID,2709cookie);2710mac_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_PDEV_ID, cookie);27112712if (unlikely(buf_id == 0))2713continue;27142715ar = ab->pdevs[mac_id].ar;2716rx_ring = &ar->dp.rx_refill_buf_ring;2717spin_lock_bh(&rx_ring->idr_lock);2718msdu = idr_find(&rx_ring->bufs_idr, buf_id);2719if (unlikely(!msdu)) {2720ath11k_warn(ab, "frame rx with invalid buf_id %d\n",2721buf_id);2722spin_unlock_bh(&rx_ring->idr_lock);2723continue;2724}27252726idr_remove(&rx_ring->bufs_idr, buf_id);2727spin_unlock_bh(&rx_ring->idr_lock);27282729rxcb = ATH11K_SKB_RXCB(msdu);2730dma_unmap_single(ab->dev, rxcb->paddr,2731msdu->len + skb_tailroom(msdu),2732DMA_FROM_DEVICE);27332734num_buffs_reaped[mac_id]++;27352736push_reason = FIELD_GET(HAL_REO_DEST_RING_INFO0_PUSH_REASON,2737desc->info0);2738if (unlikely(push_reason !=2739HAL_REO_DEST_RING_PUSH_REASON_ROUTING_INSTRUCTION)) {2740dev_kfree_skb_any(msdu);2741ab->soc_stats.hal_reo_error[dp->reo_dst_ring[ring_id].ring_id]++;2742continue;2743}27442745rxcb->is_first_msdu = !!(desc->rx_msdu_info.info0 &2746RX_MSDU_DESC_INFO0_FIRST_MSDU_IN_MPDU);2747rxcb->is_last_msdu = !!(desc->rx_msdu_info.info0 &2748RX_MSDU_DESC_INFO0_LAST_MSDU_IN_MPDU);2749rxcb->is_continuation = !!(desc->rx_msdu_info.info0 &2750RX_MSDU_DESC_INFO0_MSDU_CONTINUATION);2751rxcb->peer_id = FIELD_GET(RX_MPDU_DESC_META_DATA_PEER_ID,2752desc->rx_mpdu_info.meta_data);2753rxcb->seq_no = FIELD_GET(RX_MPDU_DESC_INFO0_SEQ_NUM,2754desc->rx_mpdu_info.info0);2755rxcb->tid = FIELD_GET(HAL_REO_DEST_RING_INFO0_RX_QUEUE_NUM,2756desc->info0);27572758rxcb->mac_id = mac_id;2759__skb_queue_tail(&msdu_list[mac_id], msdu);27602761if (rxcb->is_continuation) {2762done = false;2763} else {2764total_msdu_reaped++;2765done = true;2766}27672768if (total_msdu_reaped >= budget)2769break;2770}27712772/* Hw might have updated the head pointer after we cached it.2773* In this case, even though there are entries in the ring we'll2774* get rx_desc NULL. Give the read another try with updated cached2775* head pointer so that we can reap complete MPDU in the current2776* rx processing.2777*/2778if (unlikely(!done && ath11k_hal_srng_dst_num_free(ab, srng, true))) {2779ath11k_hal_srng_access_end(ab, srng);2780goto try_again;2781}27822783ath11k_hal_srng_access_end(ab, srng);27842785spin_unlock_bh(&srng->lock);27862787if (unlikely(!total_msdu_reaped))2788goto exit;27892790for (i = 0; i < ab->num_radios; i++) {2791if (!num_buffs_reaped[i])2792continue;27932794ath11k_dp_rx_process_received_packets(ab, napi, &msdu_list[i], i);27952796ar = ab->pdevs[i].ar;2797rx_ring = &ar->dp.rx_refill_buf_ring;27982799ath11k_dp_rxbufs_replenish(ab, i, rx_ring, num_buffs_reaped[i],2800ab->hw_params.hal_params->rx_buf_rbm);2801}2802exit:2803return total_msdu_reaped;2804}28052806static void ath11k_dp_rx_update_peer_stats(struct ath11k_sta *arsta,2807struct hal_rx_mon_ppdu_info *ppdu_info)2808{2809struct ath11k_rx_peer_stats *rx_stats = arsta->rx_stats;2810u32 num_msdu;2811int i;28122813if (!rx_stats)2814return;28152816arsta->rssi_comb = ppdu_info->rssi_comb;2817ewma_avg_rssi_add(&arsta->avg_rssi, ppdu_info->rssi_comb);28182819num_msdu = ppdu_info->tcp_msdu_count + ppdu_info->tcp_ack_msdu_count +2820ppdu_info->udp_msdu_count + ppdu_info->other_msdu_count;28212822rx_stats->num_msdu += num_msdu;2823rx_stats->tcp_msdu_count += ppdu_info->tcp_msdu_count +2824ppdu_info->tcp_ack_msdu_count;2825rx_stats->udp_msdu_count += ppdu_info->udp_msdu_count;2826rx_stats->other_msdu_count += ppdu_info->other_msdu_count;28272828if (ppdu_info->preamble_type == HAL_RX_PREAMBLE_11A ||2829ppdu_info->preamble_type == HAL_RX_PREAMBLE_11B) {2830ppdu_info->nss = 1;2831ppdu_info->mcs = HAL_RX_MAX_MCS;2832ppdu_info->tid = IEEE80211_NUM_TIDS;2833}28342835if (ppdu_info->nss > 0 && ppdu_info->nss <= HAL_RX_MAX_NSS)2836rx_stats->nss_count[ppdu_info->nss - 1] += num_msdu;28372838if (ppdu_info->mcs <= HAL_RX_MAX_MCS)2839rx_stats->mcs_count[ppdu_info->mcs] += num_msdu;28402841if (ppdu_info->gi < HAL_RX_GI_MAX)2842rx_stats->gi_count[ppdu_info->gi] += num_msdu;28432844if (ppdu_info->bw < HAL_RX_BW_MAX)2845rx_stats->bw_count[ppdu_info->bw] += num_msdu;28462847if (ppdu_info->ldpc < HAL_RX_SU_MU_CODING_MAX)2848rx_stats->coding_count[ppdu_info->ldpc] += num_msdu;28492850if (ppdu_info->tid <= IEEE80211_NUM_TIDS)2851rx_stats->tid_count[ppdu_info->tid] += num_msdu;28522853if (ppdu_info->preamble_type < HAL_RX_PREAMBLE_MAX)2854rx_stats->pream_cnt[ppdu_info->preamble_type] += num_msdu;28552856if (ppdu_info->reception_type < HAL_RX_RECEPTION_TYPE_MAX)2857rx_stats->reception_type[ppdu_info->reception_type] += num_msdu;28582859if (ppdu_info->is_stbc)2860rx_stats->stbc_count += num_msdu;28612862if (ppdu_info->beamformed)2863rx_stats->beamformed_count += num_msdu;28642865if (ppdu_info->num_mpdu_fcs_ok > 1)2866rx_stats->ampdu_msdu_count += num_msdu;2867else2868rx_stats->non_ampdu_msdu_count += num_msdu;28692870rx_stats->num_mpdu_fcs_ok += ppdu_info->num_mpdu_fcs_ok;2871rx_stats->num_mpdu_fcs_err += ppdu_info->num_mpdu_fcs_err;2872rx_stats->dcm_count += ppdu_info->dcm;2873rx_stats->ru_alloc_cnt[ppdu_info->ru_alloc] += num_msdu;28742875arsta->rssi_comb = ppdu_info->rssi_comb;28762877BUILD_BUG_ON(ARRAY_SIZE(arsta->chain_signal) >2878ARRAY_SIZE(ppdu_info->rssi_chain_pri20));28792880for (i = 0; i < ARRAY_SIZE(arsta->chain_signal); i++)2881arsta->chain_signal[i] = ppdu_info->rssi_chain_pri20[i];28822883rx_stats->rx_duration += ppdu_info->rx_duration;2884arsta->rx_duration = rx_stats->rx_duration;2885}28862887static struct sk_buff *ath11k_dp_rx_alloc_mon_status_buf(struct ath11k_base *ab,2888struct dp_rxdma_ring *rx_ring,2889int *buf_id)2890{2891struct sk_buff *skb;2892dma_addr_t paddr;28932894skb = dev_alloc_skb(DP_RX_BUFFER_SIZE +2895DP_RX_BUFFER_ALIGN_SIZE);28962897if (!skb)2898goto fail_alloc_skb;28992900if (!IS_ALIGNED((unsigned long)skb->data,2901DP_RX_BUFFER_ALIGN_SIZE)) {2902skb_pull(skb, PTR_ALIGN(skb->data, DP_RX_BUFFER_ALIGN_SIZE) -2903skb->data);2904}29052906paddr = dma_map_single(ab->dev, skb->data,2907skb->len + skb_tailroom(skb),2908DMA_FROM_DEVICE);2909if (unlikely(dma_mapping_error(ab->dev, paddr)))2910goto fail_free_skb;29112912spin_lock_bh(&rx_ring->idr_lock);2913*buf_id = idr_alloc(&rx_ring->bufs_idr, skb, 0,2914rx_ring->bufs_max, GFP_ATOMIC);2915spin_unlock_bh(&rx_ring->idr_lock);2916if (*buf_id < 0)2917goto fail_dma_unmap;29182919ATH11K_SKB_RXCB(skb)->paddr = paddr;2920return skb;29212922fail_dma_unmap:2923dma_unmap_single(ab->dev, paddr, skb->len + skb_tailroom(skb),2924DMA_FROM_DEVICE);2925fail_free_skb:2926dev_kfree_skb_any(skb);2927fail_alloc_skb:2928return NULL;2929}29302931int ath11k_dp_rx_mon_status_bufs_replenish(struct ath11k_base *ab, int mac_id,2932struct dp_rxdma_ring *rx_ring,2933int req_entries,2934enum hal_rx_buf_return_buf_manager mgr)2935{2936struct hal_srng *srng;2937u32 *desc;2938struct sk_buff *skb;2939int num_free;2940int num_remain;2941int buf_id;2942u32 cookie;2943dma_addr_t paddr;29442945req_entries = min(req_entries, rx_ring->bufs_max);29462947srng = &ab->hal.srng_list[rx_ring->refill_buf_ring.ring_id];29482949spin_lock_bh(&srng->lock);29502951ath11k_hal_srng_access_begin(ab, srng);29522953num_free = ath11k_hal_srng_src_num_free(ab, srng, true);29542955req_entries = min(num_free, req_entries);2956num_remain = req_entries;29572958while (num_remain > 0) {2959skb = ath11k_dp_rx_alloc_mon_status_buf(ab, rx_ring,2960&buf_id);2961if (!skb)2962break;2963paddr = ATH11K_SKB_RXCB(skb)->paddr;29642965desc = ath11k_hal_srng_src_get_next_entry(ab, srng);2966if (!desc)2967goto fail_desc_get;29682969cookie = FIELD_PREP(DP_RXDMA_BUF_COOKIE_PDEV_ID, mac_id) |2970FIELD_PREP(DP_RXDMA_BUF_COOKIE_BUF_ID, buf_id);29712972num_remain--;29732974ath11k_hal_rx_buf_addr_info_set(desc, paddr, cookie, mgr);2975}29762977ath11k_hal_srng_access_end(ab, srng);29782979spin_unlock_bh(&srng->lock);29802981return req_entries - num_remain;29822983fail_desc_get:2984spin_lock_bh(&rx_ring->idr_lock);2985idr_remove(&rx_ring->bufs_idr, buf_id);2986spin_unlock_bh(&rx_ring->idr_lock);2987dma_unmap_single(ab->dev, paddr, skb->len + skb_tailroom(skb),2988DMA_FROM_DEVICE);2989dev_kfree_skb_any(skb);2990ath11k_hal_srng_access_end(ab, srng);2991spin_unlock_bh(&srng->lock);29922993return req_entries - num_remain;2994}29952996#define ATH11K_DP_RX_FULL_MON_PPDU_ID_WRAP 3253529972998static void2999ath11k_dp_rx_mon_update_status_buf_state(struct ath11k_mon_data *pmon,3000struct hal_tlv_hdr *tlv)3001{3002struct hal_rx_ppdu_start *ppdu_start;3003u16 ppdu_id_diff, ppdu_id, tlv_len;3004u8 *ptr;30053006/* PPDU id is part of second tlv, move ptr to second tlv */3007tlv_len = FIELD_GET(HAL_TLV_HDR_LEN, tlv->tl);3008ptr = (u8 *)tlv;3009ptr += sizeof(*tlv) + tlv_len;3010tlv = (struct hal_tlv_hdr *)ptr;30113012if (FIELD_GET(HAL_TLV_HDR_TAG, tlv->tl) != HAL_RX_PPDU_START)3013return;30143015ptr += sizeof(*tlv);3016ppdu_start = (struct hal_rx_ppdu_start *)ptr;3017ppdu_id = FIELD_GET(HAL_RX_PPDU_START_INFO0_PPDU_ID,3018__le32_to_cpu(ppdu_start->info0));30193020if (pmon->sw_mon_entries.ppdu_id < ppdu_id) {3021pmon->buf_state = DP_MON_STATUS_LEAD;3022ppdu_id_diff = ppdu_id - pmon->sw_mon_entries.ppdu_id;3023if (ppdu_id_diff > ATH11K_DP_RX_FULL_MON_PPDU_ID_WRAP)3024pmon->buf_state = DP_MON_STATUS_LAG;3025} else if (pmon->sw_mon_entries.ppdu_id > ppdu_id) {3026pmon->buf_state = DP_MON_STATUS_LAG;3027ppdu_id_diff = pmon->sw_mon_entries.ppdu_id - ppdu_id;3028if (ppdu_id_diff > ATH11K_DP_RX_FULL_MON_PPDU_ID_WRAP)3029pmon->buf_state = DP_MON_STATUS_LEAD;3030}3031}30323033static int ath11k_dp_rx_reap_mon_status_ring(struct ath11k_base *ab, int mac_id,3034int *budget, struct sk_buff_head *skb_list)3035{3036struct ath11k *ar;3037const struct ath11k_hw_hal_params *hal_params;3038struct ath11k_pdev_dp *dp;3039struct dp_rxdma_ring *rx_ring;3040struct ath11k_mon_data *pmon;3041struct hal_srng *srng;3042void *rx_mon_status_desc;3043struct sk_buff *skb;3044struct ath11k_skb_rxcb *rxcb;3045struct hal_tlv_hdr *tlv;3046u32 cookie;3047int buf_id, srng_id;3048dma_addr_t paddr;3049u8 rbm;3050int num_buffs_reaped = 0;30513052ar = ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar;3053dp = &ar->dp;3054pmon = &dp->mon_data;3055srng_id = ath11k_hw_mac_id_to_srng_id(&ab->hw_params, mac_id);3056rx_ring = &dp->rx_mon_status_refill_ring[srng_id];30573058srng = &ab->hal.srng_list[rx_ring->refill_buf_ring.ring_id];30593060spin_lock_bh(&srng->lock);30613062ath11k_hal_srng_access_begin(ab, srng);3063while (*budget) {3064*budget -= 1;3065rx_mon_status_desc =3066ath11k_hal_srng_src_peek(ab, srng);3067if (!rx_mon_status_desc) {3068pmon->buf_state = DP_MON_STATUS_REPLINISH;3069break;3070}30713072ath11k_hal_rx_buf_addr_info_get(rx_mon_status_desc, &paddr,3073&cookie, &rbm);3074if (paddr) {3075buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID, cookie);30763077spin_lock_bh(&rx_ring->idr_lock);3078skb = idr_find(&rx_ring->bufs_idr, buf_id);3079spin_unlock_bh(&rx_ring->idr_lock);30803081if (!skb) {3082ath11k_warn(ab, "rx monitor status with invalid buf_id %d\n",3083buf_id);3084pmon->buf_state = DP_MON_STATUS_REPLINISH;3085goto move_next;3086}30873088rxcb = ATH11K_SKB_RXCB(skb);30893090dma_sync_single_for_cpu(ab->dev, rxcb->paddr,3091skb->len + skb_tailroom(skb),3092DMA_FROM_DEVICE);30933094tlv = (struct hal_tlv_hdr *)skb->data;3095if (FIELD_GET(HAL_TLV_HDR_TAG, tlv->tl) !=3096HAL_RX_STATUS_BUFFER_DONE) {3097ath11k_warn(ab, "mon status DONE not set %lx, buf_id %d\n",3098FIELD_GET(HAL_TLV_HDR_TAG,3099tlv->tl), buf_id);3100/* If done status is missing, hold onto status3101* ring until status is done for this status3102* ring buffer.3103* Keep HP in mon_status_ring unchanged,3104* and break from here.3105* Check status for same buffer for next time3106*/3107pmon->buf_state = DP_MON_STATUS_NO_DMA;3108break;3109}31103111spin_lock_bh(&rx_ring->idr_lock);3112idr_remove(&rx_ring->bufs_idr, buf_id);3113spin_unlock_bh(&rx_ring->idr_lock);3114if (ab->hw_params.full_monitor_mode) {3115ath11k_dp_rx_mon_update_status_buf_state(pmon, tlv);3116if (paddr == pmon->mon_status_paddr)3117pmon->buf_state = DP_MON_STATUS_MATCH;3118}31193120dma_unmap_single(ab->dev, rxcb->paddr,3121skb->len + skb_tailroom(skb),3122DMA_FROM_DEVICE);31233124__skb_queue_tail(skb_list, skb);3125} else {3126pmon->buf_state = DP_MON_STATUS_REPLINISH;3127}3128move_next:3129skb = ath11k_dp_rx_alloc_mon_status_buf(ab, rx_ring,3130&buf_id);31313132if (!skb) {3133hal_params = ab->hw_params.hal_params;3134ath11k_hal_rx_buf_addr_info_set(rx_mon_status_desc, 0, 0,3135hal_params->rx_buf_rbm);3136num_buffs_reaped++;3137break;3138}3139rxcb = ATH11K_SKB_RXCB(skb);31403141cookie = FIELD_PREP(DP_RXDMA_BUF_COOKIE_PDEV_ID, mac_id) |3142FIELD_PREP(DP_RXDMA_BUF_COOKIE_BUF_ID, buf_id);31433144ath11k_hal_rx_buf_addr_info_set(rx_mon_status_desc, rxcb->paddr,3145cookie,3146ab->hw_params.hal_params->rx_buf_rbm);3147ath11k_hal_srng_src_get_next_entry(ab, srng);3148num_buffs_reaped++;3149}3150ath11k_hal_srng_access_end(ab, srng);3151spin_unlock_bh(&srng->lock);31523153return num_buffs_reaped;3154}31553156static void ath11k_dp_rx_frag_timer(struct timer_list *timer)3157{3158struct dp_rx_tid *rx_tid = from_timer(rx_tid, timer, frag_timer);31593160spin_lock_bh(&rx_tid->ab->base_lock);3161if (rx_tid->last_frag_no &&3162rx_tid->rx_frag_bitmap == GENMASK(rx_tid->last_frag_no, 0)) {3163spin_unlock_bh(&rx_tid->ab->base_lock);3164return;3165}3166ath11k_dp_rx_frags_cleanup(rx_tid, true);3167spin_unlock_bh(&rx_tid->ab->base_lock);3168}31693170int ath11k_peer_rx_frag_setup(struct ath11k *ar, const u8 *peer_mac, int vdev_id)3171{3172struct ath11k_base *ab = ar->ab;3173struct crypto_shash *tfm;3174struct ath11k_peer *peer;3175struct dp_rx_tid *rx_tid;3176int i;31773178tfm = crypto_alloc_shash("michael_mic", 0, 0);3179if (IS_ERR(tfm)) {3180ath11k_warn(ab, "failed to allocate michael_mic shash: %ld\n",3181PTR_ERR(tfm));3182return PTR_ERR(tfm);3183}31843185spin_lock_bh(&ab->base_lock);31863187peer = ath11k_peer_find(ab, vdev_id, peer_mac);3188if (!peer) {3189ath11k_warn(ab, "failed to find the peer to set up fragment info\n");3190spin_unlock_bh(&ab->base_lock);3191crypto_free_shash(tfm);3192return -ENOENT;3193}31943195for (i = 0; i <= IEEE80211_NUM_TIDS; i++) {3196rx_tid = &peer->rx_tid[i];3197rx_tid->ab = ab;3198timer_setup(&rx_tid->frag_timer, ath11k_dp_rx_frag_timer, 0);3199skb_queue_head_init(&rx_tid->rx_frags);3200}32013202peer->tfm_mmic = tfm;3203peer->dp_setup_done = true;3204spin_unlock_bh(&ab->base_lock);32053206return 0;3207}32083209static int ath11k_dp_rx_h_michael_mic(struct crypto_shash *tfm, u8 *key,3210struct ieee80211_hdr *hdr, u8 *data,3211size_t data_len, u8 *mic)3212{3213SHASH_DESC_ON_STACK(desc, tfm);3214u8 mic_hdr[16] = {0};3215u8 tid = 0;3216int ret;32173218if (!tfm)3219return -EINVAL;32203221desc->tfm = tfm;32223223ret = crypto_shash_setkey(tfm, key, 8);3224if (ret)3225goto out;32263227ret = crypto_shash_init(desc);3228if (ret)3229goto out;32303231/* TKIP MIC header */3232memcpy(mic_hdr, ieee80211_get_DA(hdr), ETH_ALEN);3233memcpy(mic_hdr + ETH_ALEN, ieee80211_get_SA(hdr), ETH_ALEN);3234if (ieee80211_is_data_qos(hdr->frame_control))3235tid = ieee80211_get_tid(hdr);3236mic_hdr[12] = tid;32373238ret = crypto_shash_update(desc, mic_hdr, 16);3239if (ret)3240goto out;3241ret = crypto_shash_update(desc, data, data_len);3242if (ret)3243goto out;3244ret = crypto_shash_final(desc, mic);3245out:3246shash_desc_zero(desc);3247return ret;3248}32493250static int ath11k_dp_rx_h_verify_tkip_mic(struct ath11k *ar, struct ath11k_peer *peer,3251struct sk_buff *msdu)3252{3253struct hal_rx_desc *rx_desc = (struct hal_rx_desc *)msdu->data;3254struct ieee80211_rx_status *rxs = IEEE80211_SKB_RXCB(msdu);3255struct ieee80211_key_conf *key_conf;3256struct ieee80211_hdr *hdr;3257u8 mic[IEEE80211_CCMP_MIC_LEN];3258int head_len, tail_len, ret;3259size_t data_len;3260u32 hdr_len, hal_rx_desc_sz = ar->ab->hw_params.hal_desc_sz;3261u8 *key, *data;3262u8 key_idx;32633264if (ath11k_dp_rx_h_mpdu_start_enctype(ar->ab, rx_desc) !=3265HAL_ENCRYPT_TYPE_TKIP_MIC)3266return 0;32673268hdr = (struct ieee80211_hdr *)(msdu->data + hal_rx_desc_sz);3269hdr_len = ieee80211_hdrlen(hdr->frame_control);3270head_len = hdr_len + hal_rx_desc_sz + IEEE80211_TKIP_IV_LEN;3271tail_len = IEEE80211_CCMP_MIC_LEN + IEEE80211_TKIP_ICV_LEN + FCS_LEN;32723273if (!is_multicast_ether_addr(hdr->addr1))3274key_idx = peer->ucast_keyidx;3275else3276key_idx = peer->mcast_keyidx;32773278key_conf = peer->keys[key_idx];32793280data = msdu->data + head_len;3281data_len = msdu->len - head_len - tail_len;3282key = &key_conf->key[NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY];32833284ret = ath11k_dp_rx_h_michael_mic(peer->tfm_mmic, key, hdr, data, data_len, mic);3285if (ret || memcmp(mic, data + data_len, IEEE80211_CCMP_MIC_LEN))3286goto mic_fail;32873288return 0;32893290mic_fail:3291(ATH11K_SKB_RXCB(msdu))->is_first_msdu = true;3292(ATH11K_SKB_RXCB(msdu))->is_last_msdu = true;32933294rxs->flag |= RX_FLAG_MMIC_ERROR | RX_FLAG_MMIC_STRIPPED |3295RX_FLAG_IV_STRIPPED | RX_FLAG_DECRYPTED;3296skb_pull(msdu, hal_rx_desc_sz);32973298ath11k_dp_rx_h_ppdu(ar, rx_desc, rxs);3299ath11k_dp_rx_h_undecap(ar, msdu, rx_desc,3300HAL_ENCRYPT_TYPE_TKIP_MIC, rxs, true);3301ieee80211_rx(ar->hw, msdu);3302return -EINVAL;3303}33043305static void ath11k_dp_rx_h_undecap_frag(struct ath11k *ar, struct sk_buff *msdu,3306enum hal_encrypt_type enctype, u32 flags)3307{3308struct ieee80211_hdr *hdr;3309size_t hdr_len;3310size_t crypto_len;3311u32 hal_rx_desc_sz = ar->ab->hw_params.hal_desc_sz;33123313if (!flags)3314return;33153316hdr = (struct ieee80211_hdr *)(msdu->data + hal_rx_desc_sz);33173318if (flags & RX_FLAG_MIC_STRIPPED)3319skb_trim(msdu, msdu->len -3320ath11k_dp_rx_crypto_mic_len(ar, enctype));33213322if (flags & RX_FLAG_ICV_STRIPPED)3323skb_trim(msdu, msdu->len -3324ath11k_dp_rx_crypto_icv_len(ar, enctype));33253326if (flags & RX_FLAG_IV_STRIPPED) {3327hdr_len = ieee80211_hdrlen(hdr->frame_control);3328crypto_len = ath11k_dp_rx_crypto_param_len(ar, enctype);33293330#if defined(__linux__)3331memmove((void *)msdu->data + hal_rx_desc_sz + crypto_len,3332(void *)msdu->data + hal_rx_desc_sz, hdr_len);3333#elif defined(__FreeBSD__)3334memmove((u8 *)msdu->data + hal_rx_desc_sz + crypto_len,3335(u8 *)msdu->data + hal_rx_desc_sz, hdr_len);3336#endif3337skb_pull(msdu, crypto_len);3338}3339}33403341static int ath11k_dp_rx_h_defrag(struct ath11k *ar,3342struct ath11k_peer *peer,3343struct dp_rx_tid *rx_tid,3344struct sk_buff **defrag_skb)3345{3346struct hal_rx_desc *rx_desc;3347struct sk_buff *skb, *first_frag, *last_frag;3348struct ieee80211_hdr *hdr;3349struct rx_attention *rx_attention;3350enum hal_encrypt_type enctype;3351bool is_decrypted = false;3352int msdu_len = 0;3353int extra_space;3354u32 flags, hal_rx_desc_sz = ar->ab->hw_params.hal_desc_sz;33553356first_frag = skb_peek(&rx_tid->rx_frags);3357last_frag = skb_peek_tail(&rx_tid->rx_frags);33583359skb_queue_walk(&rx_tid->rx_frags, skb) {3360flags = 0;3361rx_desc = (struct hal_rx_desc *)skb->data;3362hdr = (struct ieee80211_hdr *)(skb->data + hal_rx_desc_sz);33633364enctype = ath11k_dp_rx_h_mpdu_start_enctype(ar->ab, rx_desc);3365if (enctype != HAL_ENCRYPT_TYPE_OPEN) {3366rx_attention = ath11k_dp_rx_get_attention(ar->ab, rx_desc);3367is_decrypted = ath11k_dp_rx_h_attn_is_decrypted(rx_attention);3368}33693370if (is_decrypted) {3371if (skb != first_frag)3372flags |= RX_FLAG_IV_STRIPPED;3373if (skb != last_frag)3374flags |= RX_FLAG_ICV_STRIPPED |3375RX_FLAG_MIC_STRIPPED;3376}33773378/* RX fragments are always raw packets */3379if (skb != last_frag)3380skb_trim(skb, skb->len - FCS_LEN);3381ath11k_dp_rx_h_undecap_frag(ar, skb, enctype, flags);33823383if (skb != first_frag)3384skb_pull(skb, hal_rx_desc_sz +3385ieee80211_hdrlen(hdr->frame_control));3386msdu_len += skb->len;3387}33883389extra_space = msdu_len - (DP_RX_BUFFER_SIZE + skb_tailroom(first_frag));3390if (extra_space > 0 &&3391(pskb_expand_head(first_frag, 0, extra_space, GFP_ATOMIC) < 0))3392return -ENOMEM;33933394__skb_unlink(first_frag, &rx_tid->rx_frags);3395while ((skb = __skb_dequeue(&rx_tid->rx_frags))) {3396skb_put_data(first_frag, skb->data, skb->len);3397dev_kfree_skb_any(skb);3398}33993400hdr = (struct ieee80211_hdr *)(first_frag->data + hal_rx_desc_sz);3401hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_MOREFRAGS);3402ATH11K_SKB_RXCB(first_frag)->is_frag = 1;34033404if (ath11k_dp_rx_h_verify_tkip_mic(ar, peer, first_frag))3405first_frag = NULL;34063407*defrag_skb = first_frag;3408return 0;3409}34103411static int ath11k_dp_rx_h_defrag_reo_reinject(struct ath11k *ar, struct dp_rx_tid *rx_tid,3412struct sk_buff *defrag_skb)3413{3414struct ath11k_base *ab = ar->ab;3415struct ath11k_pdev_dp *dp = &ar->dp;3416struct dp_rxdma_ring *rx_refill_ring = &dp->rx_refill_buf_ring;3417struct hal_rx_desc *rx_desc = (struct hal_rx_desc *)defrag_skb->data;3418struct hal_reo_entrance_ring *reo_ent_ring;3419struct hal_reo_dest_ring *reo_dest_ring;3420struct dp_link_desc_bank *link_desc_banks;3421struct hal_rx_msdu_link *msdu_link;3422struct hal_rx_msdu_details *msdu0;3423struct hal_srng *srng;3424dma_addr_t paddr;3425u32 desc_bank, msdu_info, mpdu_info;3426u32 dst_idx, cookie, hal_rx_desc_sz;3427int ret, buf_id;34283429hal_rx_desc_sz = ab->hw_params.hal_desc_sz;3430link_desc_banks = ab->dp.link_desc_banks;3431reo_dest_ring = rx_tid->dst_ring_desc;34323433ath11k_hal_rx_reo_ent_paddr_get(ab, reo_dest_ring, &paddr, &desc_bank);3434#if defined(__linux__)3435msdu_link = (struct hal_rx_msdu_link *)(link_desc_banks[desc_bank].vaddr +3436#elif defined(__FreeBSD__)3437msdu_link = (struct hal_rx_msdu_link *)((u8 *)link_desc_banks[desc_bank].vaddr +3438#endif3439(paddr - link_desc_banks[desc_bank].paddr));3440msdu0 = &msdu_link->msdu_link[0];3441dst_idx = FIELD_GET(RX_MSDU_DESC_INFO0_REO_DEST_IND, msdu0->rx_msdu_info.info0);3442memset(msdu0, 0, sizeof(*msdu0));34433444msdu_info = FIELD_PREP(RX_MSDU_DESC_INFO0_FIRST_MSDU_IN_MPDU, 1) |3445FIELD_PREP(RX_MSDU_DESC_INFO0_LAST_MSDU_IN_MPDU, 1) |3446FIELD_PREP(RX_MSDU_DESC_INFO0_MSDU_CONTINUATION, 0) |3447FIELD_PREP(RX_MSDU_DESC_INFO0_MSDU_LENGTH,3448defrag_skb->len - hal_rx_desc_sz) |3449FIELD_PREP(RX_MSDU_DESC_INFO0_REO_DEST_IND, dst_idx) |3450FIELD_PREP(RX_MSDU_DESC_INFO0_VALID_SA, 1) |3451FIELD_PREP(RX_MSDU_DESC_INFO0_VALID_DA, 1);3452msdu0->rx_msdu_info.info0 = msdu_info;34533454/* change msdu len in hal rx desc */3455ath11k_dp_rxdesc_set_msdu_len(ab, rx_desc, defrag_skb->len - hal_rx_desc_sz);34563457paddr = dma_map_single(ab->dev, defrag_skb->data,3458defrag_skb->len + skb_tailroom(defrag_skb),3459DMA_TO_DEVICE);3460if (dma_mapping_error(ab->dev, paddr))3461return -ENOMEM;34623463spin_lock_bh(&rx_refill_ring->idr_lock);3464buf_id = idr_alloc(&rx_refill_ring->bufs_idr, defrag_skb, 0,3465rx_refill_ring->bufs_max * 3, GFP_ATOMIC);3466spin_unlock_bh(&rx_refill_ring->idr_lock);3467if (buf_id < 0) {3468ret = -ENOMEM;3469goto err_unmap_dma;3470}34713472ATH11K_SKB_RXCB(defrag_skb)->paddr = paddr;3473cookie = FIELD_PREP(DP_RXDMA_BUF_COOKIE_PDEV_ID, dp->mac_id) |3474FIELD_PREP(DP_RXDMA_BUF_COOKIE_BUF_ID, buf_id);34753476ath11k_hal_rx_buf_addr_info_set(msdu0, paddr, cookie,3477ab->hw_params.hal_params->rx_buf_rbm);34783479/* Fill mpdu details into reo entrace ring */3480srng = &ab->hal.srng_list[ab->dp.reo_reinject_ring.ring_id];34813482spin_lock_bh(&srng->lock);3483ath11k_hal_srng_access_begin(ab, srng);34843485reo_ent_ring = (struct hal_reo_entrance_ring *)3486ath11k_hal_srng_src_get_next_entry(ab, srng);3487if (!reo_ent_ring) {3488ath11k_hal_srng_access_end(ab, srng);3489spin_unlock_bh(&srng->lock);3490ret = -ENOSPC;3491goto err_free_idr;3492}3493memset(reo_ent_ring, 0, sizeof(*reo_ent_ring));34943495ath11k_hal_rx_reo_ent_paddr_get(ab, reo_dest_ring, &paddr, &desc_bank);3496ath11k_hal_rx_buf_addr_info_set(reo_ent_ring, paddr, desc_bank,3497HAL_RX_BUF_RBM_WBM_IDLE_DESC_LIST);34983499mpdu_info = FIELD_PREP(RX_MPDU_DESC_INFO0_MSDU_COUNT, 1) |3500FIELD_PREP(RX_MPDU_DESC_INFO0_SEQ_NUM, rx_tid->cur_sn) |3501FIELD_PREP(RX_MPDU_DESC_INFO0_FRAG_FLAG, 0) |3502FIELD_PREP(RX_MPDU_DESC_INFO0_VALID_SA, 1) |3503FIELD_PREP(RX_MPDU_DESC_INFO0_VALID_DA, 1) |3504FIELD_PREP(RX_MPDU_DESC_INFO0_RAW_MPDU, 1) |3505FIELD_PREP(RX_MPDU_DESC_INFO0_VALID_PN, 1);35063507reo_ent_ring->rx_mpdu_info.info0 = mpdu_info;3508reo_ent_ring->rx_mpdu_info.meta_data = reo_dest_ring->rx_mpdu_info.meta_data;3509reo_ent_ring->queue_addr_lo = reo_dest_ring->queue_addr_lo;3510reo_ent_ring->info0 = FIELD_PREP(HAL_REO_ENTR_RING_INFO0_QUEUE_ADDR_HI,3511FIELD_GET(HAL_REO_DEST_RING_INFO0_QUEUE_ADDR_HI,3512reo_dest_ring->info0)) |3513FIELD_PREP(HAL_REO_ENTR_RING_INFO0_DEST_IND, dst_idx);3514ath11k_hal_srng_access_end(ab, srng);3515spin_unlock_bh(&srng->lock);35163517return 0;35183519err_free_idr:3520spin_lock_bh(&rx_refill_ring->idr_lock);3521idr_remove(&rx_refill_ring->bufs_idr, buf_id);3522spin_unlock_bh(&rx_refill_ring->idr_lock);3523err_unmap_dma:3524dma_unmap_single(ab->dev, paddr, defrag_skb->len + skb_tailroom(defrag_skb),3525DMA_TO_DEVICE);3526return ret;3527}35283529static int ath11k_dp_rx_h_cmp_frags(struct ath11k *ar,3530struct sk_buff *a, struct sk_buff *b)3531{3532int frag1, frag2;35333534frag1 = ath11k_dp_rx_h_mpdu_start_frag_no(ar->ab, a);3535frag2 = ath11k_dp_rx_h_mpdu_start_frag_no(ar->ab, b);35363537return frag1 - frag2;3538}35393540static void ath11k_dp_rx_h_sort_frags(struct ath11k *ar,3541struct sk_buff_head *frag_list,3542struct sk_buff *cur_frag)3543{3544struct sk_buff *skb;3545int cmp;35463547skb_queue_walk(frag_list, skb) {3548cmp = ath11k_dp_rx_h_cmp_frags(ar, skb, cur_frag);3549if (cmp < 0)3550continue;3551__skb_queue_before(frag_list, skb, cur_frag);3552return;3553}3554__skb_queue_tail(frag_list, cur_frag);3555}35563557static u64 ath11k_dp_rx_h_get_pn(struct ath11k *ar, struct sk_buff *skb)3558{3559struct ieee80211_hdr *hdr;3560u64 pn = 0;3561u8 *ehdr;3562u32 hal_rx_desc_sz = ar->ab->hw_params.hal_desc_sz;35633564hdr = (struct ieee80211_hdr *)(skb->data + hal_rx_desc_sz);3565ehdr = skb->data + hal_rx_desc_sz + ieee80211_hdrlen(hdr->frame_control);35663567pn = ehdr[0];3568pn |= (u64)ehdr[1] << 8;3569pn |= (u64)ehdr[4] << 16;3570pn |= (u64)ehdr[5] << 24;3571pn |= (u64)ehdr[6] << 32;3572pn |= (u64)ehdr[7] << 40;35733574return pn;3575}35763577static bool3578ath11k_dp_rx_h_defrag_validate_incr_pn(struct ath11k *ar, struct dp_rx_tid *rx_tid)3579{3580enum hal_encrypt_type encrypt_type;3581struct sk_buff *first_frag, *skb;3582struct hal_rx_desc *desc;3583u64 last_pn;3584u64 cur_pn;35853586first_frag = skb_peek(&rx_tid->rx_frags);3587desc = (struct hal_rx_desc *)first_frag->data;35883589encrypt_type = ath11k_dp_rx_h_mpdu_start_enctype(ar->ab, desc);3590if (encrypt_type != HAL_ENCRYPT_TYPE_CCMP_128 &&3591encrypt_type != HAL_ENCRYPT_TYPE_CCMP_256 &&3592encrypt_type != HAL_ENCRYPT_TYPE_GCMP_128 &&3593encrypt_type != HAL_ENCRYPT_TYPE_AES_GCMP_256)3594return true;35953596last_pn = ath11k_dp_rx_h_get_pn(ar, first_frag);3597skb_queue_walk(&rx_tid->rx_frags, skb) {3598if (skb == first_frag)3599continue;36003601cur_pn = ath11k_dp_rx_h_get_pn(ar, skb);3602if (cur_pn != last_pn + 1)3603return false;3604last_pn = cur_pn;3605}3606return true;3607}36083609static int ath11k_dp_rx_frag_h_mpdu(struct ath11k *ar,3610struct sk_buff *msdu,3611u32 *ring_desc)3612{3613struct ath11k_base *ab = ar->ab;3614struct hal_rx_desc *rx_desc;3615struct ath11k_peer *peer;3616struct dp_rx_tid *rx_tid;3617struct sk_buff *defrag_skb = NULL;3618u32 peer_id;3619u16 seqno, frag_no;3620u8 tid;3621int ret = 0;3622bool more_frags;3623bool is_mcbc;36243625rx_desc = (struct hal_rx_desc *)msdu->data;3626peer_id = ath11k_dp_rx_h_mpdu_start_peer_id(ar->ab, rx_desc);3627tid = ath11k_dp_rx_h_mpdu_start_tid(ar->ab, rx_desc);3628seqno = ath11k_dp_rx_h_mpdu_start_seq_no(ar->ab, rx_desc);3629frag_no = ath11k_dp_rx_h_mpdu_start_frag_no(ar->ab, msdu);3630more_frags = ath11k_dp_rx_h_mpdu_start_more_frags(ar->ab, msdu);3631is_mcbc = ath11k_dp_rx_h_attn_is_mcbc(ar->ab, rx_desc);36323633/* Multicast/Broadcast fragments are not expected */3634if (is_mcbc)3635return -EINVAL;36363637if (!ath11k_dp_rx_h_mpdu_start_seq_ctrl_valid(ar->ab, rx_desc) ||3638!ath11k_dp_rx_h_mpdu_start_fc_valid(ar->ab, rx_desc) ||3639tid > IEEE80211_NUM_TIDS)3640return -EINVAL;36413642/* received unfragmented packet in reo3643* exception ring, this shouldn't happen3644* as these packets typically come from3645* reo2sw srngs.3646*/3647if (WARN_ON_ONCE(!frag_no && !more_frags))3648return -EINVAL;36493650spin_lock_bh(&ab->base_lock);3651peer = ath11k_peer_find_by_id(ab, peer_id);3652if (!peer) {3653ath11k_warn(ab, "failed to find the peer to de-fragment received fragment peer_id %d\n",3654peer_id);3655ret = -ENOENT;3656goto out_unlock;3657}3658if (!peer->dp_setup_done) {3659ath11k_warn(ab, "The peer %pM [%d] has uninitialized datapath\n",3660peer->addr, peer_id);3661ret = -ENOENT;3662goto out_unlock;3663}36643665rx_tid = &peer->rx_tid[tid];36663667if ((!skb_queue_empty(&rx_tid->rx_frags) && seqno != rx_tid->cur_sn) ||3668skb_queue_empty(&rx_tid->rx_frags)) {3669/* Flush stored fragments and start a new sequence */3670ath11k_dp_rx_frags_cleanup(rx_tid, true);3671rx_tid->cur_sn = seqno;3672}36733674if (rx_tid->rx_frag_bitmap & BIT(frag_no)) {3675/* Fragment already present */3676ret = -EINVAL;3677goto out_unlock;3678}36793680if (!rx_tid->rx_frag_bitmap || (frag_no > __fls(rx_tid->rx_frag_bitmap)))3681__skb_queue_tail(&rx_tid->rx_frags, msdu);3682else3683ath11k_dp_rx_h_sort_frags(ar, &rx_tid->rx_frags, msdu);36843685rx_tid->rx_frag_bitmap |= BIT(frag_no);3686if (!more_frags)3687rx_tid->last_frag_no = frag_no;36883689if (frag_no == 0) {3690rx_tid->dst_ring_desc = kmemdup(ring_desc,3691sizeof(*rx_tid->dst_ring_desc),3692GFP_ATOMIC);3693if (!rx_tid->dst_ring_desc) {3694ret = -ENOMEM;3695goto out_unlock;3696}3697} else {3698ath11k_dp_rx_link_desc_return(ab, ring_desc,3699HAL_WBM_REL_BM_ACT_PUT_IN_IDLE);3700}37013702if (!rx_tid->last_frag_no ||3703rx_tid->rx_frag_bitmap != GENMASK(rx_tid->last_frag_no, 0)) {3704mod_timer(&rx_tid->frag_timer, jiffies +3705ATH11K_DP_RX_FRAGMENT_TIMEOUT_MS);3706goto out_unlock;3707}37083709spin_unlock_bh(&ab->base_lock);3710del_timer_sync(&rx_tid->frag_timer);3711spin_lock_bh(&ab->base_lock);37123713peer = ath11k_peer_find_by_id(ab, peer_id);3714if (!peer)3715goto err_frags_cleanup;37163717if (!ath11k_dp_rx_h_defrag_validate_incr_pn(ar, rx_tid))3718goto err_frags_cleanup;37193720if (ath11k_dp_rx_h_defrag(ar, peer, rx_tid, &defrag_skb))3721goto err_frags_cleanup;37223723if (!defrag_skb)3724goto err_frags_cleanup;37253726if (ath11k_dp_rx_h_defrag_reo_reinject(ar, rx_tid, defrag_skb))3727goto err_frags_cleanup;37283729ath11k_dp_rx_frags_cleanup(rx_tid, false);3730goto out_unlock;37313732err_frags_cleanup:3733dev_kfree_skb_any(defrag_skb);3734ath11k_dp_rx_frags_cleanup(rx_tid, true);3735out_unlock:3736spin_unlock_bh(&ab->base_lock);3737return ret;3738}37393740static int3741ath11k_dp_process_rx_err_buf(struct ath11k *ar, u32 *ring_desc, int buf_id, bool drop)3742{3743struct ath11k_pdev_dp *dp = &ar->dp;3744struct dp_rxdma_ring *rx_ring = &dp->rx_refill_buf_ring;3745struct sk_buff *msdu;3746struct ath11k_skb_rxcb *rxcb;3747struct hal_rx_desc *rx_desc;3748u8 *hdr_status;3749u16 msdu_len;3750u32 hal_rx_desc_sz = ar->ab->hw_params.hal_desc_sz;37513752spin_lock_bh(&rx_ring->idr_lock);3753msdu = idr_find(&rx_ring->bufs_idr, buf_id);3754if (!msdu) {3755ath11k_warn(ar->ab, "rx err buf with invalid buf_id %d\n",3756buf_id);3757spin_unlock_bh(&rx_ring->idr_lock);3758return -EINVAL;3759}37603761idr_remove(&rx_ring->bufs_idr, buf_id);3762spin_unlock_bh(&rx_ring->idr_lock);37633764rxcb = ATH11K_SKB_RXCB(msdu);3765dma_unmap_single(ar->ab->dev, rxcb->paddr,3766msdu->len + skb_tailroom(msdu),3767DMA_FROM_DEVICE);37683769if (drop) {3770dev_kfree_skb_any(msdu);3771return 0;3772}37733774rcu_read_lock();3775if (!rcu_dereference(ar->ab->pdevs_active[ar->pdev_idx])) {3776dev_kfree_skb_any(msdu);3777goto exit;3778}37793780if (test_bit(ATH11K_CAC_RUNNING, &ar->dev_flags)) {3781dev_kfree_skb_any(msdu);3782goto exit;3783}37843785rx_desc = (struct hal_rx_desc *)msdu->data;3786msdu_len = ath11k_dp_rx_h_msdu_start_msdu_len(ar->ab, rx_desc);3787if ((msdu_len + hal_rx_desc_sz) > DP_RX_BUFFER_SIZE) {3788hdr_status = ath11k_dp_rx_h_80211_hdr(ar->ab, rx_desc);3789ath11k_warn(ar->ab, "invalid msdu leng %u", msdu_len);3790ath11k_dbg_dump(ar->ab, ATH11K_DBG_DATA, NULL, "", hdr_status,3791sizeof(struct ieee80211_hdr));3792ath11k_dbg_dump(ar->ab, ATH11K_DBG_DATA, NULL, "", rx_desc,3793sizeof(struct hal_rx_desc));3794dev_kfree_skb_any(msdu);3795goto exit;3796}37973798skb_put(msdu, hal_rx_desc_sz + msdu_len);37993800if (ath11k_dp_rx_frag_h_mpdu(ar, msdu, ring_desc)) {3801dev_kfree_skb_any(msdu);3802ath11k_dp_rx_link_desc_return(ar->ab, ring_desc,3803HAL_WBM_REL_BM_ACT_PUT_IN_IDLE);3804}3805exit:3806rcu_read_unlock();3807return 0;3808}38093810int ath11k_dp_process_rx_err(struct ath11k_base *ab, struct napi_struct *napi,3811int budget)3812{3813u32 msdu_cookies[HAL_NUM_RX_MSDUS_PER_LINK_DESC];3814struct dp_link_desc_bank *link_desc_banks;3815enum hal_rx_buf_return_buf_manager rbm;3816int tot_n_bufs_reaped, quota, ret, i;3817int n_bufs_reaped[MAX_RADIOS] = {0};3818struct dp_rxdma_ring *rx_ring;3819struct dp_srng *reo_except;3820u32 desc_bank, num_msdus;3821struct hal_srng *srng;3822struct ath11k_dp *dp;3823void *link_desc_va;3824int buf_id, mac_id;3825struct ath11k *ar;3826dma_addr_t paddr;3827u32 *desc;3828bool is_frag;3829u8 drop = 0;38303831tot_n_bufs_reaped = 0;3832quota = budget;38333834dp = &ab->dp;3835reo_except = &dp->reo_except_ring;3836link_desc_banks = dp->link_desc_banks;38373838srng = &ab->hal.srng_list[reo_except->ring_id];38393840spin_lock_bh(&srng->lock);38413842ath11k_hal_srng_access_begin(ab, srng);38433844while (budget &&3845(desc = ath11k_hal_srng_dst_get_next_entry(ab, srng))) {3846struct hal_reo_dest_ring *reo_desc = (struct hal_reo_dest_ring *)desc;38473848ab->soc_stats.err_ring_pkts++;3849ret = ath11k_hal_desc_reo_parse_err(ab, desc, &paddr,3850&desc_bank);3851if (ret) {3852ath11k_warn(ab, "failed to parse error reo desc %d\n",3853ret);3854continue;3855}3856#if defined(__linux__)3857link_desc_va = link_desc_banks[desc_bank].vaddr +3858#elif defined(__FreeBSD__)3859link_desc_va = (u8 *)link_desc_banks[desc_bank].vaddr +3860#endif3861(paddr - link_desc_banks[desc_bank].paddr);3862ath11k_hal_rx_msdu_link_info_get(link_desc_va, &num_msdus, msdu_cookies,3863&rbm);3864if (rbm != HAL_RX_BUF_RBM_WBM_IDLE_DESC_LIST &&3865rbm != HAL_RX_BUF_RBM_SW3_BM) {3866ab->soc_stats.invalid_rbm++;3867ath11k_warn(ab, "invalid return buffer manager %d\n", rbm);3868ath11k_dp_rx_link_desc_return(ab, desc,3869HAL_WBM_REL_BM_ACT_REL_MSDU);3870continue;3871}38723873is_frag = !!(reo_desc->rx_mpdu_info.info0 & RX_MPDU_DESC_INFO0_FRAG_FLAG);38743875/* Process only rx fragments with one msdu per link desc below, and drop3876* msdu's indicated due to error reasons.3877*/3878if (!is_frag || num_msdus > 1) {3879drop = 1;3880/* Return the link desc back to wbm idle list */3881ath11k_dp_rx_link_desc_return(ab, desc,3882HAL_WBM_REL_BM_ACT_PUT_IN_IDLE);3883}38843885for (i = 0; i < num_msdus; i++) {3886buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID,3887msdu_cookies[i]);38883889mac_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_PDEV_ID,3890msdu_cookies[i]);38913892ar = ab->pdevs[mac_id].ar;38933894if (!ath11k_dp_process_rx_err_buf(ar, desc, buf_id, drop)) {3895n_bufs_reaped[mac_id]++;3896tot_n_bufs_reaped++;3897}3898}38993900if (tot_n_bufs_reaped >= quota) {3901tot_n_bufs_reaped = quota;3902goto exit;3903}39043905budget = quota - tot_n_bufs_reaped;3906}39073908exit:3909ath11k_hal_srng_access_end(ab, srng);39103911spin_unlock_bh(&srng->lock);39123913for (i = 0; i < ab->num_radios; i++) {3914if (!n_bufs_reaped[i])3915continue;39163917ar = ab->pdevs[i].ar;3918rx_ring = &ar->dp.rx_refill_buf_ring;39193920ath11k_dp_rxbufs_replenish(ab, i, rx_ring, n_bufs_reaped[i],3921ab->hw_params.hal_params->rx_buf_rbm);3922}39233924return tot_n_bufs_reaped;3925}39263927static void ath11k_dp_rx_null_q_desc_sg_drop(struct ath11k *ar,3928int msdu_len,3929struct sk_buff_head *msdu_list)3930{3931struct sk_buff *skb, *tmp;3932struct ath11k_skb_rxcb *rxcb;3933int n_buffs;39343935n_buffs = DIV_ROUND_UP(msdu_len,3936(DP_RX_BUFFER_SIZE - ar->ab->hw_params.hal_desc_sz));39373938skb_queue_walk_safe(msdu_list, skb, tmp) {3939rxcb = ATH11K_SKB_RXCB(skb);3940if (rxcb->err_rel_src == HAL_WBM_REL_SRC_MODULE_REO &&3941rxcb->err_code == HAL_REO_DEST_RING_ERROR_CODE_DESC_ADDR_ZERO) {3942if (!n_buffs)3943break;3944__skb_unlink(skb, msdu_list);3945dev_kfree_skb_any(skb);3946n_buffs--;3947}3948}3949}39503951static int ath11k_dp_rx_h_null_q_desc(struct ath11k *ar, struct sk_buff *msdu,3952struct ieee80211_rx_status *status,3953struct sk_buff_head *msdu_list)3954{3955u16 msdu_len;3956struct hal_rx_desc *desc = (struct hal_rx_desc *)msdu->data;3957struct rx_attention *rx_attention;3958u8 l3pad_bytes;3959struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);3960u32 hal_rx_desc_sz = ar->ab->hw_params.hal_desc_sz;39613962msdu_len = ath11k_dp_rx_h_msdu_start_msdu_len(ar->ab, desc);39633964if (!rxcb->is_frag && ((msdu_len + hal_rx_desc_sz) > DP_RX_BUFFER_SIZE)) {3965/* First buffer will be freed by the caller, so deduct it's length */3966msdu_len = msdu_len - (DP_RX_BUFFER_SIZE - hal_rx_desc_sz);3967ath11k_dp_rx_null_q_desc_sg_drop(ar, msdu_len, msdu_list);3968return -EINVAL;3969}39703971rx_attention = ath11k_dp_rx_get_attention(ar->ab, desc);3972if (!ath11k_dp_rx_h_attn_msdu_done(rx_attention)) {3973ath11k_warn(ar->ab,3974"msdu_done bit not set in null_q_des processing\n");3975__skb_queue_purge(msdu_list);3976return -EIO;3977}39783979/* Handle NULL queue descriptor violations arising out a missing3980* REO queue for a given peer or a given TID. This typically3981* may happen if a packet is received on a QOS enabled TID before the3982* ADDBA negotiation for that TID, when the TID queue is setup. Or3983* it may also happen for MC/BC frames if they are not routed to the3984* non-QOS TID queue, in the absence of any other default TID queue.3985* This error can show up both in a REO destination or WBM release ring.3986*/39873988rxcb->is_first_msdu = ath11k_dp_rx_h_msdu_end_first_msdu(ar->ab, desc);3989rxcb->is_last_msdu = ath11k_dp_rx_h_msdu_end_last_msdu(ar->ab, desc);39903991if (rxcb->is_frag) {3992skb_pull(msdu, hal_rx_desc_sz);3993} else {3994l3pad_bytes = ath11k_dp_rx_h_msdu_end_l3pad(ar->ab, desc);39953996if ((hal_rx_desc_sz + l3pad_bytes + msdu_len) > DP_RX_BUFFER_SIZE)3997return -EINVAL;39983999skb_put(msdu, hal_rx_desc_sz + l3pad_bytes + msdu_len);4000skb_pull(msdu, hal_rx_desc_sz + l3pad_bytes);4001}4002ath11k_dp_rx_h_ppdu(ar, desc, status);40034004ath11k_dp_rx_h_mpdu(ar, msdu, desc, status);40054006rxcb->tid = ath11k_dp_rx_h_mpdu_start_tid(ar->ab, desc);40074008/* Please note that caller will having the access to msdu and completing4009* rx with mac80211. Need not worry about cleaning up amsdu_list.4010*/40114012return 0;4013}40144015static bool ath11k_dp_rx_h_reo_err(struct ath11k *ar, struct sk_buff *msdu,4016struct ieee80211_rx_status *status,4017struct sk_buff_head *msdu_list)4018{4019struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);4020bool drop = false;40214022ar->ab->soc_stats.reo_error[rxcb->err_code]++;40234024switch (rxcb->err_code) {4025case HAL_REO_DEST_RING_ERROR_CODE_DESC_ADDR_ZERO:4026if (ath11k_dp_rx_h_null_q_desc(ar, msdu, status, msdu_list))4027drop = true;4028break;4029case HAL_REO_DEST_RING_ERROR_CODE_PN_CHECK_FAILED:4030/* TODO: Do not drop PN failed packets in the driver;4031* instead, it is good to drop such packets in mac802114032* after incrementing the replay counters.4033*/4034fallthrough;4035default:4036/* TODO: Review other errors and process them to mac802114037* as appropriate.4038*/4039drop = true;4040break;4041}40424043return drop;4044}40454046static void ath11k_dp_rx_h_tkip_mic_err(struct ath11k *ar, struct sk_buff *msdu,4047struct ieee80211_rx_status *status)4048{4049u16 msdu_len;4050struct hal_rx_desc *desc = (struct hal_rx_desc *)msdu->data;4051u8 l3pad_bytes;4052struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);4053u32 hal_rx_desc_sz = ar->ab->hw_params.hal_desc_sz;40544055rxcb->is_first_msdu = ath11k_dp_rx_h_msdu_end_first_msdu(ar->ab, desc);4056rxcb->is_last_msdu = ath11k_dp_rx_h_msdu_end_last_msdu(ar->ab, desc);40574058l3pad_bytes = ath11k_dp_rx_h_msdu_end_l3pad(ar->ab, desc);4059msdu_len = ath11k_dp_rx_h_msdu_start_msdu_len(ar->ab, desc);4060skb_put(msdu, hal_rx_desc_sz + l3pad_bytes + msdu_len);4061skb_pull(msdu, hal_rx_desc_sz + l3pad_bytes);40624063ath11k_dp_rx_h_ppdu(ar, desc, status);40644065status->flag |= (RX_FLAG_MMIC_STRIPPED | RX_FLAG_MMIC_ERROR |4066RX_FLAG_DECRYPTED);40674068ath11k_dp_rx_h_undecap(ar, msdu, desc,4069HAL_ENCRYPT_TYPE_TKIP_MIC, status, false);4070}40714072static bool ath11k_dp_rx_h_rxdma_err(struct ath11k *ar, struct sk_buff *msdu,4073struct ieee80211_rx_status *status)4074{4075struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);4076bool drop = false;40774078ar->ab->soc_stats.rxdma_error[rxcb->err_code]++;40794080switch (rxcb->err_code) {4081case HAL_REO_ENTR_RING_RXDMA_ECODE_TKIP_MIC_ERR:4082ath11k_dp_rx_h_tkip_mic_err(ar, msdu, status);4083break;4084default:4085/* TODO: Review other rxdma error code to check if anything is4086* worth reporting to mac802114087*/4088drop = true;4089break;4090}40914092return drop;4093}40944095static void ath11k_dp_rx_wbm_err(struct ath11k *ar,4096struct napi_struct *napi,4097struct sk_buff *msdu,4098struct sk_buff_head *msdu_list)4099{4100struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);4101struct ieee80211_rx_status rxs = {0};4102bool drop = true;41034104switch (rxcb->err_rel_src) {4105case HAL_WBM_REL_SRC_MODULE_REO:4106drop = ath11k_dp_rx_h_reo_err(ar, msdu, &rxs, msdu_list);4107break;4108case HAL_WBM_REL_SRC_MODULE_RXDMA:4109drop = ath11k_dp_rx_h_rxdma_err(ar, msdu, &rxs);4110break;4111default:4112/* msdu will get freed */4113break;4114}41154116if (drop) {4117dev_kfree_skb_any(msdu);4118return;4119}41204121ath11k_dp_rx_deliver_msdu(ar, napi, msdu, &rxs);4122}41234124int ath11k_dp_rx_process_wbm_err(struct ath11k_base *ab,4125struct napi_struct *napi, int budget)4126{4127struct ath11k *ar;4128struct ath11k_dp *dp = &ab->dp;4129struct dp_rxdma_ring *rx_ring;4130struct hal_rx_wbm_rel_info err_info;4131struct hal_srng *srng;4132struct sk_buff *msdu;4133struct sk_buff_head msdu_list[MAX_RADIOS];4134struct ath11k_skb_rxcb *rxcb;4135u32 *rx_desc;4136int buf_id, mac_id;4137int num_buffs_reaped[MAX_RADIOS] = {0};4138int total_num_buffs_reaped = 0;4139int ret, i;41404141for (i = 0; i < ab->num_radios; i++)4142__skb_queue_head_init(&msdu_list[i]);41434144srng = &ab->hal.srng_list[dp->rx_rel_ring.ring_id];41454146spin_lock_bh(&srng->lock);41474148ath11k_hal_srng_access_begin(ab, srng);41494150while (budget) {4151rx_desc = ath11k_hal_srng_dst_get_next_entry(ab, srng);4152if (!rx_desc)4153break;41544155ret = ath11k_hal_wbm_desc_parse_err(ab, rx_desc, &err_info);4156if (ret) {4157ath11k_warn(ab,4158"failed to parse rx error in wbm_rel ring desc %d\n",4159ret);4160continue;4161}41624163buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID, err_info.cookie);4164mac_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_PDEV_ID, err_info.cookie);41654166ar = ab->pdevs[mac_id].ar;4167rx_ring = &ar->dp.rx_refill_buf_ring;41684169spin_lock_bh(&rx_ring->idr_lock);4170msdu = idr_find(&rx_ring->bufs_idr, buf_id);4171if (!msdu) {4172ath11k_warn(ab, "frame rx with invalid buf_id %d pdev %d\n",4173buf_id, mac_id);4174spin_unlock_bh(&rx_ring->idr_lock);4175continue;4176}41774178idr_remove(&rx_ring->bufs_idr, buf_id);4179spin_unlock_bh(&rx_ring->idr_lock);41804181rxcb = ATH11K_SKB_RXCB(msdu);4182dma_unmap_single(ab->dev, rxcb->paddr,4183msdu->len + skb_tailroom(msdu),4184DMA_FROM_DEVICE);41854186num_buffs_reaped[mac_id]++;4187total_num_buffs_reaped++;4188budget--;41894190if (err_info.push_reason !=4191HAL_REO_DEST_RING_PUSH_REASON_ERR_DETECTED) {4192dev_kfree_skb_any(msdu);4193continue;4194}41954196rxcb->err_rel_src = err_info.err_rel_src;4197rxcb->err_code = err_info.err_code;4198rxcb->rx_desc = (struct hal_rx_desc *)msdu->data;4199__skb_queue_tail(&msdu_list[mac_id], msdu);4200}42014202ath11k_hal_srng_access_end(ab, srng);42034204spin_unlock_bh(&srng->lock);42054206if (!total_num_buffs_reaped)4207goto done;42084209for (i = 0; i < ab->num_radios; i++) {4210if (!num_buffs_reaped[i])4211continue;42124213ar = ab->pdevs[i].ar;4214rx_ring = &ar->dp.rx_refill_buf_ring;42154216ath11k_dp_rxbufs_replenish(ab, i, rx_ring, num_buffs_reaped[i],4217ab->hw_params.hal_params->rx_buf_rbm);4218}42194220rcu_read_lock();4221for (i = 0; i < ab->num_radios; i++) {4222if (!rcu_dereference(ab->pdevs_active[i])) {4223__skb_queue_purge(&msdu_list[i]);4224continue;4225}42264227ar = ab->pdevs[i].ar;42284229if (test_bit(ATH11K_CAC_RUNNING, &ar->dev_flags)) {4230__skb_queue_purge(&msdu_list[i]);4231continue;4232}42334234while ((msdu = __skb_dequeue(&msdu_list[i])) != NULL)4235ath11k_dp_rx_wbm_err(ar, napi, msdu, &msdu_list[i]);4236}4237rcu_read_unlock();4238done:4239return total_num_buffs_reaped;4240}42414242int ath11k_dp_process_rxdma_err(struct ath11k_base *ab, int mac_id, int budget)4243{4244struct ath11k *ar;4245struct dp_srng *err_ring;4246struct dp_rxdma_ring *rx_ring;4247struct dp_link_desc_bank *link_desc_banks = ab->dp.link_desc_banks;4248struct hal_srng *srng;4249u32 msdu_cookies[HAL_NUM_RX_MSDUS_PER_LINK_DESC];4250enum hal_rx_buf_return_buf_manager rbm;4251enum hal_reo_entr_rxdma_ecode rxdma_err_code;4252struct ath11k_skb_rxcb *rxcb;4253struct sk_buff *skb;4254struct hal_reo_entrance_ring *entr_ring;4255void *desc;4256int num_buf_freed = 0;4257int quota = budget;4258dma_addr_t paddr;4259u32 desc_bank;4260void *link_desc_va;4261int num_msdus;4262int i;4263int buf_id;42644265ar = ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar;4266err_ring = &ar->dp.rxdma_err_dst_ring[ath11k_hw_mac_id_to_srng_id(&ab->hw_params,4267mac_id)];4268rx_ring = &ar->dp.rx_refill_buf_ring;42694270srng = &ab->hal.srng_list[err_ring->ring_id];42714272spin_lock_bh(&srng->lock);42734274ath11k_hal_srng_access_begin(ab, srng);42754276while (quota-- &&4277(desc = ath11k_hal_srng_dst_get_next_entry(ab, srng))) {4278ath11k_hal_rx_reo_ent_paddr_get(ab, desc, &paddr, &desc_bank);42794280entr_ring = (struct hal_reo_entrance_ring *)desc;4281rxdma_err_code =4282FIELD_GET(HAL_REO_ENTR_RING_INFO1_RXDMA_ERROR_CODE,4283entr_ring->info1);4284ab->soc_stats.rxdma_error[rxdma_err_code]++;42854286#if defined(__linux__)4287link_desc_va = link_desc_banks[desc_bank].vaddr +4288#elif defined(__FreeBSD__)4289link_desc_va = (u8 *)link_desc_banks[desc_bank].vaddr +4290#endif4291(paddr - link_desc_banks[desc_bank].paddr);4292ath11k_hal_rx_msdu_link_info_get(link_desc_va, &num_msdus,4293msdu_cookies, &rbm);42944295for (i = 0; i < num_msdus; i++) {4296buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID,4297msdu_cookies[i]);42984299spin_lock_bh(&rx_ring->idr_lock);4300skb = idr_find(&rx_ring->bufs_idr, buf_id);4301if (!skb) {4302ath11k_warn(ab, "rxdma error with invalid buf_id %d\n",4303buf_id);4304spin_unlock_bh(&rx_ring->idr_lock);4305continue;4306}43074308idr_remove(&rx_ring->bufs_idr, buf_id);4309spin_unlock_bh(&rx_ring->idr_lock);43104311rxcb = ATH11K_SKB_RXCB(skb);4312dma_unmap_single(ab->dev, rxcb->paddr,4313skb->len + skb_tailroom(skb),4314DMA_FROM_DEVICE);4315dev_kfree_skb_any(skb);43164317num_buf_freed++;4318}43194320ath11k_dp_rx_link_desc_return(ab, desc,4321HAL_WBM_REL_BM_ACT_PUT_IN_IDLE);4322}43234324ath11k_hal_srng_access_end(ab, srng);43254326spin_unlock_bh(&srng->lock);43274328if (num_buf_freed)4329ath11k_dp_rxbufs_replenish(ab, mac_id, rx_ring, num_buf_freed,4330ab->hw_params.hal_params->rx_buf_rbm);43314332return budget - quota;4333}43344335void ath11k_dp_process_reo_status(struct ath11k_base *ab)4336{4337struct ath11k_dp *dp = &ab->dp;4338struct hal_srng *srng;4339struct dp_reo_cmd *cmd, *tmp;4340bool found = false;4341u32 *reo_desc;4342u16 tag;4343struct hal_reo_status reo_status;43444345srng = &ab->hal.srng_list[dp->reo_status_ring.ring_id];43464347memset(&reo_status, 0, sizeof(reo_status));43484349spin_lock_bh(&srng->lock);43504351ath11k_hal_srng_access_begin(ab, srng);43524353while ((reo_desc = ath11k_hal_srng_dst_get_next_entry(ab, srng))) {4354tag = FIELD_GET(HAL_SRNG_TLV_HDR_TAG, *reo_desc);43554356switch (tag) {4357case HAL_REO_GET_QUEUE_STATS_STATUS:4358ath11k_hal_reo_status_queue_stats(ab, reo_desc,4359&reo_status);4360break;4361case HAL_REO_FLUSH_QUEUE_STATUS:4362ath11k_hal_reo_flush_queue_status(ab, reo_desc,4363&reo_status);4364break;4365case HAL_REO_FLUSH_CACHE_STATUS:4366ath11k_hal_reo_flush_cache_status(ab, reo_desc,4367&reo_status);4368break;4369case HAL_REO_UNBLOCK_CACHE_STATUS:4370ath11k_hal_reo_unblk_cache_status(ab, reo_desc,4371&reo_status);4372break;4373case HAL_REO_FLUSH_TIMEOUT_LIST_STATUS:4374ath11k_hal_reo_flush_timeout_list_status(ab, reo_desc,4375&reo_status);4376break;4377case HAL_REO_DESCRIPTOR_THRESHOLD_REACHED_STATUS:4378ath11k_hal_reo_desc_thresh_reached_status(ab, reo_desc,4379&reo_status);4380break;4381case HAL_REO_UPDATE_RX_REO_QUEUE_STATUS:4382ath11k_hal_reo_update_rx_reo_queue_status(ab, reo_desc,4383&reo_status);4384break;4385default:4386ath11k_warn(ab, "Unknown reo status type %d\n", tag);4387continue;4388}43894390spin_lock_bh(&dp->reo_cmd_lock);4391list_for_each_entry_safe(cmd, tmp, &dp->reo_cmd_list, list) {4392if (reo_status.uniform_hdr.cmd_num == cmd->cmd_num) {4393found = true;4394list_del(&cmd->list);4395break;4396}4397}4398spin_unlock_bh(&dp->reo_cmd_lock);43994400if (found) {4401cmd->handler(dp, (void *)&cmd->data,4402reo_status.uniform_hdr.cmd_status);4403kfree(cmd);4404}44054406found = false;4407}44084409ath11k_hal_srng_access_end(ab, srng);44104411spin_unlock_bh(&srng->lock);4412}44134414void ath11k_dp_rx_pdev_free(struct ath11k_base *ab, int mac_id)4415{4416struct ath11k *ar = ab->pdevs[mac_id].ar;44174418ath11k_dp_rx_pdev_srng_free(ar);4419ath11k_dp_rxdma_pdev_buf_free(ar);4420}44214422int ath11k_dp_rx_pdev_alloc(struct ath11k_base *ab, int mac_id)4423{4424struct ath11k *ar = ab->pdevs[mac_id].ar;4425struct ath11k_pdev_dp *dp = &ar->dp;4426u32 ring_id;4427int i;4428int ret;44294430ret = ath11k_dp_rx_pdev_srng_alloc(ar);4431if (ret) {4432ath11k_warn(ab, "failed to setup rx srngs\n");4433return ret;4434}44354436ret = ath11k_dp_rxdma_pdev_buf_setup(ar);4437if (ret) {4438ath11k_warn(ab, "failed to setup rxdma ring\n");4439return ret;4440}44414442ring_id = dp->rx_refill_buf_ring.refill_buf_ring.ring_id;4443ret = ath11k_dp_tx_htt_srng_setup(ab, ring_id, mac_id, HAL_RXDMA_BUF);4444if (ret) {4445ath11k_warn(ab, "failed to configure rx_refill_buf_ring %d\n",4446ret);4447return ret;4448}44494450if (ab->hw_params.rx_mac_buf_ring) {4451for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {4452ring_id = dp->rx_mac_buf_ring[i].ring_id;4453ret = ath11k_dp_tx_htt_srng_setup(ab, ring_id,4454mac_id + i, HAL_RXDMA_BUF);4455if (ret) {4456ath11k_warn(ab, "failed to configure rx_mac_buf_ring%d %d\n",4457i, ret);4458return ret;4459}4460}4461}44624463for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {4464ring_id = dp->rxdma_err_dst_ring[i].ring_id;4465ret = ath11k_dp_tx_htt_srng_setup(ab, ring_id,4466mac_id + i, HAL_RXDMA_DST);4467if (ret) {4468ath11k_warn(ab, "failed to configure rxdma_err_dest_ring%d %d\n",4469i, ret);4470return ret;4471}4472}44734474if (!ab->hw_params.rxdma1_enable)4475goto config_refill_ring;44764477ring_id = dp->rxdma_mon_buf_ring.refill_buf_ring.ring_id;4478ret = ath11k_dp_tx_htt_srng_setup(ab, ring_id,4479mac_id, HAL_RXDMA_MONITOR_BUF);4480if (ret) {4481ath11k_warn(ab, "failed to configure rxdma_mon_buf_ring %d\n",4482ret);4483return ret;4484}4485ret = ath11k_dp_tx_htt_srng_setup(ab,4486dp->rxdma_mon_dst_ring.ring_id,4487mac_id, HAL_RXDMA_MONITOR_DST);4488if (ret) {4489ath11k_warn(ab, "failed to configure rxdma_mon_dst_ring %d\n",4490ret);4491return ret;4492}4493ret = ath11k_dp_tx_htt_srng_setup(ab,4494dp->rxdma_mon_desc_ring.ring_id,4495mac_id, HAL_RXDMA_MONITOR_DESC);4496if (ret) {4497ath11k_warn(ab, "failed to configure rxdma_mon_dst_ring %d\n",4498ret);4499return ret;4500}45014502config_refill_ring:4503for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {4504ring_id = dp->rx_mon_status_refill_ring[i].refill_buf_ring.ring_id;4505ret = ath11k_dp_tx_htt_srng_setup(ab, ring_id, mac_id + i,4506HAL_RXDMA_MONITOR_STATUS);4507if (ret) {4508ath11k_warn(ab,4509"failed to configure mon_status_refill_ring%d %d\n",4510i, ret);4511return ret;4512}4513}45144515return 0;4516}45174518static void ath11k_dp_mon_set_frag_len(u32 *total_len, u32 *frag_len)4519{4520if (*total_len >= (DP_RX_BUFFER_SIZE - sizeof(struct hal_rx_desc))) {4521*frag_len = DP_RX_BUFFER_SIZE - sizeof(struct hal_rx_desc);4522*total_len -= *frag_len;4523} else {4524*frag_len = *total_len;4525*total_len = 0;4526}4527}45284529static4530int ath11k_dp_rx_monitor_link_desc_return(struct ath11k *ar,4531void *p_last_buf_addr_info,4532u8 mac_id)4533{4534struct ath11k_pdev_dp *dp = &ar->dp;4535struct dp_srng *dp_srng;4536void *hal_srng;4537void *src_srng_desc;4538int ret = 0;45394540if (ar->ab->hw_params.rxdma1_enable) {4541dp_srng = &dp->rxdma_mon_desc_ring;4542hal_srng = &ar->ab->hal.srng_list[dp_srng->ring_id];4543} else {4544dp_srng = &ar->ab->dp.wbm_desc_rel_ring;4545hal_srng = &ar->ab->hal.srng_list[dp_srng->ring_id];4546}45474548ath11k_hal_srng_access_begin(ar->ab, hal_srng);45494550src_srng_desc = ath11k_hal_srng_src_get_next_entry(ar->ab, hal_srng);45514552if (src_srng_desc) {4553struct ath11k_buffer_addr *src_desc =4554(struct ath11k_buffer_addr *)src_srng_desc;45554556*src_desc = *((struct ath11k_buffer_addr *)p_last_buf_addr_info);4557} else {4558ath11k_dbg(ar->ab, ATH11K_DBG_DATA,4559"Monitor Link Desc Ring %d Full", mac_id);4560ret = -ENOMEM;4561}45624563ath11k_hal_srng_access_end(ar->ab, hal_srng);4564return ret;4565}45664567static4568void ath11k_dp_rx_mon_next_link_desc_get(void *rx_msdu_link_desc,4569dma_addr_t *paddr, u32 *sw_cookie,4570u8 *rbm,4571void **pp_buf_addr_info)4572{4573struct hal_rx_msdu_link *msdu_link =4574(struct hal_rx_msdu_link *)rx_msdu_link_desc;4575struct ath11k_buffer_addr *buf_addr_info;45764577buf_addr_info = (struct ath11k_buffer_addr *)&msdu_link->buf_addr_info;45784579ath11k_hal_rx_buf_addr_info_get(buf_addr_info, paddr, sw_cookie, rbm);45804581*pp_buf_addr_info = (void *)buf_addr_info;4582}45834584static int ath11k_dp_pkt_set_pktlen(struct sk_buff *skb, u32 len)4585{4586if (skb->len > len) {4587skb_trim(skb, len);4588} else {4589if (skb_tailroom(skb) < len - skb->len) {4590if ((pskb_expand_head(skb, 0,4591len - skb->len - skb_tailroom(skb),4592GFP_ATOMIC))) {4593dev_kfree_skb_any(skb);4594return -ENOMEM;4595}4596}4597skb_put(skb, (len - skb->len));4598}4599return 0;4600}46014602static void ath11k_hal_rx_msdu_list_get(struct ath11k *ar,4603void *msdu_link_desc,4604struct hal_rx_msdu_list *msdu_list,4605u16 *num_msdus)4606{4607struct hal_rx_msdu_details *msdu_details = NULL;4608struct rx_msdu_desc *msdu_desc_info = NULL;4609struct hal_rx_msdu_link *msdu_link = NULL;4610int i;4611u32 last = FIELD_PREP(RX_MSDU_DESC_INFO0_LAST_MSDU_IN_MPDU, 1);4612u32 first = FIELD_PREP(RX_MSDU_DESC_INFO0_FIRST_MSDU_IN_MPDU, 1);4613u8 tmp = 0;46144615msdu_link = (struct hal_rx_msdu_link *)msdu_link_desc;4616msdu_details = &msdu_link->msdu_link[0];46174618for (i = 0; i < HAL_RX_NUM_MSDU_DESC; i++) {4619if (FIELD_GET(BUFFER_ADDR_INFO0_ADDR,4620msdu_details[i].buf_addr_info.info0) == 0) {4621msdu_desc_info = &msdu_details[i - 1].rx_msdu_info;4622msdu_desc_info->info0 |= last;4623;4624break;4625}4626msdu_desc_info = &msdu_details[i].rx_msdu_info;46274628if (!i)4629msdu_desc_info->info0 |= first;4630else if (i == (HAL_RX_NUM_MSDU_DESC - 1))4631msdu_desc_info->info0 |= last;4632msdu_list->msdu_info[i].msdu_flags = msdu_desc_info->info0;4633msdu_list->msdu_info[i].msdu_len =4634HAL_RX_MSDU_PKT_LENGTH_GET(msdu_desc_info->info0);4635msdu_list->sw_cookie[i] =4636FIELD_GET(BUFFER_ADDR_INFO1_SW_COOKIE,4637msdu_details[i].buf_addr_info.info1);4638tmp = FIELD_GET(BUFFER_ADDR_INFO1_RET_BUF_MGR,4639msdu_details[i].buf_addr_info.info1);4640msdu_list->rbm[i] = tmp;4641}4642*num_msdus = i;4643}46444645static u32 ath11k_dp_rx_mon_comp_ppduid(u32 msdu_ppdu_id, u32 *ppdu_id,4646u32 *rx_bufs_used)4647{4648u32 ret = 0;46494650if ((*ppdu_id < msdu_ppdu_id) &&4651((msdu_ppdu_id - *ppdu_id) < DP_NOT_PPDU_ID_WRAP_AROUND)) {4652*ppdu_id = msdu_ppdu_id;4653ret = msdu_ppdu_id;4654} else if ((*ppdu_id > msdu_ppdu_id) &&4655((*ppdu_id - msdu_ppdu_id) > DP_NOT_PPDU_ID_WRAP_AROUND)) {4656/* mon_dst is behind than mon_status4657* skip dst_ring and free it4658*/4659*rx_bufs_used += 1;4660*ppdu_id = msdu_ppdu_id;4661ret = msdu_ppdu_id;4662}4663return ret;4664}46654666static void ath11k_dp_mon_get_buf_len(struct hal_rx_msdu_desc_info *info,4667bool *is_frag, u32 *total_len,4668u32 *frag_len, u32 *msdu_cnt)4669{4670if (info->msdu_flags & RX_MSDU_DESC_INFO0_MSDU_CONTINUATION) {4671if (!*is_frag) {4672*total_len = info->msdu_len;4673*is_frag = true;4674}4675ath11k_dp_mon_set_frag_len(total_len,4676frag_len);4677} else {4678if (*is_frag) {4679ath11k_dp_mon_set_frag_len(total_len,4680frag_len);4681} else {4682*frag_len = info->msdu_len;4683}4684*is_frag = false;4685*msdu_cnt -= 1;4686}4687}46884689static u324690ath11k_dp_rx_mon_mpdu_pop(struct ath11k *ar, int mac_id,4691void *ring_entry, struct sk_buff **head_msdu,4692struct sk_buff **tail_msdu, u32 *npackets,4693u32 *ppdu_id)4694{4695struct ath11k_pdev_dp *dp = &ar->dp;4696struct ath11k_mon_data *pmon = (struct ath11k_mon_data *)&dp->mon_data;4697struct dp_rxdma_ring *rx_ring = &dp->rxdma_mon_buf_ring;4698struct sk_buff *msdu = NULL, *last = NULL;4699struct hal_rx_msdu_list msdu_list;4700void *p_buf_addr_info, *p_last_buf_addr_info;4701struct hal_rx_desc *rx_desc;4702void *rx_msdu_link_desc;4703dma_addr_t paddr;4704u16 num_msdus = 0;4705u32 rx_buf_size, rx_pkt_offset, sw_cookie;4706u32 rx_bufs_used = 0, i = 0;4707u32 msdu_ppdu_id = 0, msdu_cnt = 0;4708u32 total_len = 0, frag_len = 0;4709bool is_frag, is_first_msdu;4710bool drop_mpdu = false;4711struct ath11k_skb_rxcb *rxcb;4712struct hal_reo_entrance_ring *ent_desc =4713(struct hal_reo_entrance_ring *)ring_entry;4714int buf_id;4715u32 rx_link_buf_info[2];4716u8 rbm;47174718if (!ar->ab->hw_params.rxdma1_enable)4719rx_ring = &dp->rx_refill_buf_ring;47204721ath11k_hal_rx_reo_ent_buf_paddr_get(ring_entry, &paddr,4722&sw_cookie,4723&p_last_buf_addr_info, &rbm,4724&msdu_cnt);47254726if (FIELD_GET(HAL_REO_ENTR_RING_INFO1_RXDMA_PUSH_REASON,4727ent_desc->info1) ==4728HAL_REO_DEST_RING_PUSH_REASON_ERR_DETECTED) {4729u8 rxdma_err =4730FIELD_GET(HAL_REO_ENTR_RING_INFO1_RXDMA_ERROR_CODE,4731ent_desc->info1);4732if (rxdma_err == HAL_REO_ENTR_RING_RXDMA_ECODE_FLUSH_REQUEST_ERR ||4733rxdma_err == HAL_REO_ENTR_RING_RXDMA_ECODE_MPDU_LEN_ERR ||4734rxdma_err == HAL_REO_ENTR_RING_RXDMA_ECODE_OVERFLOW_ERR) {4735drop_mpdu = true;4736pmon->rx_mon_stats.dest_mpdu_drop++;4737}4738}47394740is_frag = false;4741is_first_msdu = true;47424743do {4744if (pmon->mon_last_linkdesc_paddr == paddr) {4745pmon->rx_mon_stats.dup_mon_linkdesc_cnt++;4746return rx_bufs_used;4747}47484749if (ar->ab->hw_params.rxdma1_enable)4750rx_msdu_link_desc =4751#if defined(__linux__)4752(void *)pmon->link_desc_banks[sw_cookie].vaddr +4753#elif defined(__FreeBSD__)4754(u8 *)pmon->link_desc_banks[sw_cookie].vaddr +4755#endif4756(paddr - pmon->link_desc_banks[sw_cookie].paddr);4757else4758rx_msdu_link_desc =4759#if defined(__linux__)4760(void *)ar->ab->dp.link_desc_banks[sw_cookie].vaddr +4761#elif defined(__FreeBSD__)4762(u8 *)ar->ab->dp.link_desc_banks[sw_cookie].vaddr +4763#endif4764(paddr - ar->ab->dp.link_desc_banks[sw_cookie].paddr);47654766ath11k_hal_rx_msdu_list_get(ar, rx_msdu_link_desc, &msdu_list,4767&num_msdus);47684769for (i = 0; i < num_msdus; i++) {4770u32 l2_hdr_offset;47714772if (pmon->mon_last_buf_cookie == msdu_list.sw_cookie[i]) {4773ath11k_dbg(ar->ab, ATH11K_DBG_DATA,4774"i %d last_cookie %d is same\n",4775i, pmon->mon_last_buf_cookie);4776drop_mpdu = true;4777pmon->rx_mon_stats.dup_mon_buf_cnt++;4778continue;4779}4780buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID,4781msdu_list.sw_cookie[i]);47824783spin_lock_bh(&rx_ring->idr_lock);4784msdu = idr_find(&rx_ring->bufs_idr, buf_id);4785spin_unlock_bh(&rx_ring->idr_lock);4786if (!msdu) {4787ath11k_dbg(ar->ab, ATH11K_DBG_DATA,4788"msdu_pop: invalid buf_id %d\n", buf_id);4789break;4790}4791rxcb = ATH11K_SKB_RXCB(msdu);4792if (!rxcb->unmapped) {4793dma_unmap_single(ar->ab->dev, rxcb->paddr,4794msdu->len +4795skb_tailroom(msdu),4796DMA_FROM_DEVICE);4797rxcb->unmapped = 1;4798}4799if (drop_mpdu) {4800ath11k_dbg(ar->ab, ATH11K_DBG_DATA,4801"i %d drop msdu %p *ppdu_id %x\n",4802i, msdu, *ppdu_id);4803dev_kfree_skb_any(msdu);4804msdu = NULL;4805goto next_msdu;4806}48074808rx_desc = (struct hal_rx_desc *)msdu->data;48094810rx_pkt_offset = sizeof(struct hal_rx_desc);4811l2_hdr_offset = ath11k_dp_rx_h_msdu_end_l3pad(ar->ab, rx_desc);48124813if (is_first_msdu) {4814if (!ath11k_dp_rxdesc_mpdu_valid(ar->ab, rx_desc)) {4815drop_mpdu = true;4816dev_kfree_skb_any(msdu);4817msdu = NULL;4818pmon->mon_last_linkdesc_paddr = paddr;4819goto next_msdu;4820}48214822msdu_ppdu_id =4823ath11k_dp_rxdesc_get_ppduid(ar->ab, rx_desc);48244825if (ath11k_dp_rx_mon_comp_ppduid(msdu_ppdu_id,4826ppdu_id,4827&rx_bufs_used)) {4828if (rx_bufs_used) {4829drop_mpdu = true;4830dev_kfree_skb_any(msdu);4831msdu = NULL;4832goto next_msdu;4833}4834return rx_bufs_used;4835}4836pmon->mon_last_linkdesc_paddr = paddr;4837is_first_msdu = false;4838}4839ath11k_dp_mon_get_buf_len(&msdu_list.msdu_info[i],4840&is_frag, &total_len,4841&frag_len, &msdu_cnt);4842rx_buf_size = rx_pkt_offset + l2_hdr_offset + frag_len;48434844ath11k_dp_pkt_set_pktlen(msdu, rx_buf_size);48454846if (!(*head_msdu))4847*head_msdu = msdu;4848else if (last)4849last->next = msdu;48504851last = msdu;4852next_msdu:4853pmon->mon_last_buf_cookie = msdu_list.sw_cookie[i];4854rx_bufs_used++;4855spin_lock_bh(&rx_ring->idr_lock);4856idr_remove(&rx_ring->bufs_idr, buf_id);4857spin_unlock_bh(&rx_ring->idr_lock);4858}48594860ath11k_hal_rx_buf_addr_info_set(rx_link_buf_info, paddr, sw_cookie, rbm);48614862ath11k_dp_rx_mon_next_link_desc_get(rx_msdu_link_desc, &paddr,4863&sw_cookie, &rbm,4864&p_buf_addr_info);48654866if (ar->ab->hw_params.rxdma1_enable) {4867if (ath11k_dp_rx_monitor_link_desc_return(ar,4868p_last_buf_addr_info,4869dp->mac_id))4870ath11k_dbg(ar->ab, ATH11K_DBG_DATA,4871"dp_rx_monitor_link_desc_return failed");4872} else {4873ath11k_dp_rx_link_desc_return(ar->ab, rx_link_buf_info,4874HAL_WBM_REL_BM_ACT_PUT_IN_IDLE);4875}48764877p_last_buf_addr_info = p_buf_addr_info;48784879} while (paddr && msdu_cnt);48804881if (last)4882last->next = NULL;48834884*tail_msdu = msdu;48854886if (msdu_cnt == 0)4887*npackets = 1;48884889return rx_bufs_used;4890}48914892static void ath11k_dp_rx_msdus_set_payload(struct ath11k *ar, struct sk_buff *msdu)4893{4894u32 rx_pkt_offset, l2_hdr_offset;48954896rx_pkt_offset = ar->ab->hw_params.hal_desc_sz;4897l2_hdr_offset = ath11k_dp_rx_h_msdu_end_l3pad(ar->ab,4898(struct hal_rx_desc *)msdu->data);4899skb_pull(msdu, rx_pkt_offset + l2_hdr_offset);4900}49014902static struct sk_buff *4903ath11k_dp_rx_mon_merg_msdus(struct ath11k *ar,4904u32 mac_id, struct sk_buff *head_msdu,4905struct sk_buff *last_msdu,4906struct ieee80211_rx_status *rxs, bool *fcs_err)4907{4908struct ath11k_base *ab = ar->ab;4909struct sk_buff *msdu, *prev_buf;4910struct hal_rx_desc *rx_desc;4911char *hdr_desc;4912u8 *dest, decap_format;4913struct ieee80211_hdr_3addr *wh;4914struct rx_attention *rx_attention;4915u32 err_bitmap;49164917if (!head_msdu)4918goto err_merge_fail;49194920rx_desc = (struct hal_rx_desc *)head_msdu->data;4921rx_attention = ath11k_dp_rx_get_attention(ab, rx_desc);4922err_bitmap = ath11k_dp_rx_h_attn_mpdu_err(rx_attention);49234924if (err_bitmap & DP_RX_MPDU_ERR_FCS)4925*fcs_err = true;49264927if (ath11k_dp_rxdesc_get_mpdulen_err(rx_attention))4928return NULL;49294930decap_format = ath11k_dp_rx_h_msdu_start_decap_type(ab, rx_desc);49314932ath11k_dp_rx_h_ppdu(ar, rx_desc, rxs);49334934if (decap_format == DP_RX_DECAP_TYPE_RAW) {4935ath11k_dp_rx_msdus_set_payload(ar, head_msdu);49364937prev_buf = head_msdu;4938msdu = head_msdu->next;49394940while (msdu) {4941ath11k_dp_rx_msdus_set_payload(ar, msdu);49424943prev_buf = msdu;4944msdu = msdu->next;4945}49464947prev_buf->next = NULL;49484949skb_trim(prev_buf, prev_buf->len - HAL_RX_FCS_LEN);4950} else if (decap_format == DP_RX_DECAP_TYPE_NATIVE_WIFI) {4951u8 qos_pkt = 0;49524953rx_desc = (struct hal_rx_desc *)head_msdu->data;4954hdr_desc = ath11k_dp_rxdesc_get_80211hdr(ab, rx_desc);49554956/* Base size */4957wh = (struct ieee80211_hdr_3addr *)hdr_desc;49584959if (ieee80211_is_data_qos(wh->frame_control))4960qos_pkt = 1;49614962msdu = head_msdu;49634964while (msdu) {4965ath11k_dp_rx_msdus_set_payload(ar, msdu);4966if (qos_pkt) {4967dest = skb_push(msdu, sizeof(__le16));4968if (!dest)4969goto err_merge_fail;4970memcpy(dest, hdr_desc, sizeof(struct ieee80211_qos_hdr));4971}4972prev_buf = msdu;4973msdu = msdu->next;4974}4975dest = skb_put(prev_buf, HAL_RX_FCS_LEN);4976if (!dest)4977goto err_merge_fail;49784979ath11k_dbg(ab, ATH11K_DBG_DATA,4980"mpdu_buf %p mpdu_buf->len %u",4981prev_buf, prev_buf->len);4982} else {4983ath11k_dbg(ab, ATH11K_DBG_DATA,4984"decap format %d is not supported!\n",4985decap_format);4986goto err_merge_fail;4987}49884989return head_msdu;49904991err_merge_fail:4992return NULL;4993}49944995static void4996ath11k_dp_rx_update_radiotap_he(struct hal_rx_mon_ppdu_info *rx_status,4997u8 *rtap_buf)4998{4999u32 rtap_len = 0;50005001put_unaligned_le16(rx_status->he_data1, &rtap_buf[rtap_len]);5002rtap_len += 2;50035004put_unaligned_le16(rx_status->he_data2, &rtap_buf[rtap_len]);5005rtap_len += 2;50065007put_unaligned_le16(rx_status->he_data3, &rtap_buf[rtap_len]);5008rtap_len += 2;50095010put_unaligned_le16(rx_status->he_data4, &rtap_buf[rtap_len]);5011rtap_len += 2;50125013put_unaligned_le16(rx_status->he_data5, &rtap_buf[rtap_len]);5014rtap_len += 2;50155016put_unaligned_le16(rx_status->he_data6, &rtap_buf[rtap_len]);5017}50185019static void5020ath11k_dp_rx_update_radiotap_he_mu(struct hal_rx_mon_ppdu_info *rx_status,5021u8 *rtap_buf)5022{5023u32 rtap_len = 0;50245025put_unaligned_le16(rx_status->he_flags1, &rtap_buf[rtap_len]);5026rtap_len += 2;50275028put_unaligned_le16(rx_status->he_flags2, &rtap_buf[rtap_len]);5029rtap_len += 2;50305031rtap_buf[rtap_len] = rx_status->he_RU[0];5032rtap_len += 1;50335034rtap_buf[rtap_len] = rx_status->he_RU[1];5035rtap_len += 1;50365037rtap_buf[rtap_len] = rx_status->he_RU[2];5038rtap_len += 1;50395040rtap_buf[rtap_len] = rx_status->he_RU[3];5041}50425043static void ath11k_update_radiotap(struct ath11k *ar,5044struct hal_rx_mon_ppdu_info *ppduinfo,5045struct sk_buff *mon_skb,5046struct ieee80211_rx_status *rxs)5047{5048struct ieee80211_supported_band *sband;5049u8 *ptr = NULL;50505051rxs->flag |= RX_FLAG_MACTIME_START;5052rxs->signal = ppduinfo->rssi_comb + ATH11K_DEFAULT_NOISE_FLOOR;50535054if (ppduinfo->nss)5055rxs->nss = ppduinfo->nss;50565057if (ppduinfo->he_mu_flags) {5058rxs->flag |= RX_FLAG_RADIOTAP_HE_MU;5059rxs->encoding = RX_ENC_HE;5060ptr = skb_push(mon_skb, sizeof(struct ieee80211_radiotap_he_mu));5061ath11k_dp_rx_update_radiotap_he_mu(ppduinfo, ptr);5062} else if (ppduinfo->he_flags) {5063rxs->flag |= RX_FLAG_RADIOTAP_HE;5064rxs->encoding = RX_ENC_HE;5065ptr = skb_push(mon_skb, sizeof(struct ieee80211_radiotap_he));5066ath11k_dp_rx_update_radiotap_he(ppduinfo, ptr);5067rxs->rate_idx = ppduinfo->rate;5068} else if (ppduinfo->vht_flags) {5069rxs->encoding = RX_ENC_VHT;5070rxs->rate_idx = ppduinfo->rate;5071} else if (ppduinfo->ht_flags) {5072rxs->encoding = RX_ENC_HT;5073rxs->rate_idx = ppduinfo->rate;5074} else {5075rxs->encoding = RX_ENC_LEGACY;5076sband = &ar->mac.sbands[rxs->band];5077rxs->rate_idx = ath11k_mac_hw_rate_to_idx(sband, ppduinfo->rate,5078ppduinfo->cck_flag);5079}50805081rxs->mactime = ppduinfo->tsft;5082}50835084static int ath11k_dp_rx_mon_deliver(struct ath11k *ar, u32 mac_id,5085struct sk_buff *head_msdu,5086struct hal_rx_mon_ppdu_info *ppduinfo,5087struct sk_buff *tail_msdu,5088struct napi_struct *napi)5089{5090struct ath11k_pdev_dp *dp = &ar->dp;5091struct sk_buff *mon_skb, *skb_next, *header;5092struct ieee80211_rx_status *rxs = &dp->rx_status;5093bool fcs_err = false;50945095mon_skb = ath11k_dp_rx_mon_merg_msdus(ar, mac_id, head_msdu,5096tail_msdu, rxs, &fcs_err);50975098if (!mon_skb)5099goto mon_deliver_fail;51005101header = mon_skb;51025103rxs->flag = 0;51045105if (fcs_err)5106rxs->flag = RX_FLAG_FAILED_FCS_CRC;51075108do {5109skb_next = mon_skb->next;5110if (!skb_next)5111rxs->flag &= ~RX_FLAG_AMSDU_MORE;5112else5113rxs->flag |= RX_FLAG_AMSDU_MORE;51145115if (mon_skb == header) {5116header = NULL;5117rxs->flag &= ~RX_FLAG_ALLOW_SAME_PN;5118} else {5119rxs->flag |= RX_FLAG_ALLOW_SAME_PN;5120}5121rxs->flag |= RX_FLAG_ONLY_MONITOR;5122ath11k_update_radiotap(ar, ppduinfo, mon_skb, rxs);51235124ath11k_dp_rx_deliver_msdu(ar, napi, mon_skb, rxs);5125mon_skb = skb_next;5126} while (mon_skb);5127rxs->flag = 0;51285129return 0;51305131mon_deliver_fail:5132mon_skb = head_msdu;5133while (mon_skb) {5134skb_next = mon_skb->next;5135dev_kfree_skb_any(mon_skb);5136mon_skb = skb_next;5137}5138return -EINVAL;5139}51405141/* The destination ring processing is stuck if the destination is not5142* moving while status ring moves 16 PPDU. The destination ring processing5143* skips this destination ring PPDU as a workaround.5144*/5145#define MON_DEST_RING_STUCK_MAX_CNT 1651465147static void ath11k_dp_rx_mon_dest_process(struct ath11k *ar, int mac_id,5148u32 quota, struct napi_struct *napi)5149{5150struct ath11k_pdev_dp *dp = &ar->dp;5151struct ath11k_mon_data *pmon = (struct ath11k_mon_data *)&dp->mon_data;5152const struct ath11k_hw_hal_params *hal_params;5153void *ring_entry;5154void *mon_dst_srng;5155u32 ppdu_id;5156u32 rx_bufs_used;5157u32 ring_id;5158struct ath11k_pdev_mon_stats *rx_mon_stats;5159u32 npackets = 0;5160u32 mpdu_rx_bufs_used;51615162if (ar->ab->hw_params.rxdma1_enable)5163ring_id = dp->rxdma_mon_dst_ring.ring_id;5164else5165ring_id = dp->rxdma_err_dst_ring[mac_id].ring_id;51665167mon_dst_srng = &ar->ab->hal.srng_list[ring_id];51685169if (!mon_dst_srng) {5170ath11k_warn(ar->ab,5171"HAL Monitor Destination Ring Init Failed -- %p",5172mon_dst_srng);5173return;5174}51755176spin_lock_bh(&pmon->mon_lock);51775178ath11k_hal_srng_access_begin(ar->ab, mon_dst_srng);51795180ppdu_id = pmon->mon_ppdu_info.ppdu_id;5181rx_bufs_used = 0;5182rx_mon_stats = &pmon->rx_mon_stats;51835184while ((ring_entry = ath11k_hal_srng_dst_peek(ar->ab, mon_dst_srng))) {5185struct sk_buff *head_msdu, *tail_msdu;51865187head_msdu = NULL;5188tail_msdu = NULL;51895190mpdu_rx_bufs_used = ath11k_dp_rx_mon_mpdu_pop(ar, mac_id, ring_entry,5191&head_msdu,5192&tail_msdu,5193&npackets, &ppdu_id);51945195rx_bufs_used += mpdu_rx_bufs_used;51965197if (mpdu_rx_bufs_used) {5198dp->mon_dest_ring_stuck_cnt = 0;5199} else {5200dp->mon_dest_ring_stuck_cnt++;5201rx_mon_stats->dest_mon_not_reaped++;5202}52035204if (dp->mon_dest_ring_stuck_cnt > MON_DEST_RING_STUCK_MAX_CNT) {5205rx_mon_stats->dest_mon_stuck++;5206ath11k_dbg(ar->ab, ATH11K_DBG_DATA,5207"status ring ppdu_id=%d dest ring ppdu_id=%d mon_dest_ring_stuck_cnt=%d dest_mon_not_reaped=%u dest_mon_stuck=%u\n",5208pmon->mon_ppdu_info.ppdu_id, ppdu_id,5209dp->mon_dest_ring_stuck_cnt,5210rx_mon_stats->dest_mon_not_reaped,5211rx_mon_stats->dest_mon_stuck);5212pmon->mon_ppdu_info.ppdu_id = ppdu_id;5213continue;5214}52155216if (ppdu_id != pmon->mon_ppdu_info.ppdu_id) {5217pmon->mon_ppdu_status = DP_PPDU_STATUS_START;5218ath11k_dbg(ar->ab, ATH11K_DBG_DATA,5219"dest_rx: new ppdu_id %x != status ppdu_id %x dest_mon_not_reaped = %u dest_mon_stuck = %u\n",5220ppdu_id, pmon->mon_ppdu_info.ppdu_id,5221rx_mon_stats->dest_mon_not_reaped,5222rx_mon_stats->dest_mon_stuck);5223break;5224}5225if (head_msdu && tail_msdu) {5226ath11k_dp_rx_mon_deliver(ar, dp->mac_id, head_msdu,5227&pmon->mon_ppdu_info,5228tail_msdu, napi);5229rx_mon_stats->dest_mpdu_done++;5230}52315232ring_entry = ath11k_hal_srng_dst_get_next_entry(ar->ab,5233mon_dst_srng);5234}5235ath11k_hal_srng_access_end(ar->ab, mon_dst_srng);52365237spin_unlock_bh(&pmon->mon_lock);52385239if (rx_bufs_used) {5240rx_mon_stats->dest_ppdu_done++;5241hal_params = ar->ab->hw_params.hal_params;52425243if (ar->ab->hw_params.rxdma1_enable)5244ath11k_dp_rxbufs_replenish(ar->ab, dp->mac_id,5245&dp->rxdma_mon_buf_ring,5246rx_bufs_used,5247hal_params->rx_buf_rbm);5248else5249ath11k_dp_rxbufs_replenish(ar->ab, dp->mac_id,5250&dp->rx_refill_buf_ring,5251rx_bufs_used,5252hal_params->rx_buf_rbm);5253}5254}52555256int ath11k_dp_rx_process_mon_status(struct ath11k_base *ab, int mac_id,5257struct napi_struct *napi, int budget)5258{5259struct ath11k *ar = ath11k_ab_to_ar(ab, mac_id);5260enum hal_rx_mon_status hal_status;5261struct sk_buff *skb;5262struct sk_buff_head skb_list;5263struct ath11k_peer *peer;5264struct ath11k_sta *arsta;5265int num_buffs_reaped = 0;5266u32 rx_buf_sz;5267u16 log_type;5268struct ath11k_mon_data *pmon = (struct ath11k_mon_data *)&ar->dp.mon_data;5269struct ath11k_pdev_mon_stats *rx_mon_stats = &pmon->rx_mon_stats;5270struct hal_rx_mon_ppdu_info *ppdu_info = &pmon->mon_ppdu_info;52715272__skb_queue_head_init(&skb_list);52735274num_buffs_reaped = ath11k_dp_rx_reap_mon_status_ring(ab, mac_id, &budget,5275&skb_list);5276if (!num_buffs_reaped)5277goto exit;52785279memset(ppdu_info, 0, sizeof(*ppdu_info));5280ppdu_info->peer_id = HAL_INVALID_PEERID;52815282while ((skb = __skb_dequeue(&skb_list))) {5283if (ath11k_debugfs_is_pktlog_lite_mode_enabled(ar)) {5284log_type = ATH11K_PKTLOG_TYPE_LITE_RX;5285rx_buf_sz = DP_RX_BUFFER_SIZE_LITE;5286} else if (ath11k_debugfs_is_pktlog_rx_stats_enabled(ar)) {5287log_type = ATH11K_PKTLOG_TYPE_RX_STATBUF;5288rx_buf_sz = DP_RX_BUFFER_SIZE;5289} else {5290log_type = ATH11K_PKTLOG_TYPE_INVALID;5291rx_buf_sz = 0;5292}52935294if (log_type != ATH11K_PKTLOG_TYPE_INVALID)5295trace_ath11k_htt_rxdesc(ar, skb->data, log_type, rx_buf_sz);52965297memset(ppdu_info, 0, sizeof(*ppdu_info));5298ppdu_info->peer_id = HAL_INVALID_PEERID;5299hal_status = ath11k_hal_rx_parse_mon_status(ab, ppdu_info, skb);53005301if (test_bit(ATH11K_FLAG_MONITOR_STARTED, &ar->monitor_flags) &&5302pmon->mon_ppdu_status == DP_PPDU_STATUS_START &&5303hal_status == HAL_TLV_STATUS_PPDU_DONE) {5304rx_mon_stats->status_ppdu_done++;5305pmon->mon_ppdu_status = DP_PPDU_STATUS_DONE;5306ath11k_dp_rx_mon_dest_process(ar, mac_id, budget, napi);5307pmon->mon_ppdu_status = DP_PPDU_STATUS_START;5308}53095310if (ppdu_info->peer_id == HAL_INVALID_PEERID ||5311hal_status != HAL_RX_MON_STATUS_PPDU_DONE) {5312dev_kfree_skb_any(skb);5313continue;5314}53155316rcu_read_lock();5317spin_lock_bh(&ab->base_lock);5318peer = ath11k_peer_find_by_id(ab, ppdu_info->peer_id);53195320if (!peer || !peer->sta) {5321ath11k_dbg(ab, ATH11K_DBG_DATA,5322"failed to find the peer with peer_id %d\n",5323ppdu_info->peer_id);5324goto next_skb;5325}53265327arsta = (struct ath11k_sta *)peer->sta->drv_priv;5328ath11k_dp_rx_update_peer_stats(arsta, ppdu_info);53295330if (ath11k_debugfs_is_pktlog_peer_valid(ar, peer->addr))5331trace_ath11k_htt_rxdesc(ar, skb->data, log_type, rx_buf_sz);53325333next_skb:5334spin_unlock_bh(&ab->base_lock);5335rcu_read_unlock();53365337dev_kfree_skb_any(skb);5338memset(ppdu_info, 0, sizeof(*ppdu_info));5339ppdu_info->peer_id = HAL_INVALID_PEERID;5340}5341exit:5342return num_buffs_reaped;5343}53445345static u325346ath11k_dp_rx_full_mon_mpdu_pop(struct ath11k *ar,5347void *ring_entry, struct sk_buff **head_msdu,5348struct sk_buff **tail_msdu,5349struct hal_sw_mon_ring_entries *sw_mon_entries)5350{5351struct ath11k_pdev_dp *dp = &ar->dp;5352struct ath11k_mon_data *pmon = &dp->mon_data;5353struct dp_rxdma_ring *rx_ring = &dp->rxdma_mon_buf_ring;5354struct sk_buff *msdu = NULL, *last = NULL;5355struct hal_sw_monitor_ring *sw_desc = ring_entry;5356struct hal_rx_msdu_list msdu_list;5357struct hal_rx_desc *rx_desc;5358struct ath11k_skb_rxcb *rxcb;5359void *rx_msdu_link_desc;5360void *p_buf_addr_info, *p_last_buf_addr_info;5361int buf_id, i = 0;5362u32 rx_buf_size, rx_pkt_offset, l2_hdr_offset;5363u32 rx_bufs_used = 0, msdu_cnt = 0;5364u32 total_len = 0, frag_len = 0, sw_cookie;5365u16 num_msdus = 0;5366u8 rxdma_err, rbm;5367bool is_frag, is_first_msdu;5368bool drop_mpdu = false;53695370ath11k_hal_rx_sw_mon_ring_buf_paddr_get(ring_entry, sw_mon_entries);53715372sw_cookie = sw_mon_entries->mon_dst_sw_cookie;5373sw_mon_entries->end_of_ppdu = false;5374sw_mon_entries->drop_ppdu = false;5375p_last_buf_addr_info = sw_mon_entries->dst_buf_addr_info;5376msdu_cnt = sw_mon_entries->msdu_cnt;53775378sw_mon_entries->end_of_ppdu =5379FIELD_GET(HAL_SW_MON_RING_INFO0_END_OF_PPDU, sw_desc->info0);5380if (sw_mon_entries->end_of_ppdu)5381return rx_bufs_used;53825383if (FIELD_GET(HAL_SW_MON_RING_INFO0_RXDMA_PUSH_REASON,5384sw_desc->info0) ==5385HAL_REO_DEST_RING_PUSH_REASON_ERR_DETECTED) {5386rxdma_err =5387FIELD_GET(HAL_SW_MON_RING_INFO0_RXDMA_ERROR_CODE,5388sw_desc->info0);5389if (rxdma_err == HAL_REO_ENTR_RING_RXDMA_ECODE_FLUSH_REQUEST_ERR ||5390rxdma_err == HAL_REO_ENTR_RING_RXDMA_ECODE_MPDU_LEN_ERR ||5391rxdma_err == HAL_REO_ENTR_RING_RXDMA_ECODE_OVERFLOW_ERR) {5392pmon->rx_mon_stats.dest_mpdu_drop++;5393drop_mpdu = true;5394}5395}53965397is_frag = false;5398is_first_msdu = true;53995400do {5401rx_msdu_link_desc =5402(u8 *)pmon->link_desc_banks[sw_cookie].vaddr +5403(sw_mon_entries->mon_dst_paddr -5404pmon->link_desc_banks[sw_cookie].paddr);54055406ath11k_hal_rx_msdu_list_get(ar, rx_msdu_link_desc, &msdu_list,5407&num_msdus);54085409for (i = 0; i < num_msdus; i++) {5410buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID,5411msdu_list.sw_cookie[i]);54125413spin_lock_bh(&rx_ring->idr_lock);5414msdu = idr_find(&rx_ring->bufs_idr, buf_id);5415if (!msdu) {5416ath11k_dbg(ar->ab, ATH11K_DBG_DATA,5417"full mon msdu_pop: invalid buf_id %d\n",5418buf_id);5419spin_unlock_bh(&rx_ring->idr_lock);5420break;5421}5422idr_remove(&rx_ring->bufs_idr, buf_id);5423spin_unlock_bh(&rx_ring->idr_lock);54245425rxcb = ATH11K_SKB_RXCB(msdu);5426if (!rxcb->unmapped) {5427dma_unmap_single(ar->ab->dev, rxcb->paddr,5428msdu->len +5429skb_tailroom(msdu),5430DMA_FROM_DEVICE);5431rxcb->unmapped = 1;5432}5433if (drop_mpdu) {5434ath11k_dbg(ar->ab, ATH11K_DBG_DATA,5435"full mon: i %d drop msdu %p *ppdu_id %x\n",5436i, msdu, sw_mon_entries->ppdu_id);5437dev_kfree_skb_any(msdu);5438msdu_cnt--;5439goto next_msdu;5440}54415442rx_desc = (struct hal_rx_desc *)msdu->data;54435444rx_pkt_offset = sizeof(struct hal_rx_desc);5445l2_hdr_offset = ath11k_dp_rx_h_msdu_end_l3pad(ar->ab, rx_desc);54465447if (is_first_msdu) {5448if (!ath11k_dp_rxdesc_mpdu_valid(ar->ab, rx_desc)) {5449drop_mpdu = true;5450dev_kfree_skb_any(msdu);5451msdu = NULL;5452goto next_msdu;5453}5454is_first_msdu = false;5455}54565457ath11k_dp_mon_get_buf_len(&msdu_list.msdu_info[i],5458&is_frag, &total_len,5459&frag_len, &msdu_cnt);54605461rx_buf_size = rx_pkt_offset + l2_hdr_offset + frag_len;54625463ath11k_dp_pkt_set_pktlen(msdu, rx_buf_size);54645465if (!(*head_msdu))5466*head_msdu = msdu;5467else if (last)5468last->next = msdu;54695470last = msdu;5471next_msdu:5472rx_bufs_used++;5473}54745475ath11k_dp_rx_mon_next_link_desc_get(rx_msdu_link_desc,5476&sw_mon_entries->mon_dst_paddr,5477&sw_mon_entries->mon_dst_sw_cookie,5478&rbm,5479&p_buf_addr_info);54805481if (ath11k_dp_rx_monitor_link_desc_return(ar,5482p_last_buf_addr_info,5483dp->mac_id))5484ath11k_dbg(ar->ab, ATH11K_DBG_DATA,5485"full mon: dp_rx_monitor_link_desc_return failed\n");54865487p_last_buf_addr_info = p_buf_addr_info;54885489} while (sw_mon_entries->mon_dst_paddr && msdu_cnt);54905491if (last)5492last->next = NULL;54935494*tail_msdu = msdu;54955496return rx_bufs_used;5497}54985499static int ath11k_dp_rx_full_mon_prepare_mpdu(struct ath11k_dp *dp,5500struct dp_full_mon_mpdu *mon_mpdu,5501struct sk_buff *head,5502struct sk_buff *tail)5503{5504mon_mpdu = kzalloc(sizeof(*mon_mpdu), GFP_ATOMIC);5505if (!mon_mpdu)5506return -ENOMEM;55075508list_add_tail(&mon_mpdu->list, &dp->dp_full_mon_mpdu_list);5509mon_mpdu->head = head;5510mon_mpdu->tail = tail;55115512return 0;5513}55145515static void ath11k_dp_rx_full_mon_drop_ppdu(struct ath11k_dp *dp,5516struct dp_full_mon_mpdu *mon_mpdu)5517{5518struct dp_full_mon_mpdu *tmp;5519struct sk_buff *tmp_msdu, *skb_next;55205521if (list_empty(&dp->dp_full_mon_mpdu_list))5522return;55235524list_for_each_entry_safe(mon_mpdu, tmp, &dp->dp_full_mon_mpdu_list, list) {5525list_del(&mon_mpdu->list);55265527tmp_msdu = mon_mpdu->head;5528while (tmp_msdu) {5529skb_next = tmp_msdu->next;5530dev_kfree_skb_any(tmp_msdu);5531tmp_msdu = skb_next;5532}55335534kfree(mon_mpdu);5535}5536}55375538static int ath11k_dp_rx_full_mon_deliver_ppdu(struct ath11k *ar,5539int mac_id,5540struct ath11k_mon_data *pmon,5541struct napi_struct *napi)5542{5543struct ath11k_pdev_mon_stats *rx_mon_stats;5544struct dp_full_mon_mpdu *tmp;5545struct dp_full_mon_mpdu *mon_mpdu = pmon->mon_mpdu;5546struct sk_buff *head_msdu, *tail_msdu;5547struct ath11k_base *ab = ar->ab;5548struct ath11k_dp *dp = &ab->dp;5549int ret;55505551rx_mon_stats = &pmon->rx_mon_stats;55525553list_for_each_entry_safe(mon_mpdu, tmp, &dp->dp_full_mon_mpdu_list, list) {5554list_del(&mon_mpdu->list);5555head_msdu = mon_mpdu->head;5556tail_msdu = mon_mpdu->tail;5557if (head_msdu && tail_msdu) {5558ret = ath11k_dp_rx_mon_deliver(ar, mac_id, head_msdu,5559&pmon->mon_ppdu_info,5560tail_msdu, napi);5561rx_mon_stats->dest_mpdu_done++;5562ath11k_dbg(ar->ab, ATH11K_DBG_DATA, "full mon: deliver ppdu\n");5563}5564kfree(mon_mpdu);5565}55665567return ret;5568}55695570static int5571ath11k_dp_rx_process_full_mon_status_ring(struct ath11k_base *ab, int mac_id,5572struct napi_struct *napi, int budget)5573{5574struct ath11k *ar = ab->pdevs[mac_id].ar;5575struct ath11k_pdev_dp *dp = &ar->dp;5576struct ath11k_mon_data *pmon = &dp->mon_data;5577struct hal_sw_mon_ring_entries *sw_mon_entries;5578int quota = 0, work = 0, count;55795580sw_mon_entries = &pmon->sw_mon_entries;55815582while (pmon->hold_mon_dst_ring) {5583quota = ath11k_dp_rx_process_mon_status(ab, mac_id,5584napi, 1);5585if (pmon->buf_state == DP_MON_STATUS_MATCH) {5586count = sw_mon_entries->status_buf_count;5587if (count > 1) {5588quota += ath11k_dp_rx_process_mon_status(ab, mac_id,5589napi, count);5590}55915592ath11k_dp_rx_full_mon_deliver_ppdu(ar, dp->mac_id,5593pmon, napi);5594pmon->hold_mon_dst_ring = false;5595} else if (!pmon->mon_status_paddr ||5596pmon->buf_state == DP_MON_STATUS_LEAD) {5597sw_mon_entries->drop_ppdu = true;5598pmon->hold_mon_dst_ring = false;5599}56005601if (!quota)5602break;56035604work += quota;5605}56065607if (sw_mon_entries->drop_ppdu)5608ath11k_dp_rx_full_mon_drop_ppdu(&ab->dp, pmon->mon_mpdu);56095610return work;5611}56125613static int ath11k_dp_full_mon_process_rx(struct ath11k_base *ab, int mac_id,5614struct napi_struct *napi, int budget)5615{5616struct ath11k *ar = ab->pdevs[mac_id].ar;5617struct ath11k_pdev_dp *dp = &ar->dp;5618struct ath11k_mon_data *pmon = &dp->mon_data;5619struct hal_sw_mon_ring_entries *sw_mon_entries;5620struct ath11k_pdev_mon_stats *rx_mon_stats;5621struct sk_buff *head_msdu, *tail_msdu;5622void *mon_dst_srng = &ar->ab->hal.srng_list[dp->rxdma_mon_dst_ring.ring_id];5623void *ring_entry;5624u32 rx_bufs_used = 0, mpdu_rx_bufs_used;5625int quota = 0, ret;5626bool break_dst_ring = false;56275628spin_lock_bh(&pmon->mon_lock);56295630sw_mon_entries = &pmon->sw_mon_entries;5631rx_mon_stats = &pmon->rx_mon_stats;56325633if (pmon->hold_mon_dst_ring) {5634spin_unlock_bh(&pmon->mon_lock);5635goto reap_status_ring;5636}56375638ath11k_hal_srng_access_begin(ar->ab, mon_dst_srng);5639while ((ring_entry = ath11k_hal_srng_dst_peek(ar->ab, mon_dst_srng))) {5640head_msdu = NULL;5641tail_msdu = NULL;56425643mpdu_rx_bufs_used = ath11k_dp_rx_full_mon_mpdu_pop(ar, ring_entry,5644&head_msdu,5645&tail_msdu,5646sw_mon_entries);5647rx_bufs_used += mpdu_rx_bufs_used;56485649if (!sw_mon_entries->end_of_ppdu) {5650if (head_msdu) {5651ret = ath11k_dp_rx_full_mon_prepare_mpdu(&ab->dp,5652pmon->mon_mpdu,5653head_msdu,5654tail_msdu);5655if (ret)5656break_dst_ring = true;5657}56585659goto next_entry;5660} else {5661if (!sw_mon_entries->ppdu_id &&5662!sw_mon_entries->mon_status_paddr) {5663break_dst_ring = true;5664goto next_entry;5665}5666}56675668rx_mon_stats->dest_ppdu_done++;5669pmon->mon_ppdu_status = DP_PPDU_STATUS_START;5670pmon->buf_state = DP_MON_STATUS_LAG;5671pmon->mon_status_paddr = sw_mon_entries->mon_status_paddr;5672pmon->hold_mon_dst_ring = true;5673next_entry:5674ring_entry = ath11k_hal_srng_dst_get_next_entry(ar->ab,5675mon_dst_srng);5676if (break_dst_ring)5677break;5678}56795680ath11k_hal_srng_access_end(ar->ab, mon_dst_srng);5681spin_unlock_bh(&pmon->mon_lock);56825683if (rx_bufs_used) {5684ath11k_dp_rxbufs_replenish(ar->ab, dp->mac_id,5685&dp->rxdma_mon_buf_ring,5686rx_bufs_used,5687HAL_RX_BUF_RBM_SW3_BM);5688}56895690reap_status_ring:5691quota = ath11k_dp_rx_process_full_mon_status_ring(ab, mac_id,5692napi, budget);56935694return quota;5695}56965697int ath11k_dp_rx_process_mon_rings(struct ath11k_base *ab, int mac_id,5698struct napi_struct *napi, int budget)5699{5700struct ath11k *ar = ath11k_ab_to_ar(ab, mac_id);5701int ret = 0;57025703if (test_bit(ATH11K_FLAG_MONITOR_STARTED, &ar->monitor_flags) &&5704ab->hw_params.full_monitor_mode)5705ret = ath11k_dp_full_mon_process_rx(ab, mac_id, napi, budget);5706else5707ret = ath11k_dp_rx_process_mon_status(ab, mac_id, napi, budget);57085709return ret;5710}57115712static int ath11k_dp_rx_pdev_mon_status_attach(struct ath11k *ar)5713{5714struct ath11k_pdev_dp *dp = &ar->dp;5715struct ath11k_mon_data *pmon = (struct ath11k_mon_data *)&dp->mon_data;57165717skb_queue_head_init(&pmon->rx_status_q);57185719pmon->mon_ppdu_status = DP_PPDU_STATUS_START;57205721memset(&pmon->rx_mon_stats, 0,5722sizeof(pmon->rx_mon_stats));5723return 0;5724}57255726int ath11k_dp_rx_pdev_mon_attach(struct ath11k *ar)5727{5728struct ath11k_pdev_dp *dp = &ar->dp;5729struct ath11k_mon_data *pmon = &dp->mon_data;5730struct hal_srng *mon_desc_srng = NULL;5731struct dp_srng *dp_srng;5732int ret = 0;5733u32 n_link_desc = 0;57345735ret = ath11k_dp_rx_pdev_mon_status_attach(ar);5736if (ret) {5737ath11k_warn(ar->ab, "pdev_mon_status_attach() failed");5738return ret;5739}57405741/* if rxdma1_enable is false, no need to setup5742* rxdma_mon_desc_ring.5743*/5744if (!ar->ab->hw_params.rxdma1_enable)5745return 0;57465747dp_srng = &dp->rxdma_mon_desc_ring;5748n_link_desc = dp_srng->size /5749ath11k_hal_srng_get_entrysize(ar->ab, HAL_RXDMA_MONITOR_DESC);5750mon_desc_srng =5751&ar->ab->hal.srng_list[dp->rxdma_mon_desc_ring.ring_id];57525753ret = ath11k_dp_link_desc_setup(ar->ab, pmon->link_desc_banks,5754HAL_RXDMA_MONITOR_DESC, mon_desc_srng,5755n_link_desc);5756if (ret) {5757ath11k_warn(ar->ab, "mon_link_desc_pool_setup() failed");5758return ret;5759}5760pmon->mon_last_linkdesc_paddr = 0;5761pmon->mon_last_buf_cookie = DP_RX_DESC_COOKIE_MAX + 1;5762spin_lock_init(&pmon->mon_lock);57635764return 0;5765}57665767static int ath11k_dp_mon_link_free(struct ath11k *ar)5768{5769struct ath11k_pdev_dp *dp = &ar->dp;5770struct ath11k_mon_data *pmon = &dp->mon_data;57715772ath11k_dp_link_desc_cleanup(ar->ab, pmon->link_desc_banks,5773HAL_RXDMA_MONITOR_DESC,5774&dp->rxdma_mon_desc_ring);5775return 0;5776}57775778int ath11k_dp_rx_pdev_mon_detach(struct ath11k *ar)5779{5780ath11k_dp_mon_link_free(ar);5781return 0;5782}57835784int ath11k_dp_rx_pktlog_start(struct ath11k_base *ab)5785{5786/* start reap timer */5787mod_timer(&ab->mon_reap_timer,5788jiffies + msecs_to_jiffies(ATH11K_MON_TIMER_INTERVAL));57895790return 0;5791}57925793int ath11k_dp_rx_pktlog_stop(struct ath11k_base *ab, bool stop_timer)5794{5795int ret;57965797if (stop_timer)5798del_timer_sync(&ab->mon_reap_timer);57995800/* reap all the monitor related rings */5801ret = ath11k_dp_purge_mon_ring(ab);5802if (ret) {5803ath11k_warn(ab, "failed to purge dp mon ring: %d\n", ret);5804return ret;5805}58065807return 0;5808}580958105811