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freebsd
GitHub Repository: freebsd/freebsd-src
Path: blob/main/sys/contrib/dev/athk/ath11k/dp_tx.c
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1
// SPDX-License-Identifier: BSD-3-Clause-Clear
2
/*
3
* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
5
*/
6
7
#include "core.h"
8
#include "dp_tx.h"
9
#include "debug.h"
10
#include "debugfs_sta.h"
11
#include "hw.h"
12
#include "peer.h"
13
#include "mac.h"
14
15
static enum hal_tcl_encap_type
16
ath11k_dp_tx_get_encap_type(struct ath11k_vif *arvif, struct sk_buff *skb)
17
{
18
struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
19
struct ath11k_base *ab = arvif->ar->ab;
20
21
if (test_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags))
22
return HAL_TCL_ENCAP_TYPE_RAW;
23
24
if (tx_info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP)
25
return HAL_TCL_ENCAP_TYPE_ETHERNET;
26
27
return HAL_TCL_ENCAP_TYPE_NATIVE_WIFI;
28
}
29
30
static void ath11k_dp_tx_encap_nwifi(struct sk_buff *skb)
31
{
32
struct ieee80211_hdr *hdr = (void *)skb->data;
33
u8 *qos_ctl;
34
35
if (!ieee80211_is_data_qos(hdr->frame_control))
36
return;
37
38
qos_ctl = ieee80211_get_qos_ctl(hdr);
39
memmove(skb->data + IEEE80211_QOS_CTL_LEN,
40
#if defined(__linux__)
41
skb->data, (void *)qos_ctl - (void *)skb->data);
42
#elif defined(__FreeBSD__)
43
skb->data, qos_ctl - (u8 *)skb->data);
44
#endif
45
skb_pull(skb, IEEE80211_QOS_CTL_LEN);
46
47
hdr = (void *)skb->data;
48
hdr->frame_control &= ~__cpu_to_le16(IEEE80211_STYPE_QOS_DATA);
49
}
50
51
static u8 ath11k_dp_tx_get_tid(struct sk_buff *skb)
52
{
53
struct ieee80211_hdr *hdr = (void *)skb->data;
54
struct ath11k_skb_cb *cb = ATH11K_SKB_CB(skb);
55
56
if (cb->flags & ATH11K_SKB_HW_80211_ENCAP)
57
return skb->priority & IEEE80211_QOS_CTL_TID_MASK;
58
else if (!ieee80211_is_data_qos(hdr->frame_control))
59
return HAL_DESC_REO_NON_QOS_TID;
60
else
61
return skb->priority & IEEE80211_QOS_CTL_TID_MASK;
62
}
63
64
enum hal_encrypt_type ath11k_dp_tx_get_encrypt_type(u32 cipher)
65
{
66
switch (cipher) {
67
case WLAN_CIPHER_SUITE_WEP40:
68
return HAL_ENCRYPT_TYPE_WEP_40;
69
case WLAN_CIPHER_SUITE_WEP104:
70
return HAL_ENCRYPT_TYPE_WEP_104;
71
case WLAN_CIPHER_SUITE_TKIP:
72
return HAL_ENCRYPT_TYPE_TKIP_MIC;
73
case WLAN_CIPHER_SUITE_CCMP:
74
return HAL_ENCRYPT_TYPE_CCMP_128;
75
case WLAN_CIPHER_SUITE_CCMP_256:
76
return HAL_ENCRYPT_TYPE_CCMP_256;
77
case WLAN_CIPHER_SUITE_GCMP:
78
return HAL_ENCRYPT_TYPE_GCMP_128;
79
case WLAN_CIPHER_SUITE_GCMP_256:
80
return HAL_ENCRYPT_TYPE_AES_GCMP_256;
81
default:
82
return HAL_ENCRYPT_TYPE_OPEN;
83
}
84
}
85
86
int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif,
87
struct ath11k_sta *arsta, struct sk_buff *skb)
88
{
89
struct ath11k_base *ab = ar->ab;
90
struct ath11k_dp *dp = &ab->dp;
91
struct hal_tx_info ti = {0};
92
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
93
struct ath11k_skb_cb *skb_cb = ATH11K_SKB_CB(skb);
94
struct hal_srng *tcl_ring;
95
struct ieee80211_hdr *hdr = (void *)skb->data;
96
struct dp_tx_ring *tx_ring;
97
#if defined(__linux__)
98
void *hal_tcl_desc;
99
#elif defined(__FreeBSD__)
100
u8 *hal_tcl_desc;
101
#endif
102
u8 pool_id;
103
u8 hal_ring_id;
104
int ret;
105
u32 ring_selector = 0;
106
u8 ring_map = 0;
107
bool tcl_ring_retry;
108
109
if (unlikely(test_bit(ATH11K_FLAG_CRASH_FLUSH, &ar->ab->dev_flags)))
110
return -ESHUTDOWN;
111
112
if (unlikely(!(info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP) &&
113
!ieee80211_is_data(hdr->frame_control)))
114
return -ENOTSUPP;
115
116
pool_id = skb_get_queue_mapping(skb) & (ATH11K_HW_MAX_QUEUES - 1);
117
118
ring_selector = ab->hw_params.hw_ops->get_ring_selector(skb);
119
120
tcl_ring_sel:
121
tcl_ring_retry = false;
122
123
ti.ring_id = ring_selector % ab->hw_params.max_tx_ring;
124
ti.rbm_id = ab->hw_params.hal_params->tcl2wbm_rbm_map[ti.ring_id].rbm_id;
125
126
ring_map |= BIT(ti.ring_id);
127
128
tx_ring = &dp->tx_ring[ti.ring_id];
129
130
spin_lock_bh(&tx_ring->tx_idr_lock);
131
ret = idr_alloc(&tx_ring->txbuf_idr, skb, 0,
132
DP_TX_IDR_SIZE - 1, GFP_ATOMIC);
133
spin_unlock_bh(&tx_ring->tx_idr_lock);
134
135
if (unlikely(ret < 0)) {
136
if (ring_map == (BIT(ab->hw_params.max_tx_ring) - 1) ||
137
!ab->hw_params.tcl_ring_retry) {
138
atomic_inc(&ab->soc_stats.tx_err.misc_fail);
139
return -ENOSPC;
140
}
141
142
/* Check if the next ring is available */
143
ring_selector++;
144
goto tcl_ring_sel;
145
}
146
147
ti.desc_id = FIELD_PREP(DP_TX_DESC_ID_MAC_ID, ar->pdev_idx) |
148
FIELD_PREP(DP_TX_DESC_ID_MSDU_ID, ret) |
149
FIELD_PREP(DP_TX_DESC_ID_POOL_ID, pool_id);
150
ti.encap_type = ath11k_dp_tx_get_encap_type(arvif, skb);
151
152
if (ieee80211_has_a4(hdr->frame_control) &&
153
is_multicast_ether_addr(hdr->addr3) && arsta &&
154
arsta->use_4addr_set) {
155
ti.meta_data_flags = arsta->tcl_metadata;
156
ti.flags0 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TO_FW, 1);
157
} else {
158
ti.meta_data_flags = arvif->tcl_metadata;
159
}
160
161
if (unlikely(ti.encap_type == HAL_TCL_ENCAP_TYPE_RAW)) {
162
if (skb_cb->flags & ATH11K_SKB_CIPHER_SET) {
163
ti.encrypt_type =
164
ath11k_dp_tx_get_encrypt_type(skb_cb->cipher);
165
166
if (ieee80211_has_protected(hdr->frame_control))
167
skb_put(skb, IEEE80211_CCMP_MIC_LEN);
168
} else {
169
ti.encrypt_type = HAL_ENCRYPT_TYPE_OPEN;
170
}
171
}
172
173
ti.addr_search_flags = arvif->hal_addr_search_flags;
174
ti.search_type = arvif->search_type;
175
ti.type = HAL_TCL_DESC_TYPE_BUFFER;
176
ti.pkt_offset = 0;
177
ti.lmac_id = ar->lmac_id;
178
ti.bss_ast_hash = arvif->ast_hash;
179
ti.bss_ast_idx = arvif->ast_idx;
180
ti.dscp_tid_tbl_idx = 0;
181
182
if (likely(skb->ip_summed == CHECKSUM_PARTIAL &&
183
ti.encap_type != HAL_TCL_ENCAP_TYPE_RAW)) {
184
ti.flags0 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_IP4_CKSUM_EN, 1) |
185
FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_UDP4_CKSUM_EN, 1) |
186
FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_UDP6_CKSUM_EN, 1) |
187
FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TCP4_CKSUM_EN, 1) |
188
FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TCP6_CKSUM_EN, 1);
189
}
190
191
if (ieee80211_vif_is_mesh(arvif->vif))
192
ti.enable_mesh = true;
193
194
ti.flags1 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO2_TID_OVERWRITE, 1);
195
196
ti.tid = ath11k_dp_tx_get_tid(skb);
197
198
switch (ti.encap_type) {
199
case HAL_TCL_ENCAP_TYPE_NATIVE_WIFI:
200
ath11k_dp_tx_encap_nwifi(skb);
201
break;
202
case HAL_TCL_ENCAP_TYPE_RAW:
203
if (!test_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags)) {
204
ret = -EINVAL;
205
goto fail_remove_idr;
206
}
207
break;
208
case HAL_TCL_ENCAP_TYPE_ETHERNET:
209
/* no need to encap */
210
break;
211
case HAL_TCL_ENCAP_TYPE_802_3:
212
default:
213
/* TODO: Take care of other encap modes as well */
214
ret = -EINVAL;
215
atomic_inc(&ab->soc_stats.tx_err.misc_fail);
216
goto fail_remove_idr;
217
}
218
219
ti.paddr = dma_map_single(ab->dev, skb->data, skb->len, DMA_TO_DEVICE);
220
if (unlikely(dma_mapping_error(ab->dev, ti.paddr))) {
221
atomic_inc(&ab->soc_stats.tx_err.misc_fail);
222
ath11k_warn(ab, "failed to DMA map data Tx buffer\n");
223
ret = -ENOMEM;
224
goto fail_remove_idr;
225
}
226
227
ti.data_len = skb->len;
228
skb_cb->paddr = ti.paddr;
229
skb_cb->vif = arvif->vif;
230
skb_cb->ar = ar;
231
232
hal_ring_id = tx_ring->tcl_data_ring.ring_id;
233
tcl_ring = &ab->hal.srng_list[hal_ring_id];
234
235
spin_lock_bh(&tcl_ring->lock);
236
237
ath11k_hal_srng_access_begin(ab, tcl_ring);
238
239
hal_tcl_desc = (void *)ath11k_hal_srng_src_get_next_entry(ab, tcl_ring);
240
if (unlikely(!hal_tcl_desc)) {
241
/* NOTE: It is highly unlikely we'll be running out of tcl_ring
242
* desc because the desc is directly enqueued onto hw queue.
243
*/
244
ath11k_hal_srng_access_end(ab, tcl_ring);
245
ab->soc_stats.tx_err.desc_na[ti.ring_id]++;
246
spin_unlock_bh(&tcl_ring->lock);
247
ret = -ENOMEM;
248
249
/* Checking for available tcl descritors in another ring in
250
* case of failure due to full tcl ring now, is better than
251
* checking this ring earlier for each pkt tx.
252
* Restart ring selection if some rings are not checked yet.
253
*/
254
if (unlikely(ring_map != (BIT(ab->hw_params.max_tx_ring)) - 1) &&
255
ab->hw_params.tcl_ring_retry && ab->hw_params.max_tx_ring > 1) {
256
tcl_ring_retry = true;
257
ring_selector++;
258
}
259
260
goto fail_unmap_dma;
261
}
262
263
ath11k_hal_tx_cmd_desc_setup(ab, hal_tcl_desc +
264
sizeof(struct hal_tlv_hdr), &ti);
265
266
ath11k_hal_srng_access_end(ab, tcl_ring);
267
268
ath11k_dp_shadow_start_timer(ab, tcl_ring, &dp->tx_ring_timer[ti.ring_id]);
269
270
spin_unlock_bh(&tcl_ring->lock);
271
272
ath11k_dbg_dump(ab, ATH11K_DBG_DP_TX, NULL, "dp tx msdu: ",
273
skb->data, skb->len);
274
275
atomic_inc(&ar->dp.num_tx_pending);
276
277
return 0;
278
279
fail_unmap_dma:
280
dma_unmap_single(ab->dev, ti.paddr, ti.data_len, DMA_TO_DEVICE);
281
282
fail_remove_idr:
283
spin_lock_bh(&tx_ring->tx_idr_lock);
284
idr_remove(&tx_ring->txbuf_idr,
285
FIELD_GET(DP_TX_DESC_ID_MSDU_ID, ti.desc_id));
286
spin_unlock_bh(&tx_ring->tx_idr_lock);
287
288
if (tcl_ring_retry)
289
goto tcl_ring_sel;
290
291
return ret;
292
}
293
294
static void ath11k_dp_tx_free_txbuf(struct ath11k_base *ab, u8 mac_id,
295
int msdu_id,
296
struct dp_tx_ring *tx_ring)
297
{
298
struct ath11k *ar;
299
struct sk_buff *msdu;
300
struct ath11k_skb_cb *skb_cb;
301
302
spin_lock(&tx_ring->tx_idr_lock);
303
msdu = idr_remove(&tx_ring->txbuf_idr, msdu_id);
304
spin_unlock(&tx_ring->tx_idr_lock);
305
306
if (unlikely(!msdu)) {
307
ath11k_warn(ab, "tx completion for unknown msdu_id %d\n",
308
msdu_id);
309
return;
310
}
311
312
skb_cb = ATH11K_SKB_CB(msdu);
313
314
dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
315
dev_kfree_skb_any(msdu);
316
317
ar = ab->pdevs[mac_id].ar;
318
if (atomic_dec_and_test(&ar->dp.num_tx_pending))
319
wake_up(&ar->dp.tx_empty_waitq);
320
}
321
322
static void
323
ath11k_dp_tx_htt_tx_complete_buf(struct ath11k_base *ab,
324
struct dp_tx_ring *tx_ring,
325
struct ath11k_dp_htt_wbm_tx_status *ts)
326
{
327
struct ieee80211_tx_status status = { 0 };
328
struct sk_buff *msdu;
329
struct ieee80211_tx_info *info;
330
struct ath11k_skb_cb *skb_cb;
331
struct ath11k *ar;
332
struct ath11k_peer *peer;
333
334
spin_lock(&tx_ring->tx_idr_lock);
335
msdu = idr_remove(&tx_ring->txbuf_idr, ts->msdu_id);
336
spin_unlock(&tx_ring->tx_idr_lock);
337
338
if (unlikely(!msdu)) {
339
ath11k_warn(ab, "htt tx completion for unknown msdu_id %d\n",
340
ts->msdu_id);
341
return;
342
}
343
344
skb_cb = ATH11K_SKB_CB(msdu);
345
info = IEEE80211_SKB_CB(msdu);
346
347
ar = skb_cb->ar;
348
349
if (atomic_dec_and_test(&ar->dp.num_tx_pending))
350
wake_up(&ar->dp.tx_empty_waitq);
351
352
dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
353
354
if (!skb_cb->vif) {
355
dev_kfree_skb_any(msdu);
356
return;
357
}
358
359
memset(&info->status, 0, sizeof(info->status));
360
361
if (ts->acked) {
362
if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
363
info->flags |= IEEE80211_TX_STAT_ACK;
364
info->status.ack_signal = ATH11K_DEFAULT_NOISE_FLOOR +
365
ts->ack_rssi;
366
info->status.flags |=
367
IEEE80211_TX_STATUS_ACK_SIGNAL_VALID;
368
} else {
369
info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
370
}
371
}
372
373
spin_lock_bh(&ab->base_lock);
374
peer = ath11k_peer_find_by_id(ab, ts->peer_id);
375
if (!peer || !peer->sta) {
376
ath11k_dbg(ab, ATH11K_DBG_DATA,
377
"dp_tx: failed to find the peer with peer_id %d\n",
378
ts->peer_id);
379
spin_unlock_bh(&ab->base_lock);
380
dev_kfree_skb_any(msdu);
381
return;
382
}
383
spin_unlock_bh(&ab->base_lock);
384
385
status.sta = peer->sta;
386
status.info = info;
387
status.skb = msdu;
388
389
ieee80211_tx_status_ext(ar->hw, &status);
390
}
391
392
static void
393
ath11k_dp_tx_process_htt_tx_complete(struct ath11k_base *ab,
394
#if defined(__linux__)
395
void *desc, u8 mac_id,
396
#elif defined(__FreeBSD__)
397
u8 *desc, u8 mac_id,
398
#endif
399
u32 msdu_id, struct dp_tx_ring *tx_ring)
400
{
401
struct htt_tx_wbm_completion *status_desc;
402
struct ath11k_dp_htt_wbm_tx_status ts = {0};
403
enum hal_wbm_htt_tx_comp_status wbm_status;
404
405
#if defined(__linux__)
406
status_desc = desc + HTT_TX_WBM_COMP_STATUS_OFFSET;
407
#elif defined(__FreeBSD__)
408
status_desc = (void *)(desc + HTT_TX_WBM_COMP_STATUS_OFFSET);
409
#endif
410
411
wbm_status = FIELD_GET(HTT_TX_WBM_COMP_INFO0_STATUS,
412
status_desc->info0);
413
switch (wbm_status) {
414
case HAL_WBM_REL_HTT_TX_COMP_STATUS_OK:
415
case HAL_WBM_REL_HTT_TX_COMP_STATUS_DROP:
416
case HAL_WBM_REL_HTT_TX_COMP_STATUS_TTL:
417
ts.acked = (wbm_status == HAL_WBM_REL_HTT_TX_COMP_STATUS_OK);
418
ts.msdu_id = msdu_id;
419
ts.ack_rssi = FIELD_GET(HTT_TX_WBM_COMP_INFO1_ACK_RSSI,
420
status_desc->info1);
421
422
if (FIELD_GET(HTT_TX_WBM_COMP_INFO2_VALID, status_desc->info2))
423
ts.peer_id = FIELD_GET(HTT_TX_WBM_COMP_INFO2_SW_PEER_ID,
424
status_desc->info2);
425
else
426
ts.peer_id = HTT_INVALID_PEER_ID;
427
428
ath11k_dp_tx_htt_tx_complete_buf(ab, tx_ring, &ts);
429
430
break;
431
case HAL_WBM_REL_HTT_TX_COMP_STATUS_REINJ:
432
case HAL_WBM_REL_HTT_TX_COMP_STATUS_INSPECT:
433
ath11k_dp_tx_free_txbuf(ab, mac_id, msdu_id, tx_ring);
434
break;
435
case HAL_WBM_REL_HTT_TX_COMP_STATUS_MEC_NOTIFY:
436
/* This event is to be handled only when the driver decides to
437
* use WDS offload functionality.
438
*/
439
break;
440
default:
441
ath11k_warn(ab, "Unknown htt tx status %d\n", wbm_status);
442
break;
443
}
444
}
445
446
static void ath11k_dp_tx_cache_peer_stats(struct ath11k *ar,
447
struct sk_buff *msdu,
448
struct hal_tx_status *ts)
449
{
450
struct ath11k_per_peer_tx_stats *peer_stats = &ar->cached_stats;
451
452
if (ts->try_cnt > 1) {
453
peer_stats->retry_pkts += ts->try_cnt - 1;
454
peer_stats->retry_bytes += (ts->try_cnt - 1) * msdu->len;
455
456
if (ts->status != HAL_WBM_TQM_REL_REASON_FRAME_ACKED) {
457
peer_stats->failed_pkts += 1;
458
peer_stats->failed_bytes += msdu->len;
459
}
460
}
461
}
462
463
void ath11k_dp_tx_update_txcompl(struct ath11k *ar, struct hal_tx_status *ts)
464
{
465
struct ath11k_base *ab = ar->ab;
466
struct ath11k_per_peer_tx_stats *peer_stats = &ar->cached_stats;
467
enum hal_tx_rate_stats_pkt_type pkt_type;
468
enum hal_tx_rate_stats_sgi sgi;
469
enum hal_tx_rate_stats_bw bw;
470
struct ath11k_peer *peer;
471
struct ath11k_sta *arsta;
472
struct ieee80211_sta *sta;
473
u16 rate, ru_tones;
474
u8 mcs, rate_idx = 0, ofdma;
475
int ret;
476
477
spin_lock_bh(&ab->base_lock);
478
peer = ath11k_peer_find_by_id(ab, ts->peer_id);
479
if (!peer || !peer->sta) {
480
ath11k_dbg(ab, ATH11K_DBG_DP_TX,
481
"failed to find the peer by id %u\n", ts->peer_id);
482
goto err_out;
483
}
484
485
sta = peer->sta;
486
arsta = (struct ath11k_sta *)sta->drv_priv;
487
488
memset(&arsta->txrate, 0, sizeof(arsta->txrate));
489
pkt_type = FIELD_GET(HAL_TX_RATE_STATS_INFO0_PKT_TYPE,
490
ts->rate_stats);
491
mcs = FIELD_GET(HAL_TX_RATE_STATS_INFO0_MCS,
492
ts->rate_stats);
493
sgi = FIELD_GET(HAL_TX_RATE_STATS_INFO0_SGI,
494
ts->rate_stats);
495
bw = FIELD_GET(HAL_TX_RATE_STATS_INFO0_BW, ts->rate_stats);
496
ru_tones = FIELD_GET(HAL_TX_RATE_STATS_INFO0_TONES_IN_RU, ts->rate_stats);
497
ofdma = FIELD_GET(HAL_TX_RATE_STATS_INFO0_OFDMA_TX, ts->rate_stats);
498
499
/* This is to prefer choose the real NSS value arsta->last_txrate.nss,
500
* if it is invalid, then choose the NSS value while assoc.
501
*/
502
if (arsta->last_txrate.nss)
503
arsta->txrate.nss = arsta->last_txrate.nss;
504
else
505
arsta->txrate.nss = arsta->peer_nss;
506
507
if (pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11A ||
508
pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11B) {
509
ret = ath11k_mac_hw_ratecode_to_legacy_rate(mcs,
510
pkt_type,
511
&rate_idx,
512
&rate);
513
if (ret < 0)
514
goto err_out;
515
arsta->txrate.legacy = rate;
516
} else if (pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11N) {
517
if (mcs > 7) {
518
ath11k_warn(ab, "Invalid HT mcs index %d\n", mcs);
519
goto err_out;
520
}
521
522
if (arsta->txrate.nss != 0)
523
arsta->txrate.mcs = mcs + 8 * (arsta->txrate.nss - 1);
524
arsta->txrate.flags = RATE_INFO_FLAGS_MCS;
525
if (sgi)
526
arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
527
} else if (pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11AC) {
528
if (mcs > 9) {
529
ath11k_warn(ab, "Invalid VHT mcs index %d\n", mcs);
530
goto err_out;
531
}
532
533
arsta->txrate.mcs = mcs;
534
arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS;
535
if (sgi)
536
arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;
537
} else if (pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11AX) {
538
if (mcs > 11) {
539
ath11k_warn(ab, "Invalid HE mcs index %d\n", mcs);
540
goto err_out;
541
}
542
543
arsta->txrate.mcs = mcs;
544
arsta->txrate.flags = RATE_INFO_FLAGS_HE_MCS;
545
arsta->txrate.he_gi = ath11k_mac_he_gi_to_nl80211_he_gi(sgi);
546
}
547
548
arsta->txrate.bw = ath11k_mac_bw_to_mac80211_bw(bw);
549
if (ofdma && pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11AX) {
550
arsta->txrate.bw = RATE_INFO_BW_HE_RU;
551
arsta->txrate.he_ru_alloc =
552
ath11k_mac_he_ru_tones_to_nl80211_he_ru_alloc(ru_tones);
553
}
554
555
if (ath11k_debugfs_is_extd_tx_stats_enabled(ar))
556
ath11k_debugfs_sta_add_tx_stats(arsta, peer_stats, rate_idx);
557
558
err_out:
559
spin_unlock_bh(&ab->base_lock);
560
}
561
562
static void ath11k_dp_tx_complete_msdu(struct ath11k *ar,
563
struct sk_buff *msdu,
564
struct hal_tx_status *ts)
565
{
566
struct ieee80211_tx_status status = { 0 };
567
struct ieee80211_rate_status status_rate = { 0 };
568
struct ath11k_base *ab = ar->ab;
569
struct ieee80211_tx_info *info;
570
struct ath11k_skb_cb *skb_cb;
571
struct ath11k_peer *peer;
572
struct ath11k_sta *arsta;
573
struct rate_info rate;
574
575
if (WARN_ON_ONCE(ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_TQM)) {
576
/* Must not happen */
577
return;
578
}
579
580
skb_cb = ATH11K_SKB_CB(msdu);
581
582
dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
583
584
if (unlikely(!rcu_access_pointer(ab->pdevs_active[ar->pdev_idx]))) {
585
dev_kfree_skb_any(msdu);
586
return;
587
}
588
589
if (unlikely(!skb_cb->vif)) {
590
dev_kfree_skb_any(msdu);
591
return;
592
}
593
594
info = IEEE80211_SKB_CB(msdu);
595
memset(&info->status, 0, sizeof(info->status));
596
597
/* skip tx rate update from ieee80211_status*/
598
info->status.rates[0].idx = -1;
599
600
if (ts->status == HAL_WBM_TQM_REL_REASON_FRAME_ACKED &&
601
!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
602
info->flags |= IEEE80211_TX_STAT_ACK;
603
info->status.ack_signal = ATH11K_DEFAULT_NOISE_FLOOR +
604
ts->ack_rssi;
605
info->status.flags |= IEEE80211_TX_STATUS_ACK_SIGNAL_VALID;
606
}
607
608
if (ts->status == HAL_WBM_TQM_REL_REASON_CMD_REMOVE_TX &&
609
(info->flags & IEEE80211_TX_CTL_NO_ACK))
610
info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
611
612
if (unlikely(ath11k_debugfs_is_extd_tx_stats_enabled(ar)) ||
613
ab->hw_params.single_pdev_only) {
614
if (ts->flags & HAL_TX_STATUS_FLAGS_FIRST_MSDU) {
615
if (ar->last_ppdu_id == 0) {
616
ar->last_ppdu_id = ts->ppdu_id;
617
} else if (ar->last_ppdu_id == ts->ppdu_id ||
618
ar->cached_ppdu_id == ar->last_ppdu_id) {
619
ar->cached_ppdu_id = ar->last_ppdu_id;
620
ar->cached_stats.is_ampdu = true;
621
ath11k_dp_tx_update_txcompl(ar, ts);
622
memset(&ar->cached_stats, 0,
623
sizeof(struct ath11k_per_peer_tx_stats));
624
} else {
625
ar->cached_stats.is_ampdu = false;
626
ath11k_dp_tx_update_txcompl(ar, ts);
627
memset(&ar->cached_stats, 0,
628
sizeof(struct ath11k_per_peer_tx_stats));
629
}
630
ar->last_ppdu_id = ts->ppdu_id;
631
}
632
633
ath11k_dp_tx_cache_peer_stats(ar, msdu, ts);
634
}
635
636
spin_lock_bh(&ab->base_lock);
637
peer = ath11k_peer_find_by_id(ab, ts->peer_id);
638
if (!peer || !peer->sta) {
639
ath11k_dbg(ab, ATH11K_DBG_DATA,
640
"dp_tx: failed to find the peer with peer_id %d\n",
641
ts->peer_id);
642
spin_unlock_bh(&ab->base_lock);
643
dev_kfree_skb_any(msdu);
644
return;
645
}
646
arsta = (struct ath11k_sta *)peer->sta->drv_priv;
647
status.sta = peer->sta;
648
status.skb = msdu;
649
status.info = info;
650
rate = arsta->last_txrate;
651
652
status_rate.rate_idx = rate;
653
status_rate.try_count = 1;
654
655
status.rates = &status_rate;
656
status.n_rates = 1;
657
658
spin_unlock_bh(&ab->base_lock);
659
660
ieee80211_tx_status_ext(ar->hw, &status);
661
}
662
663
static inline void ath11k_dp_tx_status_parse(struct ath11k_base *ab,
664
struct hal_wbm_release_ring *desc,
665
struct hal_tx_status *ts)
666
{
667
ts->buf_rel_source =
668
FIELD_GET(HAL_WBM_RELEASE_INFO0_REL_SRC_MODULE, desc->info0);
669
if (unlikely(ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_FW &&
670
ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_TQM))
671
return;
672
673
if (unlikely(ts->buf_rel_source == HAL_WBM_REL_SRC_MODULE_FW))
674
return;
675
676
ts->status = FIELD_GET(HAL_WBM_RELEASE_INFO0_TQM_RELEASE_REASON,
677
desc->info0);
678
ts->ppdu_id = FIELD_GET(HAL_WBM_RELEASE_INFO1_TQM_STATUS_NUMBER,
679
desc->info1);
680
ts->try_cnt = FIELD_GET(HAL_WBM_RELEASE_INFO1_TRANSMIT_COUNT,
681
desc->info1);
682
ts->ack_rssi = FIELD_GET(HAL_WBM_RELEASE_INFO2_ACK_FRAME_RSSI,
683
desc->info2);
684
if (desc->info2 & HAL_WBM_RELEASE_INFO2_FIRST_MSDU)
685
ts->flags |= HAL_TX_STATUS_FLAGS_FIRST_MSDU;
686
ts->peer_id = FIELD_GET(HAL_WBM_RELEASE_INFO3_PEER_ID, desc->info3);
687
ts->tid = FIELD_GET(HAL_WBM_RELEASE_INFO3_TID, desc->info3);
688
if (desc->rate_stats.info0 & HAL_TX_RATE_STATS_INFO0_VALID)
689
ts->rate_stats = desc->rate_stats.info0;
690
else
691
ts->rate_stats = 0;
692
}
693
694
void ath11k_dp_tx_completion_handler(struct ath11k_base *ab, int ring_id)
695
{
696
struct ath11k *ar;
697
struct ath11k_dp *dp = &ab->dp;
698
int hal_ring_id = dp->tx_ring[ring_id].tcl_comp_ring.ring_id;
699
struct hal_srng *status_ring = &ab->hal.srng_list[hal_ring_id];
700
struct sk_buff *msdu;
701
struct hal_tx_status ts = { 0 };
702
struct dp_tx_ring *tx_ring = &dp->tx_ring[ring_id];
703
u32 *desc;
704
u32 msdu_id;
705
u8 mac_id;
706
707
spin_lock_bh(&status_ring->lock);
708
709
ath11k_hal_srng_access_begin(ab, status_ring);
710
711
while ((ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head) !=
712
tx_ring->tx_status_tail) &&
713
(desc = ath11k_hal_srng_dst_get_next_entry(ab, status_ring))) {
714
memcpy(&tx_ring->tx_status[tx_ring->tx_status_head],
715
desc, sizeof(struct hal_wbm_release_ring));
716
tx_ring->tx_status_head =
717
ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head);
718
}
719
720
if (unlikely((ath11k_hal_srng_dst_peek(ab, status_ring) != NULL) &&
721
(ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head) ==
722
tx_ring->tx_status_tail))) {
723
/* TODO: Process pending tx_status messages when kfifo_is_full() */
724
ath11k_warn(ab, "Unable to process some of the tx_status ring desc because status_fifo is full\n");
725
}
726
727
ath11k_hal_srng_access_end(ab, status_ring);
728
729
spin_unlock_bh(&status_ring->lock);
730
731
while (ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_tail) != tx_ring->tx_status_head) {
732
struct hal_wbm_release_ring *tx_status;
733
u32 desc_id;
734
735
tx_ring->tx_status_tail =
736
ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_tail);
737
tx_status = &tx_ring->tx_status[tx_ring->tx_status_tail];
738
ath11k_dp_tx_status_parse(ab, tx_status, &ts);
739
740
desc_id = FIELD_GET(BUFFER_ADDR_INFO1_SW_COOKIE,
741
tx_status->buf_addr_info.info1);
742
mac_id = FIELD_GET(DP_TX_DESC_ID_MAC_ID, desc_id);
743
msdu_id = FIELD_GET(DP_TX_DESC_ID_MSDU_ID, desc_id);
744
745
if (unlikely(ts.buf_rel_source == HAL_WBM_REL_SRC_MODULE_FW)) {
746
ath11k_dp_tx_process_htt_tx_complete(ab,
747
(void *)tx_status,
748
mac_id, msdu_id,
749
tx_ring);
750
continue;
751
}
752
753
spin_lock(&tx_ring->tx_idr_lock);
754
msdu = idr_remove(&tx_ring->txbuf_idr, msdu_id);
755
if (unlikely(!msdu)) {
756
ath11k_warn(ab, "tx completion for unknown msdu_id %d\n",
757
msdu_id);
758
spin_unlock(&tx_ring->tx_idr_lock);
759
continue;
760
}
761
762
spin_unlock(&tx_ring->tx_idr_lock);
763
764
ar = ab->pdevs[mac_id].ar;
765
766
if (atomic_dec_and_test(&ar->dp.num_tx_pending))
767
wake_up(&ar->dp.tx_empty_waitq);
768
769
ath11k_dp_tx_complete_msdu(ar, msdu, &ts);
770
}
771
}
772
773
int ath11k_dp_tx_send_reo_cmd(struct ath11k_base *ab, struct dp_rx_tid *rx_tid,
774
enum hal_reo_cmd_type type,
775
struct ath11k_hal_reo_cmd *cmd,
776
void (*cb)(struct ath11k_dp *, void *,
777
enum hal_reo_cmd_status))
778
{
779
struct ath11k_dp *dp = &ab->dp;
780
struct dp_reo_cmd *dp_cmd;
781
struct hal_srng *cmd_ring;
782
int cmd_num;
783
784
if (test_bit(ATH11K_FLAG_CRASH_FLUSH, &ab->dev_flags))
785
return -ESHUTDOWN;
786
787
cmd_ring = &ab->hal.srng_list[dp->reo_cmd_ring.ring_id];
788
cmd_num = ath11k_hal_reo_cmd_send(ab, cmd_ring, type, cmd);
789
790
/* cmd_num should start from 1, during failure return the error code */
791
if (cmd_num < 0)
792
return cmd_num;
793
794
/* reo cmd ring descriptors has cmd_num starting from 1 */
795
if (cmd_num == 0)
796
return -EINVAL;
797
798
if (!cb)
799
return 0;
800
801
/* Can this be optimized so that we keep the pending command list only
802
* for tid delete command to free up the resource on the command status
803
* indication?
804
*/
805
dp_cmd = kzalloc(sizeof(*dp_cmd), GFP_ATOMIC);
806
807
if (!dp_cmd)
808
return -ENOMEM;
809
810
memcpy(&dp_cmd->data, rx_tid, sizeof(struct dp_rx_tid));
811
dp_cmd->cmd_num = cmd_num;
812
dp_cmd->handler = cb;
813
814
spin_lock_bh(&dp->reo_cmd_lock);
815
list_add_tail(&dp_cmd->list, &dp->reo_cmd_list);
816
spin_unlock_bh(&dp->reo_cmd_lock);
817
818
return 0;
819
}
820
821
static int
822
ath11k_dp_tx_get_ring_id_type(struct ath11k_base *ab,
823
int mac_id, u32 ring_id,
824
enum hal_ring_type ring_type,
825
enum htt_srng_ring_type *htt_ring_type,
826
enum htt_srng_ring_id *htt_ring_id)
827
{
828
int lmac_ring_id_offset = 0;
829
int ret = 0;
830
831
switch (ring_type) {
832
case HAL_RXDMA_BUF:
833
lmac_ring_id_offset = mac_id * HAL_SRNG_RINGS_PER_LMAC;
834
835
/* for QCA6390, host fills rx buffer to fw and fw fills to
836
* rxbuf ring for each rxdma
837
*/
838
if (!ab->hw_params.rx_mac_buf_ring) {
839
if (!(ring_id == (HAL_SRNG_RING_ID_WMAC1_SW2RXDMA0_BUF +
840
lmac_ring_id_offset) ||
841
ring_id == (HAL_SRNG_RING_ID_WMAC1_SW2RXDMA1_BUF +
842
lmac_ring_id_offset))) {
843
ret = -EINVAL;
844
}
845
*htt_ring_id = HTT_RXDMA_HOST_BUF_RING;
846
*htt_ring_type = HTT_SW_TO_HW_RING;
847
} else {
848
if (ring_id == HAL_SRNG_RING_ID_WMAC1_SW2RXDMA0_BUF) {
849
*htt_ring_id = HTT_HOST1_TO_FW_RXBUF_RING;
850
*htt_ring_type = HTT_SW_TO_SW_RING;
851
} else {
852
*htt_ring_id = HTT_RXDMA_HOST_BUF_RING;
853
*htt_ring_type = HTT_SW_TO_HW_RING;
854
}
855
}
856
break;
857
case HAL_RXDMA_DST:
858
*htt_ring_id = HTT_RXDMA_NON_MONITOR_DEST_RING;
859
*htt_ring_type = HTT_HW_TO_SW_RING;
860
break;
861
case HAL_RXDMA_MONITOR_BUF:
862
*htt_ring_id = HTT_RXDMA_MONITOR_BUF_RING;
863
*htt_ring_type = HTT_SW_TO_HW_RING;
864
break;
865
case HAL_RXDMA_MONITOR_STATUS:
866
*htt_ring_id = HTT_RXDMA_MONITOR_STATUS_RING;
867
*htt_ring_type = HTT_SW_TO_HW_RING;
868
break;
869
case HAL_RXDMA_MONITOR_DST:
870
*htt_ring_id = HTT_RXDMA_MONITOR_DEST_RING;
871
*htt_ring_type = HTT_HW_TO_SW_RING;
872
break;
873
case HAL_RXDMA_MONITOR_DESC:
874
*htt_ring_id = HTT_RXDMA_MONITOR_DESC_RING;
875
*htt_ring_type = HTT_SW_TO_HW_RING;
876
break;
877
default:
878
ath11k_warn(ab, "Unsupported ring type in DP :%d\n", ring_type);
879
ret = -EINVAL;
880
}
881
return ret;
882
}
883
884
int ath11k_dp_tx_htt_srng_setup(struct ath11k_base *ab, u32 ring_id,
885
int mac_id, enum hal_ring_type ring_type)
886
{
887
struct htt_srng_setup_cmd *cmd;
888
struct hal_srng *srng = &ab->hal.srng_list[ring_id];
889
struct hal_srng_params params;
890
struct sk_buff *skb;
891
u32 ring_entry_sz;
892
int len = sizeof(*cmd);
893
dma_addr_t hp_addr, tp_addr;
894
enum htt_srng_ring_type htt_ring_type;
895
enum htt_srng_ring_id htt_ring_id;
896
int ret;
897
898
skb = ath11k_htc_alloc_skb(ab, len);
899
if (!skb)
900
return -ENOMEM;
901
902
memset(&params, 0, sizeof(params));
903
ath11k_hal_srng_get_params(ab, srng, &params);
904
905
hp_addr = ath11k_hal_srng_get_hp_addr(ab, srng);
906
tp_addr = ath11k_hal_srng_get_tp_addr(ab, srng);
907
908
ret = ath11k_dp_tx_get_ring_id_type(ab, mac_id, ring_id,
909
ring_type, &htt_ring_type,
910
&htt_ring_id);
911
if (ret)
912
goto err_free;
913
914
skb_put(skb, len);
915
cmd = (struct htt_srng_setup_cmd *)skb->data;
916
cmd->info0 = FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_MSG_TYPE,
917
HTT_H2T_MSG_TYPE_SRING_SETUP);
918
if (htt_ring_type == HTT_SW_TO_HW_RING ||
919
htt_ring_type == HTT_HW_TO_SW_RING)
920
cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_PDEV_ID,
921
DP_SW2HW_MACID(mac_id));
922
else
923
cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_PDEV_ID,
924
mac_id);
925
cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_RING_TYPE,
926
htt_ring_type);
927
cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_RING_ID, htt_ring_id);
928
929
cmd->ring_base_addr_lo = params.ring_base_paddr &
930
HAL_ADDR_LSB_REG_MASK;
931
932
cmd->ring_base_addr_hi = (u64)params.ring_base_paddr >>
933
HAL_ADDR_MSB_REG_SHIFT;
934
935
ret = ath11k_hal_srng_get_entrysize(ab, ring_type);
936
if (ret < 0)
937
goto err_free;
938
939
ring_entry_sz = ret;
940
941
ring_entry_sz >>= 2;
942
cmd->info1 = FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_ENTRY_SIZE,
943
ring_entry_sz);
944
cmd->info1 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_SIZE,
945
params.num_entries * ring_entry_sz);
946
cmd->info1 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_MSI_SWAP,
947
!!(params.flags & HAL_SRNG_FLAGS_MSI_SWAP));
948
cmd->info1 |= FIELD_PREP(
949
HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_TLV_SWAP,
950
!!(params.flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP));
951
cmd->info1 |= FIELD_PREP(
952
HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_HOST_FW_SWAP,
953
!!(params.flags & HAL_SRNG_FLAGS_RING_PTR_SWAP));
954
if (htt_ring_type == HTT_SW_TO_HW_RING)
955
cmd->info1 |= HTT_SRNG_SETUP_CMD_INFO1_RING_LOOP_CNT_DIS;
956
957
cmd->ring_head_off32_remote_addr_lo = hp_addr & HAL_ADDR_LSB_REG_MASK;
958
cmd->ring_head_off32_remote_addr_hi = (u64)hp_addr >>
959
HAL_ADDR_MSB_REG_SHIFT;
960
961
cmd->ring_tail_off32_remote_addr_lo = tp_addr & HAL_ADDR_LSB_REG_MASK;
962
cmd->ring_tail_off32_remote_addr_hi = (u64)tp_addr >>
963
HAL_ADDR_MSB_REG_SHIFT;
964
965
cmd->ring_msi_addr_lo = lower_32_bits(params.msi_addr);
966
cmd->ring_msi_addr_hi = upper_32_bits(params.msi_addr);
967
cmd->msi_data = params.msi_data;
968
969
cmd->intr_info = FIELD_PREP(
970
HTT_SRNG_SETUP_CMD_INTR_INFO_BATCH_COUNTER_THRESH,
971
params.intr_batch_cntr_thres_entries * ring_entry_sz);
972
cmd->intr_info |= FIELD_PREP(
973
HTT_SRNG_SETUP_CMD_INTR_INFO_INTR_TIMER_THRESH,
974
params.intr_timer_thres_us >> 3);
975
976
cmd->info2 = 0;
977
if (params.flags & HAL_SRNG_FLAGS_LOW_THRESH_INTR_EN) {
978
cmd->info2 = FIELD_PREP(
979
HTT_SRNG_SETUP_CMD_INFO2_INTR_LOW_THRESH,
980
params.low_threshold);
981
}
982
983
ath11k_dbg(ab, ATH11K_DBG_DP_TX,
984
"htt srng setup msi_addr_lo 0x%x msi_addr_hi 0x%x msi_data 0x%x ring_id %d ring_type %d intr_info 0x%x flags 0x%x\n",
985
cmd->ring_msi_addr_lo, cmd->ring_msi_addr_hi,
986
cmd->msi_data, ring_id, ring_type, cmd->intr_info, cmd->info2);
987
988
ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb);
989
if (ret)
990
goto err_free;
991
992
return 0;
993
994
err_free:
995
dev_kfree_skb_any(skb);
996
997
return ret;
998
}
999
1000
#define HTT_TARGET_VERSION_TIMEOUT_HZ (3 * HZ)
1001
1002
int ath11k_dp_tx_htt_h2t_ver_req_msg(struct ath11k_base *ab)
1003
{
1004
struct ath11k_dp *dp = &ab->dp;
1005
struct sk_buff *skb;
1006
struct htt_ver_req_cmd *cmd;
1007
int len = sizeof(*cmd);
1008
int ret;
1009
1010
init_completion(&dp->htt_tgt_version_received);
1011
1012
skb = ath11k_htc_alloc_skb(ab, len);
1013
if (!skb)
1014
return -ENOMEM;
1015
1016
skb_put(skb, len);
1017
cmd = (struct htt_ver_req_cmd *)skb->data;
1018
cmd->ver_reg_info = FIELD_PREP(HTT_VER_REQ_INFO_MSG_ID,
1019
HTT_H2T_MSG_TYPE_VERSION_REQ);
1020
1021
ret = ath11k_htc_send(&ab->htc, dp->eid, skb);
1022
if (ret) {
1023
dev_kfree_skb_any(skb);
1024
return ret;
1025
}
1026
1027
ret = wait_for_completion_timeout(&dp->htt_tgt_version_received,
1028
HTT_TARGET_VERSION_TIMEOUT_HZ);
1029
if (ret == 0) {
1030
ath11k_warn(ab, "htt target version request timed out\n");
1031
return -ETIMEDOUT;
1032
}
1033
1034
if (dp->htt_tgt_ver_major != HTT_TARGET_VERSION_MAJOR) {
1035
ath11k_err(ab, "unsupported htt major version %d supported version is %d\n",
1036
dp->htt_tgt_ver_major, HTT_TARGET_VERSION_MAJOR);
1037
return -ENOTSUPP;
1038
}
1039
1040
return 0;
1041
}
1042
1043
int ath11k_dp_tx_htt_h2t_ppdu_stats_req(struct ath11k *ar, u32 mask)
1044
{
1045
struct ath11k_base *ab = ar->ab;
1046
struct ath11k_dp *dp = &ab->dp;
1047
struct sk_buff *skb;
1048
struct htt_ppdu_stats_cfg_cmd *cmd;
1049
int len = sizeof(*cmd);
1050
u8 pdev_mask;
1051
int ret;
1052
int i;
1053
1054
for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
1055
skb = ath11k_htc_alloc_skb(ab, len);
1056
if (!skb)
1057
return -ENOMEM;
1058
1059
skb_put(skb, len);
1060
cmd = (struct htt_ppdu_stats_cfg_cmd *)skb->data;
1061
cmd->msg = FIELD_PREP(HTT_PPDU_STATS_CFG_MSG_TYPE,
1062
HTT_H2T_MSG_TYPE_PPDU_STATS_CFG);
1063
1064
pdev_mask = 1 << (ar->pdev_idx + i);
1065
cmd->msg |= FIELD_PREP(HTT_PPDU_STATS_CFG_PDEV_ID, pdev_mask);
1066
cmd->msg |= FIELD_PREP(HTT_PPDU_STATS_CFG_TLV_TYPE_BITMASK, mask);
1067
1068
ret = ath11k_htc_send(&ab->htc, dp->eid, skb);
1069
if (ret) {
1070
dev_kfree_skb_any(skb);
1071
return ret;
1072
}
1073
}
1074
1075
return 0;
1076
}
1077
1078
int ath11k_dp_tx_htt_rx_filter_setup(struct ath11k_base *ab, u32 ring_id,
1079
int mac_id, enum hal_ring_type ring_type,
1080
int rx_buf_size,
1081
struct htt_rx_ring_tlv_filter *tlv_filter)
1082
{
1083
struct htt_rx_ring_selection_cfg_cmd *cmd;
1084
struct hal_srng *srng = &ab->hal.srng_list[ring_id];
1085
struct hal_srng_params params;
1086
struct sk_buff *skb;
1087
int len = sizeof(*cmd);
1088
enum htt_srng_ring_type htt_ring_type;
1089
enum htt_srng_ring_id htt_ring_id;
1090
int ret;
1091
1092
skb = ath11k_htc_alloc_skb(ab, len);
1093
if (!skb)
1094
return -ENOMEM;
1095
1096
memset(&params, 0, sizeof(params));
1097
ath11k_hal_srng_get_params(ab, srng, &params);
1098
1099
ret = ath11k_dp_tx_get_ring_id_type(ab, mac_id, ring_id,
1100
ring_type, &htt_ring_type,
1101
&htt_ring_id);
1102
if (ret)
1103
goto err_free;
1104
1105
skb_put(skb, len);
1106
cmd = (struct htt_rx_ring_selection_cfg_cmd *)skb->data;
1107
cmd->info0 = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_MSG_TYPE,
1108
HTT_H2T_MSG_TYPE_RX_RING_SELECTION_CFG);
1109
if (htt_ring_type == HTT_SW_TO_HW_RING ||
1110
htt_ring_type == HTT_HW_TO_SW_RING)
1111
cmd->info0 |=
1112
FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PDEV_ID,
1113
DP_SW2HW_MACID(mac_id));
1114
else
1115
cmd->info0 |=
1116
FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PDEV_ID,
1117
mac_id);
1118
cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_RING_ID,
1119
htt_ring_id);
1120
cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_SS,
1121
!!(params.flags & HAL_SRNG_FLAGS_MSI_SWAP));
1122
cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PS,
1123
!!(params.flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP));
1124
1125
cmd->info1 = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO1_BUF_SIZE,
1126
rx_buf_size);
1127
cmd->pkt_type_en_flags0 = tlv_filter->pkt_filter_flags0;
1128
cmd->pkt_type_en_flags1 = tlv_filter->pkt_filter_flags1;
1129
cmd->pkt_type_en_flags2 = tlv_filter->pkt_filter_flags2;
1130
cmd->pkt_type_en_flags3 = tlv_filter->pkt_filter_flags3;
1131
cmd->rx_filter_tlv = tlv_filter->rx_filter;
1132
1133
ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb);
1134
if (ret)
1135
goto err_free;
1136
1137
return 0;
1138
1139
err_free:
1140
dev_kfree_skb_any(skb);
1141
1142
return ret;
1143
}
1144
1145
int
1146
ath11k_dp_tx_htt_h2t_ext_stats_req(struct ath11k *ar, u8 type,
1147
struct htt_ext_stats_cfg_params *cfg_params,
1148
u64 cookie)
1149
{
1150
struct ath11k_base *ab = ar->ab;
1151
struct ath11k_dp *dp = &ab->dp;
1152
struct sk_buff *skb;
1153
struct htt_ext_stats_cfg_cmd *cmd;
1154
u32 pdev_id;
1155
int len = sizeof(*cmd);
1156
int ret;
1157
1158
skb = ath11k_htc_alloc_skb(ab, len);
1159
if (!skb)
1160
return -ENOMEM;
1161
1162
skb_put(skb, len);
1163
1164
cmd = (struct htt_ext_stats_cfg_cmd *)skb->data;
1165
memset(cmd, 0, sizeof(*cmd));
1166
cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_EXT_STATS_CFG;
1167
1168
if (ab->hw_params.single_pdev_only)
1169
pdev_id = ath11k_mac_get_target_pdev_id(ar);
1170
else
1171
pdev_id = ar->pdev->pdev_id;
1172
1173
cmd->hdr.pdev_mask = 1 << pdev_id;
1174
1175
cmd->hdr.stats_type = type;
1176
cmd->cfg_param0 = cfg_params->cfg0;
1177
cmd->cfg_param1 = cfg_params->cfg1;
1178
cmd->cfg_param2 = cfg_params->cfg2;
1179
cmd->cfg_param3 = cfg_params->cfg3;
1180
cmd->cookie_lsb = lower_32_bits(cookie);
1181
cmd->cookie_msb = upper_32_bits(cookie);
1182
1183
ret = ath11k_htc_send(&ab->htc, dp->eid, skb);
1184
if (ret) {
1185
ath11k_warn(ab, "failed to send htt type stats request: %d",
1186
ret);
1187
dev_kfree_skb_any(skb);
1188
return ret;
1189
}
1190
1191
return 0;
1192
}
1193
1194
int ath11k_dp_tx_htt_monitor_mode_ring_config(struct ath11k *ar, bool reset)
1195
{
1196
struct ath11k_pdev_dp *dp = &ar->dp;
1197
struct ath11k_base *ab = ar->ab;
1198
struct htt_rx_ring_tlv_filter tlv_filter = {0};
1199
int ret = 0, ring_id = 0, i;
1200
1201
if (ab->hw_params.full_monitor_mode) {
1202
ret = ath11k_dp_tx_htt_rx_full_mon_setup(ab,
1203
dp->mac_id, !reset);
1204
if (ret < 0) {
1205
ath11k_err(ab, "failed to setup full monitor %d\n", ret);
1206
return ret;
1207
}
1208
}
1209
1210
ring_id = dp->rxdma_mon_buf_ring.refill_buf_ring.ring_id;
1211
1212
if (!reset) {
1213
tlv_filter.rx_filter = HTT_RX_MON_FILTER_TLV_FLAGS_MON_BUF_RING;
1214
tlv_filter.pkt_filter_flags0 =
1215
HTT_RX_MON_FP_MGMT_FILTER_FLAGS0 |
1216
HTT_RX_MON_MO_MGMT_FILTER_FLAGS0;
1217
tlv_filter.pkt_filter_flags1 =
1218
HTT_RX_MON_FP_MGMT_FILTER_FLAGS1 |
1219
HTT_RX_MON_MO_MGMT_FILTER_FLAGS1;
1220
tlv_filter.pkt_filter_flags2 =
1221
HTT_RX_MON_FP_CTRL_FILTER_FLASG2 |
1222
HTT_RX_MON_MO_CTRL_FILTER_FLASG2;
1223
tlv_filter.pkt_filter_flags3 =
1224
HTT_RX_MON_FP_CTRL_FILTER_FLASG3 |
1225
HTT_RX_MON_MO_CTRL_FILTER_FLASG3 |
1226
HTT_RX_MON_FP_DATA_FILTER_FLASG3 |
1227
HTT_RX_MON_MO_DATA_FILTER_FLASG3;
1228
}
1229
1230
if (ab->hw_params.rxdma1_enable) {
1231
ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id, dp->mac_id,
1232
HAL_RXDMA_MONITOR_BUF,
1233
DP_RXDMA_REFILL_RING_SIZE,
1234
&tlv_filter);
1235
} else if (!reset) {
1236
/* set in monitor mode only */
1237
for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
1238
ring_id = dp->rx_mac_buf_ring[i].ring_id;
1239
ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id,
1240
dp->mac_id + i,
1241
HAL_RXDMA_BUF,
1242
1024,
1243
&tlv_filter);
1244
}
1245
}
1246
1247
if (ret)
1248
return ret;
1249
1250
for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
1251
ring_id = dp->rx_mon_status_refill_ring[i].refill_buf_ring.ring_id;
1252
if (!reset) {
1253
tlv_filter.rx_filter =
1254
HTT_RX_MON_FILTER_TLV_FLAGS_MON_STATUS_RING;
1255
} else {
1256
tlv_filter = ath11k_mac_mon_status_filter_default;
1257
1258
if (ath11k_debugfs_is_extd_rx_stats_enabled(ar))
1259
tlv_filter.rx_filter = ath11k_debugfs_rx_filter(ar);
1260
}
1261
1262
ret = ath11k_dp_tx_htt_rx_filter_setup(ab, ring_id,
1263
dp->mac_id + i,
1264
HAL_RXDMA_MONITOR_STATUS,
1265
DP_RXDMA_REFILL_RING_SIZE,
1266
&tlv_filter);
1267
}
1268
1269
if (!ar->ab->hw_params.rxdma1_enable)
1270
mod_timer(&ar->ab->mon_reap_timer, jiffies +
1271
msecs_to_jiffies(ATH11K_MON_TIMER_INTERVAL));
1272
1273
return ret;
1274
}
1275
1276
int ath11k_dp_tx_htt_rx_full_mon_setup(struct ath11k_base *ab, int mac_id,
1277
bool config)
1278
{
1279
struct htt_rx_full_monitor_mode_cfg_cmd *cmd;
1280
struct sk_buff *skb;
1281
int ret, len = sizeof(*cmd);
1282
1283
skb = ath11k_htc_alloc_skb(ab, len);
1284
if (!skb)
1285
return -ENOMEM;
1286
1287
skb_put(skb, len);
1288
cmd = (struct htt_rx_full_monitor_mode_cfg_cmd *)skb->data;
1289
memset(cmd, 0, sizeof(*cmd));
1290
cmd->info0 = FIELD_PREP(HTT_RX_FULL_MON_MODE_CFG_CMD_INFO0_MSG_TYPE,
1291
HTT_H2T_MSG_TYPE_RX_FULL_MONITOR_MODE);
1292
1293
cmd->info0 |= FIELD_PREP(HTT_RX_FULL_MON_MODE_CFG_CMD_INFO0_PDEV_ID, mac_id);
1294
1295
cmd->cfg = HTT_RX_FULL_MON_MODE_CFG_CMD_CFG_ENABLE |
1296
FIELD_PREP(HTT_RX_FULL_MON_MODE_CFG_CMD_CFG_RELEASE_RING,
1297
HTT_RX_MON_RING_SW);
1298
if (config) {
1299
cmd->cfg |= HTT_RX_FULL_MON_MODE_CFG_CMD_CFG_ZERO_MPDUS_END |
1300
HTT_RX_FULL_MON_MODE_CFG_CMD_CFG_NON_ZERO_MPDUS_END;
1301
}
1302
1303
ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb);
1304
if (ret)
1305
goto err_free;
1306
1307
return 0;
1308
1309
err_free:
1310
dev_kfree_skb_any(skb);
1311
1312
return ret;
1313
}
1314
1315