Path: blob/main/sys/contrib/dev/athk/ath11k/dp_tx.c
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// SPDX-License-Identifier: BSD-3-Clause-Clear1/*2* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.3* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.4*/56#include "core.h"7#include "dp_tx.h"8#include "debug.h"9#include "debugfs_sta.h"10#include "hw.h"11#include "peer.h"12#include "mac.h"1314static enum hal_tcl_encap_type15ath11k_dp_tx_get_encap_type(struct ath11k_vif *arvif, struct sk_buff *skb)16{17struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);18struct ath11k_base *ab = arvif->ar->ab;1920if (test_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags))21return HAL_TCL_ENCAP_TYPE_RAW;2223if (tx_info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP)24return HAL_TCL_ENCAP_TYPE_ETHERNET;2526return HAL_TCL_ENCAP_TYPE_NATIVE_WIFI;27}2829static void ath11k_dp_tx_encap_nwifi(struct sk_buff *skb)30{31struct ieee80211_hdr *hdr = (void *)skb->data;32u8 *qos_ctl;3334if (!ieee80211_is_data_qos(hdr->frame_control))35return;3637qos_ctl = ieee80211_get_qos_ctl(hdr);38memmove(skb->data + IEEE80211_QOS_CTL_LEN,39#if defined(__linux__)40skb->data, (void *)qos_ctl - (void *)skb->data);41#elif defined(__FreeBSD__)42skb->data, qos_ctl - (u8 *)skb->data);43#endif44skb_pull(skb, IEEE80211_QOS_CTL_LEN);4546hdr = (void *)skb->data;47hdr->frame_control &= ~__cpu_to_le16(IEEE80211_STYPE_QOS_DATA);48}4950static u8 ath11k_dp_tx_get_tid(struct sk_buff *skb)51{52struct ieee80211_hdr *hdr = (void *)skb->data;53struct ath11k_skb_cb *cb = ATH11K_SKB_CB(skb);5455if (cb->flags & ATH11K_SKB_HW_80211_ENCAP)56return skb->priority & IEEE80211_QOS_CTL_TID_MASK;57else if (!ieee80211_is_data_qos(hdr->frame_control))58return HAL_DESC_REO_NON_QOS_TID;59else60return skb->priority & IEEE80211_QOS_CTL_TID_MASK;61}6263enum hal_encrypt_type ath11k_dp_tx_get_encrypt_type(u32 cipher)64{65switch (cipher) {66case WLAN_CIPHER_SUITE_WEP40:67return HAL_ENCRYPT_TYPE_WEP_40;68case WLAN_CIPHER_SUITE_WEP104:69return HAL_ENCRYPT_TYPE_WEP_104;70case WLAN_CIPHER_SUITE_TKIP:71return HAL_ENCRYPT_TYPE_TKIP_MIC;72case WLAN_CIPHER_SUITE_CCMP:73return HAL_ENCRYPT_TYPE_CCMP_128;74case WLAN_CIPHER_SUITE_CCMP_256:75return HAL_ENCRYPT_TYPE_CCMP_256;76case WLAN_CIPHER_SUITE_GCMP:77return HAL_ENCRYPT_TYPE_GCMP_128;78case WLAN_CIPHER_SUITE_GCMP_256:79return HAL_ENCRYPT_TYPE_AES_GCMP_256;80default:81return HAL_ENCRYPT_TYPE_OPEN;82}83}8485int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif,86struct ath11k_sta *arsta, struct sk_buff *skb)87{88struct ath11k_base *ab = ar->ab;89struct ath11k_dp *dp = &ab->dp;90struct hal_tx_info ti = {0};91struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);92struct ath11k_skb_cb *skb_cb = ATH11K_SKB_CB(skb);93struct hal_srng *tcl_ring;94struct ieee80211_hdr *hdr = (void *)skb->data;95struct dp_tx_ring *tx_ring;96#if defined(__linux__)97void *hal_tcl_desc;98#elif defined(__FreeBSD__)99u8 *hal_tcl_desc;100#endif101u8 pool_id;102u8 hal_ring_id;103int ret;104u32 ring_selector = 0;105u8 ring_map = 0;106bool tcl_ring_retry;107108if (unlikely(test_bit(ATH11K_FLAG_CRASH_FLUSH, &ar->ab->dev_flags)))109return -ESHUTDOWN;110111if (unlikely(!(info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP) &&112!ieee80211_is_data(hdr->frame_control)))113return -ENOTSUPP;114115pool_id = skb_get_queue_mapping(skb) & (ATH11K_HW_MAX_QUEUES - 1);116117ring_selector = ab->hw_params.hw_ops->get_ring_selector(skb);118119tcl_ring_sel:120tcl_ring_retry = false;121122ti.ring_id = ring_selector % ab->hw_params.max_tx_ring;123ti.rbm_id = ab->hw_params.hal_params->tcl2wbm_rbm_map[ti.ring_id].rbm_id;124125ring_map |= BIT(ti.ring_id);126127tx_ring = &dp->tx_ring[ti.ring_id];128129spin_lock_bh(&tx_ring->tx_idr_lock);130ret = idr_alloc(&tx_ring->txbuf_idr, skb, 0,131DP_TX_IDR_SIZE - 1, GFP_ATOMIC);132spin_unlock_bh(&tx_ring->tx_idr_lock);133134if (unlikely(ret < 0)) {135if (ring_map == (BIT(ab->hw_params.max_tx_ring) - 1) ||136!ab->hw_params.tcl_ring_retry) {137atomic_inc(&ab->soc_stats.tx_err.misc_fail);138return -ENOSPC;139}140141/* Check if the next ring is available */142ring_selector++;143goto tcl_ring_sel;144}145146ti.desc_id = FIELD_PREP(DP_TX_DESC_ID_MAC_ID, ar->pdev_idx) |147FIELD_PREP(DP_TX_DESC_ID_MSDU_ID, ret) |148FIELD_PREP(DP_TX_DESC_ID_POOL_ID, pool_id);149ti.encap_type = ath11k_dp_tx_get_encap_type(arvif, skb);150151if (ieee80211_has_a4(hdr->frame_control) &&152is_multicast_ether_addr(hdr->addr3) && arsta &&153arsta->use_4addr_set) {154ti.meta_data_flags = arsta->tcl_metadata;155ti.flags0 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TO_FW, 1);156} else {157ti.meta_data_flags = arvif->tcl_metadata;158}159160if (unlikely(ti.encap_type == HAL_TCL_ENCAP_TYPE_RAW)) {161if (skb_cb->flags & ATH11K_SKB_CIPHER_SET) {162ti.encrypt_type =163ath11k_dp_tx_get_encrypt_type(skb_cb->cipher);164165if (ieee80211_has_protected(hdr->frame_control))166skb_put(skb, IEEE80211_CCMP_MIC_LEN);167} else {168ti.encrypt_type = HAL_ENCRYPT_TYPE_OPEN;169}170}171172ti.addr_search_flags = arvif->hal_addr_search_flags;173ti.search_type = arvif->search_type;174ti.type = HAL_TCL_DESC_TYPE_BUFFER;175ti.pkt_offset = 0;176ti.lmac_id = ar->lmac_id;177ti.bss_ast_hash = arvif->ast_hash;178ti.bss_ast_idx = arvif->ast_idx;179ti.dscp_tid_tbl_idx = 0;180181if (likely(skb->ip_summed == CHECKSUM_PARTIAL &&182ti.encap_type != HAL_TCL_ENCAP_TYPE_RAW)) {183ti.flags0 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_IP4_CKSUM_EN, 1) |184FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_UDP4_CKSUM_EN, 1) |185FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_UDP6_CKSUM_EN, 1) |186FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TCP4_CKSUM_EN, 1) |187FIELD_PREP(HAL_TCL_DATA_CMD_INFO1_TCP6_CKSUM_EN, 1);188}189190if (ieee80211_vif_is_mesh(arvif->vif))191ti.enable_mesh = true;192193ti.flags1 |= FIELD_PREP(HAL_TCL_DATA_CMD_INFO2_TID_OVERWRITE, 1);194195ti.tid = ath11k_dp_tx_get_tid(skb);196197switch (ti.encap_type) {198case HAL_TCL_ENCAP_TYPE_NATIVE_WIFI:199ath11k_dp_tx_encap_nwifi(skb);200break;201case HAL_TCL_ENCAP_TYPE_RAW:202if (!test_bit(ATH11K_FLAG_RAW_MODE, &ab->dev_flags)) {203ret = -EINVAL;204goto fail_remove_idr;205}206break;207case HAL_TCL_ENCAP_TYPE_ETHERNET:208/* no need to encap */209break;210case HAL_TCL_ENCAP_TYPE_802_3:211default:212/* TODO: Take care of other encap modes as well */213ret = -EINVAL;214atomic_inc(&ab->soc_stats.tx_err.misc_fail);215goto fail_remove_idr;216}217218ti.paddr = dma_map_single(ab->dev, skb->data, skb->len, DMA_TO_DEVICE);219if (unlikely(dma_mapping_error(ab->dev, ti.paddr))) {220atomic_inc(&ab->soc_stats.tx_err.misc_fail);221ath11k_warn(ab, "failed to DMA map data Tx buffer\n");222ret = -ENOMEM;223goto fail_remove_idr;224}225226ti.data_len = skb->len;227skb_cb->paddr = ti.paddr;228skb_cb->vif = arvif->vif;229skb_cb->ar = ar;230231hal_ring_id = tx_ring->tcl_data_ring.ring_id;232tcl_ring = &ab->hal.srng_list[hal_ring_id];233234spin_lock_bh(&tcl_ring->lock);235236ath11k_hal_srng_access_begin(ab, tcl_ring);237238hal_tcl_desc = (void *)ath11k_hal_srng_src_get_next_entry(ab, tcl_ring);239if (unlikely(!hal_tcl_desc)) {240/* NOTE: It is highly unlikely we'll be running out of tcl_ring241* desc because the desc is directly enqueued onto hw queue.242*/243ath11k_hal_srng_access_end(ab, tcl_ring);244ab->soc_stats.tx_err.desc_na[ti.ring_id]++;245spin_unlock_bh(&tcl_ring->lock);246ret = -ENOMEM;247248/* Checking for available tcl descritors in another ring in249* case of failure due to full tcl ring now, is better than250* checking this ring earlier for each pkt tx.251* Restart ring selection if some rings are not checked yet.252*/253if (unlikely(ring_map != (BIT(ab->hw_params.max_tx_ring)) - 1) &&254ab->hw_params.tcl_ring_retry && ab->hw_params.max_tx_ring > 1) {255tcl_ring_retry = true;256ring_selector++;257}258259goto fail_unmap_dma;260}261262ath11k_hal_tx_cmd_desc_setup(ab, hal_tcl_desc +263sizeof(struct hal_tlv_hdr), &ti);264265ath11k_hal_srng_access_end(ab, tcl_ring);266267ath11k_dp_shadow_start_timer(ab, tcl_ring, &dp->tx_ring_timer[ti.ring_id]);268269spin_unlock_bh(&tcl_ring->lock);270271ath11k_dbg_dump(ab, ATH11K_DBG_DP_TX, NULL, "dp tx msdu: ",272skb->data, skb->len);273274atomic_inc(&ar->dp.num_tx_pending);275276return 0;277278fail_unmap_dma:279dma_unmap_single(ab->dev, ti.paddr, ti.data_len, DMA_TO_DEVICE);280281fail_remove_idr:282spin_lock_bh(&tx_ring->tx_idr_lock);283idr_remove(&tx_ring->txbuf_idr,284FIELD_GET(DP_TX_DESC_ID_MSDU_ID, ti.desc_id));285spin_unlock_bh(&tx_ring->tx_idr_lock);286287if (tcl_ring_retry)288goto tcl_ring_sel;289290return ret;291}292293static void ath11k_dp_tx_free_txbuf(struct ath11k_base *ab, u8 mac_id,294int msdu_id,295struct dp_tx_ring *tx_ring)296{297struct ath11k *ar;298struct sk_buff *msdu;299struct ath11k_skb_cb *skb_cb;300301spin_lock(&tx_ring->tx_idr_lock);302msdu = idr_remove(&tx_ring->txbuf_idr, msdu_id);303spin_unlock(&tx_ring->tx_idr_lock);304305if (unlikely(!msdu)) {306ath11k_warn(ab, "tx completion for unknown msdu_id %d\n",307msdu_id);308return;309}310311skb_cb = ATH11K_SKB_CB(msdu);312313dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);314dev_kfree_skb_any(msdu);315316ar = ab->pdevs[mac_id].ar;317if (atomic_dec_and_test(&ar->dp.num_tx_pending))318wake_up(&ar->dp.tx_empty_waitq);319}320321static void322ath11k_dp_tx_htt_tx_complete_buf(struct ath11k_base *ab,323struct dp_tx_ring *tx_ring,324struct ath11k_dp_htt_wbm_tx_status *ts)325{326struct ieee80211_tx_status status = { 0 };327struct sk_buff *msdu;328struct ieee80211_tx_info *info;329struct ath11k_skb_cb *skb_cb;330struct ath11k *ar;331struct ath11k_peer *peer;332333spin_lock(&tx_ring->tx_idr_lock);334msdu = idr_remove(&tx_ring->txbuf_idr, ts->msdu_id);335spin_unlock(&tx_ring->tx_idr_lock);336337if (unlikely(!msdu)) {338ath11k_warn(ab, "htt tx completion for unknown msdu_id %d\n",339ts->msdu_id);340return;341}342343skb_cb = ATH11K_SKB_CB(msdu);344info = IEEE80211_SKB_CB(msdu);345346ar = skb_cb->ar;347348if (atomic_dec_and_test(&ar->dp.num_tx_pending))349wake_up(&ar->dp.tx_empty_waitq);350351dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);352353if (!skb_cb->vif) {354dev_kfree_skb_any(msdu);355return;356}357358memset(&info->status, 0, sizeof(info->status));359360if (ts->acked) {361if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {362info->flags |= IEEE80211_TX_STAT_ACK;363info->status.ack_signal = ATH11K_DEFAULT_NOISE_FLOOR +364ts->ack_rssi;365info->status.flags |=366IEEE80211_TX_STATUS_ACK_SIGNAL_VALID;367} else {368info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;369}370}371372spin_lock_bh(&ab->base_lock);373peer = ath11k_peer_find_by_id(ab, ts->peer_id);374if (!peer || !peer->sta) {375ath11k_dbg(ab, ATH11K_DBG_DATA,376"dp_tx: failed to find the peer with peer_id %d\n",377ts->peer_id);378spin_unlock_bh(&ab->base_lock);379dev_kfree_skb_any(msdu);380return;381}382spin_unlock_bh(&ab->base_lock);383384status.sta = peer->sta;385status.info = info;386status.skb = msdu;387388ieee80211_tx_status_ext(ar->hw, &status);389}390391static void392ath11k_dp_tx_process_htt_tx_complete(struct ath11k_base *ab,393#if defined(__linux__)394void *desc, u8 mac_id,395#elif defined(__FreeBSD__)396u8 *desc, u8 mac_id,397#endif398u32 msdu_id, struct dp_tx_ring *tx_ring)399{400struct htt_tx_wbm_completion *status_desc;401struct ath11k_dp_htt_wbm_tx_status ts = {0};402enum hal_wbm_htt_tx_comp_status wbm_status;403404#if defined(__linux__)405status_desc = desc + HTT_TX_WBM_COMP_STATUS_OFFSET;406#elif defined(__FreeBSD__)407status_desc = (void *)(desc + HTT_TX_WBM_COMP_STATUS_OFFSET);408#endif409410wbm_status = FIELD_GET(HTT_TX_WBM_COMP_INFO0_STATUS,411status_desc->info0);412switch (wbm_status) {413case HAL_WBM_REL_HTT_TX_COMP_STATUS_OK:414case HAL_WBM_REL_HTT_TX_COMP_STATUS_DROP:415case HAL_WBM_REL_HTT_TX_COMP_STATUS_TTL:416ts.acked = (wbm_status == HAL_WBM_REL_HTT_TX_COMP_STATUS_OK);417ts.msdu_id = msdu_id;418ts.ack_rssi = FIELD_GET(HTT_TX_WBM_COMP_INFO1_ACK_RSSI,419status_desc->info1);420421if (FIELD_GET(HTT_TX_WBM_COMP_INFO2_VALID, status_desc->info2))422ts.peer_id = FIELD_GET(HTT_TX_WBM_COMP_INFO2_SW_PEER_ID,423status_desc->info2);424else425ts.peer_id = HTT_INVALID_PEER_ID;426427ath11k_dp_tx_htt_tx_complete_buf(ab, tx_ring, &ts);428429break;430case HAL_WBM_REL_HTT_TX_COMP_STATUS_REINJ:431case HAL_WBM_REL_HTT_TX_COMP_STATUS_INSPECT:432ath11k_dp_tx_free_txbuf(ab, mac_id, msdu_id, tx_ring);433break;434case HAL_WBM_REL_HTT_TX_COMP_STATUS_MEC_NOTIFY:435/* This event is to be handled only when the driver decides to436* use WDS offload functionality.437*/438break;439default:440ath11k_warn(ab, "Unknown htt tx status %d\n", wbm_status);441break;442}443}444445static void ath11k_dp_tx_cache_peer_stats(struct ath11k *ar,446struct sk_buff *msdu,447struct hal_tx_status *ts)448{449struct ath11k_per_peer_tx_stats *peer_stats = &ar->cached_stats;450451if (ts->try_cnt > 1) {452peer_stats->retry_pkts += ts->try_cnt - 1;453peer_stats->retry_bytes += (ts->try_cnt - 1) * msdu->len;454455if (ts->status != HAL_WBM_TQM_REL_REASON_FRAME_ACKED) {456peer_stats->failed_pkts += 1;457peer_stats->failed_bytes += msdu->len;458}459}460}461462void ath11k_dp_tx_update_txcompl(struct ath11k *ar, struct hal_tx_status *ts)463{464struct ath11k_base *ab = ar->ab;465struct ath11k_per_peer_tx_stats *peer_stats = &ar->cached_stats;466enum hal_tx_rate_stats_pkt_type pkt_type;467enum hal_tx_rate_stats_sgi sgi;468enum hal_tx_rate_stats_bw bw;469struct ath11k_peer *peer;470struct ath11k_sta *arsta;471struct ieee80211_sta *sta;472u16 rate, ru_tones;473u8 mcs, rate_idx = 0, ofdma;474int ret;475476spin_lock_bh(&ab->base_lock);477peer = ath11k_peer_find_by_id(ab, ts->peer_id);478if (!peer || !peer->sta) {479ath11k_dbg(ab, ATH11K_DBG_DP_TX,480"failed to find the peer by id %u\n", ts->peer_id);481goto err_out;482}483484sta = peer->sta;485arsta = (struct ath11k_sta *)sta->drv_priv;486487memset(&arsta->txrate, 0, sizeof(arsta->txrate));488pkt_type = FIELD_GET(HAL_TX_RATE_STATS_INFO0_PKT_TYPE,489ts->rate_stats);490mcs = FIELD_GET(HAL_TX_RATE_STATS_INFO0_MCS,491ts->rate_stats);492sgi = FIELD_GET(HAL_TX_RATE_STATS_INFO0_SGI,493ts->rate_stats);494bw = FIELD_GET(HAL_TX_RATE_STATS_INFO0_BW, ts->rate_stats);495ru_tones = FIELD_GET(HAL_TX_RATE_STATS_INFO0_TONES_IN_RU, ts->rate_stats);496ofdma = FIELD_GET(HAL_TX_RATE_STATS_INFO0_OFDMA_TX, ts->rate_stats);497498/* This is to prefer choose the real NSS value arsta->last_txrate.nss,499* if it is invalid, then choose the NSS value while assoc.500*/501if (arsta->last_txrate.nss)502arsta->txrate.nss = arsta->last_txrate.nss;503else504arsta->txrate.nss = arsta->peer_nss;505506if (pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11A ||507pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11B) {508ret = ath11k_mac_hw_ratecode_to_legacy_rate(mcs,509pkt_type,510&rate_idx,511&rate);512if (ret < 0)513goto err_out;514arsta->txrate.legacy = rate;515} else if (pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11N) {516if (mcs > 7) {517ath11k_warn(ab, "Invalid HT mcs index %d\n", mcs);518goto err_out;519}520521if (arsta->txrate.nss != 0)522arsta->txrate.mcs = mcs + 8 * (arsta->txrate.nss - 1);523arsta->txrate.flags = RATE_INFO_FLAGS_MCS;524if (sgi)525arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;526} else if (pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11AC) {527if (mcs > 9) {528ath11k_warn(ab, "Invalid VHT mcs index %d\n", mcs);529goto err_out;530}531532arsta->txrate.mcs = mcs;533arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS;534if (sgi)535arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI;536} else if (pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11AX) {537if (mcs > 11) {538ath11k_warn(ab, "Invalid HE mcs index %d\n", mcs);539goto err_out;540}541542arsta->txrate.mcs = mcs;543arsta->txrate.flags = RATE_INFO_FLAGS_HE_MCS;544arsta->txrate.he_gi = ath11k_mac_he_gi_to_nl80211_he_gi(sgi);545}546547arsta->txrate.bw = ath11k_mac_bw_to_mac80211_bw(bw);548if (ofdma && pkt_type == HAL_TX_RATE_STATS_PKT_TYPE_11AX) {549arsta->txrate.bw = RATE_INFO_BW_HE_RU;550arsta->txrate.he_ru_alloc =551ath11k_mac_he_ru_tones_to_nl80211_he_ru_alloc(ru_tones);552}553554if (ath11k_debugfs_is_extd_tx_stats_enabled(ar))555ath11k_debugfs_sta_add_tx_stats(arsta, peer_stats, rate_idx);556557err_out:558spin_unlock_bh(&ab->base_lock);559}560561static void ath11k_dp_tx_complete_msdu(struct ath11k *ar,562struct sk_buff *msdu,563struct hal_tx_status *ts)564{565struct ieee80211_tx_status status = { 0 };566struct ieee80211_rate_status status_rate = { 0 };567struct ath11k_base *ab = ar->ab;568struct ieee80211_tx_info *info;569struct ath11k_skb_cb *skb_cb;570struct ath11k_peer *peer;571struct ath11k_sta *arsta;572struct rate_info rate;573574if (WARN_ON_ONCE(ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_TQM)) {575/* Must not happen */576return;577}578579skb_cb = ATH11K_SKB_CB(msdu);580581dma_unmap_single(ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);582583if (unlikely(!rcu_access_pointer(ab->pdevs_active[ar->pdev_idx]))) {584dev_kfree_skb_any(msdu);585return;586}587588if (unlikely(!skb_cb->vif)) {589dev_kfree_skb_any(msdu);590return;591}592593info = IEEE80211_SKB_CB(msdu);594memset(&info->status, 0, sizeof(info->status));595596/* skip tx rate update from ieee80211_status*/597info->status.rates[0].idx = -1;598599if (ts->status == HAL_WBM_TQM_REL_REASON_FRAME_ACKED &&600!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {601info->flags |= IEEE80211_TX_STAT_ACK;602info->status.ack_signal = ATH11K_DEFAULT_NOISE_FLOOR +603ts->ack_rssi;604info->status.flags |= IEEE80211_TX_STATUS_ACK_SIGNAL_VALID;605}606607if (ts->status == HAL_WBM_TQM_REL_REASON_CMD_REMOVE_TX &&608(info->flags & IEEE80211_TX_CTL_NO_ACK))609info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;610611if (unlikely(ath11k_debugfs_is_extd_tx_stats_enabled(ar)) ||612ab->hw_params.single_pdev_only) {613if (ts->flags & HAL_TX_STATUS_FLAGS_FIRST_MSDU) {614if (ar->last_ppdu_id == 0) {615ar->last_ppdu_id = ts->ppdu_id;616} else if (ar->last_ppdu_id == ts->ppdu_id ||617ar->cached_ppdu_id == ar->last_ppdu_id) {618ar->cached_ppdu_id = ar->last_ppdu_id;619ar->cached_stats.is_ampdu = true;620ath11k_dp_tx_update_txcompl(ar, ts);621memset(&ar->cached_stats, 0,622sizeof(struct ath11k_per_peer_tx_stats));623} else {624ar->cached_stats.is_ampdu = false;625ath11k_dp_tx_update_txcompl(ar, ts);626memset(&ar->cached_stats, 0,627sizeof(struct ath11k_per_peer_tx_stats));628}629ar->last_ppdu_id = ts->ppdu_id;630}631632ath11k_dp_tx_cache_peer_stats(ar, msdu, ts);633}634635spin_lock_bh(&ab->base_lock);636peer = ath11k_peer_find_by_id(ab, ts->peer_id);637if (!peer || !peer->sta) {638ath11k_dbg(ab, ATH11K_DBG_DATA,639"dp_tx: failed to find the peer with peer_id %d\n",640ts->peer_id);641spin_unlock_bh(&ab->base_lock);642dev_kfree_skb_any(msdu);643return;644}645arsta = (struct ath11k_sta *)peer->sta->drv_priv;646status.sta = peer->sta;647status.skb = msdu;648status.info = info;649rate = arsta->last_txrate;650651status_rate.rate_idx = rate;652status_rate.try_count = 1;653654status.rates = &status_rate;655status.n_rates = 1;656657spin_unlock_bh(&ab->base_lock);658659ieee80211_tx_status_ext(ar->hw, &status);660}661662static inline void ath11k_dp_tx_status_parse(struct ath11k_base *ab,663struct hal_wbm_release_ring *desc,664struct hal_tx_status *ts)665{666ts->buf_rel_source =667FIELD_GET(HAL_WBM_RELEASE_INFO0_REL_SRC_MODULE, desc->info0);668if (unlikely(ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_FW &&669ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_TQM))670return;671672if (unlikely(ts->buf_rel_source == HAL_WBM_REL_SRC_MODULE_FW))673return;674675ts->status = FIELD_GET(HAL_WBM_RELEASE_INFO0_TQM_RELEASE_REASON,676desc->info0);677ts->ppdu_id = FIELD_GET(HAL_WBM_RELEASE_INFO1_TQM_STATUS_NUMBER,678desc->info1);679ts->try_cnt = FIELD_GET(HAL_WBM_RELEASE_INFO1_TRANSMIT_COUNT,680desc->info1);681ts->ack_rssi = FIELD_GET(HAL_WBM_RELEASE_INFO2_ACK_FRAME_RSSI,682desc->info2);683if (desc->info2 & HAL_WBM_RELEASE_INFO2_FIRST_MSDU)684ts->flags |= HAL_TX_STATUS_FLAGS_FIRST_MSDU;685ts->peer_id = FIELD_GET(HAL_WBM_RELEASE_INFO3_PEER_ID, desc->info3);686ts->tid = FIELD_GET(HAL_WBM_RELEASE_INFO3_TID, desc->info3);687if (desc->rate_stats.info0 & HAL_TX_RATE_STATS_INFO0_VALID)688ts->rate_stats = desc->rate_stats.info0;689else690ts->rate_stats = 0;691}692693void ath11k_dp_tx_completion_handler(struct ath11k_base *ab, int ring_id)694{695struct ath11k *ar;696struct ath11k_dp *dp = &ab->dp;697int hal_ring_id = dp->tx_ring[ring_id].tcl_comp_ring.ring_id;698struct hal_srng *status_ring = &ab->hal.srng_list[hal_ring_id];699struct sk_buff *msdu;700struct hal_tx_status ts = { 0 };701struct dp_tx_ring *tx_ring = &dp->tx_ring[ring_id];702u32 *desc;703u32 msdu_id;704u8 mac_id;705706spin_lock_bh(&status_ring->lock);707708ath11k_hal_srng_access_begin(ab, status_ring);709710while ((ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head) !=711tx_ring->tx_status_tail) &&712(desc = ath11k_hal_srng_dst_get_next_entry(ab, status_ring))) {713memcpy(&tx_ring->tx_status[tx_ring->tx_status_head],714desc, sizeof(struct hal_wbm_release_ring));715tx_ring->tx_status_head =716ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head);717}718719if (unlikely((ath11k_hal_srng_dst_peek(ab, status_ring) != NULL) &&720(ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_head) ==721tx_ring->tx_status_tail))) {722/* TODO: Process pending tx_status messages when kfifo_is_full() */723ath11k_warn(ab, "Unable to process some of the tx_status ring desc because status_fifo is full\n");724}725726ath11k_hal_srng_access_end(ab, status_ring);727728spin_unlock_bh(&status_ring->lock);729730while (ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_tail) != tx_ring->tx_status_head) {731struct hal_wbm_release_ring *tx_status;732u32 desc_id;733734tx_ring->tx_status_tail =735ATH11K_TX_COMPL_NEXT(tx_ring->tx_status_tail);736tx_status = &tx_ring->tx_status[tx_ring->tx_status_tail];737ath11k_dp_tx_status_parse(ab, tx_status, &ts);738739desc_id = FIELD_GET(BUFFER_ADDR_INFO1_SW_COOKIE,740tx_status->buf_addr_info.info1);741mac_id = FIELD_GET(DP_TX_DESC_ID_MAC_ID, desc_id);742msdu_id = FIELD_GET(DP_TX_DESC_ID_MSDU_ID, desc_id);743744if (unlikely(ts.buf_rel_source == HAL_WBM_REL_SRC_MODULE_FW)) {745ath11k_dp_tx_process_htt_tx_complete(ab,746(void *)tx_status,747mac_id, msdu_id,748tx_ring);749continue;750}751752spin_lock(&tx_ring->tx_idr_lock);753msdu = idr_remove(&tx_ring->txbuf_idr, msdu_id);754if (unlikely(!msdu)) {755ath11k_warn(ab, "tx completion for unknown msdu_id %d\n",756msdu_id);757spin_unlock(&tx_ring->tx_idr_lock);758continue;759}760761spin_unlock(&tx_ring->tx_idr_lock);762763ar = ab->pdevs[mac_id].ar;764765if (atomic_dec_and_test(&ar->dp.num_tx_pending))766wake_up(&ar->dp.tx_empty_waitq);767768ath11k_dp_tx_complete_msdu(ar, msdu, &ts);769}770}771772int ath11k_dp_tx_send_reo_cmd(struct ath11k_base *ab, struct dp_rx_tid *rx_tid,773enum hal_reo_cmd_type type,774struct ath11k_hal_reo_cmd *cmd,775void (*cb)(struct ath11k_dp *, void *,776enum hal_reo_cmd_status))777{778struct ath11k_dp *dp = &ab->dp;779struct dp_reo_cmd *dp_cmd;780struct hal_srng *cmd_ring;781int cmd_num;782783if (test_bit(ATH11K_FLAG_CRASH_FLUSH, &ab->dev_flags))784return -ESHUTDOWN;785786cmd_ring = &ab->hal.srng_list[dp->reo_cmd_ring.ring_id];787cmd_num = ath11k_hal_reo_cmd_send(ab, cmd_ring, type, cmd);788789/* cmd_num should start from 1, during failure return the error code */790if (cmd_num < 0)791return cmd_num;792793/* reo cmd ring descriptors has cmd_num starting from 1 */794if (cmd_num == 0)795return -EINVAL;796797if (!cb)798return 0;799800/* Can this be optimized so that we keep the pending command list only801* for tid delete command to free up the resource on the command status802* indication?803*/804dp_cmd = kzalloc(sizeof(*dp_cmd), GFP_ATOMIC);805806if (!dp_cmd)807return -ENOMEM;808809memcpy(&dp_cmd->data, rx_tid, sizeof(struct dp_rx_tid));810dp_cmd->cmd_num = cmd_num;811dp_cmd->handler = cb;812813spin_lock_bh(&dp->reo_cmd_lock);814list_add_tail(&dp_cmd->list, &dp->reo_cmd_list);815spin_unlock_bh(&dp->reo_cmd_lock);816817return 0;818}819820static int821ath11k_dp_tx_get_ring_id_type(struct ath11k_base *ab,822int mac_id, u32 ring_id,823enum hal_ring_type ring_type,824enum htt_srng_ring_type *htt_ring_type,825enum htt_srng_ring_id *htt_ring_id)826{827int lmac_ring_id_offset = 0;828int ret = 0;829830switch (ring_type) {831case HAL_RXDMA_BUF:832lmac_ring_id_offset = mac_id * HAL_SRNG_RINGS_PER_LMAC;833834/* for QCA6390, host fills rx buffer to fw and fw fills to835* rxbuf ring for each rxdma836*/837if (!ab->hw_params.rx_mac_buf_ring) {838if (!(ring_id == (HAL_SRNG_RING_ID_WMAC1_SW2RXDMA0_BUF +839lmac_ring_id_offset) ||840ring_id == (HAL_SRNG_RING_ID_WMAC1_SW2RXDMA1_BUF +841lmac_ring_id_offset))) {842ret = -EINVAL;843}844*htt_ring_id = HTT_RXDMA_HOST_BUF_RING;845*htt_ring_type = HTT_SW_TO_HW_RING;846} else {847if (ring_id == HAL_SRNG_RING_ID_WMAC1_SW2RXDMA0_BUF) {848*htt_ring_id = HTT_HOST1_TO_FW_RXBUF_RING;849*htt_ring_type = HTT_SW_TO_SW_RING;850} else {851*htt_ring_id = HTT_RXDMA_HOST_BUF_RING;852*htt_ring_type = HTT_SW_TO_HW_RING;853}854}855break;856case HAL_RXDMA_DST:857*htt_ring_id = HTT_RXDMA_NON_MONITOR_DEST_RING;858*htt_ring_type = HTT_HW_TO_SW_RING;859break;860case HAL_RXDMA_MONITOR_BUF:861*htt_ring_id = HTT_RXDMA_MONITOR_BUF_RING;862*htt_ring_type = HTT_SW_TO_HW_RING;863break;864case HAL_RXDMA_MONITOR_STATUS:865*htt_ring_id = HTT_RXDMA_MONITOR_STATUS_RING;866*htt_ring_type = HTT_SW_TO_HW_RING;867break;868case HAL_RXDMA_MONITOR_DST:869*htt_ring_id = HTT_RXDMA_MONITOR_DEST_RING;870*htt_ring_type = HTT_HW_TO_SW_RING;871break;872case HAL_RXDMA_MONITOR_DESC:873*htt_ring_id = HTT_RXDMA_MONITOR_DESC_RING;874*htt_ring_type = HTT_SW_TO_HW_RING;875break;876default:877ath11k_warn(ab, "Unsupported ring type in DP :%d\n", ring_type);878ret = -EINVAL;879}880return ret;881}882883int ath11k_dp_tx_htt_srng_setup(struct ath11k_base *ab, u32 ring_id,884int mac_id, enum hal_ring_type ring_type)885{886struct htt_srng_setup_cmd *cmd;887struct hal_srng *srng = &ab->hal.srng_list[ring_id];888struct hal_srng_params params;889struct sk_buff *skb;890u32 ring_entry_sz;891int len = sizeof(*cmd);892dma_addr_t hp_addr, tp_addr;893enum htt_srng_ring_type htt_ring_type;894enum htt_srng_ring_id htt_ring_id;895int ret;896897skb = ath11k_htc_alloc_skb(ab, len);898if (!skb)899return -ENOMEM;900901memset(¶ms, 0, sizeof(params));902ath11k_hal_srng_get_params(ab, srng, ¶ms);903904hp_addr = ath11k_hal_srng_get_hp_addr(ab, srng);905tp_addr = ath11k_hal_srng_get_tp_addr(ab, srng);906907ret = ath11k_dp_tx_get_ring_id_type(ab, mac_id, ring_id,908ring_type, &htt_ring_type,909&htt_ring_id);910if (ret)911goto err_free;912913skb_put(skb, len);914cmd = (struct htt_srng_setup_cmd *)skb->data;915cmd->info0 = FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_MSG_TYPE,916HTT_H2T_MSG_TYPE_SRING_SETUP);917if (htt_ring_type == HTT_SW_TO_HW_RING ||918htt_ring_type == HTT_HW_TO_SW_RING)919cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_PDEV_ID,920DP_SW2HW_MACID(mac_id));921else922cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_PDEV_ID,923mac_id);924cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_RING_TYPE,925htt_ring_type);926cmd->info0 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO0_RING_ID, htt_ring_id);927928cmd->ring_base_addr_lo = params.ring_base_paddr &929HAL_ADDR_LSB_REG_MASK;930931cmd->ring_base_addr_hi = (u64)params.ring_base_paddr >>932HAL_ADDR_MSB_REG_SHIFT;933934ret = ath11k_hal_srng_get_entrysize(ab, ring_type);935if (ret < 0)936goto err_free;937938ring_entry_sz = ret;939940ring_entry_sz >>= 2;941cmd->info1 = FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_ENTRY_SIZE,942ring_entry_sz);943cmd->info1 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_SIZE,944params.num_entries * ring_entry_sz);945cmd->info1 |= FIELD_PREP(HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_MSI_SWAP,946!!(params.flags & HAL_SRNG_FLAGS_MSI_SWAP));947cmd->info1 |= FIELD_PREP(948HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_TLV_SWAP,949!!(params.flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP));950cmd->info1 |= FIELD_PREP(951HTT_SRNG_SETUP_CMD_INFO1_RING_FLAGS_HOST_FW_SWAP,952!!(params.flags & HAL_SRNG_FLAGS_RING_PTR_SWAP));953if (htt_ring_type == HTT_SW_TO_HW_RING)954cmd->info1 |= HTT_SRNG_SETUP_CMD_INFO1_RING_LOOP_CNT_DIS;955956cmd->ring_head_off32_remote_addr_lo = hp_addr & HAL_ADDR_LSB_REG_MASK;957cmd->ring_head_off32_remote_addr_hi = (u64)hp_addr >>958HAL_ADDR_MSB_REG_SHIFT;959960cmd->ring_tail_off32_remote_addr_lo = tp_addr & HAL_ADDR_LSB_REG_MASK;961cmd->ring_tail_off32_remote_addr_hi = (u64)tp_addr >>962HAL_ADDR_MSB_REG_SHIFT;963964cmd->ring_msi_addr_lo = lower_32_bits(params.msi_addr);965cmd->ring_msi_addr_hi = upper_32_bits(params.msi_addr);966cmd->msi_data = params.msi_data;967968cmd->intr_info = FIELD_PREP(969HTT_SRNG_SETUP_CMD_INTR_INFO_BATCH_COUNTER_THRESH,970params.intr_batch_cntr_thres_entries * ring_entry_sz);971cmd->intr_info |= FIELD_PREP(972HTT_SRNG_SETUP_CMD_INTR_INFO_INTR_TIMER_THRESH,973params.intr_timer_thres_us >> 3);974975cmd->info2 = 0;976if (params.flags & HAL_SRNG_FLAGS_LOW_THRESH_INTR_EN) {977cmd->info2 = FIELD_PREP(978HTT_SRNG_SETUP_CMD_INFO2_INTR_LOW_THRESH,979params.low_threshold);980}981982ath11k_dbg(ab, ATH11K_DBG_DP_TX,983"htt srng setup msi_addr_lo 0x%x msi_addr_hi 0x%x msi_data 0x%x ring_id %d ring_type %d intr_info 0x%x flags 0x%x\n",984cmd->ring_msi_addr_lo, cmd->ring_msi_addr_hi,985cmd->msi_data, ring_id, ring_type, cmd->intr_info, cmd->info2);986987ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb);988if (ret)989goto err_free;990991return 0;992993err_free:994dev_kfree_skb_any(skb);995996return ret;997}998999#define HTT_TARGET_VERSION_TIMEOUT_HZ (3 * HZ)10001001int ath11k_dp_tx_htt_h2t_ver_req_msg(struct ath11k_base *ab)1002{1003struct ath11k_dp *dp = &ab->dp;1004struct sk_buff *skb;1005struct htt_ver_req_cmd *cmd;1006int len = sizeof(*cmd);1007int ret;10081009init_completion(&dp->htt_tgt_version_received);10101011skb = ath11k_htc_alloc_skb(ab, len);1012if (!skb)1013return -ENOMEM;10141015skb_put(skb, len);1016cmd = (struct htt_ver_req_cmd *)skb->data;1017cmd->ver_reg_info = FIELD_PREP(HTT_VER_REQ_INFO_MSG_ID,1018HTT_H2T_MSG_TYPE_VERSION_REQ);10191020ret = ath11k_htc_send(&ab->htc, dp->eid, skb);1021if (ret) {1022dev_kfree_skb_any(skb);1023return ret;1024}10251026ret = wait_for_completion_timeout(&dp->htt_tgt_version_received,1027HTT_TARGET_VERSION_TIMEOUT_HZ);1028if (ret == 0) {1029ath11k_warn(ab, "htt target version request timed out\n");1030return -ETIMEDOUT;1031}10321033if (dp->htt_tgt_ver_major != HTT_TARGET_VERSION_MAJOR) {1034ath11k_err(ab, "unsupported htt major version %d supported version is %d\n",1035dp->htt_tgt_ver_major, HTT_TARGET_VERSION_MAJOR);1036return -ENOTSUPP;1037}10381039return 0;1040}10411042int ath11k_dp_tx_htt_h2t_ppdu_stats_req(struct ath11k *ar, u32 mask)1043{1044struct ath11k_base *ab = ar->ab;1045struct ath11k_dp *dp = &ab->dp;1046struct sk_buff *skb;1047struct htt_ppdu_stats_cfg_cmd *cmd;1048int len = sizeof(*cmd);1049u8 pdev_mask;1050int ret;1051int i;10521053for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {1054skb = ath11k_htc_alloc_skb(ab, len);1055if (!skb)1056return -ENOMEM;10571058skb_put(skb, len);1059cmd = (struct htt_ppdu_stats_cfg_cmd *)skb->data;1060cmd->msg = FIELD_PREP(HTT_PPDU_STATS_CFG_MSG_TYPE,1061HTT_H2T_MSG_TYPE_PPDU_STATS_CFG);10621063pdev_mask = 1 << (ar->pdev_idx + i);1064cmd->msg |= FIELD_PREP(HTT_PPDU_STATS_CFG_PDEV_ID, pdev_mask);1065cmd->msg |= FIELD_PREP(HTT_PPDU_STATS_CFG_TLV_TYPE_BITMASK, mask);10661067ret = ath11k_htc_send(&ab->htc, dp->eid, skb);1068if (ret) {1069dev_kfree_skb_any(skb);1070return ret;1071}1072}10731074return 0;1075}10761077int ath11k_dp_tx_htt_rx_filter_setup(struct ath11k_base *ab, u32 ring_id,1078int mac_id, enum hal_ring_type ring_type,1079int rx_buf_size,1080struct htt_rx_ring_tlv_filter *tlv_filter)1081{1082struct htt_rx_ring_selection_cfg_cmd *cmd;1083struct hal_srng *srng = &ab->hal.srng_list[ring_id];1084struct hal_srng_params params;1085struct sk_buff *skb;1086int len = sizeof(*cmd);1087enum htt_srng_ring_type htt_ring_type;1088enum htt_srng_ring_id htt_ring_id;1089int ret;10901091skb = ath11k_htc_alloc_skb(ab, len);1092if (!skb)1093return -ENOMEM;10941095memset(¶ms, 0, sizeof(params));1096ath11k_hal_srng_get_params(ab, srng, ¶ms);10971098ret = ath11k_dp_tx_get_ring_id_type(ab, mac_id, ring_id,1099ring_type, &htt_ring_type,1100&htt_ring_id);1101if (ret)1102goto err_free;11031104skb_put(skb, len);1105cmd = (struct htt_rx_ring_selection_cfg_cmd *)skb->data;1106cmd->info0 = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_MSG_TYPE,1107HTT_H2T_MSG_TYPE_RX_RING_SELECTION_CFG);1108if (htt_ring_type == HTT_SW_TO_HW_RING ||1109htt_ring_type == HTT_HW_TO_SW_RING)1110cmd->info0 |=1111FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PDEV_ID,1112DP_SW2HW_MACID(mac_id));1113else1114cmd->info0 |=1115FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PDEV_ID,1116mac_id);1117cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_RING_ID,1118htt_ring_id);1119cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_SS,1120!!(params.flags & HAL_SRNG_FLAGS_MSI_SWAP));1121cmd->info0 |= FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO0_PS,1122!!(params.flags & HAL_SRNG_FLAGS_DATA_TLV_SWAP));11231124cmd->info1 = FIELD_PREP(HTT_RX_RING_SELECTION_CFG_CMD_INFO1_BUF_SIZE,1125rx_buf_size);1126cmd->pkt_type_en_flags0 = tlv_filter->pkt_filter_flags0;1127cmd->pkt_type_en_flags1 = tlv_filter->pkt_filter_flags1;1128cmd->pkt_type_en_flags2 = tlv_filter->pkt_filter_flags2;1129cmd->pkt_type_en_flags3 = tlv_filter->pkt_filter_flags3;1130cmd->rx_filter_tlv = tlv_filter->rx_filter;11311132ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb);1133if (ret)1134goto err_free;11351136return 0;11371138err_free:1139dev_kfree_skb_any(skb);11401141return ret;1142}11431144int1145ath11k_dp_tx_htt_h2t_ext_stats_req(struct ath11k *ar, u8 type,1146struct htt_ext_stats_cfg_params *cfg_params,1147u64 cookie)1148{1149struct ath11k_base *ab = ar->ab;1150struct ath11k_dp *dp = &ab->dp;1151struct sk_buff *skb;1152struct htt_ext_stats_cfg_cmd *cmd;1153u32 pdev_id;1154int len = sizeof(*cmd);1155int ret;11561157skb = ath11k_htc_alloc_skb(ab, len);1158if (!skb)1159return -ENOMEM;11601161skb_put(skb, len);11621163cmd = (struct htt_ext_stats_cfg_cmd *)skb->data;1164memset(cmd, 0, sizeof(*cmd));1165cmd->hdr.msg_type = HTT_H2T_MSG_TYPE_EXT_STATS_CFG;11661167if (ab->hw_params.single_pdev_only)1168pdev_id = ath11k_mac_get_target_pdev_id(ar);1169else1170pdev_id = ar->pdev->pdev_id;11711172cmd->hdr.pdev_mask = 1 << pdev_id;11731174cmd->hdr.stats_type = type;1175cmd->cfg_param0 = cfg_params->cfg0;1176cmd->cfg_param1 = cfg_params->cfg1;1177cmd->cfg_param2 = cfg_params->cfg2;1178cmd->cfg_param3 = cfg_params->cfg3;1179cmd->cookie_lsb = lower_32_bits(cookie);1180cmd->cookie_msb = upper_32_bits(cookie);11811182ret = ath11k_htc_send(&ab->htc, dp->eid, skb);1183if (ret) {1184ath11k_warn(ab, "failed to send htt type stats request: %d",1185ret);1186dev_kfree_skb_any(skb);1187return ret;1188}11891190return 0;1191}11921193int ath11k_dp_tx_htt_monitor_mode_ring_config(struct ath11k *ar, bool reset)1194{1195struct ath11k_pdev_dp *dp = &ar->dp;1196struct ath11k_base *ab = ar->ab;1197struct htt_rx_ring_tlv_filter tlv_filter = {0};1198int ret = 0, ring_id = 0, i;11991200if (ab->hw_params.full_monitor_mode) {1201ret = ath11k_dp_tx_htt_rx_full_mon_setup(ab,1202dp->mac_id, !reset);1203if (ret < 0) {1204ath11k_err(ab, "failed to setup full monitor %d\n", ret);1205return ret;1206}1207}12081209ring_id = dp->rxdma_mon_buf_ring.refill_buf_ring.ring_id;12101211if (!reset) {1212tlv_filter.rx_filter = HTT_RX_MON_FILTER_TLV_FLAGS_MON_BUF_RING;1213tlv_filter.pkt_filter_flags0 =1214HTT_RX_MON_FP_MGMT_FILTER_FLAGS0 |1215HTT_RX_MON_MO_MGMT_FILTER_FLAGS0;1216tlv_filter.pkt_filter_flags1 =1217HTT_RX_MON_FP_MGMT_FILTER_FLAGS1 |1218HTT_RX_MON_MO_MGMT_FILTER_FLAGS1;1219tlv_filter.pkt_filter_flags2 =1220HTT_RX_MON_FP_CTRL_FILTER_FLASG2 |1221HTT_RX_MON_MO_CTRL_FILTER_FLASG2;1222tlv_filter.pkt_filter_flags3 =1223HTT_RX_MON_FP_CTRL_FILTER_FLASG3 |1224HTT_RX_MON_MO_CTRL_FILTER_FLASG3 |1225HTT_RX_MON_FP_DATA_FILTER_FLASG3 |1226HTT_RX_MON_MO_DATA_FILTER_FLASG3;1227}12281229if (ab->hw_params.rxdma1_enable) {1230ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id, dp->mac_id,1231HAL_RXDMA_MONITOR_BUF,1232DP_RXDMA_REFILL_RING_SIZE,1233&tlv_filter);1234} else if (!reset) {1235/* set in monitor mode only */1236for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {1237ring_id = dp->rx_mac_buf_ring[i].ring_id;1238ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id,1239dp->mac_id + i,1240HAL_RXDMA_BUF,12411024,1242&tlv_filter);1243}1244}12451246if (ret)1247return ret;12481249for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {1250ring_id = dp->rx_mon_status_refill_ring[i].refill_buf_ring.ring_id;1251if (!reset) {1252tlv_filter.rx_filter =1253HTT_RX_MON_FILTER_TLV_FLAGS_MON_STATUS_RING;1254} else {1255tlv_filter = ath11k_mac_mon_status_filter_default;12561257if (ath11k_debugfs_is_extd_rx_stats_enabled(ar))1258tlv_filter.rx_filter = ath11k_debugfs_rx_filter(ar);1259}12601261ret = ath11k_dp_tx_htt_rx_filter_setup(ab, ring_id,1262dp->mac_id + i,1263HAL_RXDMA_MONITOR_STATUS,1264DP_RXDMA_REFILL_RING_SIZE,1265&tlv_filter);1266}12671268if (!ar->ab->hw_params.rxdma1_enable)1269mod_timer(&ar->ab->mon_reap_timer, jiffies +1270msecs_to_jiffies(ATH11K_MON_TIMER_INTERVAL));12711272return ret;1273}12741275int ath11k_dp_tx_htt_rx_full_mon_setup(struct ath11k_base *ab, int mac_id,1276bool config)1277{1278struct htt_rx_full_monitor_mode_cfg_cmd *cmd;1279struct sk_buff *skb;1280int ret, len = sizeof(*cmd);12811282skb = ath11k_htc_alloc_skb(ab, len);1283if (!skb)1284return -ENOMEM;12851286skb_put(skb, len);1287cmd = (struct htt_rx_full_monitor_mode_cfg_cmd *)skb->data;1288memset(cmd, 0, sizeof(*cmd));1289cmd->info0 = FIELD_PREP(HTT_RX_FULL_MON_MODE_CFG_CMD_INFO0_MSG_TYPE,1290HTT_H2T_MSG_TYPE_RX_FULL_MONITOR_MODE);12911292cmd->info0 |= FIELD_PREP(HTT_RX_FULL_MON_MODE_CFG_CMD_INFO0_PDEV_ID, mac_id);12931294cmd->cfg = HTT_RX_FULL_MON_MODE_CFG_CMD_CFG_ENABLE |1295FIELD_PREP(HTT_RX_FULL_MON_MODE_CFG_CMD_CFG_RELEASE_RING,1296HTT_RX_MON_RING_SW);1297if (config) {1298cmd->cfg |= HTT_RX_FULL_MON_MODE_CFG_CMD_CFG_ZERO_MPDUS_END |1299HTT_RX_FULL_MON_MODE_CFG_CMD_CFG_NON_ZERO_MPDUS_END;1300}13011302ret = ath11k_htc_send(&ab->htc, ab->dp.eid, skb);1303if (ret)1304goto err_free;13051306return 0;13071308err_free:1309dev_kfree_skb_any(skb);13101311return ret;1312}131313141315