Path: blob/main/sys/contrib/dev/athk/ath11k/pcic.h
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/* SPDX-License-Identifier: BSD-3-Clause-Clear */1/*2* Copyright (c) 2019-2021 The Linux Foundation. All rights reserved.3* Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved.4*/56#ifndef _ATH11K_PCI_CMN_H7#define _ATH11K_PCI_CMN_H89#include "core.h"1011#define ATH11K_PCI_IRQ_CE0_OFFSET 312#define ATH11K_PCI_IRQ_DP_OFFSET 141314#define ATH11K_PCI_CE_WAKE_IRQ 21516#define ATH11K_PCI_WINDOW_ENABLE_BIT 0x4000000017#define ATH11K_PCI_WINDOW_REG_ADDRESS 0x310c18#define ATH11K_PCI_WINDOW_VALUE_MASK GENMASK(24, 19)19#define ATH11K_PCI_WINDOW_START 0x8000020#define ATH11K_PCI_WINDOW_RANGE_MASK GENMASK(18, 0)2122/* BAR0 + 4k is always accessible, and no23* need to force wakeup.24* 4K - 32 = 0xFE025*/26#define ATH11K_PCI_ACCESS_ALWAYS_OFF 0xFE02728int ath11k_pcic_get_user_msi_assignment(struct ath11k_base *ab, char *user_name,29int *num_vectors, u32 *user_base_data,30u32 *base_vector);31void ath11k_pcic_write32(struct ath11k_base *ab, u32 offset, u32 value);32u32 ath11k_pcic_read32(struct ath11k_base *ab, u32 offset);33void ath11k_pcic_get_msi_address(struct ath11k_base *ab, u32 *msi_addr_lo,34u32 *msi_addr_hi);35void ath11k_pcic_get_ce_msi_idx(struct ath11k_base *ab, u32 ce_id, u32 *msi_idx);36void ath11k_pcic_free_irq(struct ath11k_base *ab);37int ath11k_pcic_config_irq(struct ath11k_base *ab);38void ath11k_pcic_ext_irq_enable(struct ath11k_base *ab);39void ath11k_pcic_ext_irq_disable(struct ath11k_base *ab);40void ath11k_pcic_stop(struct ath11k_base *ab);41int ath11k_pcic_start(struct ath11k_base *ab);42int ath11k_pcic_map_service_to_pipe(struct ath11k_base *ab, u16 service_id,43u8 *ul_pipe, u8 *dl_pipe);44void ath11k_pcic_ce_irqs_enable(struct ath11k_base *ab);45void ath11k_pcic_ce_irq_disable_sync(struct ath11k_base *ab);46int ath11k_pcic_init_msi_config(struct ath11k_base *ab);47int ath11k_pcic_register_pci_ops(struct ath11k_base *ab,48const struct ath11k_pci_ops *pci_ops);49int ath11k_pcic_read(struct ath11k_base *ab, void *buf, u32 start, u32 end);50void ath11k_pci_enable_ce_irqs_except_wake_irq(struct ath11k_base *ab);51void ath11k_pci_disable_ce_irqs_except_wake_irq(struct ath11k_base *ab);5253#endif545556