/*1* Copyright (c) 2009 Atheros Communications Inc.2*3* Permission to use, copy, modify, and/or distribute this software for any4* purpose with or without fee is hereby granted, provided that the above5* copyright notice and this permission notice appear in all copies.6*7* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES8* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF9* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR10* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES11* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN12* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF13* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.14*/1516#include <linux/export.h>17#include <asm/unaligned.h>1819#include "ath.h"20#include "reg.h"2122#define REG_READ (common->ops->read)23#define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg)2425/**26* ath_hw_setbssidmask - filter out bssids we listen27*28* @common: the ath_common struct for the device.29*30* BSSID masking is a method used by AR5212 and newer hardware to inform PCU31* which bits of the interface's MAC address should be looked at when trying32* to decide which packets to ACK. In station mode and AP mode with a single33* BSS every bit matters since we lock to only one BSS. In AP mode with34* multiple BSSes (virtual interfaces) not every bit matters because hw must35* accept frames for all BSSes and so we tweak some bits of our mac address36* in order to have multiple BSSes.37*38* NOTE: This is a simple filter and does *not* filter out all39* relevant frames. Some frames that are not for us might get ACKed from us40* by PCU because they just match the mask.41*42* When handling multiple BSSes you can get the BSSID mask by computing the43* set of ~ ( MAC XOR BSSID ) for all bssids we handle.44*45* When you do this you are essentially computing the common bits of all your46* BSSes. Later it is assumed the hardware will "and" (&) the BSSID mask with47* the MAC address to obtain the relevant bits and compare the result with48* (frame's BSSID & mask) to see if they match.49*50* Simple example: on your card you have two BSSes you have created with51* BSSID-01 and BSSID-02. Lets assume BSSID-01 will not use the MAC address.52* There is another BSSID-03 but you are not part of it. For simplicity's sake,53* assuming only 4 bits for a mac address and for BSSIDs you can then have:54*55* \56* MAC: 0001 |57* BSSID-01: 0100 | --> Belongs to us58* BSSID-02: 1001 |59* /60* -------------------61* BSSID-03: 0110 | --> External62* -------------------63*64* Our bssid_mask would then be:65*66* On loop iteration for BSSID-01:67* ~(0001 ^ 0100) -> ~(0101)68* -> 101069* bssid_mask = 101070*71* On loop iteration for BSSID-02:72* bssid_mask &= ~(0001 ^ 1001)73* bssid_mask = (1010) & ~(0001 ^ 1001)74* bssid_mask = (1010) & ~(1000)75* bssid_mask = (1010) & (0111)76* bssid_mask = 001077*78* A bssid_mask of 0010 means "only pay attention to the second least79* significant bit". This is because its the only bit common80* amongst the MAC and all BSSIDs we support. To findout what the real81* common bit is we can simply "&" the bssid_mask now with any BSSID we have82* or our MAC address (we assume the hardware uses the MAC address).83*84* Now, suppose there's an incoming frame for BSSID-03:85*86* IFRAME-01: 011087*88* An easy eye-inspeciton of this already should tell you that this frame89* will not pass our check. This is because the bssid_mask tells the90* hardware to only look at the second least significant bit and the91* common bit amongst the MAC and BSSIDs is 0, this frame has the 2nd LSB92* as 1, which does not match 0.93*94* So with IFRAME-01 we *assume* the hardware will do:95*96* allow = (IFRAME-01 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;97* --> allow = (0110 & 0010) == (0010 & 0001) ? 1 : 0;98* --> allow = (0010) == 0000 ? 1 : 0;99* --> allow = 0100*101* Lets now test a frame that should work:102*103* IFRAME-02: 0001 (we should allow)104*105* allow = (IFRAME-02 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;106* --> allow = (0001 & 0010) == (0010 & 0001) ? 1 :0;107* --> allow = (0000) == (0000)108* --> allow = 1109*110* Other examples:111*112* IFRAME-03: 0100 --> allowed113* IFRAME-04: 1001 --> allowed114* IFRAME-05: 1101 --> allowed but its not for us!!!115*116*/117void ath_hw_setbssidmask(struct ath_common *common)118{119void *ah = common->ah;120u32 id1;121122REG_WRITE(ah, AR_STA_ID0, get_unaligned_le32(common->macaddr));123id1 = REG_READ(ah, AR_STA_ID1) & ~AR_STA_ID1_SADH_MASK;124id1 |= get_unaligned_le16(common->macaddr + 4);125REG_WRITE(ah, AR_STA_ID1, id1);126127REG_WRITE(ah, AR_BSSMSKL, get_unaligned_le32(common->bssidmask));128REG_WRITE(ah, AR_BSSMSKU, get_unaligned_le16(common->bssidmask + 4));129}130EXPORT_SYMBOL(ath_hw_setbssidmask);131132133/**134* ath_hw_cycle_counters_update - common function to update cycle counters135*136* @common: the ath_common struct for the device.137*138* This function is used to update all cycle counters in one place.139* It has to be called while holding common->cc_lock!140*/141void ath_hw_cycle_counters_update(struct ath_common *common)142{143u32 cycles, busy, rx, tx;144void *ah = common->ah;145146/* freeze */147REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC);148149/* read */150cycles = REG_READ(ah, AR_CCCNT);151busy = REG_READ(ah, AR_RCCNT);152rx = REG_READ(ah, AR_RFCNT);153tx = REG_READ(ah, AR_TFCNT);154155/* clear */156REG_WRITE(ah, AR_CCCNT, 0);157REG_WRITE(ah, AR_RFCNT, 0);158REG_WRITE(ah, AR_RCCNT, 0);159REG_WRITE(ah, AR_TFCNT, 0);160161/* unfreeze */162REG_WRITE(ah, AR_MIBC, 0);163164/* update all cycle counters here */165common->cc_ani.cycles += cycles;166common->cc_ani.rx_busy += busy;167common->cc_ani.rx_frame += rx;168common->cc_ani.tx_frame += tx;169170common->cc_survey.cycles += cycles;171common->cc_survey.rx_busy += busy;172common->cc_survey.rx_frame += rx;173common->cc_survey.tx_frame += tx;174}175EXPORT_SYMBOL(ath_hw_cycle_counters_update);176177int32_t ath_hw_get_listen_time(struct ath_common *common)178{179struct ath_cycle_counters *cc = &common->cc_ani;180int32_t listen_time;181182listen_time = (cc->cycles - cc->rx_frame - cc->tx_frame) /183(common->clockrate * 1000);184185memset(cc, 0, sizeof(*cc));186187return listen_time;188}189EXPORT_SYMBOL(ath_hw_get_listen_time);190191192