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freebsd
GitHub Repository: freebsd/freebsd-src
 Path: blob/main/sys/contrib/dev/iwlwifi/cfg/bz.c
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// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause

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/*

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 * Copyright (C) 2015-2017 Intel Deutschland GmbH

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 * Copyright (C) 2018-2025 Intel Corporation

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 */

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#include <linux/module.h>

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#include <linux/stringify.h>

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#include "iwl-config.h"

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#include "iwl-prph.h"

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#include "fw/api/txq.h"

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/* Highest firmware API version supported */

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#define IWL_BZ_UCODE_API_MAX	102

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/* Lowest firmware API version supported */

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#define IWL_BZ_UCODE_API_MIN	98

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/* Memory offsets and lengths */

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#define IWL_BZ_SMEM_OFFSET		0x400000

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#define IWL_BZ_SMEM_LEN			0xD0000

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#define IWL_BZ_A_FM_B_FW_PRE		"iwlwifi-bz-a0-fm-b0"

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#define IWL_BZ_A_FM_C_FW_PRE		"iwlwifi-bz-a0-fm-c0"

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#define IWL_BZ_A_FM4_B_FW_PRE		"iwlwifi-bz-a0-fm4-b0"

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#define IWL_GL_B_FM_B_FW_PRE		"iwlwifi-gl-b0-fm-b0"

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#define IWL_GL_C_FM_C_FW_PRE		"iwlwifi-gl-c0-fm-c0"

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static const struct iwl_family_base_params iwl_bz_base = {

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	.num_of_queues = 512,

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	.max_tfd_queue_size = 65536,

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	.shadow_ram_support = true,

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	.led_compensation = 57,

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	.wd_timeout = IWL_LONG_WD_TIMEOUT,

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	.max_event_log_size = 512,

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	.shadow_reg_enable = true,

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	.pcie_l1_allowed = true,

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	.smem_offset = IWL_BZ_SMEM_OFFSET,

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	.smem_len = IWL_BZ_SMEM_LEN,

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	.apmg_not_supported = true,

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	.mac_addr_from_csr = 0x30,

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	.min_umac_error_event_table = 0xD0000,

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	.d3_debug_data_base_addr = 0x401000,

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	.d3_debug_data_length = 60 * 1024,

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	.mon_smem_regs = {

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		.write_ptr = {

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			.addr = LDBG_M2S_BUF_WPTR,

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			.mask = LDBG_M2S_BUF_WPTR_VAL_MSK,

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	},

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		.cycle_cnt = {

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			.addr = LDBG_M2S_BUF_WRAP_CNT,

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			.mask = LDBG_M2S_BUF_WRAP_CNT_VAL_MSK,

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		},

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	},

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	.min_txq_size = 128,

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	.gp2_reg_addr = 0xd02c68,

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	.min_ba_txq_size = IWL_DEFAULT_QUEUE_SIZE_EHT,

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	.mon_dram_regs = {

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		.write_ptr = {

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			.addr = DBGC_CUR_DBGBUF_STATUS,

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			.mask = DBGC_CUR_DBGBUF_STATUS_OFFSET_MSK,

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		},

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		.cycle_cnt = {

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			.addr = DBGC_DBGBUF_WRAP_AROUND,

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			.mask = 0xffffffff,

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		},

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		.cur_frag = {

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			.addr = DBGC_CUR_DBGBUF_STATUS,

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			.mask = DBGC_CUR_DBGBUF_STATUS_IDX_MSK,

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		},

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	},

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	.mon_dbgi_regs = {

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		.write_ptr = {

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			.addr = DBGI_SRAM_FIFO_POINTERS,

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			.mask = DBGI_SRAM_FIFO_POINTERS_WR_PTR_MSK,

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		},

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	},

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	.features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM,

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	.ucode_api_max = IWL_BZ_UCODE_API_MAX,

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	.ucode_api_min = IWL_BZ_UCODE_API_MIN,

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};

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const struct iwl_mac_cfg iwl_bz_mac_cfg = {

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	.device_family = IWL_DEVICE_FAMILY_BZ,

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	.base = &iwl_bz_base,

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	.mq_rx_supported = true,

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	.gen2 = true,

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	.integrated = true,

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	.umac_prph_offset = 0x300000,

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	.xtal_latency = 12000,

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	.low_latency_xtal = true,

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	.ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US,

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};

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const struct iwl_mac_cfg iwl_gl_mac_cfg = {

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	.device_family = IWL_DEVICE_FAMILY_BZ,

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	.base = &iwl_bz_base,

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	.mq_rx_supported = true,

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	.gen2 = true,

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	.umac_prph_offset = 0x300000,

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	.xtal_latency = 12000,

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	.low_latency_xtal = true,

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};

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IWL_FW_AND_PNVM(IWL_BZ_A_FM_B_FW_PRE, IWL_BZ_UCODE_API_MAX);

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IWL_FW_AND_PNVM(IWL_BZ_A_FM_C_FW_PRE, IWL_BZ_UCODE_API_MAX);

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IWL_FW_AND_PNVM(IWL_BZ_A_FM4_B_FW_PRE, IWL_BZ_UCODE_API_MAX);

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IWL_FW_AND_PNVM(IWL_GL_B_FM_B_FW_PRE, IWL_BZ_UCODE_API_MAX);

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IWL_FW_AND_PNVM(IWL_GL_C_FM_C_FW_PRE, IWL_BZ_UCODE_API_MAX);

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