Path: blob/main/sys/contrib/dev/iwlwifi/fw/api/dbg-tlv.h
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/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */1/*2* Copyright (C) 2018-2025 Intel Corporation3*/4#ifndef __iwl_fw_dbg_tlv_h__5#define __iwl_fw_dbg_tlv_h__67#include <linux/bitops.h>89#define IWL_FW_INI_MAX_REGION_ID 6410#define IWL_FW_INI_MAX_NAME 3211#define IWL_FW_INI_MAX_CFG_NAME 6412#define IWL_FW_INI_DOMAIN_ALWAYS_ON 013#define IWL_FW_INI_REGION_ID_MASK GENMASK(15, 0)14#define IWL_FW_INI_REGION_DUMP_POLICY_MASK GENMASK(31, 16)15#define IWL_FW_INI_PRESET_DISABLE 0xff1617/**18* struct iwl_fw_ini_hcmd19*20* @id: the debug configuration command type for instance: 0xf6 / 0xf5 / DHC21* @group: the desired cmd group22* @reserved: to align to FW struct23* @data: all of the relevant command data to be sent24*/25struct iwl_fw_ini_hcmd {26u8 id;27u8 group;28__le16 reserved;29u8 data[];30} __packed; /* FW_DEBUG_TLV_HCMD_DATA_API_S_VER_1 */3132/**33* struct iwl_fw_ini_header - Common Header for all ini debug TLV's structures34*35* @version: TLV version36* @domain: domain of the TLV. One of &enum iwl_fw_ini_dbg_domain37*/38struct iwl_fw_ini_header {39__le32 version;40__le32 domain;41/* followed by the data */42} __packed; /* FW_TLV_DEBUG_HEADER_S_VER_1 */4344/**45* struct iwl_fw_ini_addr_size - Base address and size that defines46* a chunk of memory47*48* @addr: the base address (fixed size - 4 bytes)49* @size: the size to read50*/51struct iwl_fw_ini_addr_size {52__le32 addr;53__le32 size;54} __packed; /* FW_TLV_DEBUG_ADDR_SIZE_VER_1 */5556/**57* struct iwl_fw_ini_region_dev_addr_range - Configuration to read58* device address range59*60* @offset: offset to add to the base address of each chunk61* The addrs[] array will be treated as an array of &iwl_fw_ini_addr_size -62* an array of (addr, size) pairs.63*/64struct iwl_fw_ini_region_dev_addr_range {65__le32 offset;66} __packed; /* FW_TLV_DEBUG_DEVICE_ADDR_RANGE_API_S_VER_1 */6768/**69* struct iwl_fw_ini_region_dev_addr - Configuration to read device addresses70*71* @size: size of each memory chunk72* @offset: offset to add to the base address of each chunk73*/74struct iwl_fw_ini_region_dev_addr {75__le32 size;76__le32 offset;77} __packed; /* FW_TLV_DEBUG_DEVICE_ADDR_API_S_VER_1 */7879/**80* struct iwl_fw_ini_region_fifos - Configuration to read Tx/Rx fifos81*82* @fid: fifos ids array. Used to determine what fifos to collect83* @hdr_only: if non zero, collect only the registers84* @offset: offset to add to the registers addresses85*/86struct iwl_fw_ini_region_fifos {87__le32 fid[2];88__le32 hdr_only;89__le32 offset;90} __packed; /* FW_TLV_DEBUG_REGION_FIFOS_API_S_VER_1 */9192/**93* struct iwl_fw_ini_region_err_table - error table region data94*95* Configuration to read Umac/Lmac error table96*97* @version: version of the error table98* @base_addr: base address of the error table99* @size: size of the error table100* @offset: offset to add to &base_addr101*/102struct iwl_fw_ini_region_err_table {103__le32 version;104__le32 base_addr;105__le32 size;106__le32 offset;107} __packed; /* FW_TLV_DEBUG_REGION_ERROR_TABLE_API_S_VER_1 */108109/**110* struct iwl_fw_ini_region_special_device_memory - special device memory111*112* Configuration to read a special memory113*114* @type: type of the special memory115* @version: version of the special memory116* @base_addr: base address of the error table117* @size: size of the error table118* @offset: offset to add to &base_addr119*/120struct iwl_fw_ini_region_special_device_memory {121__le16 type;122__le16 version;123__le32 base_addr;124__le32 size;125__le32 offset;126} __packed; /* FW_TLV_DEBUG_REGION_SPECIAL_DEVICE_ADDR_API_S_VER_1 */127128/**129* struct iwl_fw_ini_region_internal_buffer - internal buffer region data130*131* Configuration to read internal monitor buffer132*133* @alloc_id: allocation id one of &enum iwl_fw_ini_allocation_id134* @base_addr: internal buffer base address135* @size: size internal buffer size136*/137struct iwl_fw_ini_region_internal_buffer {138__le32 alloc_id;139__le32 base_addr;140__le32 size;141} __packed; /* FW_TLV_DEBUG_REGION_INTERNAL_BUFFER_API_S_VER_1 */142143/**144* struct iwl_fw_ini_region_tlv - region TLV145*146* Configures parameters for region data collection147*148* @hdr: debug header149* @id: region id. Max id is %IWL_FW_INI_MAX_REGION_ID150* @type: region type. One of &enum iwl_fw_ini_region_type151* @sub_type: region sub type152* @sub_type_ver: region sub type version153* @reserved: not in use154* @name: region name155* @dev_addr: device address configuration. Used by156* %IWL_FW_INI_REGION_DEVICE_MEMORY, %IWL_FW_INI_REGION_PERIPHERY_MAC,157* %IWL_FW_INI_REGION_PERIPHERY_PHY, %IWL_FW_INI_REGION_PERIPHERY_AUX,158* %IWL_FW_INI_REGION_PAGING, %IWL_FW_INI_REGION_CSR,159* %IWL_FW_INI_REGION_DRAM_IMR and %IWL_FW_INI_REGION_PCI_IOSF_CONFIG160* %IWL_FW_INI_REGION_DBGI_SRAM, %FW_TLV_DEBUG_REGION_TYPE_DBGI_SRAM,161* %IWL_FW_INI_REGION_PERIPHERY_SNPS_DPHYIP,162* @dev_addr_range: device address range configuration. Used by163* %IWL_FW_INI_REGION_PERIPHERY_MAC_RANGE and164* %IWL_FW_INI_REGION_PERIPHERY_PHY_RANGE165* @fifos: fifos configuration. Used by %IWL_FW_INI_REGION_TXF and166* %IWL_FW_INI_REGION_RXF167* @err_table: error table configuration. Used by168* %IWL_FW_INI_REGION_LMAC_ERROR_TABLE and169* %IWL_FW_INI_REGION_UMAC_ERROR_TABLE170* @internal_buffer: internal monitor buffer configuration. Used by171* %IWL_FW_INI_REGION_INTERNAL_BUFFER172* @special_mem: special device memory region, used by173* %IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY174* @dram_alloc_id: dram allocation id. One of &enum iwl_fw_ini_allocation_id.175* Used by %IWL_FW_INI_REGION_DRAM_BUFFER176* @tlv_mask: tlv collection mask. Used by %IWL_FW_INI_REGION_TLV177* @addrs: array of addresses attached to the end of the region tlv178*/179struct iwl_fw_ini_region_tlv {180struct iwl_fw_ini_header hdr;181__le32 id;182u8 type;183u8 sub_type;184u8 sub_type_ver;185u8 reserved;186u8 name[IWL_FW_INI_MAX_NAME];187union {188struct iwl_fw_ini_region_dev_addr dev_addr;189struct iwl_fw_ini_region_dev_addr_range dev_addr_range;190struct iwl_fw_ini_region_fifos fifos;191struct iwl_fw_ini_region_err_table err_table;192struct iwl_fw_ini_region_internal_buffer internal_buffer;193struct iwl_fw_ini_region_special_device_memory special_mem;194__le32 dram_alloc_id;195__le32 tlv_mask;196}; /* FW_TLV_DEBUG_REGION_CONF_PARAMS_API_U_VER_1 */197__le32 addrs[];198} __packed; /* FW_TLV_DEBUG_REGION_API_S_VER_1 */199200/**201* struct iwl_fw_ini_debug_info_tlv202*203* debug configuration name for a specific image204*205* @hdr: debug header206* @image_type: image type207* @debug_cfg_name: debug configuration name208*/209struct iwl_fw_ini_debug_info_tlv {210struct iwl_fw_ini_header hdr;211__le32 image_type;212u8 debug_cfg_name[IWL_FW_INI_MAX_CFG_NAME];213} __packed; /* FW_TLV_DEBUG_INFO_API_S_VER_1 */214215/**216* struct iwl_fw_ini_allocation_tlv - Allocates DRAM buffers217*218* @hdr: debug header219* @alloc_id: allocation id. One of &enum iwl_fw_ini_allocation_id220* @buf_location: buffer location. One of &enum iwl_fw_ini_buffer_location221* @req_size: requested buffer size222* @max_frags_num: maximum number of fragments223* @min_size: minimum buffer size224*/225struct iwl_fw_ini_allocation_tlv {226struct iwl_fw_ini_header hdr;227__le32 alloc_id;228__le32 buf_location;229__le32 req_size;230__le32 max_frags_num;231__le32 min_size;232} __packed; /* FW_TLV_DEBUG_BUFFER_ALLOCATION_API_S_VER_1 */233234/**235* struct iwl_fw_ini_trigger_tlv - trigger TLV236*237* Trigger that upon firing, determines what regions to collect238*239* @hdr: debug header240* @time_point: time point. One of &enum iwl_fw_ini_time_point241* @trigger_reason: trigger reason242* @apply_policy: uses &enum iwl_fw_ini_trigger_apply_policy243* @dump_delay: delay from trigger fire to dump, in usec244* @occurrences: max trigger fire occurrences allowed245* @reserved: unused246* @ignore_consec: ignore consecutive triggers, in usec247* @reset_fw: if non zero, will reset and reload the FW248* @multi_dut: initiate debug dump data on several DUTs249* @regions_mask: mask of regions to collect250* @data: trigger data251*/252struct iwl_fw_ini_trigger_tlv {253struct iwl_fw_ini_header hdr;254__le32 time_point;255__le32 trigger_reason;256__le32 apply_policy;257__le32 dump_delay;258__le32 occurrences;259__le32 reserved;260__le32 ignore_consec;261__le32 reset_fw;262__le32 multi_dut;263__le64 regions_mask;264__le32 data[];265} __packed; /* FW_TLV_DEBUG_TRIGGER_API_S_VER_1 */266267/**268* struct iwl_fw_ini_hcmd_tlv - Generic Host command pass through TLV269*270* @hdr: debug header271* @time_point: time point. One of &enum iwl_fw_ini_time_point272* @period_msec: interval at which the hcmd will be sent to the FW.273* Measured in msec (0 = one time command)274* @hcmd: a variable length host-command to be sent to apply the configuration275*/276struct iwl_fw_ini_hcmd_tlv {277struct iwl_fw_ini_header hdr;278__le32 time_point;279__le32 period_msec;280struct iwl_fw_ini_hcmd hcmd;281} __packed; /* FW_TLV_DEBUG_HCMD_API_S_VER_1 */282283/**284* struct iwl_fw_ini_addr_val - Address and value to set it to285*286* @address: the base address287* @value: value to set at address288*/289struct iwl_fw_ini_addr_val {290__le32 address;291__le32 value;292} __packed; /* FW_TLV_DEBUG_ADDR_VALUE_VER_1 */293294/**295* struct iwl_fw_ini_conf_set_tlv - configuration TLV to set register/memory.296*297* @hdr: debug header298* @time_point: time point to apply config. One of &enum iwl_fw_ini_time_point299* @set_type: write access type preset token for time point.300* one of &enum iwl_fw_ini_config_set_type301* @addr_offset: the offset to add to any item in address[0] field302* @addr_val: address value pair303*/304struct iwl_fw_ini_conf_set_tlv {305struct iwl_fw_ini_header hdr;306__le32 time_point;307__le32 set_type;308__le32 addr_offset;309struct iwl_fw_ini_addr_val addr_val[];310} __packed; /* FW_TLV_DEBUG_CONFIG_SET_API_S_VER_1 */311312/**313* enum iwl_fw_ini_config_set_type314*315* @IWL_FW_INI_CONFIG_SET_TYPE_INVALID: invalid config set316* @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_MAC: for PERIPHERY MAC configuration317* @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_PHY: for PERIPHERY PHY configuration318* @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_AUX: for PERIPHERY AUX configuration319* @IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_MEMORY: for DEVICE MEMORY configuration320* @IWL_FW_INI_CONFIG_SET_TYPE_CSR: for CSR configuration321* @IWL_FW_INI_CONFIG_SET_TYPE_DBGC_DRAM_ADDR: for DBGC_DRAM_ADDR configuration322* @IWL_FW_INI_CONFIG_SET_TYPE_PERIPH_SCRATCH_HWM: for PERIPH SCRATCH HWM configuration323* @IWL_FW_INI_CONFIG_SET_TYPE_MAX_NUM: max number of configuration supported324*/325326enum iwl_fw_ini_config_set_type {327IWL_FW_INI_CONFIG_SET_TYPE_INVALID = 0,328IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_MAC,329IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_PHY,330IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_PERIPHERY_AUX,331IWL_FW_INI_CONFIG_SET_TYPE_DEVICE_MEMORY,332IWL_FW_INI_CONFIG_SET_TYPE_CSR,333IWL_FW_INI_CONFIG_SET_TYPE_DBGC_DRAM_ADDR,334IWL_FW_INI_CONFIG_SET_TYPE_PERIPH_SCRATCH_HWM,335IWL_FW_INI_CONFIG_SET_TYPE_MAX_NUM,336} __packed;337338/**339* enum iwl_fw_ini_allocation_id340*341* @IWL_FW_INI_ALLOCATION_INVALID: invalid342* @IWL_FW_INI_ALLOCATION_ID_DBGC1: allocation meant for DBGC1 configuration343* @IWL_FW_INI_ALLOCATION_ID_DBGC2: allocation meant for DBGC2 configuration344* @IWL_FW_INI_ALLOCATION_ID_DBGC3: allocation meant for DBGC3 configuration345* @IWL_FW_INI_ALLOCATION_ID_DBGC4: allocation meant for DBGC4 configuration346* @IWL_FW_INI_ALLOCATION_NUM: number of allocation ids347*/348enum iwl_fw_ini_allocation_id {349IWL_FW_INI_ALLOCATION_INVALID,350IWL_FW_INI_ALLOCATION_ID_DBGC1,351IWL_FW_INI_ALLOCATION_ID_DBGC2,352IWL_FW_INI_ALLOCATION_ID_DBGC3,353IWL_FW_INI_ALLOCATION_ID_DBGC4,354IWL_FW_INI_ALLOCATION_NUM,355}; /* FW_DEBUG_TLV_ALLOCATION_ID_E_VER_1 */356357/**358* enum iwl_fw_ini_buffer_location359*360* @IWL_FW_INI_LOCATION_INVALID: invalid361* @IWL_FW_INI_LOCATION_SRAM_PATH: SRAM location362* @IWL_FW_INI_LOCATION_DRAM_PATH: DRAM location363* @IWL_FW_INI_LOCATION_NPK_PATH: NPK location364* @IWL_FW_INI_LOCATION_NUM: number of valid locations365*/366enum iwl_fw_ini_buffer_location {367IWL_FW_INI_LOCATION_INVALID,368IWL_FW_INI_LOCATION_SRAM_PATH,369IWL_FW_INI_LOCATION_DRAM_PATH,370IWL_FW_INI_LOCATION_NPK_PATH,371IWL_FW_INI_LOCATION_NUM,372}; /* FW_DEBUG_TLV_BUFFER_LOCATION_E_VER_1 */373374/**375* enum iwl_fw_ini_region_type376*377* @IWL_FW_INI_REGION_INVALID: invalid378* @IWL_FW_INI_REGION_TLV: uCode and debug TLVs379* @IWL_FW_INI_REGION_INTERNAL_BUFFER: monitor SMEM buffer380* @IWL_FW_INI_REGION_DRAM_BUFFER: monitor DRAM buffer381* @IWL_FW_INI_REGION_TXF: TX fifos382* @IWL_FW_INI_REGION_RXF: RX fifo383* @IWL_FW_INI_REGION_LMAC_ERROR_TABLE: lmac error table384* @IWL_FW_INI_REGION_UMAC_ERROR_TABLE: umac error table385* @IWL_FW_INI_REGION_RSP_OR_NOTIF: FW response or notification data386* @IWL_FW_INI_REGION_DEVICE_MEMORY: device internal memory387* @IWL_FW_INI_REGION_PERIPHERY_MAC: periphery registers of MAC388* @IWL_FW_INI_REGION_PERIPHERY_PHY: periphery registers of PHY389* @IWL_FW_INI_REGION_PERIPHERY_AUX: periphery registers of AUX390* @IWL_FW_INI_REGION_PAGING: paging memory391* @IWL_FW_INI_REGION_CSR: CSR registers392* @IWL_FW_INI_REGION_DRAM_IMR: IMR memory393* @IWL_FW_INI_REGION_PCI_IOSF_CONFIG: PCI/IOSF config394* @IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY: special device memory395* @IWL_FW_INI_REGION_DBGI_SRAM: periphery registers of DBGI SRAM396* @IWL_FW_INI_REGION_PERIPHERY_MAC_RANGE: a range of periphery registers of MAC397* @IWL_FW_INI_REGION_PERIPHERY_PHY_RANGE: a range of periphery registers of PHY398* @IWL_FW_INI_REGION_PERIPHERY_SNPS_DPHYIP: periphery registers of SNPS DPHYIP399* @IWL_FW_INI_REGION_NUM: number of region types400*/401enum iwl_fw_ini_region_type {402IWL_FW_INI_REGION_INVALID,403IWL_FW_INI_REGION_TLV,404IWL_FW_INI_REGION_INTERNAL_BUFFER,405IWL_FW_INI_REGION_DRAM_BUFFER,406IWL_FW_INI_REGION_TXF,407IWL_FW_INI_REGION_RXF,408IWL_FW_INI_REGION_LMAC_ERROR_TABLE,409IWL_FW_INI_REGION_UMAC_ERROR_TABLE,410IWL_FW_INI_REGION_RSP_OR_NOTIF,411IWL_FW_INI_REGION_DEVICE_MEMORY,412IWL_FW_INI_REGION_PERIPHERY_MAC,413IWL_FW_INI_REGION_PERIPHERY_PHY,414IWL_FW_INI_REGION_PERIPHERY_AUX,415IWL_FW_INI_REGION_PAGING,416IWL_FW_INI_REGION_CSR,417IWL_FW_INI_REGION_DRAM_IMR,418IWL_FW_INI_REGION_PCI_IOSF_CONFIG,419IWL_FW_INI_REGION_SPECIAL_DEVICE_MEMORY,420IWL_FW_INI_REGION_DBGI_SRAM,421IWL_FW_INI_REGION_PERIPHERY_MAC_RANGE,422IWL_FW_INI_REGION_PERIPHERY_PHY_RANGE,423IWL_FW_INI_REGION_PERIPHERY_SNPS_DPHYIP,424IWL_FW_INI_REGION_NUM425}; /* FW_TLV_DEBUG_REGION_TYPE_API_E */426427enum iwl_fw_ini_region_device_memory_subtype {428IWL_FW_INI_REGION_DEVICE_MEMORY_SUBTYPE_HW_SMEM = 1,429IWL_FW_INI_REGION_DEVICE_MEMORY_SUBTYPE_UMAC_ERROR_TABLE = 5,430IWL_FW_INI_REGION_DEVICE_MEMORY_SUBTYPE_LMAC_1_ERROR_TABLE = 7,431IWL_FW_INI_REGION_DEVICE_MEMORY_SUBTYPE_LMAC_2_ERROR_TABLE = 10,432IWL_FW_INI_REGION_DEVICE_MEMORY_SUBTYPE_TCM_1_ERROR_TABLE = 14,433IWL_FW_INI_REGION_DEVICE_MEMORY_SUBTYPE_TCM_2_ERROR_TABLE = 16,434IWL_FW_INI_REGION_DEVICE_MEMORY_SUBTYPE_RCM_1_ERROR_TABLE = 18,435IWL_FW_INI_REGION_DEVICE_MEMORY_SUBTYPE_RCM_2_ERROR_TABLE = 20,436}; /* FW_TLV_DEBUG_REGION_DEVICE_MEMORY_SUBTYPE_API_E */437438/**439* enum iwl_fw_ini_time_point440*441* Hard coded time points in which the driver can send hcmd or perform dump442* collection443*444* @IWL_FW_INI_TIME_POINT_INVALID: invalid timepoint445* @IWL_FW_INI_TIME_POINT_EARLY: pre loading the FW446* @IWL_FW_INI_TIME_POINT_AFTER_ALIVE: first cmd from host after alive notif447* @IWL_FW_INI_TIME_POINT_POST_INIT: last cmd in series of init sequence448* @IWL_FW_INI_TIME_POINT_FW_ASSERT: FW assert449* @IWL_FW_INI_TIME_POINT_FW_HW_ERROR: FW HW error450* @IWL_FW_INI_TIME_POINT_FW_TFD_Q_HANG: TFD queue hang451* @IWL_FW_INI_TIME_POINT_FW_DHC_NOTIFICATION: DHC cmd response and notif452* @IWL_FW_INI_TIME_POINT_FW_RSP_OR_NOTIF: FW response or notification.453* data field holds id and group454* @IWL_FW_INI_TIME_POINT_USER_TRIGGER: user trigger time point455* @IWL_FW_INI_TIME_POINT_PERIODIC: periodic timepoint that fires in constant456* intervals. data field holds the interval time in msec457* @IWL_FW_INI_TIME_POINT_RESERVED: reserved458* @IWL_FW_INI_TIME_POINT_HOST_ASSERT: Unused459* @IWL_FW_INI_TIME_POINT_HOST_ALIVE_TIMEOUT: alive timeout460* @IWL_FW_INI_TIME_POINT_HOST_DEVICE_ENABLE: device enable461* @IWL_FW_INI_TIME_POINT_HOST_DEVICE_DISABLE: device disable462* @IWL_FW_INI_TIME_POINT_HOST_D3_START: D3 start463* @IWL_FW_INI_TIME_POINT_HOST_D3_END: D3 end464* @IWL_FW_INI_TIME_POINT_MISSED_BEACONS: missed beacons465* @IWL_FW_INI_TIME_POINT_ASSOC_FAILED: association failure466* @IWL_FW_INI_TIME_POINT_TX_FAILED: Tx frame failed467* @IWL_FW_INI_TIME_POINT_TX_WFD_ACTION_FRAME_FAILED: wifi direct action468* frame failed469* @IWL_FW_INI_TIME_POINT_TX_LATENCY_THRESHOLD: Tx latency threshold470* @IWL_FW_INI_TIME_POINT_HANG_OCCURRED: hang occurred471* @IWL_FW_INI_TIME_POINT_EAPOL_FAILED: EAPOL failed472* @IWL_FW_INI_TIME_POINT_FAKE_TX: fake Tx473* @IWL_FW_INI_TIME_POINT_DEASSOC: de association474* @IWL_FW_INI_TIME_POINT_PRESET_OVERRIDE_EXT_REQ: request to override preset475* @IWL_FW_INI_TIME_POINT_PRESET_OVERRIDE_START: start handling override preset476* request477* @IWL_FW_INI_TIME_SCAN_FAILURE: failed scan channel list478* @IWL_FW_INI_TIME_ESR_LINK_UP: EMLSR is active (several links are activated)479* @IWL_FW_INI_TIME_ESR_LINK_DOWN: EMLSR is inactive (only one active link left)480* @IWL_FW_INI_TIME_POINT_NUM: number of time points481*/482enum iwl_fw_ini_time_point {483IWL_FW_INI_TIME_POINT_INVALID,484IWL_FW_INI_TIME_POINT_EARLY,485IWL_FW_INI_TIME_POINT_AFTER_ALIVE,486IWL_FW_INI_TIME_POINT_POST_INIT,487IWL_FW_INI_TIME_POINT_FW_ASSERT,488IWL_FW_INI_TIME_POINT_FW_HW_ERROR,489IWL_FW_INI_TIME_POINT_FW_TFD_Q_HANG,490IWL_FW_INI_TIME_POINT_FW_DHC_NOTIFICATION,491IWL_FW_INI_TIME_POINT_FW_RSP_OR_NOTIF,492IWL_FW_INI_TIME_POINT_USER_TRIGGER,493IWL_FW_INI_TIME_POINT_PERIODIC,494IWL_FW_INI_TIME_POINT_RESERVED,495IWL_FW_INI_TIME_POINT_HOST_ASSERT,496IWL_FW_INI_TIME_POINT_HOST_ALIVE_TIMEOUT,497IWL_FW_INI_TIME_POINT_HOST_DEVICE_ENABLE,498IWL_FW_INI_TIME_POINT_HOST_DEVICE_DISABLE,499IWL_FW_INI_TIME_POINT_HOST_D3_START,500IWL_FW_INI_TIME_POINT_HOST_D3_END,501IWL_FW_INI_TIME_POINT_MISSED_BEACONS,502IWL_FW_INI_TIME_POINT_ASSOC_FAILED,503IWL_FW_INI_TIME_POINT_TX_FAILED,504IWL_FW_INI_TIME_POINT_TX_WFD_ACTION_FRAME_FAILED,505IWL_FW_INI_TIME_POINT_TX_LATENCY_THRESHOLD,506IWL_FW_INI_TIME_POINT_HANG_OCCURRED,507IWL_FW_INI_TIME_POINT_EAPOL_FAILED,508IWL_FW_INI_TIME_POINT_FAKE_TX,509IWL_FW_INI_TIME_POINT_DEASSOC,510IWL_FW_INI_TIME_POINT_PRESET_OVERRIDE_EXT_REQ,511IWL_FW_INI_TIME_POINT_PRESET_OVERRIDE_START,512IWL_FW_INI_TIME_SCAN_FAILURE,513IWL_FW_INI_TIME_ESR_LINK_UP,514IWL_FW_INI_TIME_ESR_LINK_DOWN,515IWL_FW_INI_TIME_POINT_NUM,516}; /* FW_TLV_DEBUG_TIME_POINT_API_E */517518/**519* enum iwl_fw_ini_trigger_apply_policy - Determines how to apply triggers520*521* @IWL_FW_INI_APPLY_POLICY_MATCH_TIME_POINT: match by time point522* @IWL_FW_INI_APPLY_POLICY_MATCH_DATA: match by trigger data523* @IWL_FW_INI_APPLY_POLICY_OVERRIDE_REGIONS: override regions mask.524* Append otherwise525* @IWL_FW_INI_APPLY_POLICY_OVERRIDE_CFG: override trigger configuration526* @IWL_FW_INI_APPLY_POLICY_OVERRIDE_DATA: override trigger data.527* Append otherwise528* @IWL_FW_INI_APPLY_POLICY_DUMP_COMPLETE_CMD: send cmd once dump collected529* @IWL_FW_INI_APPLY_POLICY_SPLIT_DUMP_RESET: split this dump into regions530* before and after the reset handshake531*/532enum iwl_fw_ini_trigger_apply_policy {533IWL_FW_INI_APPLY_POLICY_MATCH_TIME_POINT = BIT(0),534IWL_FW_INI_APPLY_POLICY_MATCH_DATA = BIT(1),535IWL_FW_INI_APPLY_POLICY_OVERRIDE_REGIONS = BIT(8),536IWL_FW_INI_APPLY_POLICY_OVERRIDE_CFG = BIT(9),537IWL_FW_INI_APPLY_POLICY_OVERRIDE_DATA = BIT(10),538IWL_FW_INI_APPLY_POLICY_DUMP_COMPLETE_CMD = BIT(16),539IWL_FW_INI_APPLY_POLICY_SPLIT_DUMP_RESET = BIT(17),540};541542/**543* enum iwl_fw_ini_trigger_reset_fw_policy - Determines how to handle reset544*545* @IWL_FW_INI_RESET_FW_MODE_NOTHING: do not stop FW and reload (default)546* @IWL_FW_INI_RESET_FW_MODE_STOP_FW_ONLY: stop FW without reload FW547* @IWL_FW_INI_RESET_FW_MODE_STOP_AND_RELOAD_FW: stop FW with reload FW548*/549enum iwl_fw_ini_trigger_reset_fw_policy {550IWL_FW_INI_RESET_FW_MODE_NOTHING = 0,551IWL_FW_INI_RESET_FW_MODE_STOP_FW_ONLY,552IWL_FW_INI_RESET_FW_MODE_STOP_AND_RELOAD_FW553};554555/**556* enum iwl_fw_ini_dump_policy - Determines how to handle dump based on enabled flags557*558* @IWL_FW_INI_DEBUG_DUMP_POLICY_NO_LIMIT: OS has no limit of dump size559* @IWL_FW_INI_DEBUG_DUMP_POLICY_MAX_LIMIT_600KB: mini dump only 600KB region dump560* @IWL_FW_IWL_DEBUG_DUMP_POLICY_MAX_LIMIT_5MB: mini dump 5MB size dump561* @IWL_FW_IWL_DEBUG_DUMP_POLICY_BEFORE_RESET: dump this region before reset562* handshake (if requested by %IWL_FW_INI_APPLY_POLICY_SPLIT_DUMP_RESET)563*/564enum iwl_fw_ini_dump_policy {565IWL_FW_INI_DEBUG_DUMP_POLICY_NO_LIMIT = BIT(0),566IWL_FW_INI_DEBUG_DUMP_POLICY_MAX_LIMIT_600KB = BIT(1),567IWL_FW_IWL_DEBUG_DUMP_POLICY_MAX_LIMIT_5MB = BIT(2),568IWL_FW_IWL_DEBUG_DUMP_POLICY_BEFORE_RESET = BIT(3),569};570571/**572* enum iwl_fw_ini_dump_type - Determines dump type based on size defined by FW.573*574* @IWL_FW_INI_DUMP_BRIEF : only dump the most important regions575* @IWL_FW_INI_DUMP_MEDIUM: dump more regions than "brief", but not all regions576* @IWL_FW_INI_DUMP_VERBOSE : dump all regions577*/578enum iwl_fw_ini_dump_type {579IWL_FW_INI_DUMP_BRIEF,580IWL_FW_INI_DUMP_MEDIUM,581IWL_FW_INI_DUMP_VERBOSE,582};583#endif584585586