/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */1/*2* Copyright (C) 2008-2014, 2018-2024 Intel Corporation3* Copyright (C) 2013-2015 Intel Mobile Communications GmbH4* Copyright (C) 2016-2017 Intel Deutschland GmbH5*/6#ifndef __iwl_fw_file_h__7#define __iwl_fw_file_h__89#include <linux/netdevice.h>10#include <linux/nl80211.h>1112/* v1/v2 uCode file layout */13struct iwl_ucode_header {14__le32 ver; /* major/minor/API/serial */15union {16struct {17__le32 inst_size; /* bytes of runtime code */18__le32 data_size; /* bytes of runtime data */19__le32 init_size; /* bytes of init code */20__le32 init_data_size; /* bytes of init data */21__le32 boot_size; /* bytes of bootstrap code */22u8 data[]; /* in same order as sizes */23} v1;24struct {25__le32 build; /* build number */26__le32 inst_size; /* bytes of runtime code */27__le32 data_size; /* bytes of runtime data */28__le32 init_size; /* bytes of init code */29__le32 init_data_size; /* bytes of init data */30__le32 boot_size; /* bytes of bootstrap code */31u8 data[]; /* in same order as sizes */32} v2;33} u;34};3536#define IWL_UCODE_TLV_DEBUG_BASE 0x100000537#define IWL_UCODE_TLV_CONST_BASE 0x1003839/*40* new TLV uCode file layout41*42* The new TLV file format contains TLVs, that each specify43* some piece of data.44*/4546enum iwl_ucode_tlv_type {47IWL_UCODE_TLV_INVALID = 0, /* unused */48IWL_UCODE_TLV_INST = 1,49IWL_UCODE_TLV_DATA = 2,50IWL_UCODE_TLV_INIT = 3,51IWL_UCODE_TLV_INIT_DATA = 4,52IWL_UCODE_TLV_BOOT = 5,53IWL_UCODE_TLV_PROBE_MAX_LEN = 6, /* a u32 value */54IWL_UCODE_TLV_PAN = 7, /* deprecated -- only used in DVM */55IWL_UCODE_TLV_MEM_DESC = 7, /* replaces PAN in non-DVM */56IWL_UCODE_TLV_RUNT_EVTLOG_PTR = 8,57IWL_UCODE_TLV_RUNT_EVTLOG_SIZE = 9,58IWL_UCODE_TLV_RUNT_ERRLOG_PTR = 10,59IWL_UCODE_TLV_INIT_EVTLOG_PTR = 11,60IWL_UCODE_TLV_INIT_EVTLOG_SIZE = 12,61IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13,62IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14,63IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,64IWL_UCODE_TLV_WOWLAN_INST = 16,65IWL_UCODE_TLV_WOWLAN_DATA = 17,66IWL_UCODE_TLV_FLAGS = 18,67IWL_UCODE_TLV_SEC_RT = 19,68IWL_UCODE_TLV_SEC_INIT = 20,69IWL_UCODE_TLV_SEC_WOWLAN = 21,70IWL_UCODE_TLV_DEF_CALIB = 22,71IWL_UCODE_TLV_PHY_SKU = 23,72IWL_UCODE_TLV_SECURE_SEC_RT = 24,73IWL_UCODE_TLV_SECURE_SEC_INIT = 25,74IWL_UCODE_TLV_SECURE_SEC_WOWLAN = 26,75IWL_UCODE_TLV_NUM_OF_CPU = 27,76IWL_UCODE_TLV_CSCHEME = 28,77IWL_UCODE_TLV_API_CHANGES_SET = 29,78IWL_UCODE_TLV_ENABLED_CAPABILITIES = 30,79IWL_UCODE_TLV_N_SCAN_CHANNELS = 31,80IWL_UCODE_TLV_PAGING = 32,81IWL_UCODE_TLV_SEC_RT_USNIFFER = 34,82/* 35 is unused */83IWL_UCODE_TLV_FW_VERSION = 36,84IWL_UCODE_TLV_FW_DBG_DEST = 38,85IWL_UCODE_TLV_FW_DBG_CONF = 39,86IWL_UCODE_TLV_FW_DBG_TRIGGER = 40,87IWL_UCODE_TLV_CMD_VERSIONS = 48,88IWL_UCODE_TLV_FW_GSCAN_CAPA = 50,89IWL_UCODE_TLV_FW_MEM_SEG = 51,90IWL_UCODE_TLV_IML = 52,91IWL_UCODE_TLV_UMAC_DEBUG_ADDRS = 54,92IWL_UCODE_TLV_LMAC_DEBUG_ADDRS = 55,93IWL_UCODE_TLV_FW_RECOVERY_INFO = 57,94IWL_UCODE_TLV_HW_TYPE = 58,95IWL_UCODE_TLV_FW_FSEQ_VERSION = 60,96IWL_UCODE_TLV_PHY_INTEGRATION_VERSION = 61,9798IWL_UCODE_TLV_PNVM_VERSION = 62,99IWL_UCODE_TLV_PNVM_SKU = 64,100101IWL_UCODE_TLV_SEC_TABLE_ADDR = 66,102IWL_UCODE_TLV_D3_KEK_KCK_ADDR = 67,103IWL_UCODE_TLV_CURRENT_PC = 68,104IWL_UCODE_TLV_FSEQ_BIN_VERSION = 72,105106/* contains sub-sections like PNVM file does (did) */107IWL_UCODE_TLV_PNVM_DATA = 74,108109IWL_UCODE_TLV_FW_NUM_STATIONS = IWL_UCODE_TLV_CONST_BASE + 0,110IWL_UCODE_TLV_FW_NUM_LINKS = IWL_UCODE_TLV_CONST_BASE + 1,111IWL_UCODE_TLV_FW_NUM_BEACONS = IWL_UCODE_TLV_CONST_BASE + 2,112113IWL_UCODE_TLV_TYPE_DEBUG_INFO = IWL_UCODE_TLV_DEBUG_BASE + 0,114IWL_UCODE_TLV_TYPE_BUFFER_ALLOCATION = IWL_UCODE_TLV_DEBUG_BASE + 1,115IWL_UCODE_TLV_TYPE_HCMD = IWL_UCODE_TLV_DEBUG_BASE + 2,116IWL_UCODE_TLV_TYPE_REGIONS = IWL_UCODE_TLV_DEBUG_BASE + 3,117IWL_UCODE_TLV_TYPE_TRIGGERS = IWL_UCODE_TLV_DEBUG_BASE + 4,118IWL_UCODE_TLV_TYPE_CONF_SET = IWL_UCODE_TLV_DEBUG_BASE + 5,119IWL_UCODE_TLV_DEBUG_MAX = IWL_UCODE_TLV_TYPE_TRIGGERS,120121/* TLVs 0x1000-0x2000 are for internal driver usage */122IWL_UCODE_TLV_FW_DBG_DUMP_LST = 0x1000,123};124125struct iwl_ucode_tlv {126__le32 type; /* see above */127__le32 length; /* not including type/length fields */128u8 data[];129};130131#define IWL_TLV_UCODE_MAGIC 0x0a4c5749132#define FW_VER_HUMAN_READABLE_SZ 64133134struct iwl_tlv_ucode_header {135/*136* The TLV style ucode header is distinguished from137* the v1/v2 style header by first four bytes being138* zero, as such is an invalid combination of139* major/minor/API/serial versions.140*/141__le32 zero;142__le32 magic;143u8 human_readable[FW_VER_HUMAN_READABLE_SZ];144/* major/minor/API/serial or major in new format */145__le32 ver;146__le32 build;147__le64 ignore;148/*149* The data contained herein has a TLV layout,150* see above for the TLV header and types.151* Note that each TLV is padded to a length152* that is a multiple of 4 for alignment.153*/154u8 data[];155};156157/*158* ucode TLVs159*160* ability to get extension for: flags & capabilities from ucode binaries files161*/162struct iwl_ucode_api {163__le32 api_index;164__le32 api_flags;165} __packed;166167struct iwl_ucode_capa {168__le32 api_index;169__le32 api_capa;170} __packed;171172/**173* enum iwl_ucode_tlv_flag - ucode API flags174* @IWL_UCODE_TLV_FLAGS_PAN: This is PAN capable microcode; this previously175* was a separate TLV but moved here to save space.176* @IWL_UCODE_TLV_FLAGS_NEWSCAN: new uCode scan behavior on hidden SSID,177* treats good CRC threshold as a boolean178* @IWL_UCODE_TLV_FLAGS_MFP: This uCode image supports MFP (802.11w).179* @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: This uCode image supports uAPSD180* @IWL_UCODE_TLV_FLAGS_SHORT_BL: 16 entries of block list instead of 64 in scan181* offload profile config command.182* @IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS: D3 image supports up to six183* (rather than two) IPv6 addresses184* @IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID: not sending a probe with the SSID element185* from the probe request template.186* @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL: new NS offload (small version)187* @IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE: new NS offload (large version)188* @IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT: General support for uAPSD189* @IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD: P2P client supports uAPSD power save190* @IWL_UCODE_TLV_FLAGS_EBS_SUPPORT: this uCode image supports EBS.191*/192enum iwl_ucode_tlv_flag {193IWL_UCODE_TLV_FLAGS_PAN = BIT(0),194IWL_UCODE_TLV_FLAGS_NEWSCAN = BIT(1),195IWL_UCODE_TLV_FLAGS_MFP = BIT(2),196IWL_UCODE_TLV_FLAGS_SHORT_BL = BIT(7),197IWL_UCODE_TLV_FLAGS_D3_6_IPV6_ADDRS = BIT(10),198IWL_UCODE_TLV_FLAGS_NO_BASIC_SSID = BIT(12),199IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_SMALL = BIT(15),200IWL_UCODE_TLV_FLAGS_NEW_NSOFFL_LARGE = BIT(16),201IWL_UCODE_TLV_FLAGS_UAPSD_SUPPORT = BIT(24),202IWL_UCODE_TLV_FLAGS_EBS_SUPPORT = BIT(25),203IWL_UCODE_TLV_FLAGS_P2P_PS_UAPSD = BIT(26),204};205206typedef unsigned int __bitwise iwl_ucode_tlv_api_t;207208/**209* enum iwl_ucode_tlv_api - ucode api210* @IWL_UCODE_TLV_API_FRAGMENTED_SCAN: This ucode supports active dwell time211* longer than the passive one, which is essential for fragmented scan.212* @IWL_UCODE_TLV_API_WIFI_MCC_UPDATE: ucode supports MCC updates with source.213* @IWL_UCODE_TLV_API_LQ_SS_PARAMS: Configure STBC/BFER via LQ CMD ss_params214* @IWL_UCODE_TLV_API_NEW_VERSION: new versioning format215* @IWL_UCODE_TLV_API_SCAN_TSF_REPORT: Scan start time reported in scan216* iteration complete notification, and the timestamp reported for RX217* received during scan, are reported in TSF of the mac specified in the218* scan request.219* @IWL_UCODE_TLV_API_TKIP_MIC_KEYS: This ucode supports version 2 of220* ADD_MODIFY_STA_KEY_API_S_VER_2.221* @IWL_UCODE_TLV_API_STA_TYPE: This ucode supports station type assignement.222* @IWL_UCODE_TLV_API_NAN2_VER2: This ucode supports NAN API version 2223* @IWL_UCODE_TLV_API_ADAPTIVE_DWELL: support for adaptive dwell in scanning224* @IWL_UCODE_TLV_API_NEW_RX_STATS: should new RX STATISTICS API be used225* @IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY: Quota command includes a field226* indicating low latency direction.227* @IWL_UCODE_TLV_API_DEPRECATE_TTAK: RX status flag TTAK ok (bit 7) is228* deprecated.229* @IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2: This ucode supports version 8230* of scan request: SCAN_REQUEST_CMD_UMAC_API_S_VER_8231* @IWL_UCODE_TLV_API_FRAG_EBS: This ucode supports fragmented EBS232* @IWL_UCODE_TLV_API_REDUCE_TX_POWER: This ucode supports v5 of233* the REDUCE_TX_POWER_CMD.234* @IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF: This ucode supports the short235* version of the beacon notification.236* @IWL_UCODE_TLV_API_BEACON_FILTER_V4: This ucode supports v4 of237* BEACON_FILTER_CONFIG_API_S_VER_4.238* @IWL_UCODE_TLV_API_REGULATORY_NVM_INFO: This ucode supports v4 of239* REGULATORY_NVM_GET_INFO_RSP_API_S.240* @IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ: This ucode supports v7 of241* LOCATION_RANGE_REQ_CMD_API_S and v6 of LOCATION_RANGE_RESP_NTFY_API_S.242* @IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS: This ucode supports v2 of243* SCAN_OFFLOAD_PROFILE_MATCH_RESULTS_S and v3 of244* SCAN_OFFLOAD_PROFILES_QUERY_RSP_S.245* @IWL_UCODE_TLV_API_MBSSID_HE: This ucode supports v2 of246* STA_CONTEXT_DOT11AX_API_S247* @IWL_UCODE_TLV_API_FTM_RTT_ACCURACY: version 7 of the range response API248* is supported by FW, this indicates the RTT confidence value249* @IWL_UCODE_TLV_API_SAR_TABLE_VER: This ucode supports different sar250* version tables.251* @IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG: This ucode supports v3 of252* SCAN_CONFIG_DB_CMD_API_S.253* @IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP: support for setting adaptive dwell254* number of APs in the 5 GHz band255* @IWL_UCODE_TLV_API_BAND_IN_RX_DATA: FW reports band number in RX notification256* @IWL_UCODE_TLV_API_NO_HOST_DISABLE_TX: Firmware offloaded the station disable tx257* logic.258* @IWL_UCODE_TLV_API_INT_DBG_BUF_CLEAR: Firmware supports clearing the debug259* internal buffer260* @IWL_UCODE_TLV_API_SMART_FIFO_OFFLOAD: Firmware doesn't need the host to261* configure the smart fifo262*263* @NUM_IWL_UCODE_TLV_API: number of bits used264*/265enum iwl_ucode_tlv_api {266/* API Set 0 */267IWL_UCODE_TLV_API_FRAGMENTED_SCAN = (__force iwl_ucode_tlv_api_t)8,268IWL_UCODE_TLV_API_WIFI_MCC_UPDATE = (__force iwl_ucode_tlv_api_t)9,269IWL_UCODE_TLV_API_LQ_SS_PARAMS = (__force iwl_ucode_tlv_api_t)18,270IWL_UCODE_TLV_API_NEW_VERSION = (__force iwl_ucode_tlv_api_t)20,271IWL_UCODE_TLV_API_SCAN_TSF_REPORT = (__force iwl_ucode_tlv_api_t)28,272IWL_UCODE_TLV_API_TKIP_MIC_KEYS = (__force iwl_ucode_tlv_api_t)29,273IWL_UCODE_TLV_API_STA_TYPE = (__force iwl_ucode_tlv_api_t)30,274IWL_UCODE_TLV_API_NAN2_VER2 = (__force iwl_ucode_tlv_api_t)31,275/* API Set 1 */276IWL_UCODE_TLV_API_ADAPTIVE_DWELL = (__force iwl_ucode_tlv_api_t)32,277IWL_UCODE_TLV_API_OCE = (__force iwl_ucode_tlv_api_t)33,278IWL_UCODE_TLV_API_NEW_BEACON_TEMPLATE = (__force iwl_ucode_tlv_api_t)34,279IWL_UCODE_TLV_API_NEW_RX_STATS = (__force iwl_ucode_tlv_api_t)35,280IWL_UCODE_TLV_API_WOWLAN_KEY_MATERIAL = (__force iwl_ucode_tlv_api_t)36,281IWL_UCODE_TLV_API_QUOTA_LOW_LATENCY = (__force iwl_ucode_tlv_api_t)38,282IWL_UCODE_TLV_API_DEPRECATE_TTAK = (__force iwl_ucode_tlv_api_t)41,283IWL_UCODE_TLV_API_ADAPTIVE_DWELL_V2 = (__force iwl_ucode_tlv_api_t)42,284IWL_UCODE_TLV_API_FRAG_EBS = (__force iwl_ucode_tlv_api_t)44,285IWL_UCODE_TLV_API_REDUCE_TX_POWER = (__force iwl_ucode_tlv_api_t)45,286IWL_UCODE_TLV_API_SHORT_BEACON_NOTIF = (__force iwl_ucode_tlv_api_t)46,287IWL_UCODE_TLV_API_BEACON_FILTER_V4 = (__force iwl_ucode_tlv_api_t)47,288IWL_UCODE_TLV_API_REGULATORY_NVM_INFO = (__force iwl_ucode_tlv_api_t)48,289IWL_UCODE_TLV_API_FTM_NEW_RANGE_REQ = (__force iwl_ucode_tlv_api_t)49,290IWL_UCODE_TLV_API_SCAN_OFFLOAD_CHANS = (__force iwl_ucode_tlv_api_t)50,291IWL_UCODE_TLV_API_MBSSID_HE = (__force iwl_ucode_tlv_api_t)52,292IWL_UCODE_TLV_API_WOWLAN_TCP_SYN_WAKE = (__force iwl_ucode_tlv_api_t)53,293IWL_UCODE_TLV_API_FTM_RTT_ACCURACY = (__force iwl_ucode_tlv_api_t)54,294IWL_UCODE_TLV_API_SAR_TABLE_VER = (__force iwl_ucode_tlv_api_t)55,295IWL_UCODE_TLV_API_REDUCED_SCAN_CONFIG = (__force iwl_ucode_tlv_api_t)56,296IWL_UCODE_TLV_API_ADWELL_HB_DEF_N_AP = (__force iwl_ucode_tlv_api_t)57,297IWL_UCODE_TLV_API_SCAN_EXT_CHAN_VER = (__force iwl_ucode_tlv_api_t)58,298IWL_UCODE_TLV_API_BAND_IN_RX_DATA = (__force iwl_ucode_tlv_api_t)59,299/* API Set 2 */300IWL_UCODE_TLV_API_NO_HOST_DISABLE_TX = (__force iwl_ucode_tlv_api_t)66,301IWL_UCODE_TLV_API_INT_DBG_BUF_CLEAR = (__force iwl_ucode_tlv_api_t)67,302IWL_UCODE_TLV_API_SMART_FIFO_OFFLOAD = (__force iwl_ucode_tlv_api_t)68,303304NUM_IWL_UCODE_TLV_API305/*306* This construction make both sparse (which cannot increment the previous307* member due to its bitwise type) and kernel-doc (which doesn't understand308* the ifdef/else properly) work.309*/310#ifdef __CHECKER__311#define __CHECKER_NUM_IWL_UCODE_TLV_API 128312= (__force iwl_ucode_tlv_api_t)__CHECKER_NUM_IWL_UCODE_TLV_API,313#define NUM_IWL_UCODE_TLV_API __CHECKER_NUM_IWL_UCODE_TLV_API314#endif315};316317typedef unsigned int __bitwise iwl_ucode_tlv_capa_t;318319/**320* enum iwl_ucode_tlv_capa - ucode capabilities321* @IWL_UCODE_TLV_CAPA_D0I3_SUPPORT: supports D0i3322* @IWL_UCODE_TLV_CAPA_LAR_SUPPORT: supports Location Aware Regulatory323* @IWL_UCODE_TLV_CAPA_UMAC_SCAN: supports UMAC scan.324* @IWL_UCODE_TLV_CAPA_BEAMFORMER: supports Beamformer325* @IWL_UCODE_TLV_CAPA_TDLS_SUPPORT: support basic TDLS functionality326* @IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT: supports insertion of current327* tx power value into TPC Report action frame and Link Measurement Report328* action frame329* @IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT: supports updating current330* channel in DS parameter set element in probe requests.331* @IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT: supports adding TPC Report IE in332* probe requests.333* @IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT: supports Quiet Period requests334* @IWL_UCODE_TLV_CAPA_DQA_SUPPORT: supports dynamic queue allocation (DQA),335* which also implies support for the scheduler configuration command336* @IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH: supports TDLS channel switching337* @IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG: Consolidated D3-D0 image338* @IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT: supports Hot Spot Command339* @IWL_UCODE_TLV_CAPA_CSUM_SUPPORT: supports TCP Checksum Offload340* @IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS: support radio and beacon statistics341* @IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD: supports U-APSD on p2p interface when it342* is standalone or with a BSS station interface in the same binding.343* @IWL_UCODE_TLV_CAPA_BT_COEX_PLCR: enabled BT Coex packet level co-running344* @IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC: ucode supports LAR updates with different345* sources for the MCC. This TLV bit is a future replacement to346* IWL_UCODE_TLV_API_WIFI_MCC_UPDATE. When either is set, multi-source LAR347* is supported.348* @IWL_UCODE_TLV_CAPA_BT_COEX_RRC: supports BT Coex RRC349* @IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT: supports gscan (no longer used)350* @IWL_UCODE_TLV_CAPA_FRAGMENTED_PNVM_IMG: supports fragmented PNVM image351* @IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT: the firmware supports setting352* stabilization latency for SoCs.353* @IWL_UCODE_TLV_CAPA_STA_PM_NOTIF: firmware will send STA PM notification354* @IWL_UCODE_TLV_CAPA_TLC_OFFLOAD: firmware implements rate scaling algorithm355* @IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA: firmware implements quota related356* @IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2: firmware implements Coex Schema 2357* IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD: firmware supports CSA command358* @IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS: firmware supports ultra high band359* (6 GHz).360* @IWL_UCODE_TLV_CAPA_CS_MODIFY: firmware supports modify action CSA command361* @IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE: extended DTS measurement362* @IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS: supports short PM timeouts363* @IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT: supports bt-coex Multi-priority LUT364* @IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD: the firmware supports CSA365* countdown offloading. Beacon notifications are not sent to the host.366* The fw also offloads TBTT alignment.367* @IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION: firmware will decide on what368* antenna the beacon should be transmitted369* @IWL_UCODE_TLV_CAPA_BEACON_STORING: firmware will store the latest beacon370* from AP and will send it upon d0i3 exit.371* @IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3: support LAR API V3372* @IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW: firmware responsible for CT-kill373* @IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT: supports temperature374* thresholds reporting375* @IWL_UCODE_TLV_CAPA_CTDP_SUPPORT: supports cTDP command376* @IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED: supports usniffer enabled in377* regular image.378* @IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG: support getting more shared379* memory addresses from the firmware.380* @IWL_UCODE_TLV_CAPA_LQM_SUPPORT: supports Link Quality Measurement381* @IWL_UCODE_TLV_CAPA_TX_POWER_ACK: reduced TX power API has larger382* command size (command version 4) that supports toggling ACK TX383* power reduction.384* @IWL_UCODE_TLV_CAPA_D3_DEBUG: supports debug recording during D3385* @IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT: MCC response support 11ax386* capability.387* @IWL_UCODE_TLV_CAPA_CSI_REPORTING: firmware is capable of being configured388* to report the CSI information with (certain) RX frames389* @IWL_UCODE_TLV_CAPA_FTM_CALIBRATED: has FTM calibrated and thus supports both390* initiator and responder391* @IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_UNII4_US_CA: supports (de)activating UNII-4392* for US/CA/WW from BIOS393* @IWL_UCODE_TLV_CAPA_PROTECTED_TWT: Supports protection of TWT action frames394* @IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE: Supports the firmware handshake in395* reset flow396* @IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN: Support for passive scan on 6GHz PSC397* channels even when these are not enabled.398* @IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT: Support for indicating dump collection399* complete to FW.400* @IWL_UCODE_TLV_CAPA_SPP_AMSDU_SUPPORT: Support SPP (signaling and payload401* protected) A-MSDU.402* @IWL_UCODE_TLV_CAPA_SECURE_LTF_SUPPORT: Support secure LTF measurement.403* @IWL_UCODE_TLV_CAPA_MONITOR_PASSIVE_CHANS: Support monitor mode on otherwise404* passive channels405* @IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_5G9_FOR_CA: supports (de)activating 5G9406* for CA from BIOS.407* @IWL_UCODE_TLV_CAPA_UHB_CANADA_TAS_SUPPORT: supports %TAS_UHB_ALLOWED_CANADA408* @IWL_UCODE_TLV_CAPA_EXT_FSEQ_IMAGE_SUPPORT: external FSEQ image support409* @IWL_UCODE_TLV_CAPA_FW_ACCEPTS_RAW_DSM_TABLE: Firmware has capability of410* handling raw DSM table data.411*412* @NUM_IWL_UCODE_TLV_CAPA: number of bits used413*/414enum iwl_ucode_tlv_capa {415/* set 0 */416IWL_UCODE_TLV_CAPA_D0I3_SUPPORT = (__force iwl_ucode_tlv_capa_t)0,417IWL_UCODE_TLV_CAPA_LAR_SUPPORT = (__force iwl_ucode_tlv_capa_t)1,418IWL_UCODE_TLV_CAPA_UMAC_SCAN = (__force iwl_ucode_tlv_capa_t)2,419IWL_UCODE_TLV_CAPA_BEAMFORMER = (__force iwl_ucode_tlv_capa_t)3,420IWL_UCODE_TLV_CAPA_TDLS_SUPPORT = (__force iwl_ucode_tlv_capa_t)6,421IWL_UCODE_TLV_CAPA_TXPOWER_INSERTION_SUPPORT = (__force iwl_ucode_tlv_capa_t)8,422IWL_UCODE_TLV_CAPA_DS_PARAM_SET_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)9,423IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT = (__force iwl_ucode_tlv_capa_t)10,424IWL_UCODE_TLV_CAPA_QUIET_PERIOD_SUPPORT = (__force iwl_ucode_tlv_capa_t)11,425IWL_UCODE_TLV_CAPA_DQA_SUPPORT = (__force iwl_ucode_tlv_capa_t)12,426IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH = (__force iwl_ucode_tlv_capa_t)13,427IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG = (__force iwl_ucode_tlv_capa_t)17,428IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT = (__force iwl_ucode_tlv_capa_t)18,429IWL_UCODE_TLV_CAPA_CSUM_SUPPORT = (__force iwl_ucode_tlv_capa_t)21,430IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS = (__force iwl_ucode_tlv_capa_t)22,431IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD = (__force iwl_ucode_tlv_capa_t)26,432IWL_UCODE_TLV_CAPA_BT_COEX_PLCR = (__force iwl_ucode_tlv_capa_t)28,433IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC = (__force iwl_ucode_tlv_capa_t)29,434IWL_UCODE_TLV_CAPA_BT_COEX_RRC = (__force iwl_ucode_tlv_capa_t)30,435IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT = (__force iwl_ucode_tlv_capa_t)31,436437/* set 1 */438IWL_UCODE_TLV_CAPA_FRAGMENTED_PNVM_IMG = (__force iwl_ucode_tlv_capa_t)32,439IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT = (__force iwl_ucode_tlv_capa_t)37,440IWL_UCODE_TLV_CAPA_STA_PM_NOTIF = (__force iwl_ucode_tlv_capa_t)38,441IWL_UCODE_TLV_CAPA_BINDING_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)39,442IWL_UCODE_TLV_CAPA_CDB_SUPPORT = (__force iwl_ucode_tlv_capa_t)40,443IWL_UCODE_TLV_CAPA_D0I3_END_FIRST = (__force iwl_ucode_tlv_capa_t)41,444IWL_UCODE_TLV_CAPA_TLC_OFFLOAD = (__force iwl_ucode_tlv_capa_t)43,445IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA = (__force iwl_ucode_tlv_capa_t)44,446IWL_UCODE_TLV_CAPA_COEX_SCHEMA_2 = (__force iwl_ucode_tlv_capa_t)45,447IWL_UCODE_TLV_CAPA_CHANNEL_SWITCH_CMD = (__force iwl_ucode_tlv_capa_t)46,448IWL_UCODE_TLV_CAPA_FTM_CALIBRATED = (__force iwl_ucode_tlv_capa_t)47,449IWL_UCODE_TLV_CAPA_ULTRA_HB_CHANNELS = (__force iwl_ucode_tlv_capa_t)48,450IWL_UCODE_TLV_CAPA_CS_MODIFY = (__force iwl_ucode_tlv_capa_t)49,451IWL_UCODE_TLV_CAPA_SET_LTR_GEN2 = (__force iwl_ucode_tlv_capa_t)50,452IWL_UCODE_TLV_CAPA_SET_PPAG = (__force iwl_ucode_tlv_capa_t)52,453IWL_UCODE_TLV_CAPA_TAS_CFG = (__force iwl_ucode_tlv_capa_t)53,454IWL_UCODE_TLV_CAPA_SESSION_PROT_CMD = (__force iwl_ucode_tlv_capa_t)54,455IWL_UCODE_TLV_CAPA_PROTECTED_TWT = (__force iwl_ucode_tlv_capa_t)56,456IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE = (__force iwl_ucode_tlv_capa_t)57,457IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN = (__force iwl_ucode_tlv_capa_t)58,458IWL_UCODE_TLV_CAPA_HIDDEN_6GHZ_SCAN = (__force iwl_ucode_tlv_capa_t)59,459IWL_UCODE_TLV_CAPA_BROADCAST_TWT = (__force iwl_ucode_tlv_capa_t)60,460IWL_UCODE_TLV_CAPA_COEX_HIGH_PRIO = (__force iwl_ucode_tlv_capa_t)61,461IWL_UCODE_TLV_CAPA_RFIM_SUPPORT = (__force iwl_ucode_tlv_capa_t)62,462IWL_UCODE_TLV_CAPA_BAID_ML_SUPPORT = (__force iwl_ucode_tlv_capa_t)63,463464/* set 2 */465IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE = (__force iwl_ucode_tlv_capa_t)64,466IWL_UCODE_TLV_CAPA_SHORT_PM_TIMEOUTS = (__force iwl_ucode_tlv_capa_t)65,467IWL_UCODE_TLV_CAPA_BT_MPLUT_SUPPORT = (__force iwl_ucode_tlv_capa_t)67,468IWL_UCODE_TLV_CAPA_MULTI_QUEUE_RX_SUPPORT = (__force iwl_ucode_tlv_capa_t)68,469IWL_UCODE_TLV_CAPA_CSA_AND_TBTT_OFFLOAD = (__force iwl_ucode_tlv_capa_t)70,470IWL_UCODE_TLV_CAPA_BEACON_ANT_SELECTION = (__force iwl_ucode_tlv_capa_t)71,471IWL_UCODE_TLV_CAPA_BEACON_STORING = (__force iwl_ucode_tlv_capa_t)72,472IWL_UCODE_TLV_CAPA_LAR_SUPPORT_V3 = (__force iwl_ucode_tlv_capa_t)73,473IWL_UCODE_TLV_CAPA_CT_KILL_BY_FW = (__force iwl_ucode_tlv_capa_t)74,474IWL_UCODE_TLV_CAPA_TEMP_THS_REPORT_SUPPORT = (__force iwl_ucode_tlv_capa_t)75,475IWL_UCODE_TLV_CAPA_CTDP_SUPPORT = (__force iwl_ucode_tlv_capa_t)76,476IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED = (__force iwl_ucode_tlv_capa_t)77,477IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG = (__force iwl_ucode_tlv_capa_t)80,478IWL_UCODE_TLV_CAPA_LQM_SUPPORT = (__force iwl_ucode_tlv_capa_t)81,479IWL_UCODE_TLV_CAPA_TX_POWER_ACK = (__force iwl_ucode_tlv_capa_t)84,480IWL_UCODE_TLV_CAPA_D3_DEBUG = (__force iwl_ucode_tlv_capa_t)87,481IWL_UCODE_TLV_CAPA_LED_CMD_SUPPORT = (__force iwl_ucode_tlv_capa_t)88,482IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT = (__force iwl_ucode_tlv_capa_t)89,483IWL_UCODE_TLV_CAPA_CSI_REPORTING = (__force iwl_ucode_tlv_capa_t)90,484IWL_UCODE_TLV_CAPA_DBG_SUSPEND_RESUME_CMD_SUPP = (__force iwl_ucode_tlv_capa_t)92,485IWL_UCODE_TLV_CAPA_DBG_BUF_ALLOC_CMD_SUPP = (__force iwl_ucode_tlv_capa_t)93,486487/* set 3 */488IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_UNII4_US_CA = (__force iwl_ucode_tlv_capa_t)96,489490/*491* @IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT: supports PSC channels492*/493IWL_UCODE_TLV_CAPA_PSC_CHAN_SUPPORT = (__force iwl_ucode_tlv_capa_t)98,494495IWL_UCODE_TLV_CAPA_BIGTK_SUPPORT = (__force iwl_ucode_tlv_capa_t)100,496IWL_UCODE_TLV_CAPA_SPP_AMSDU_SUPPORT = (__force iwl_ucode_tlv_capa_t)103,497IWL_UCODE_TLV_CAPA_DRAM_FRAG_SUPPORT = (__force iwl_ucode_tlv_capa_t)104,498IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT = (__force iwl_ucode_tlv_capa_t)105,499IWL_UCODE_TLV_CAPA_SYNCED_TIME = (__force iwl_ucode_tlv_capa_t)106,500IWL_UCODE_TLV_CAPA_TIME_SYNC_BOTH_FTM_TM = (__force iwl_ucode_tlv_capa_t)108,501IWL_UCODE_TLV_CAPA_BIGTK_TX_SUPPORT = (__force iwl_ucode_tlv_capa_t)109,502IWL_UCODE_TLV_CAPA_MLD_API_SUPPORT = (__force iwl_ucode_tlv_capa_t)110,503IWL_UCODE_TLV_CAPA_SCAN_DONT_TOGGLE_ANT = (__force iwl_ucode_tlv_capa_t)111,504IWL_UCODE_TLV_CAPA_PPAG_CHINA_BIOS_SUPPORT = (__force iwl_ucode_tlv_capa_t)112,505IWL_UCODE_TLV_CAPA_OFFLOAD_BTM_SUPPORT = (__force iwl_ucode_tlv_capa_t)113,506IWL_UCODE_TLV_CAPA_STA_EXP_MFP_SUPPORT = (__force iwl_ucode_tlv_capa_t)114,507IWL_UCODE_TLV_CAPA_SNIFF_VALIDATE_SUPPORT = (__force iwl_ucode_tlv_capa_t)116,508IWL_UCODE_TLV_CAPA_CHINA_22_REG_SUPPORT = (__force iwl_ucode_tlv_capa_t)117,509IWL_UCODE_TLV_CAPA_SECURE_LTF_SUPPORT = (__force iwl_ucode_tlv_capa_t)121,510IWL_UCODE_TLV_CAPA_MONITOR_PASSIVE_CHANS = (__force iwl_ucode_tlv_capa_t)122,511IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_5G9_FOR_CA = (__force iwl_ucode_tlv_capa_t)123,512IWL_UCODE_TLV_CAPA_UHB_CANADA_TAS_SUPPORT = (__force iwl_ucode_tlv_capa_t)124,513IWL_UCODE_TLV_CAPA_EXT_FSEQ_IMAGE_SUPPORT = (__force iwl_ucode_tlv_capa_t)125,514515/* set 4 */516/**517* @IWL_UCODE_TLV_CAPA_RESET_DURING_ASSERT: FW reset handshake is needed518* during assert handling even if the dump isn't split519*/520IWL_UCODE_TLV_CAPA_RESET_DURING_ASSERT = (__force iwl_ucode_tlv_capa_t)(4 * 32 + 0),521IWL_UCODE_TLV_CAPA_FW_ACCEPTS_RAW_DSM_TABLE = (__force iwl_ucode_tlv_capa_t)(4 * 32 + 1),522NUM_IWL_UCODE_TLV_CAPA523/*524* This construction make both sparse (which cannot increment the previous525* member due to its bitwise type) and kernel-doc (which doesn't understand526* the ifdef/else properly) work.527*/528#ifdef __CHECKER__529#define __CHECKER_NUM_IWL_UCODE_TLV_CAPA 128530= (__force iwl_ucode_tlv_capa_t)__CHECKER_NUM_IWL_UCODE_TLV_CAPA,531#define NUM_IWL_UCODE_TLV_CAPA __CHECKER_NUM_IWL_UCODE_TLV_CAPA532#endif533};534535/* The default calibrate table size if not specified by firmware file */536#define IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE 18537#define IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE 19538#define IWL_MAX_PHY_CALIBRATE_TBL_SIZE 253539540/* The default max probe length if not specified by the firmware file */541#define IWL_DEFAULT_MAX_PROBE_LENGTH 200542543/*544* For 16.0 uCode and above, there is no differentiation between sections,545* just an offset to the HW address.546*/547#define CPU1_CPU2_SEPARATOR_SECTION 0xFFFFCCCC548#define PAGING_SEPARATOR_SECTION 0xAAAABBBB549550/* uCode version contains 4 values: Major/Minor/API/Serial */551#define IWL_UCODE_MAJOR(ver) (((ver) & 0xFF000000) >> 24)552#define IWL_UCODE_MINOR(ver) (((ver) & 0x00FF0000) >> 16)553#define IWL_UCODE_API(ver) (((ver) & 0x0000FF00) >> 8)554#define IWL_UCODE_SERIAL(ver) ((ver) & 0x000000FF)555556/**557* struct iwl_tlv_calib_ctrl - Calibration control struct.558* Sent as part of the phy configuration command.559* @flow_trigger: bitmap for which calibrations to perform according to560* flow triggers.561* @event_trigger: bitmap for which calibrations to perform according to562* event triggers.563*/564struct iwl_tlv_calib_ctrl {565__le32 flow_trigger;566__le32 event_trigger;567} __packed;568569enum iwl_fw_phy_cfg {570FW_PHY_CFG_RADIO_TYPE_POS = 0,571FW_PHY_CFG_RADIO_TYPE = 0x3 << FW_PHY_CFG_RADIO_TYPE_POS,572FW_PHY_CFG_RADIO_STEP_POS = 2,573FW_PHY_CFG_RADIO_STEP = 0x3 << FW_PHY_CFG_RADIO_STEP_POS,574FW_PHY_CFG_RADIO_DASH_POS = 4,575FW_PHY_CFG_RADIO_DASH = 0x3 << FW_PHY_CFG_RADIO_DASH_POS,576FW_PHY_CFG_TX_CHAIN_POS = 16,577FW_PHY_CFG_TX_CHAIN = 0xf << FW_PHY_CFG_TX_CHAIN_POS,578FW_PHY_CFG_RX_CHAIN_POS = 20,579FW_PHY_CFG_RX_CHAIN = 0xf << FW_PHY_CFG_RX_CHAIN_POS,580FW_PHY_CFG_CHAIN_SAD_POS = 23,581FW_PHY_CFG_CHAIN_SAD_ENABLED = 0x1 << FW_PHY_CFG_CHAIN_SAD_POS,582FW_PHY_CFG_CHAIN_SAD_ANT_A = 0x2 << FW_PHY_CFG_CHAIN_SAD_POS,583FW_PHY_CFG_CHAIN_SAD_ANT_B = 0x4 << FW_PHY_CFG_CHAIN_SAD_POS,584FW_PHY_CFG_SHARED_CLK = BIT(31),585};586587enum iwl_fw_dbg_reg_operator {588CSR_ASSIGN,589CSR_SETBIT,590CSR_CLEARBIT,591592PRPH_ASSIGN,593PRPH_SETBIT,594PRPH_CLEARBIT,595596INDIRECT_ASSIGN,597INDIRECT_SETBIT,598INDIRECT_CLEARBIT,599600PRPH_BLOCKBIT,601};602603/**604* struct iwl_fw_dbg_reg_op - an operation on a register605*606* @op: &enum iwl_fw_dbg_reg_operator607* @reserved: reserved608* @addr: offset of the register609* @val: value610*/611struct iwl_fw_dbg_reg_op {612u8 op;613u8 reserved[3];614__le32 addr;615__le32 val;616} __packed;617618/**619* enum iwl_fw_dbg_monitor_mode - available monitor recording modes620*621* @SMEM_MODE: monitor stores the data in SMEM622* @EXTERNAL_MODE: monitor stores the data in allocated DRAM623* @MARBH_MODE: monitor stores the data in MARBH buffer624* @MIPI_MODE: monitor outputs the data through the MIPI interface625*/626enum iwl_fw_dbg_monitor_mode {627SMEM_MODE = 0,628EXTERNAL_MODE = 1,629MARBH_MODE = 2,630MIPI_MODE = 3,631};632633/**634* struct iwl_fw_dbg_mem_seg_tlv - configures the debug data memory segments635*636* @data_type: the memory segment type to record637* @ofs: the memory segment offset638* @len: the memory segment length, in bytes639*640* This parses IWL_UCODE_TLV_FW_MEM_SEG641*/642struct iwl_fw_dbg_mem_seg_tlv {643__le32 data_type;644__le32 ofs;645__le32 len;646} __packed;647648/**649* struct iwl_fw_dbg_dest_tlv_v1 - configures the destination of the debug data650*651* @version: version of the TLV - currently 0652* @monitor_mode: &enum iwl_fw_dbg_monitor_mode653* @size_power: buffer size will be 2^(size_power + 11)654* @reserved: reserved655* @base_reg: addr of the base addr register (PRPH)656* @end_reg: addr of the end addr register (PRPH)657* @write_ptr_reg: the addr of the reg of the write pointer658* @wrap_count: the addr of the reg of the wrap_count659* @base_shift: shift right of the base addr reg660* @end_shift: shift right of the end addr reg661* @reg_ops: array of registers operations662*663* This parses IWL_UCODE_TLV_FW_DBG_DEST664*/665struct iwl_fw_dbg_dest_tlv_v1 {666u8 version;667u8 monitor_mode;668u8 size_power;669u8 reserved;670__le32 base_reg;671__le32 end_reg;672__le32 write_ptr_reg;673__le32 wrap_count;674u8 base_shift;675u8 end_shift;676struct iwl_fw_dbg_reg_op reg_ops[];677} __packed;678679/* Mask of the register for defining the LDBG MAC2SMEM buffer SMEM size */680#define IWL_LDBG_M2S_BUF_SIZE_MSK 0x0fff0000681/* Mask of the register for defining the LDBG MAC2SMEM SMEM base address */682#define IWL_LDBG_M2S_BUF_BA_MSK 0x00000fff683/* The smem buffer chunks are in units of 256 bits */684#define IWL_M2S_UNIT_SIZE 0x100685686struct iwl_fw_dbg_dest_tlv {687u8 version;688u8 monitor_mode;689u8 size_power;690u8 reserved;691__le32 cfg_reg;692__le32 write_ptr_reg;693__le32 wrap_count;694u8 base_shift;695u8 size_shift;696struct iwl_fw_dbg_reg_op reg_ops[];697} __packed;698699struct iwl_fw_dbg_conf_hcmd {700u8 id;701u8 reserved;702__le16 len;703u8 data[];704} __packed;705706/**707* enum iwl_fw_dbg_trigger_mode - triggers functionalities708*709* @IWL_FW_DBG_TRIGGER_START: when trigger occurs re-conf the dbg mechanism710* @IWL_FW_DBG_TRIGGER_STOP: when trigger occurs pull the dbg data711* @IWL_FW_DBG_TRIGGER_MONITOR_ONLY: when trigger occurs trigger is set to712* collect only monitor data713*/714enum iwl_fw_dbg_trigger_mode {715IWL_FW_DBG_TRIGGER_START = BIT(0),716IWL_FW_DBG_TRIGGER_STOP = BIT(1),717IWL_FW_DBG_TRIGGER_MONITOR_ONLY = BIT(2),718};719720/**721* enum iwl_fw_dbg_trigger_flags - the flags supported by wrt triggers722* @IWL_FW_DBG_FORCE_RESTART: force a firmware restart723*/724enum iwl_fw_dbg_trigger_flags {725IWL_FW_DBG_FORCE_RESTART = BIT(0),726};727728/**729* enum iwl_fw_dbg_trigger_vif_type - define the VIF type for a trigger730* @IWL_FW_DBG_CONF_VIF_ANY: any vif type731* @IWL_FW_DBG_CONF_VIF_IBSS: IBSS mode732* @IWL_FW_DBG_CONF_VIF_STATION: BSS mode733* @IWL_FW_DBG_CONF_VIF_AP: AP mode734* @IWL_FW_DBG_CONF_VIF_P2P_CLIENT: P2P Client mode735* @IWL_FW_DBG_CONF_VIF_P2P_GO: P2P GO mode736* @IWL_FW_DBG_CONF_VIF_P2P_DEVICE: P2P device737*/738enum iwl_fw_dbg_trigger_vif_type {739IWL_FW_DBG_CONF_VIF_ANY = NL80211_IFTYPE_UNSPECIFIED,740IWL_FW_DBG_CONF_VIF_IBSS = NL80211_IFTYPE_ADHOC,741IWL_FW_DBG_CONF_VIF_STATION = NL80211_IFTYPE_STATION,742IWL_FW_DBG_CONF_VIF_AP = NL80211_IFTYPE_AP,743IWL_FW_DBG_CONF_VIF_P2P_CLIENT = NL80211_IFTYPE_P2P_CLIENT,744IWL_FW_DBG_CONF_VIF_P2P_GO = NL80211_IFTYPE_P2P_GO,745IWL_FW_DBG_CONF_VIF_P2P_DEVICE = NL80211_IFTYPE_P2P_DEVICE,746};747748/**749* struct iwl_fw_dbg_trigger_tlv - a TLV that describes the trigger750* @id: &enum iwl_fw_dbg_trigger751* @vif_type: &enum iwl_fw_dbg_trigger_vif_type752* @stop_conf_ids: bitmap of configurations this trigger relates to.753* if the mode is %IWL_FW_DBG_TRIGGER_STOP, then if the bit corresponding754* to the currently running configuration is set, the data should be755* collected.756* @stop_delay: how many milliseconds to wait before collecting the data757* after the STOP trigger fires.758* @mode: &enum iwl_fw_dbg_trigger_mode - can be stop / start of both759* @start_conf_id: if mode is %IWL_FW_DBG_TRIGGER_START, this defines what760* configuration should be applied when the triggers kicks in.761* @occurrences: number of occurrences. 0 means the trigger will never fire.762* @trig_dis_ms: the time, in milliseconds, after an occurrence of this763* trigger in which another occurrence should be ignored.764* @flags: &enum iwl_fw_dbg_trigger_flags765* @reserved: reserved (for alignment)766* @data: trigger data767*/768struct iwl_fw_dbg_trigger_tlv {769__le32 id;770__le32 vif_type;771__le32 stop_conf_ids;772__le32 stop_delay;773u8 mode;774u8 start_conf_id;775__le16 occurrences;776__le16 trig_dis_ms;777u8 flags;778u8 reserved[5];779780u8 data[];781} __packed;782783#define FW_DBG_START_FROM_ALIVE 0784#define FW_DBG_CONF_MAX 32785#define FW_DBG_INVALID 0xff786787/**788* struct iwl_fw_dbg_trigger_missed_bcon - configures trigger for missed beacons789* @stop_consec_missed_bcon: stop recording if threshold is crossed.790* @stop_consec_missed_bcon_since_rx: stop recording if threshold is crossed.791* @start_consec_missed_bcon: start recording if threshold is crossed.792* @start_consec_missed_bcon_since_rx: start recording if threshold is crossed.793* @reserved1: reserved794* @reserved2: reserved795*/796struct iwl_fw_dbg_trigger_missed_bcon {797__le32 stop_consec_missed_bcon;798__le32 stop_consec_missed_bcon_since_rx;799__le32 reserved2[2];800__le32 start_consec_missed_bcon;801__le32 start_consec_missed_bcon_since_rx;802__le32 reserved1[2];803} __packed;804805/**806* struct iwl_fw_dbg_trigger_cmd - configures trigger for messages from FW.807* @cmds: the list of commands to trigger the collection on808*/809struct iwl_fw_dbg_trigger_cmd {810struct cmd {811u8 cmd_id;812u8 group_id;813} __packed cmds[16];814} __packed;815816/**817* struct iwl_fw_dbg_trigger_stats - configures trigger for statistics818* @stop_offset: the offset of the value to be monitored819* @stop_threshold: the threshold above which to collect820* @start_offset: the offset of the value to be monitored821* @start_threshold: the threshold above which to start recording822*/823struct iwl_fw_dbg_trigger_stats {824__le32 stop_offset;825__le32 stop_threshold;826__le32 start_offset;827__le32 start_threshold;828} __packed;829830/**831* struct iwl_fw_dbg_trigger_low_rssi - trigger for low beacon RSSI832* @rssi: RSSI value to trigger at833*/834struct iwl_fw_dbg_trigger_low_rssi {835__le32 rssi;836} __packed;837838/**839* struct iwl_fw_dbg_trigger_mlme - configures trigger for mlme events840* @stop_auth_denied: number of denied authentication to collect841* @stop_auth_timeout: number of authentication timeout to collect842* @stop_rx_deauth: number of Rx deauth before to collect843* @stop_tx_deauth: number of Tx deauth before to collect844* @stop_assoc_denied: number of denied association to collect845* @stop_assoc_timeout: number of association timeout to collect846* @stop_connection_loss: number of connection loss to collect847* @start_auth_denied: number of denied authentication to start recording848* @start_auth_timeout: number of authentication timeout to start recording849* @start_rx_deauth: number of Rx deauth to start recording850* @start_tx_deauth: number of Tx deauth to start recording851* @start_assoc_denied: number of denied association to start recording852* @start_assoc_timeout: number of association timeout to start recording853* @start_connection_loss: number of connection loss to start recording854*/855struct iwl_fw_dbg_trigger_mlme {856u8 stop_auth_denied;857u8 stop_auth_timeout;858u8 stop_rx_deauth;859u8 stop_tx_deauth;860861u8 stop_assoc_denied;862u8 stop_assoc_timeout;863u8 stop_connection_loss;864u8 reserved;865866u8 start_auth_denied;867u8 start_auth_timeout;868u8 start_rx_deauth;869u8 start_tx_deauth;870871u8 start_assoc_denied;872u8 start_assoc_timeout;873u8 start_connection_loss;874u8 reserved2;875} __packed;876877/**878* struct iwl_fw_dbg_trigger_txq_timer - configures the Tx queue's timer879* @command_queue: timeout for the command queue in ms880* @bss: timeout for the queues of a BSS (except for TDLS queues) in ms881* @softap: timeout for the queues of a softAP in ms882* @p2p_go: timeout for the queues of a P2P GO in ms883* @p2p_client: timeout for the queues of a P2P client in ms884* @p2p_device: timeout for the queues of a P2P device in ms885* @ibss: timeout for the queues of an IBSS in ms886* @tdls: timeout for the queues of a TDLS station in ms887*/888struct iwl_fw_dbg_trigger_txq_timer {889__le32 command_queue;890__le32 bss;891__le32 softap;892__le32 p2p_go;893__le32 p2p_client;894__le32 p2p_device;895__le32 ibss;896__le32 tdls;897__le32 reserved[4];898} __packed;899900/**901* struct iwl_fw_dbg_trigger_time_event - configures a time event trigger902* time_Events: a list of tuples <id, action_bitmap>. The driver will issue a903* trigger each time a time event notification that relates to time event904* id with one of the actions in the bitmap is received and905* BIT(notif->status) is set in status_bitmap.906*907*/908struct iwl_fw_dbg_trigger_time_event {909struct {910__le32 id;911__le32 action_bitmap;912__le32 status_bitmap;913} __packed time_events[16];914} __packed;915916/**917* struct iwl_fw_dbg_trigger_ba - configures BlockAck related trigger918* rx_ba_start: tid bitmap to configure on what tid the trigger should occur919* when an Rx BlockAck session is started.920* rx_ba_stop: tid bitmap to configure on what tid the trigger should occur921* when an Rx BlockAck session is stopped.922* tx_ba_start: tid bitmap to configure on what tid the trigger should occur923* when a Tx BlockAck session is started.924* tx_ba_stop: tid bitmap to configure on what tid the trigger should occur925* when a Tx BlockAck session is stopped.926* rx_bar: tid bitmap to configure on what tid the trigger should occur927* when a BAR is received (for a Tx BlockAck session).928* tx_bar: tid bitmap to configure on what tid the trigger should occur929* when a BAR is send (for an Rx BlocAck session).930* frame_timeout: tid bitmap to configure on what tid the trigger should occur931* when a frame times out in the reordering buffer.932*/933struct iwl_fw_dbg_trigger_ba {934__le16 rx_ba_start;935__le16 rx_ba_stop;936__le16 tx_ba_start;937__le16 tx_ba_stop;938__le16 rx_bar;939__le16 tx_bar;940__le16 frame_timeout;941} __packed;942943/**944* struct iwl_fw_dbg_trigger_tdls - configures trigger for TDLS events.945* @action_bitmap: the TDLS action to trigger the collection upon946* @peer_mode: trigger on specific peer or all947* @peer: the TDLS peer to trigger the collection on948*/949struct iwl_fw_dbg_trigger_tdls {950u8 action_bitmap;951u8 peer_mode;952u8 peer[ETH_ALEN];953u8 reserved[4];954} __packed;955956/**957* struct iwl_fw_dbg_trigger_tx_status - configures trigger for tx response958* status.959* @statuses: the list of statuses to trigger the collection on960*/961struct iwl_fw_dbg_trigger_tx_status {962struct tx_status {963u8 status;964u8 reserved[3];965} __packed statuses[16];966__le32 reserved[2];967} __packed;968969/**970* struct iwl_fw_dbg_conf_tlv - a TLV that describes a debug configuration.971* @id: conf id972* @usniffer: should the uSniffer image be used973* @num_of_hcmds: how many HCMDs to send are present here974* @hcmd: a variable length host command to be sent to apply the configuration.975* If there is more than one HCMD to send, they will appear one after the976* other and be sent in the order that they appear in.977* This parses IWL_UCODE_TLV_FW_DBG_CONF. The user can add up-to978* %FW_DBG_CONF_MAX configuration per run.979*/980struct iwl_fw_dbg_conf_tlv {981u8 id;982u8 usniffer;983u8 reserved;984u8 num_of_hcmds;985struct iwl_fw_dbg_conf_hcmd hcmd;986} __packed;987988#define IWL_FW_CMD_VER_UNKNOWN 99989990/**991* struct iwl_fw_cmd_version - firmware command version entry992* @cmd: command ID993* @group: group ID994* @cmd_ver: command version995* @notif_ver: notification version996*/997struct iwl_fw_cmd_version {998u8 cmd;999u8 group;1000u8 cmd_ver;1001u8 notif_ver;1002} __packed;10031004struct iwl_fw_tcm_error_addr {1005__le32 addr;1006}; /* FW_TLV_TCM_ERROR_INFO_ADDRS_S */10071008struct iwl_fw_dump_exclude {1009__le32 addr, size;1010};10111012struct iwl_fw_fseq_bin_version {1013__le32 major, minor;1014}; /* FW_TLV_FSEQ_BIN_VERSION_S */10151016static inline size_t _iwl_tlv_array_len(const struct iwl_ucode_tlv *tlv,1017size_t fixed_size, size_t var_size)1018{1019size_t var_len = le32_to_cpu(tlv->length) - fixed_size;10201021if (WARN_ON(var_len % var_size))1022return 0;10231024return var_len / var_size;1025}10261027#define iwl_tlv_array_len(_tlv_ptr, _struct_ptr, _memb) \1028_iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)), \1029sizeof(_struct_ptr->_memb[0]))10301031#define iwl_tlv_array_len_with_size(_tlv_ptr, _struct_ptr, _size) \1032_iwl_tlv_array_len((_tlv_ptr), sizeof(*(_struct_ptr)), _size)10331034/* external FSEQ file */1035#define IWL_FSEQ_FILE "intel/fseq-%04x-%04x"1036#define IWL_FSEQ_MAGIC "INTEL-CNV-FSEQ\n\0"10371038struct iwl_fseq_file {1039char magic[16];1040char version[16];1041__le32 bt_len;1042__le32 wifi_len;1043u8 reserved[8];1044u8 data[];1045} __packed;10461047#endif /* __iwl_fw_file_h__ */104810491050