Path: blob/main/sys/contrib/dev/mediatek/mt76/mac80211.c
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// SPDX-License-Identifier: BSD-3-Clause-Clear1/*2* Copyright (C) 2016 Felix Fietkau <[email protected]>3*/4#include <linux/sched.h>5#if defined(CONFIG_OF)6#include <linux/of.h>7#endif8#if defined(__FreeBSD__)9#include <linux/math64.h>10#include <linux/numa.h>11#endif12#include "mt76.h"1314#define CHAN2G(_idx, _freq) { \15.band = NL80211_BAND_2GHZ, \16.center_freq = (_freq), \17.hw_value = (_idx), \18.max_power = 30, \19}2021#define CHAN5G(_idx, _freq) { \22.band = NL80211_BAND_5GHZ, \23.center_freq = (_freq), \24.hw_value = (_idx), \25.max_power = 30, \26}2728#define CHAN6G(_idx, _freq) { \29.band = NL80211_BAND_6GHZ, \30.center_freq = (_freq), \31.hw_value = (_idx), \32.max_power = 30, \33}3435static const struct ieee80211_channel mt76_channels_2ghz[] = {36CHAN2G(1, 2412),37CHAN2G(2, 2417),38CHAN2G(3, 2422),39CHAN2G(4, 2427),40CHAN2G(5, 2432),41CHAN2G(6, 2437),42CHAN2G(7, 2442),43CHAN2G(8, 2447),44CHAN2G(9, 2452),45CHAN2G(10, 2457),46CHAN2G(11, 2462),47CHAN2G(12, 2467),48CHAN2G(13, 2472),49CHAN2G(14, 2484),50};5152static const struct ieee80211_channel mt76_channels_5ghz[] = {53CHAN5G(36, 5180),54CHAN5G(40, 5200),55CHAN5G(44, 5220),56CHAN5G(48, 5240),5758CHAN5G(52, 5260),59CHAN5G(56, 5280),60CHAN5G(60, 5300),61CHAN5G(64, 5320),6263CHAN5G(100, 5500),64CHAN5G(104, 5520),65CHAN5G(108, 5540),66CHAN5G(112, 5560),67CHAN5G(116, 5580),68CHAN5G(120, 5600),69CHAN5G(124, 5620),70CHAN5G(128, 5640),71CHAN5G(132, 5660),72CHAN5G(136, 5680),73CHAN5G(140, 5700),74CHAN5G(144, 5720),7576CHAN5G(149, 5745),77CHAN5G(153, 5765),78CHAN5G(157, 5785),79CHAN5G(161, 5805),80CHAN5G(165, 5825),81CHAN5G(169, 5845),82CHAN5G(173, 5865),83CHAN5G(177, 5885),84};8586static const struct ieee80211_channel mt76_channels_6ghz[] = {87/* UNII-5 */88CHAN6G(1, 5955),89CHAN6G(5, 5975),90CHAN6G(9, 5995),91CHAN6G(13, 6015),92CHAN6G(17, 6035),93CHAN6G(21, 6055),94CHAN6G(25, 6075),95CHAN6G(29, 6095),96CHAN6G(33, 6115),97CHAN6G(37, 6135),98CHAN6G(41, 6155),99CHAN6G(45, 6175),100CHAN6G(49, 6195),101CHAN6G(53, 6215),102CHAN6G(57, 6235),103CHAN6G(61, 6255),104CHAN6G(65, 6275),105CHAN6G(69, 6295),106CHAN6G(73, 6315),107CHAN6G(77, 6335),108CHAN6G(81, 6355),109CHAN6G(85, 6375),110CHAN6G(89, 6395),111CHAN6G(93, 6415),112/* UNII-6 */113CHAN6G(97, 6435),114CHAN6G(101, 6455),115CHAN6G(105, 6475),116CHAN6G(109, 6495),117CHAN6G(113, 6515),118CHAN6G(117, 6535),119/* UNII-7 */120CHAN6G(121, 6555),121CHAN6G(125, 6575),122CHAN6G(129, 6595),123CHAN6G(133, 6615),124CHAN6G(137, 6635),125CHAN6G(141, 6655),126CHAN6G(145, 6675),127CHAN6G(149, 6695),128CHAN6G(153, 6715),129CHAN6G(157, 6735),130CHAN6G(161, 6755),131CHAN6G(165, 6775),132CHAN6G(169, 6795),133CHAN6G(173, 6815),134CHAN6G(177, 6835),135CHAN6G(181, 6855),136CHAN6G(185, 6875),137/* UNII-8 */138CHAN6G(189, 6895),139CHAN6G(193, 6915),140CHAN6G(197, 6935),141CHAN6G(201, 6955),142CHAN6G(205, 6975),143CHAN6G(209, 6995),144CHAN6G(213, 7015),145CHAN6G(217, 7035),146CHAN6G(221, 7055),147CHAN6G(225, 7075),148CHAN6G(229, 7095),149CHAN6G(233, 7115),150};151152#if defined(CONFIG_MT76_LEDS)153static const struct ieee80211_tpt_blink mt76_tpt_blink[] = {154{ .throughput = 0 * 1024, .blink_time = 334 },155{ .throughput = 1 * 1024, .blink_time = 260 },156{ .throughput = 5 * 1024, .blink_time = 220 },157{ .throughput = 10 * 1024, .blink_time = 190 },158{ .throughput = 20 * 1024, .blink_time = 170 },159{ .throughput = 50 * 1024, .blink_time = 150 },160{ .throughput = 70 * 1024, .blink_time = 130 },161{ .throughput = 100 * 1024, .blink_time = 110 },162{ .throughput = 200 * 1024, .blink_time = 80 },163{ .throughput = 300 * 1024, .blink_time = 50 },164};165#endif166167struct ieee80211_rate mt76_rates[] = {168CCK_RATE(0, 10),169CCK_RATE(1, 20),170CCK_RATE(2, 55),171CCK_RATE(3, 110),172OFDM_RATE(11, 60),173OFDM_RATE(15, 90),174OFDM_RATE(10, 120),175OFDM_RATE(14, 180),176OFDM_RATE(9, 240),177OFDM_RATE(13, 360),178OFDM_RATE(8, 480),179OFDM_RATE(12, 540),180};181EXPORT_SYMBOL_GPL(mt76_rates);182183static const struct cfg80211_sar_freq_ranges mt76_sar_freq_ranges[] = {184{ .start_freq = 2402, .end_freq = 2494, },185{ .start_freq = 5150, .end_freq = 5350, },186{ .start_freq = 5350, .end_freq = 5470, },187{ .start_freq = 5470, .end_freq = 5725, },188{ .start_freq = 5725, .end_freq = 5950, },189{ .start_freq = 5945, .end_freq = 6165, },190{ .start_freq = 6165, .end_freq = 6405, },191{ .start_freq = 6405, .end_freq = 6525, },192{ .start_freq = 6525, .end_freq = 6705, },193{ .start_freq = 6705, .end_freq = 6865, },194{ .start_freq = 6865, .end_freq = 7125, },195};196197static const struct cfg80211_sar_capa mt76_sar_capa = {198.type = NL80211_SAR_TYPE_POWER,199.num_freq_ranges = ARRAY_SIZE(mt76_sar_freq_ranges),200.freq_ranges = &mt76_sar_freq_ranges[0],201};202203#if defined(CONFIG_MT76_LEDS)204static int mt76_led_init(struct mt76_phy *phy)205{206struct mt76_dev *dev = phy->dev;207struct ieee80211_hw *hw = phy->hw;208struct device_node *np = dev->dev->of_node;209210if (!phy->leds.cdev.brightness_set && !phy->leds.cdev.blink_set)211return 0;212213np = of_get_child_by_name(np, "led");214if (np) {215if (!of_device_is_available(np)) {216of_node_put(np);217dev_info(dev->dev,218"led registration was explicitly disabled by dts\n");219return 0;220}221222if (phy == &dev->phy) {223int led_pin;224225if (!of_property_read_u32(np, "led-sources", &led_pin))226phy->leds.pin = led_pin;227228phy->leds.al =229of_property_read_bool(np, "led-active-low");230}231232of_node_put(np);233}234235snprintf(phy->leds.name, sizeof(phy->leds.name), "mt76-%s",236wiphy_name(hw->wiphy));237238phy->leds.cdev.name = phy->leds.name;239phy->leds.cdev.default_trigger =240ieee80211_create_tpt_led_trigger(hw,241IEEE80211_TPT_LEDTRIG_FL_RADIO,242mt76_tpt_blink,243ARRAY_SIZE(mt76_tpt_blink));244245dev_info(dev->dev,246"registering led '%s'\n", phy->leds.name);247248return led_classdev_register(dev->dev, &phy->leds.cdev);249}250251static void mt76_led_cleanup(struct mt76_phy *phy)252{253if (!phy->leds.cdev.brightness_set && !phy->leds.cdev.blink_set)254return;255256led_classdev_unregister(&phy->leds.cdev);257}258#endif259260static void mt76_init_stream_cap(struct mt76_phy *phy,261struct ieee80211_supported_band *sband,262bool vht)263{264struct ieee80211_sta_ht_cap *ht_cap = &sband->ht_cap;265int i, nstream = hweight8(phy->antenna_mask);266struct ieee80211_sta_vht_cap *vht_cap;267u16 mcs_map = 0;268269if (nstream > 1)270ht_cap->cap |= IEEE80211_HT_CAP_TX_STBC;271else272ht_cap->cap &= ~IEEE80211_HT_CAP_TX_STBC;273274for (i = 0; i < IEEE80211_HT_MCS_MASK_LEN; i++)275ht_cap->mcs.rx_mask[i] = i < nstream ? 0xff : 0;276277if (!vht)278return;279280vht_cap = &sband->vht_cap;281if (nstream > 1)282vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;283else284vht_cap->cap &= ~IEEE80211_VHT_CAP_TXSTBC;285vht_cap->cap |= IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN |286IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN;287288for (i = 0; i < 8; i++) {289if (i < nstream)290mcs_map |= (IEEE80211_VHT_MCS_SUPPORT_0_9 << (i * 2));291else292mcs_map |=293(IEEE80211_VHT_MCS_NOT_SUPPORTED << (i * 2));294}295vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map);296vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map);297if (ieee80211_hw_check(phy->hw, SUPPORTS_VHT_EXT_NSS_BW))298vht_cap->vht_mcs.tx_highest |=299cpu_to_le16(IEEE80211_VHT_EXT_NSS_BW_CAPABLE);300}301302void mt76_set_stream_caps(struct mt76_phy *phy, bool vht)303{304if (phy->cap.has_2ghz)305mt76_init_stream_cap(phy, &phy->sband_2g.sband, false);306if (phy->cap.has_5ghz)307mt76_init_stream_cap(phy, &phy->sband_5g.sband, vht);308if (phy->cap.has_6ghz)309mt76_init_stream_cap(phy, &phy->sband_6g.sband, vht);310}311EXPORT_SYMBOL_GPL(mt76_set_stream_caps);312313static int314mt76_init_sband(struct mt76_phy *phy, struct mt76_sband *msband,315const struct ieee80211_channel *chan, int n_chan,316struct ieee80211_rate *rates, int n_rates,317bool ht, bool vht)318{319struct ieee80211_supported_band *sband = &msband->sband;320struct ieee80211_sta_vht_cap *vht_cap;321struct ieee80211_sta_ht_cap *ht_cap;322struct mt76_dev *dev = phy->dev;323void *chanlist;324int size;325326size = n_chan * sizeof(*chan);327chanlist = devm_kmemdup(dev->dev, chan, size, GFP_KERNEL);328if (!chanlist)329return -ENOMEM;330331msband->chan = devm_kcalloc(dev->dev, n_chan, sizeof(*msband->chan),332GFP_KERNEL);333if (!msband->chan)334return -ENOMEM;335336sband->channels = chanlist;337sband->n_channels = n_chan;338sband->bitrates = rates;339sband->n_bitrates = n_rates;340341if (!ht)342return 0;343344ht_cap = &sband->ht_cap;345ht_cap->ht_supported = true;346ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |347IEEE80211_HT_CAP_GRN_FLD |348IEEE80211_HT_CAP_SGI_20 |349IEEE80211_HT_CAP_SGI_40 |350(1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);351352ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;353ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;354355mt76_init_stream_cap(phy, sband, vht);356357if (!vht)358return 0;359360vht_cap = &sband->vht_cap;361vht_cap->vht_supported = true;362vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC |363IEEE80211_VHT_CAP_RXSTBC_1 |364IEEE80211_VHT_CAP_SHORT_GI_80 |365(3 << IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_SHIFT);366367return 0;368}369370static int371mt76_init_sband_2g(struct mt76_phy *phy, struct ieee80211_rate *rates,372int n_rates)373{374phy->hw->wiphy->bands[NL80211_BAND_2GHZ] = &phy->sband_2g.sband;375376return mt76_init_sband(phy, &phy->sband_2g, mt76_channels_2ghz,377ARRAY_SIZE(mt76_channels_2ghz), rates,378n_rates, true, false);379}380381static int382mt76_init_sband_5g(struct mt76_phy *phy, struct ieee80211_rate *rates,383int n_rates, bool vht)384{385phy->hw->wiphy->bands[NL80211_BAND_5GHZ] = &phy->sband_5g.sband;386387return mt76_init_sband(phy, &phy->sband_5g, mt76_channels_5ghz,388ARRAY_SIZE(mt76_channels_5ghz), rates,389n_rates, true, vht);390}391392static int393mt76_init_sband_6g(struct mt76_phy *phy, struct ieee80211_rate *rates,394int n_rates)395{396phy->hw->wiphy->bands[NL80211_BAND_6GHZ] = &phy->sband_6g.sband;397398return mt76_init_sband(phy, &phy->sband_6g, mt76_channels_6ghz,399ARRAY_SIZE(mt76_channels_6ghz), rates,400n_rates, false, false);401}402403static void404mt76_check_sband(struct mt76_phy *phy, struct mt76_sband *msband,405enum nl80211_band band)406{407struct ieee80211_supported_band *sband = &msband->sband;408bool found = false;409int i;410411if (!sband)412return;413414for (i = 0; i < sband->n_channels; i++) {415if (sband->channels[i].flags & IEEE80211_CHAN_DISABLED)416continue;417418found = true;419break;420}421422if (found) {423cfg80211_chandef_create(&phy->chandef, &sband->channels[0],424NL80211_CHAN_HT20);425phy->chan_state = &msband->chan[0];426phy->dev->band_phys[band] = phy;427return;428}429430sband->n_channels = 0;431if (phy->hw->wiphy->bands[band] == sband)432phy->hw->wiphy->bands[band] = NULL;433}434435static int436mt76_phy_init(struct mt76_phy *phy, struct ieee80211_hw *hw)437{438struct mt76_dev *dev = phy->dev;439struct wiphy *wiphy = hw->wiphy;440441INIT_LIST_HEAD(&phy->tx_list);442spin_lock_init(&phy->tx_lock);443INIT_DELAYED_WORK(&phy->roc_work, mt76_roc_complete_work);444445if ((void *)phy != hw->priv)446return 0;447448SET_IEEE80211_DEV(hw, dev->dev);449SET_IEEE80211_PERM_ADDR(hw, phy->macaddr);450451wiphy->features |= NL80211_FEATURE_ACTIVE_MONITOR |452NL80211_FEATURE_AP_MODE_CHAN_WIDTH_CHANGE;453wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH |454WIPHY_FLAG_SUPPORTS_TDLS |455WIPHY_FLAG_AP_UAPSD;456457wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);458wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_AIRTIME_FAIRNESS);459wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_AQL);460461if (!wiphy->available_antennas_tx)462wiphy->available_antennas_tx = phy->antenna_mask;463if (!wiphy->available_antennas_rx)464wiphy->available_antennas_rx = phy->antenna_mask;465466wiphy->sar_capa = &mt76_sar_capa;467phy->frp = devm_kcalloc(dev->dev, wiphy->sar_capa->num_freq_ranges,468sizeof(struct mt76_freq_range_power),469GFP_KERNEL);470if (!phy->frp)471return -ENOMEM;472473hw->txq_data_size = sizeof(struct mt76_txq);474hw->uapsd_max_sp_len = IEEE80211_WMM_IE_STA_QOSINFO_SP_ALL;475476if (!hw->max_tx_fragments)477hw->max_tx_fragments = 16;478479ieee80211_hw_set(hw, SIGNAL_DBM);480ieee80211_hw_set(hw, AMPDU_AGGREGATION);481ieee80211_hw_set(hw, SUPPORTS_RC_TABLE);482ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);483ieee80211_hw_set(hw, SUPPORTS_CLONED_SKBS);484ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);485ieee80211_hw_set(hw, SUPPORTS_REORDERING_BUFFER);486ieee80211_hw_set(hw, SPECTRUM_MGMT);487488if (!(dev->drv->drv_flags & MT_DRV_AMSDU_OFFLOAD) &&489hw->max_tx_fragments > 1) {490ieee80211_hw_set(hw, TX_AMSDU);491ieee80211_hw_set(hw, TX_FRAG_LIST);492}493494ieee80211_hw_set(hw, MFP_CAPABLE);495ieee80211_hw_set(hw, AP_LINK_PS);496ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);497498return 0;499}500501struct mt76_phy *502mt76_alloc_radio_phy(struct mt76_dev *dev, unsigned int size,503u8 band_idx)504{505struct ieee80211_hw *hw = dev->phy.hw;506unsigned int phy_size;507struct mt76_phy *phy;508509phy_size = ALIGN(sizeof(*phy), 8);510phy = devm_kzalloc(dev->dev, size + phy_size, GFP_KERNEL);511if (!phy)512return NULL;513514phy->dev = dev;515phy->hw = hw;516#if defined(__linux__)517phy->priv = (void *)phy + phy_size;518#elif defined(__FreeBSD__)519phy->priv = (u8 *)phy + phy_size;520#endif521phy->band_idx = band_idx;522523return phy;524}525EXPORT_SYMBOL_GPL(mt76_alloc_radio_phy);526527struct mt76_phy *528mt76_alloc_phy(struct mt76_dev *dev, unsigned int size,529const struct ieee80211_ops *ops, u8 band_idx)530{531struct ieee80211_hw *hw;532unsigned int phy_size;533struct mt76_phy *phy;534535phy_size = ALIGN(sizeof(*phy), 8);536hw = ieee80211_alloc_hw(size + phy_size, ops);537if (!hw)538return NULL;539540phy = hw->priv;541phy->dev = dev;542phy->hw = hw;543#if defined(__linux__)544phy->priv = hw->priv + phy_size;545#elif defined(__FreeBSD__)546phy->priv = (u8 *)hw->priv + phy_size;547#endif548phy->band_idx = band_idx;549550hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN;551hw->wiphy->interface_modes =552BIT(NL80211_IFTYPE_STATION) |553BIT(NL80211_IFTYPE_AP) |554#ifdef CONFIG_MAC80211_MESH555BIT(NL80211_IFTYPE_MESH_POINT) |556#endif557BIT(NL80211_IFTYPE_P2P_CLIENT) |558BIT(NL80211_IFTYPE_P2P_GO) |559BIT(NL80211_IFTYPE_ADHOC);560561return phy;562}563EXPORT_SYMBOL_GPL(mt76_alloc_phy);564565int mt76_register_phy(struct mt76_phy *phy, bool vht,566struct ieee80211_rate *rates, int n_rates)567{568int ret;569570ret = mt76_phy_init(phy, phy->hw);571if (ret)572return ret;573574if (phy->cap.has_2ghz) {575ret = mt76_init_sband_2g(phy, rates, n_rates);576if (ret)577return ret;578}579580if (phy->cap.has_5ghz) {581ret = mt76_init_sband_5g(phy, rates + 4, n_rates - 4, vht);582if (ret)583return ret;584}585586if (phy->cap.has_6ghz) {587ret = mt76_init_sband_6g(phy, rates + 4, n_rates - 4);588if (ret)589return ret;590}591592#if defined(CONFIG_MT76_LEDS)593if (IS_ENABLED(CONFIG_MT76_LEDS)) {594ret = mt76_led_init(phy);595if (ret)596return ret;597}598#endif599600wiphy_read_of_freq_limits(phy->hw->wiphy);601mt76_check_sband(phy, &phy->sband_2g, NL80211_BAND_2GHZ);602mt76_check_sband(phy, &phy->sband_5g, NL80211_BAND_5GHZ);603mt76_check_sband(phy, &phy->sband_6g, NL80211_BAND_6GHZ);604605if ((void *)phy == phy->hw->priv) {606ret = ieee80211_register_hw(phy->hw);607if (ret)608return ret;609}610611set_bit(MT76_STATE_REGISTERED, &phy->state);612phy->dev->phys[phy->band_idx] = phy;613614return 0;615}616EXPORT_SYMBOL_GPL(mt76_register_phy);617618void mt76_unregister_phy(struct mt76_phy *phy)619{620struct mt76_dev *dev = phy->dev;621622if (!test_bit(MT76_STATE_REGISTERED, &phy->state))623return;624625#if defined(CONFIG_MT76_LEDS)626if (IS_ENABLED(CONFIG_MT76_LEDS))627mt76_led_cleanup(phy);628#endif629mt76_tx_status_check(dev, true);630ieee80211_unregister_hw(phy->hw);631dev->phys[phy->band_idx] = NULL;632}633EXPORT_SYMBOL_GPL(mt76_unregister_phy);634635int mt76_create_page_pool(struct mt76_dev *dev, struct mt76_queue *q)636{637bool is_qrx = mt76_queue_is_rx(dev, q);638struct page_pool_params pp_params = {639.order = 0,640.flags = 0,641.nid = NUMA_NO_NODE,642.dev = dev->dma_dev,643};644int idx = is_qrx ? q - dev->q_rx : -1;645646/* Allocate page_pools just for rx/wed_tx_free queues */647if (!is_qrx && !mt76_queue_is_wed_tx_free(q))648return 0;649650switch (idx) {651case MT_RXQ_MAIN:652case MT_RXQ_BAND1:653case MT_RXQ_BAND2:654case MT_RXQ_NPU0:655case MT_RXQ_NPU1:656pp_params.pool_size = 256;657break;658default:659pp_params.pool_size = 16;660break;661}662663if (mt76_is_mmio(dev)) {664/* rely on page_pool for DMA mapping */665pp_params.flags |= PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV;666pp_params.dma_dir = DMA_FROM_DEVICE;667pp_params.max_len = PAGE_SIZE;668pp_params.offset = 0;669/* NAPI is available just for rx queues */670if (idx >= 0 && idx < ARRAY_SIZE(dev->napi))671pp_params.napi = &dev->napi[idx];672}673674q->page_pool = page_pool_create(&pp_params);675if (IS_ERR(q->page_pool)) {676int err = PTR_ERR(q->page_pool);677678q->page_pool = NULL;679return err;680}681682return 0;683}684EXPORT_SYMBOL_GPL(mt76_create_page_pool);685686struct mt76_dev *687mt76_alloc_device(struct device *pdev, unsigned int size,688const struct ieee80211_ops *ops,689const struct mt76_driver_ops *drv_ops)690{691struct ieee80211_hw *hw;692struct mt76_phy *phy;693struct mt76_dev *dev;694int i;695696hw = ieee80211_alloc_hw(size, ops);697if (!hw)698return NULL;699700dev = hw->priv;701dev->hw = hw;702dev->dev = pdev;703dev->drv = drv_ops;704dev->dma_dev = pdev;705706phy = &dev->phy;707phy->dev = dev;708phy->hw = hw;709phy->band_idx = MT_BAND0;710dev->phys[phy->band_idx] = phy;711712spin_lock_init(&dev->rx_lock);713spin_lock_init(&dev->lock);714spin_lock_init(&dev->cc_lock);715spin_lock_init(&dev->status_lock);716spin_lock_init(&dev->wed_lock);717mutex_init(&dev->mutex);718init_waitqueue_head(&dev->tx_wait);719720skb_queue_head_init(&dev->mcu.res_q);721init_waitqueue_head(&dev->mcu.wait);722mutex_init(&dev->mcu.mutex);723dev->tx_worker.fn = mt76_tx_worker;724725hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN;726hw->wiphy->interface_modes =727BIT(NL80211_IFTYPE_STATION) |728BIT(NL80211_IFTYPE_AP) |729#ifdef CONFIG_MAC80211_MESH730BIT(NL80211_IFTYPE_MESH_POINT) |731#endif732BIT(NL80211_IFTYPE_P2P_CLIENT) |733BIT(NL80211_IFTYPE_P2P_GO) |734BIT(NL80211_IFTYPE_ADHOC);735736spin_lock_init(&dev->token_lock);737idr_init(&dev->token);738739spin_lock_init(&dev->rx_token_lock);740idr_init(&dev->rx_token);741742INIT_LIST_HEAD(&dev->wcid_list);743INIT_LIST_HEAD(&dev->sta_poll_list);744spin_lock_init(&dev->sta_poll_lock);745746INIT_LIST_HEAD(&dev->txwi_cache);747INIT_LIST_HEAD(&dev->rxwi_cache);748dev->token_size = dev->drv->token_size;749INIT_DELAYED_WORK(&dev->scan_work, mt76_scan_work);750751for (i = 0; i < ARRAY_SIZE(dev->q_rx); i++)752skb_queue_head_init(&dev->rx_skb[i]);753754dev->wq = alloc_ordered_workqueue("mt76", 0);755if (!dev->wq) {756ieee80211_free_hw(hw);757return NULL;758}759760return dev;761}762EXPORT_SYMBOL_GPL(mt76_alloc_device);763764int mt76_register_device(struct mt76_dev *dev, bool vht,765struct ieee80211_rate *rates, int n_rates)766{767struct ieee80211_hw *hw = dev->hw;768struct mt76_phy *phy = &dev->phy;769int ret;770771dev_set_drvdata(dev->dev, dev);772mt76_wcid_init(&dev->global_wcid, phy->band_idx);773ret = mt76_phy_init(phy, hw);774if (ret)775return ret;776777if (phy->cap.has_2ghz) {778ret = mt76_init_sband_2g(phy, rates, n_rates);779if (ret)780return ret;781}782783if (phy->cap.has_5ghz) {784ret = mt76_init_sband_5g(phy, rates + 4, n_rates - 4, vht);785if (ret)786return ret;787}788789if (phy->cap.has_6ghz) {790ret = mt76_init_sband_6g(phy, rates + 4, n_rates - 4);791if (ret)792return ret;793}794795wiphy_read_of_freq_limits(hw->wiphy);796mt76_check_sband(&dev->phy, &phy->sband_2g, NL80211_BAND_2GHZ);797mt76_check_sband(&dev->phy, &phy->sband_5g, NL80211_BAND_5GHZ);798mt76_check_sband(&dev->phy, &phy->sband_6g, NL80211_BAND_6GHZ);799800#if defined(CONFIG_MT76_LEDS)801if (IS_ENABLED(CONFIG_MT76_LEDS)) {802ret = mt76_led_init(phy);803if (ret)804return ret;805}806#endif807808ret = ieee80211_register_hw(hw);809if (ret)810return ret;811812WARN_ON(mt76_worker_setup(hw, &dev->tx_worker, NULL, "tx"));813set_bit(MT76_STATE_REGISTERED, &phy->state);814sched_set_fifo_low(dev->tx_worker.task);815816return 0;817}818EXPORT_SYMBOL_GPL(mt76_register_device);819820void mt76_unregister_device(struct mt76_dev *dev)821{822#if defined(__linux__)823struct ieee80211_hw *hw = dev->hw;824#endif825826if (!test_bit(MT76_STATE_REGISTERED, &dev->phy.state))827return;828829#if defined(CONFIG_MT76_LEDS)830if (IS_ENABLED(CONFIG_MT76_LEDS))831mt76_led_cleanup(&dev->phy);832#endif833mt76_tx_status_check(dev, true);834mt76_wcid_cleanup(dev, &dev->global_wcid);835#if defined(__linux__)836ieee80211_unregister_hw(hw);837#elif defined(__FreeBSD__)838ieee80211_unregister_hw(dev->hw);839#endif840}841EXPORT_SYMBOL_GPL(mt76_unregister_device);842843void mt76_free_device(struct mt76_dev *dev)844{845mt76_worker_teardown(&dev->tx_worker);846if (dev->wq) {847destroy_workqueue(dev->wq);848dev->wq = NULL;849}850mt76_npu_deinit(dev);851ieee80211_free_hw(dev->hw);852}853EXPORT_SYMBOL_GPL(mt76_free_device);854855static void mt76_reset_phy(struct mt76_phy *phy)856{857if (!phy)858return;859860INIT_LIST_HEAD(&phy->tx_list);861phy->num_sta = 0;862phy->chanctx = NULL;863mt76_roc_complete(phy);864}865866void mt76_reset_device(struct mt76_dev *dev)867{868int i;869870rcu_read_lock();871for (i = 0; i < ARRAY_SIZE(dev->wcid); i++) {872struct mt76_wcid *wcid;873874wcid = rcu_dereference(dev->wcid[i]);875if (!wcid)876continue;877878wcid->sta = 0;879mt76_wcid_cleanup(dev, wcid);880rcu_assign_pointer(dev->wcid[i], NULL);881}882rcu_read_unlock();883884INIT_LIST_HEAD(&dev->wcid_list);885INIT_LIST_HEAD(&dev->sta_poll_list);886dev->vif_mask = 0;887memset(dev->wcid_mask, 0, sizeof(dev->wcid_mask));888889mt76_reset_phy(&dev->phy);890for (i = 0; i < ARRAY_SIZE(dev->phys); i++)891mt76_reset_phy(dev->phys[i]);892}893EXPORT_SYMBOL_GPL(mt76_reset_device);894895struct mt76_phy *mt76_vif_phy(struct ieee80211_hw *hw,896struct ieee80211_vif *vif)897{898struct mt76_vif_link *mlink = (struct mt76_vif_link *)vif->drv_priv;899struct mt76_chanctx *ctx;900901if (!hw->wiphy->n_radio)902return hw->priv;903904if (!mlink->ctx)905return NULL;906907ctx = (struct mt76_chanctx *)mlink->ctx->drv_priv;908return ctx->phy;909}910EXPORT_SYMBOL_GPL(mt76_vif_phy);911912static void mt76_rx_release_amsdu(struct mt76_phy *phy, enum mt76_rxq_id q)913{914struct sk_buff *skb = phy->rx_amsdu[q].head;915struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;916struct mt76_dev *dev = phy->dev;917918phy->rx_amsdu[q].head = NULL;919phy->rx_amsdu[q].tail = NULL;920921/*922* Validate if the amsdu has a proper first subframe.923* A single MSDU can be parsed as A-MSDU when the unauthenticated A-MSDU924* flag of the QoS header gets flipped. In such cases, the first925* subframe has a LLC/SNAP header in the location of the destination926* address.927*/928if (skb_shinfo(skb)->frag_list) {929int offset = 0;930931if (!(status->flag & RX_FLAG_8023)) {932offset = ieee80211_get_hdrlen_from_skb(skb);933934if ((status->flag &935(RX_FLAG_DECRYPTED | RX_FLAG_IV_STRIPPED)) ==936RX_FLAG_DECRYPTED)937offset += 8;938}939940if (ether_addr_equal(skb->data + offset, rfc1042_header)) {941dev_kfree_skb(skb);942return;943}944}945__skb_queue_tail(&dev->rx_skb[q], skb);946}947948static void mt76_rx_release_burst(struct mt76_phy *phy, enum mt76_rxq_id q,949struct sk_buff *skb)950{951struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;952953if (phy->rx_amsdu[q].head &&954(!status->amsdu || status->first_amsdu ||955status->seqno != phy->rx_amsdu[q].seqno))956mt76_rx_release_amsdu(phy, q);957958if (!phy->rx_amsdu[q].head) {959phy->rx_amsdu[q].tail = &skb_shinfo(skb)->frag_list;960phy->rx_amsdu[q].seqno = status->seqno;961phy->rx_amsdu[q].head = skb;962} else {963*phy->rx_amsdu[q].tail = skb;964phy->rx_amsdu[q].tail = &skb->next;965}966967if (!status->amsdu || status->last_amsdu)968mt76_rx_release_amsdu(phy, q);969}970971void mt76_rx(struct mt76_dev *dev, enum mt76_rxq_id q, struct sk_buff *skb)972{973struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;974struct mt76_phy *phy = mt76_dev_phy(dev, status->phy_idx);975976if (!test_bit(MT76_STATE_RUNNING, &phy->state)) {977dev_kfree_skb(skb);978return;979}980981#ifdef CONFIG_NL80211_TESTMODE982if (phy->test.state == MT76_TM_STATE_RX_FRAMES) {983phy->test.rx_stats.packets[q]++;984if (status->flag & RX_FLAG_FAILED_FCS_CRC)985phy->test.rx_stats.fcs_error[q]++;986}987#endif988989mt76_rx_release_burst(phy, q, skb);990}991EXPORT_SYMBOL_GPL(mt76_rx);992993bool mt76_has_tx_pending(struct mt76_phy *phy)994{995struct mt76_queue *q;996int i;997998for (i = 0; i < __MT_TXQ_MAX; i++) {999q = phy->q_tx[i];1000if (q && q->queued)1001return true;1002}10031004return false;1005}1006EXPORT_SYMBOL_GPL(mt76_has_tx_pending);10071008static struct mt76_channel_state *1009mt76_channel_state(struct mt76_phy *phy, struct ieee80211_channel *c)1010{1011struct mt76_sband *msband;1012int idx;10131014if (c->band == NL80211_BAND_2GHZ)1015msband = &phy->sband_2g;1016else if (c->band == NL80211_BAND_6GHZ)1017msband = &phy->sband_6g;1018else1019msband = &phy->sband_5g;10201021idx = c - &msband->sband.channels[0];1022return &msband->chan[idx];1023}10241025void mt76_update_survey_active_time(struct mt76_phy *phy, ktime_t time)1026{1027struct mt76_channel_state *state = phy->chan_state;10281029state->cc_active += ktime_to_us(ktime_sub(time,1030phy->survey_time));1031phy->survey_time = time;1032}1033EXPORT_SYMBOL_GPL(mt76_update_survey_active_time);10341035void mt76_update_survey(struct mt76_phy *phy)1036{1037struct mt76_dev *dev = phy->dev;1038ktime_t cur_time;10391040if (dev->drv->update_survey)1041dev->drv->update_survey(phy);10421043cur_time = ktime_get_boottime();1044mt76_update_survey_active_time(phy, cur_time);10451046if (dev->drv->drv_flags & MT_DRV_SW_RX_AIRTIME) {1047struct mt76_channel_state *state = phy->chan_state;10481049spin_lock_bh(&dev->cc_lock);1050state->cc_bss_rx += dev->cur_cc_bss_rx;1051dev->cur_cc_bss_rx = 0;1052spin_unlock_bh(&dev->cc_lock);1053}1054}1055EXPORT_SYMBOL_GPL(mt76_update_survey);10561057int __mt76_set_channel(struct mt76_phy *phy, struct cfg80211_chan_def *chandef,1058bool offchannel)1059{1060struct mt76_dev *dev = phy->dev;1061int timeout = HZ / 5;1062int ret;10631064set_bit(MT76_RESET, &phy->state);10651066mt76_worker_disable(&dev->tx_worker);1067wait_event_timeout(dev->tx_wait, !mt76_has_tx_pending(phy), timeout);1068mt76_update_survey(phy);10691070if (phy->chandef.chan->center_freq != chandef->chan->center_freq ||1071phy->chandef.width != chandef->width)1072phy->dfs_state = MT_DFS_STATE_UNKNOWN;10731074phy->chandef = *chandef;1075phy->chan_state = mt76_channel_state(phy, chandef->chan);1076phy->offchannel = offchannel;10771078if (!offchannel)1079phy->main_chandef = *chandef;10801081if (chandef->chan != phy->main_chandef.chan)1082memset(phy->chan_state, 0, sizeof(*phy->chan_state));10831084ret = dev->drv->set_channel(phy);10851086clear_bit(MT76_RESET, &phy->state);1087mt76_worker_enable(&dev->tx_worker);1088mt76_worker_schedule(&dev->tx_worker);10891090return ret;1091}10921093int mt76_set_channel(struct mt76_phy *phy, struct cfg80211_chan_def *chandef,1094bool offchannel)1095{1096struct mt76_dev *dev = phy->dev;1097int ret;10981099cancel_delayed_work_sync(&phy->mac_work);11001101mutex_lock(&dev->mutex);1102ret = __mt76_set_channel(phy, chandef, offchannel);1103mutex_unlock(&dev->mutex);11041105return ret;1106}11071108int mt76_update_channel(struct mt76_phy *phy)1109{1110struct ieee80211_hw *hw = phy->hw;1111struct cfg80211_chan_def *chandef = &hw->conf.chandef;1112bool offchannel = hw->conf.flags & IEEE80211_CONF_OFFCHANNEL;11131114phy->radar_enabled = hw->conf.radar_enabled;11151116return mt76_set_channel(phy, chandef, offchannel);1117}1118EXPORT_SYMBOL_GPL(mt76_update_channel);11191120static struct mt76_sband *1121mt76_get_survey_sband(struct mt76_phy *phy, int *idx)1122{1123if (*idx < phy->sband_2g.sband.n_channels)1124return &phy->sband_2g;11251126*idx -= phy->sband_2g.sband.n_channels;1127if (*idx < phy->sband_5g.sband.n_channels)1128return &phy->sband_5g;11291130*idx -= phy->sband_5g.sband.n_channels;1131if (*idx < phy->sband_6g.sband.n_channels)1132return &phy->sband_6g;11331134*idx -= phy->sband_6g.sband.n_channels;1135return NULL;1136}11371138int mt76_get_survey(struct ieee80211_hw *hw, int idx,1139struct survey_info *survey)1140{1141struct mt76_phy *phy = hw->priv;1142struct mt76_dev *dev = phy->dev;1143struct mt76_sband *sband = NULL;1144struct ieee80211_channel *chan;1145struct mt76_channel_state *state;1146int phy_idx = 0;1147int ret = 0;11481149mutex_lock(&dev->mutex);11501151for (phy_idx = 0; phy_idx < ARRAY_SIZE(dev->phys); phy_idx++) {1152sband = NULL;1153phy = dev->phys[phy_idx];1154if (!phy || phy->hw != hw)1155continue;11561157sband = mt76_get_survey_sband(phy, &idx);11581159if (idx == 0 && phy->dev->drv->update_survey)1160mt76_update_survey(phy);11611162if (sband || !hw->wiphy->n_radio)1163break;1164}11651166if (!sband) {1167ret = -ENOENT;1168goto out;1169}11701171chan = &sband->sband.channels[idx];1172state = mt76_channel_state(phy, chan);11731174memset(survey, 0, sizeof(*survey));1175survey->channel = chan;1176survey->filled = SURVEY_INFO_TIME | SURVEY_INFO_TIME_BUSY;1177survey->filled |= dev->drv->survey_flags;1178if (state->noise)1179survey->filled |= SURVEY_INFO_NOISE_DBM;11801181if (chan == phy->main_chandef.chan) {1182survey->filled |= SURVEY_INFO_IN_USE;11831184if (dev->drv->drv_flags & MT_DRV_SW_RX_AIRTIME)1185survey->filled |= SURVEY_INFO_TIME_BSS_RX;1186}11871188survey->time_busy = div_u64(state->cc_busy, 1000);1189survey->time_rx = div_u64(state->cc_rx, 1000);1190survey->time = div_u64(state->cc_active, 1000);1191survey->noise = state->noise;11921193spin_lock_bh(&dev->cc_lock);1194survey->time_bss_rx = div_u64(state->cc_bss_rx, 1000);1195survey->time_tx = div_u64(state->cc_tx, 1000);1196spin_unlock_bh(&dev->cc_lock);11971198out:1199mutex_unlock(&dev->mutex);12001201return ret;1202}1203EXPORT_SYMBOL_GPL(mt76_get_survey);12041205void mt76_wcid_key_setup(struct mt76_dev *dev, struct mt76_wcid *wcid,1206struct ieee80211_key_conf *key)1207{1208struct ieee80211_key_seq seq;1209int i;12101211wcid->rx_check_pn = false;12121213if (!key)1214return;12151216if (key->cipher != WLAN_CIPHER_SUITE_CCMP)1217return;12181219wcid->rx_check_pn = true;12201221/* data frame */1222for (i = 0; i < IEEE80211_NUM_TIDS; i++) {1223ieee80211_get_key_rx_seq(key, i, &seq);1224memcpy(wcid->rx_key_pn[i], seq.ccmp.pn, sizeof(seq.ccmp.pn));1225}12261227/* robust management frame */1228ieee80211_get_key_rx_seq(key, -1, &seq);1229memcpy(wcid->rx_key_pn[i], seq.ccmp.pn, sizeof(seq.ccmp.pn));12301231}1232EXPORT_SYMBOL(mt76_wcid_key_setup);12331234int mt76_rx_signal(u8 chain_mask, s8 *chain_signal)1235{1236int signal = -128;1237u8 chains;12381239for (chains = chain_mask; chains; chains >>= 1, chain_signal++) {1240int cur, diff;12411242cur = *chain_signal;1243if (!(chains & BIT(0)) ||1244cur > 0)1245continue;12461247if (cur > signal)1248swap(cur, signal);12491250diff = signal - cur;1251if (diff == 0)1252signal += 3;1253else if (diff <= 2)1254signal += 2;1255else if (diff <= 6)1256signal += 1;1257}12581259return signal;1260}1261EXPORT_SYMBOL(mt76_rx_signal);12621263static void1264mt76_rx_convert(struct mt76_dev *dev, struct sk_buff *skb,1265struct ieee80211_hw **hw,1266struct ieee80211_sta **sta)1267{1268struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);1269struct ieee80211_hdr *hdr = mt76_skb_get_hdr(skb);1270struct mt76_rx_status mstat;12711272mstat = *((struct mt76_rx_status *)skb->cb);1273memset(status, 0, sizeof(*status));12741275skb->priority = mstat.qos_ctl & IEEE80211_QOS_CTL_TID_MASK;12761277status->flag = mstat.flag;1278status->freq = mstat.freq;1279status->enc_flags = mstat.enc_flags;1280status->encoding = mstat.encoding;1281status->bw = mstat.bw;1282if (status->encoding == RX_ENC_EHT) {1283status->eht.ru = mstat.eht.ru;1284status->eht.gi = mstat.eht.gi;1285} else {1286status->he_ru = mstat.he_ru;1287status->he_gi = mstat.he_gi;1288status->he_dcm = mstat.he_dcm;1289}1290status->rate_idx = mstat.rate_idx;1291status->nss = mstat.nss;1292status->band = mstat.band;1293status->signal = mstat.signal;1294status->chains = mstat.chains;1295status->ampdu_reference = mstat.ampdu_ref;1296status->device_timestamp = mstat.timestamp;1297status->mactime = mstat.timestamp;1298status->signal = mt76_rx_signal(mstat.chains, mstat.chain_signal);1299if (status->signal <= -128)1300status->flag |= RX_FLAG_NO_SIGNAL_VAL;13011302if (ieee80211_is_beacon(hdr->frame_control) ||1303ieee80211_is_probe_resp(hdr->frame_control))1304status->boottime_ns = ktime_get_boottime_ns();13051306BUILD_BUG_ON(sizeof(mstat) > sizeof(skb->cb));1307BUILD_BUG_ON(sizeof(status->chain_signal) !=1308sizeof(mstat.chain_signal));1309memcpy(status->chain_signal, mstat.chain_signal,1310sizeof(mstat.chain_signal));13111312if (mstat.wcid) {1313status->link_valid = mstat.wcid->link_valid;1314status->link_id = mstat.wcid->link_id;1315}13161317*sta = wcid_to_sta(mstat.wcid);1318*hw = mt76_phy_hw(dev, mstat.phy_idx);1319}13201321static void1322mt76_check_ccmp_pn(struct sk_buff *skb)1323{1324struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;1325struct mt76_wcid *wcid = status->wcid;1326struct ieee80211_hdr *hdr;1327int security_idx;1328int ret;13291330if (!(status->flag & RX_FLAG_DECRYPTED))1331return;13321333if (status->flag & RX_FLAG_ONLY_MONITOR)1334return;13351336if (!wcid || !wcid->rx_check_pn)1337return;13381339security_idx = status->qos_ctl & IEEE80211_QOS_CTL_TID_MASK;1340if (status->flag & RX_FLAG_8023)1341goto skip_hdr_check;13421343hdr = mt76_skb_get_hdr(skb);1344if (!(status->flag & RX_FLAG_IV_STRIPPED)) {1345/*1346* Validate the first fragment both here and in mac802111347* All further fragments will be validated by mac80211 only.1348*/1349if (ieee80211_is_frag(hdr) &&1350!ieee80211_is_first_frag(hdr->seq_ctrl))1351return;1352}13531354/* IEEE 802.11-2020, 12.5.3.4.4 "PN and replay detection" c):1355*1356* the recipient shall maintain a single replay counter for received1357* individually addressed robust Management frames that are received1358* with the To DS subfield equal to 0, [...]1359*/1360if (ieee80211_is_mgmt(hdr->frame_control) &&1361!ieee80211_has_tods(hdr->frame_control))1362security_idx = IEEE80211_NUM_TIDS;13631364skip_hdr_check:1365BUILD_BUG_ON(sizeof(status->iv) != sizeof(wcid->rx_key_pn[0]));1366ret = memcmp(status->iv, wcid->rx_key_pn[security_idx],1367sizeof(status->iv));1368if (ret <= 0) {1369status->flag |= RX_FLAG_ONLY_MONITOR;1370return;1371}13721373memcpy(wcid->rx_key_pn[security_idx], status->iv, sizeof(status->iv));13741375if (status->flag & RX_FLAG_IV_STRIPPED)1376status->flag |= RX_FLAG_PN_VALIDATED;1377}13781379static void1380mt76_airtime_report(struct mt76_dev *dev, struct mt76_rx_status *status,1381int len)1382{1383struct mt76_wcid *wcid = status->wcid;1384struct ieee80211_rx_status info = {1385.enc_flags = status->enc_flags,1386.rate_idx = status->rate_idx,1387.encoding = status->encoding,1388.band = status->band,1389.nss = status->nss,1390.bw = status->bw,1391};1392struct ieee80211_sta *sta;1393u32 airtime;1394u8 tidno = status->qos_ctl & IEEE80211_QOS_CTL_TID_MASK;13951396airtime = ieee80211_calc_rx_airtime(dev->hw, &info, len);1397spin_lock(&dev->cc_lock);1398dev->cur_cc_bss_rx += airtime;1399spin_unlock(&dev->cc_lock);14001401if (!wcid || !wcid->sta)1402return;14031404sta = container_of((void *)wcid, struct ieee80211_sta, drv_priv);1405ieee80211_sta_register_airtime(sta, tidno, 0, airtime);1406}14071408static void1409mt76_airtime_flush_ampdu(struct mt76_dev *dev)1410{1411struct mt76_wcid *wcid;1412int wcid_idx;14131414if (!dev->rx_ampdu_len)1415return;14161417wcid_idx = dev->rx_ampdu_status.wcid_idx;1418if (wcid_idx < ARRAY_SIZE(dev->wcid))1419wcid = rcu_dereference(dev->wcid[wcid_idx]);1420else1421wcid = NULL;1422dev->rx_ampdu_status.wcid = wcid;14231424mt76_airtime_report(dev, &dev->rx_ampdu_status, dev->rx_ampdu_len);14251426dev->rx_ampdu_len = 0;1427dev->rx_ampdu_ref = 0;1428}14291430static void1431mt76_airtime_check(struct mt76_dev *dev, struct sk_buff *skb)1432{1433struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;1434struct mt76_wcid *wcid = status->wcid;14351436if (!(dev->drv->drv_flags & MT_DRV_SW_RX_AIRTIME))1437return;14381439if (!wcid || !wcid->sta) {1440struct ieee80211_hdr *hdr = mt76_skb_get_hdr(skb);14411442if (status->flag & RX_FLAG_8023)1443return;14441445if (!ether_addr_equal(hdr->addr1, dev->phy.macaddr))1446return;14471448wcid = NULL;1449}14501451if (!(status->flag & RX_FLAG_AMPDU_DETAILS) ||1452status->ampdu_ref != dev->rx_ampdu_ref)1453mt76_airtime_flush_ampdu(dev);14541455if (status->flag & RX_FLAG_AMPDU_DETAILS) {1456if (!dev->rx_ampdu_len ||1457status->ampdu_ref != dev->rx_ampdu_ref) {1458dev->rx_ampdu_status = *status;1459dev->rx_ampdu_status.wcid_idx = wcid ? wcid->idx : 0xff;1460dev->rx_ampdu_ref = status->ampdu_ref;1461}14621463dev->rx_ampdu_len += skb->len;1464return;1465}14661467mt76_airtime_report(dev, status, skb->len);1468}14691470static void1471mt76_check_sta(struct mt76_dev *dev, struct sk_buff *skb)1472{1473struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;1474struct ieee80211_hdr *hdr = mt76_skb_get_hdr(skb);1475struct ieee80211_sta *sta;1476struct ieee80211_hw *hw;1477struct mt76_wcid *wcid = status->wcid;1478u8 tidno = status->qos_ctl & IEEE80211_QOS_CTL_TID_MASK;1479bool ps;14801481hw = mt76_phy_hw(dev, status->phy_idx);1482if (ieee80211_is_pspoll(hdr->frame_control) && !wcid &&1483!(status->flag & RX_FLAG_8023)) {1484sta = ieee80211_find_sta_by_ifaddr(hw, hdr->addr2, NULL);1485if (sta)1486wcid = status->wcid = (struct mt76_wcid *)sta->drv_priv;1487}14881489mt76_airtime_check(dev, skb);14901491if (!wcid || !wcid->sta)1492return;14931494sta = container_of((void *)wcid, struct ieee80211_sta, drv_priv);14951496if (status->signal <= 0)1497ewma_signal_add(&wcid->rssi, -status->signal);14981499wcid->inactive_count = 0;15001501if (status->flag & RX_FLAG_8023)1502return;15031504if (!test_bit(MT_WCID_FLAG_CHECK_PS, &wcid->flags))1505return;15061507if (ieee80211_is_pspoll(hdr->frame_control)) {1508ieee80211_sta_pspoll(sta);1509return;1510}15111512if (ieee80211_has_morefrags(hdr->frame_control) ||1513!(ieee80211_is_mgmt(hdr->frame_control) ||1514ieee80211_is_data(hdr->frame_control)))1515return;15161517ps = ieee80211_has_pm(hdr->frame_control);15181519if (ps && (ieee80211_is_data_qos(hdr->frame_control) ||1520ieee80211_is_qos_nullfunc(hdr->frame_control)))1521ieee80211_sta_uapsd_trigger(sta, tidno);15221523if (!!test_bit(MT_WCID_FLAG_PS, &wcid->flags) == ps)1524return;15251526if (ps)1527set_bit(MT_WCID_FLAG_PS, &wcid->flags);15281529if (dev->drv->sta_ps)1530dev->drv->sta_ps(dev, sta, ps);15311532if (!ps)1533clear_bit(MT_WCID_FLAG_PS, &wcid->flags);15341535ieee80211_sta_ps_transition(sta, ps);1536}15371538void mt76_rx_complete(struct mt76_dev *dev, struct sk_buff_head *frames,1539struct napi_struct *napi)1540{1541struct ieee80211_sta *sta;1542struct ieee80211_hw *hw;1543struct sk_buff *skb, *tmp;1544#if defined(__linux__)1545LIST_HEAD(list);1546#elif defined(__FreeBSD__)1547LINUX_LIST_HEAD(list);1548#endif15491550spin_lock(&dev->rx_lock);1551while ((skb = __skb_dequeue(frames)) != NULL) {1552struct sk_buff *nskb = skb_shinfo(skb)->frag_list;15531554mt76_check_ccmp_pn(skb);1555skb_shinfo(skb)->frag_list = NULL;1556mt76_rx_convert(dev, skb, &hw, &sta);1557ieee80211_rx_list(hw, sta, skb, &list);15581559/* subsequent amsdu frames */1560while (nskb) {1561skb = nskb;1562nskb = nskb->next;1563skb->next = NULL;15641565mt76_rx_convert(dev, skb, &hw, &sta);1566ieee80211_rx_list(hw, sta, skb, &list);1567}1568}1569spin_unlock(&dev->rx_lock);15701571if (!napi) {1572netif_receive_skb_list(&list);1573return;1574}15751576list_for_each_entry_safe(skb, tmp, &list, list) {1577skb_list_del_init(skb);1578napi_gro_receive(napi, skb);1579}1580}15811582void mt76_rx_poll_complete(struct mt76_dev *dev, enum mt76_rxq_id q,1583struct napi_struct *napi)1584{1585struct sk_buff_head frames;1586struct sk_buff *skb;15871588__skb_queue_head_init(&frames);15891590while ((skb = __skb_dequeue(&dev->rx_skb[q])) != NULL) {1591mt76_check_sta(dev, skb);1592if (mtk_wed_device_active(&dev->mmio.wed) ||1593mt76_npu_device_active(dev))1594__skb_queue_tail(&frames, skb);1595else1596mt76_rx_aggr_reorder(skb, &frames);1597}15981599mt76_rx_complete(dev, &frames, napi);1600}1601EXPORT_SYMBOL_GPL(mt76_rx_poll_complete);16021603static int1604mt76_sta_add(struct mt76_phy *phy, struct ieee80211_vif *vif,1605struct ieee80211_sta *sta)1606{1607struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;1608struct mt76_dev *dev = phy->dev;1609int ret;1610int i;16111612mutex_lock(&dev->mutex);16131614ret = dev->drv->sta_add(dev, vif, sta);1615if (ret)1616goto out;16171618for (i = 0; i < ARRAY_SIZE(sta->txq); i++) {1619struct mt76_txq *mtxq;16201621if (!sta->txq[i])1622continue;16231624mtxq = (struct mt76_txq *)sta->txq[i]->drv_priv;1625mtxq->wcid = wcid->idx;1626}16271628ewma_signal_init(&wcid->rssi);1629rcu_assign_pointer(dev->wcid[wcid->idx], wcid);1630phy->num_sta++;16311632mt76_wcid_init(wcid, phy->band_idx);1633out:1634mutex_unlock(&dev->mutex);16351636return ret;1637}16381639void __mt76_sta_remove(struct mt76_phy *phy, struct ieee80211_vif *vif,1640struct ieee80211_sta *sta)1641{1642struct mt76_dev *dev = phy->dev;1643struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;1644int i, idx = wcid->idx;16451646for (i = 0; i < ARRAY_SIZE(wcid->aggr); i++)1647mt76_rx_aggr_stop(dev, wcid, i);16481649if (dev->drv->sta_remove)1650dev->drv->sta_remove(dev, vif, sta);16511652mt76_wcid_cleanup(dev, wcid);16531654mt76_wcid_mask_clear(dev->wcid_mask, idx);1655phy->num_sta--;1656}1657EXPORT_SYMBOL_GPL(__mt76_sta_remove);16581659static void1660mt76_sta_remove(struct mt76_phy *phy, struct ieee80211_vif *vif,1661struct ieee80211_sta *sta)1662{1663struct mt76_dev *dev = phy->dev;16641665mutex_lock(&dev->mutex);1666__mt76_sta_remove(phy, vif, sta);1667mutex_unlock(&dev->mutex);1668}16691670int mt76_sta_state(struct ieee80211_hw *hw, struct ieee80211_vif *vif,1671struct ieee80211_sta *sta,1672enum ieee80211_sta_state old_state,1673enum ieee80211_sta_state new_state)1674{1675struct mt76_phy *phy = hw->priv;1676struct mt76_dev *dev = phy->dev;1677enum mt76_sta_event ev;16781679phy = mt76_vif_phy(hw, vif);1680if (!phy)1681return -EINVAL;16821683if (old_state == IEEE80211_STA_NOTEXIST &&1684new_state == IEEE80211_STA_NONE)1685return mt76_sta_add(phy, vif, sta);16861687if (old_state == IEEE80211_STA_NONE &&1688new_state == IEEE80211_STA_NOTEXIST)1689mt76_sta_remove(phy, vif, sta);16901691if (!dev->drv->sta_event)1692return 0;16931694if (old_state == IEEE80211_STA_AUTH &&1695new_state == IEEE80211_STA_ASSOC)1696ev = MT76_STA_EVENT_ASSOC;1697else if (old_state == IEEE80211_STA_ASSOC &&1698new_state == IEEE80211_STA_AUTHORIZED)1699ev = MT76_STA_EVENT_AUTHORIZE;1700else if (old_state == IEEE80211_STA_ASSOC &&1701new_state == IEEE80211_STA_AUTH)1702ev = MT76_STA_EVENT_DISASSOC;1703else1704return 0;17051706return dev->drv->sta_event(dev, vif, sta, ev);1707}1708EXPORT_SYMBOL_GPL(mt76_sta_state);17091710void mt76_sta_pre_rcu_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,1711struct ieee80211_sta *sta)1712{1713struct mt76_phy *phy = hw->priv;1714struct mt76_dev *dev = phy->dev;1715struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv;17161717mutex_lock(&dev->mutex);1718spin_lock_bh(&dev->status_lock);1719rcu_assign_pointer(dev->wcid[wcid->idx], NULL);1720spin_unlock_bh(&dev->status_lock);1721mutex_unlock(&dev->mutex);1722}1723EXPORT_SYMBOL_GPL(mt76_sta_pre_rcu_remove);17241725void mt76_wcid_init(struct mt76_wcid *wcid, u8 band_idx)1726{1727wcid->hw_key_idx = -1;1728wcid->phy_idx = band_idx;17291730INIT_LIST_HEAD(&wcid->tx_list);1731skb_queue_head_init(&wcid->tx_pending);1732skb_queue_head_init(&wcid->tx_offchannel);17331734INIT_LIST_HEAD(&wcid->list);1735idr_init(&wcid->pktid);17361737INIT_LIST_HEAD(&wcid->poll_list);1738}1739EXPORT_SYMBOL_GPL(mt76_wcid_init);17401741void mt76_wcid_cleanup(struct mt76_dev *dev, struct mt76_wcid *wcid)1742{1743struct mt76_phy *phy = mt76_dev_phy(dev, wcid->phy_idx);1744struct ieee80211_hw *hw;1745struct sk_buff_head list;1746struct sk_buff *skb;17471748mt76_tx_status_lock(dev, &list);1749mt76_tx_status_skb_get(dev, wcid, -1, &list);1750mt76_tx_status_unlock(dev, &list);17511752idr_destroy(&wcid->pktid);17531754spin_lock_bh(&phy->tx_lock);17551756if (!list_empty(&wcid->tx_list))1757list_del_init(&wcid->tx_list);17581759spin_lock(&wcid->tx_pending.lock);1760skb_queue_splice_tail_init(&wcid->tx_pending, &list);1761spin_unlock(&wcid->tx_pending.lock);17621763spin_lock(&wcid->tx_offchannel.lock);1764skb_queue_splice_tail_init(&wcid->tx_offchannel, &list);1765spin_unlock(&wcid->tx_offchannel.lock);17661767spin_unlock_bh(&phy->tx_lock);17681769while ((skb = __skb_dequeue(&list)) != NULL) {1770hw = mt76_tx_status_get_hw(dev, skb);1771ieee80211_free_txskb(hw, skb);1772}1773}1774EXPORT_SYMBOL_GPL(mt76_wcid_cleanup);17751776void mt76_wcid_add_poll(struct mt76_dev *dev, struct mt76_wcid *wcid)1777{1778if (test_bit(MT76_MCU_RESET, &dev->phy.state) || !wcid->sta)1779return;17801781spin_lock_bh(&dev->sta_poll_lock);1782if (list_empty(&wcid->poll_list))1783list_add_tail(&wcid->poll_list, &dev->sta_poll_list);1784spin_unlock_bh(&dev->sta_poll_lock);1785}1786EXPORT_SYMBOL_GPL(mt76_wcid_add_poll);17871788s8 mt76_get_power_bound(struct mt76_phy *phy, s8 txpower)1789{1790int n_chains = hweight16(phy->chainmask);17911792txpower = mt76_get_sar_power(phy, phy->chandef.chan, txpower * 2);1793txpower -= mt76_tx_power_path_delta(n_chains);17941795return txpower;1796}1797EXPORT_SYMBOL_GPL(mt76_get_power_bound);17981799int mt76_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,1800unsigned int link_id, int *dbm)1801{1802struct mt76_phy *phy = mt76_vif_phy(hw, vif);1803int n_chains, delta;18041805if (!phy)1806return -EINVAL;18071808n_chains = hweight16(phy->chainmask);1809delta = mt76_tx_power_path_delta(n_chains);1810*dbm = DIV_ROUND_UP(phy->txpower_cur + delta, 2);18111812return 0;1813}1814EXPORT_SYMBOL_GPL(mt76_get_txpower);18151816int mt76_init_sar_power(struct ieee80211_hw *hw,1817const struct cfg80211_sar_specs *sar)1818{1819struct mt76_phy *phy = hw->priv;1820const struct cfg80211_sar_capa *capa = hw->wiphy->sar_capa;1821int i;18221823if (sar->type != NL80211_SAR_TYPE_POWER || !sar->num_sub_specs)1824return -EINVAL;18251826for (i = 0; i < sar->num_sub_specs; i++) {1827u32 index = sar->sub_specs[i].freq_range_index;1828/* SAR specifies power limitaton in 0.25dbm */1829s32 power = sar->sub_specs[i].power >> 1;18301831if (power > 127 || power < -127)1832power = 127;18331834phy->frp[index].range = &capa->freq_ranges[index];1835phy->frp[index].power = power;1836}18371838return 0;1839}1840EXPORT_SYMBOL_GPL(mt76_init_sar_power);18411842int mt76_get_sar_power(struct mt76_phy *phy,1843struct ieee80211_channel *chan,1844int power)1845{1846const struct cfg80211_sar_capa *capa = phy->hw->wiphy->sar_capa;1847int freq, i;18481849if (!capa || !phy->frp)1850return power;18511852if (power > 127 || power < -127)1853power = 127;18541855freq = ieee80211_channel_to_frequency(chan->hw_value, chan->band);1856for (i = 0 ; i < capa->num_freq_ranges; i++) {1857if (phy->frp[i].range &&1858freq >= phy->frp[i].range->start_freq &&1859freq < phy->frp[i].range->end_freq) {1860power = min_t(int, phy->frp[i].power, power);1861break;1862}1863}18641865return power;1866}1867EXPORT_SYMBOL_GPL(mt76_get_sar_power);18681869static void1870__mt76_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif)1871{1872if (vif->bss_conf.csa_active && ieee80211_beacon_cntdwn_is_complete(vif, 0))1873ieee80211_csa_finish(vif, 0);1874}18751876void mt76_csa_finish(struct mt76_dev *dev)1877{1878if (!dev->csa_complete)1879return;18801881ieee80211_iterate_active_interfaces_atomic(dev->hw,1882IEEE80211_IFACE_ITER_RESUME_ALL,1883__mt76_csa_finish, dev);18841885dev->csa_complete = 0;1886}1887EXPORT_SYMBOL_GPL(mt76_csa_finish);18881889static void1890__mt76_csa_check(void *priv, u8 *mac, struct ieee80211_vif *vif)1891{1892struct mt76_dev *dev = priv;18931894if (!vif->bss_conf.csa_active)1895return;18961897dev->csa_complete |= ieee80211_beacon_cntdwn_is_complete(vif, 0);1898}18991900void mt76_csa_check(struct mt76_dev *dev)1901{1902ieee80211_iterate_active_interfaces_atomic(dev->hw,1903IEEE80211_IFACE_ITER_RESUME_ALL,1904__mt76_csa_check, dev);1905}1906EXPORT_SYMBOL_GPL(mt76_csa_check);19071908int1909mt76_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set)1910{1911return 0;1912}1913EXPORT_SYMBOL_GPL(mt76_set_tim);19141915void mt76_insert_ccmp_hdr(struct sk_buff *skb, u8 key_id)1916{1917struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;1918int hdr_len = ieee80211_get_hdrlen_from_skb(skb);1919u8 *hdr, *pn = status->iv;19201921__skb_push(skb, 8);1922memmove(skb->data, skb->data + 8, hdr_len);1923hdr = skb->data + hdr_len;19241925hdr[0] = pn[5];1926hdr[1] = pn[4];1927hdr[2] = 0;1928hdr[3] = 0x20 | (key_id << 6);1929hdr[4] = pn[3];1930hdr[5] = pn[2];1931hdr[6] = pn[1];1932hdr[7] = pn[0];19331934status->flag &= ~RX_FLAG_IV_STRIPPED;1935}1936EXPORT_SYMBOL_GPL(mt76_insert_ccmp_hdr);19371938int mt76_get_rate(struct mt76_dev *dev,1939struct ieee80211_supported_band *sband,1940int idx, bool cck)1941{1942bool is_2g = sband->band == NL80211_BAND_2GHZ;1943int i, offset = 0, len = sband->n_bitrates;19441945if (cck) {1946if (!is_2g)1947return 0;19481949idx &= ~BIT(2); /* short preamble */1950} else if (is_2g) {1951offset = 4;1952}19531954for (i = offset; i < len; i++) {1955if ((sband->bitrates[i].hw_value & GENMASK(7, 0)) == idx)1956return i;1957}19581959return 0;1960}1961EXPORT_SYMBOL_GPL(mt76_get_rate);19621963void mt76_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,1964const u8 *mac)1965{1966struct mt76_phy *phy = hw->priv;19671968set_bit(MT76_SCANNING, &phy->state);1969}1970EXPORT_SYMBOL_GPL(mt76_sw_scan);19711972void mt76_sw_scan_complete(struct ieee80211_hw *hw, struct ieee80211_vif *vif)1973{1974struct mt76_phy *phy = hw->priv;19751976clear_bit(MT76_SCANNING, &phy->state);1977}1978EXPORT_SYMBOL_GPL(mt76_sw_scan_complete);19791980int mt76_get_antenna(struct ieee80211_hw *hw, int radio_idx, u32 *tx_ant,1981u32 *rx_ant)1982{1983struct mt76_phy *phy = hw->priv;1984struct mt76_dev *dev = phy->dev;1985int i;19861987mutex_lock(&dev->mutex);1988*tx_ant = 0;1989for (i = 0; i < ARRAY_SIZE(dev->phys); i++)1990if (dev->phys[i] && dev->phys[i]->hw == hw)1991*tx_ant |= dev->phys[i]->chainmask;1992*rx_ant = *tx_ant;1993mutex_unlock(&dev->mutex);19941995return 0;1996}1997EXPORT_SYMBOL_GPL(mt76_get_antenna);19981999struct mt76_queue *2000mt76_init_queue(struct mt76_dev *dev, int qid, int idx, int n_desc,2001int ring_base, void *wed, u32 flags)2002{2003struct mt76_queue *hwq;2004int err;20052006hwq = devm_kzalloc(dev->dev, sizeof(*hwq), GFP_KERNEL);2007if (!hwq)2008return ERR_PTR(-ENOMEM);20092010hwq->flags = flags;2011hwq->wed = wed;20122013err = dev->queue_ops->alloc(dev, hwq, idx, n_desc, 0, ring_base);2014if (err < 0)2015return ERR_PTR(err);20162017return hwq;2018}2019EXPORT_SYMBOL_GPL(mt76_init_queue);20202021void mt76_ethtool_worker(struct mt76_ethtool_worker_info *wi,2022struct mt76_sta_stats *stats, bool eht)2023{2024int i, ei = wi->initial_stat_idx;2025u64 *data = wi->data;20262027wi->sta_count++;20282029data[ei++] += stats->tx_mode[MT_PHY_TYPE_CCK];2030data[ei++] += stats->tx_mode[MT_PHY_TYPE_OFDM];2031data[ei++] += stats->tx_mode[MT_PHY_TYPE_HT];2032data[ei++] += stats->tx_mode[MT_PHY_TYPE_HT_GF];2033data[ei++] += stats->tx_mode[MT_PHY_TYPE_VHT];2034data[ei++] += stats->tx_mode[MT_PHY_TYPE_HE_SU];2035data[ei++] += stats->tx_mode[MT_PHY_TYPE_HE_EXT_SU];2036data[ei++] += stats->tx_mode[MT_PHY_TYPE_HE_TB];2037data[ei++] += stats->tx_mode[MT_PHY_TYPE_HE_MU];2038if (eht) {2039data[ei++] += stats->tx_mode[MT_PHY_TYPE_EHT_SU];2040data[ei++] += stats->tx_mode[MT_PHY_TYPE_EHT_TRIG];2041data[ei++] += stats->tx_mode[MT_PHY_TYPE_EHT_MU];2042}20432044for (i = 0; i < (ARRAY_SIZE(stats->tx_bw) - !eht); i++)2045data[ei++] += stats->tx_bw[i];20462047for (i = 0; i < (eht ? 14 : 12); i++)2048data[ei++] += stats->tx_mcs[i];20492050for (i = 0; i < 4; i++)2051data[ei++] += stats->tx_nss[i];20522053wi->worker_stat_count = ei - wi->initial_stat_idx;2054}2055EXPORT_SYMBOL_GPL(mt76_ethtool_worker);20562057void mt76_ethtool_page_pool_stats(struct mt76_dev *dev, u64 *data, int *index)2058{2059#ifdef CONFIG_PAGE_POOL_STATS2060struct page_pool_stats stats = {};2061int i;20622063mt76_for_each_q_rx(dev, i)2064page_pool_get_stats(dev->q_rx[i].page_pool, &stats);20652066page_pool_ethtool_stats_get(data, &stats);2067*index += page_pool_ethtool_stats_get_count();2068#endif2069}2070EXPORT_SYMBOL_GPL(mt76_ethtool_page_pool_stats);20712072enum mt76_dfs_state mt76_phy_dfs_state(struct mt76_phy *phy)2073{2074struct ieee80211_hw *hw = phy->hw;2075struct mt76_dev *dev = phy->dev;20762077if (dev->region == NL80211_DFS_UNSET ||2078test_bit(MT76_SCANNING, &phy->state))2079return MT_DFS_STATE_DISABLED;20802081if (!phy->radar_enabled) {2082if ((hw->conf.flags & IEEE80211_CONF_MONITOR) &&2083(phy->chandef.chan->flags & IEEE80211_CHAN_RADAR))2084return MT_DFS_STATE_ACTIVE;20852086return MT_DFS_STATE_DISABLED;2087}20882089if (!cfg80211_reg_can_beacon(hw->wiphy, &phy->chandef, NL80211_IFTYPE_AP))2090return MT_DFS_STATE_CAC;20912092return MT_DFS_STATE_ACTIVE;2093}2094EXPORT_SYMBOL_GPL(mt76_phy_dfs_state);20952096void mt76_vif_cleanup(struct mt76_dev *dev, struct ieee80211_vif *vif)2097{2098struct mt76_vif_link *mlink = (struct mt76_vif_link *)vif->drv_priv;2099struct mt76_vif_data *mvif = mlink->mvif;21002101rcu_assign_pointer(mvif->link[0], NULL);2102mt76_abort_scan(dev);2103if (mvif->roc_phy)2104mt76_abort_roc(mvif->roc_phy);2105}2106EXPORT_SYMBOL_GPL(mt76_vif_cleanup);21072108u16 mt76_select_links(struct ieee80211_vif *vif, int max_active_links)2109{2110unsigned long usable_links = ieee80211_vif_usable_links(vif);2111struct {2112u8 link_id;2113enum nl80211_band band;2114} data[IEEE80211_MLD_MAX_NUM_LINKS];2115unsigned int link_id;2116int i, n_data = 0;2117u16 sel_links = 0;21182119if (!ieee80211_vif_is_mld(vif))2120return 0;21212122if (vif->active_links == usable_links)2123return vif->active_links;21242125rcu_read_lock();2126for_each_set_bit(link_id, &usable_links, IEEE80211_MLD_MAX_NUM_LINKS) {2127struct ieee80211_bss_conf *link_conf;21282129link_conf = rcu_dereference(vif->link_conf[link_id]);2130if (WARN_ON_ONCE(!link_conf))2131continue;21322133data[n_data].link_id = link_id;2134data[n_data].band = link_conf->chanreq.oper.chan->band;2135n_data++;2136}2137rcu_read_unlock();21382139for (i = 0; i < n_data; i++) {2140int j;21412142if (!(BIT(data[i].link_id) & vif->active_links))2143continue;21442145sel_links = BIT(data[i].link_id);2146for (j = 0; j < n_data; j++) {2147if (data[i].band != data[j].band) {2148sel_links |= BIT(data[j].link_id);2149if (hweight16(sel_links) == max_active_links)2150break;2151}2152}2153break;2154}21552156return sel_links;2157}2158EXPORT_SYMBOL_GPL(mt76_select_links);215921602161