Path: blob/main/sys/contrib/dev/mediatek/mt76/mt7603/eeprom.h
48525 views
/* SPDX-License-Identifier: ISC */12#ifndef __MT7603_EEPROM_H3#define __MT7603_EEPROM_H45#include "mt7603.h"67enum mt7603_eeprom_field {8MT_EE_CHIP_ID = 0x000,9MT_EE_VERSION = 0x002,10MT_EE_MAC_ADDR = 0x004,11MT_EE_NIC_CONF_0 = 0x034,12MT_EE_NIC_CONF_1 = 0x036,13MT_EE_NIC_CONF_2 = 0x042,1415MT_EE_XTAL_TRIM_1 = 0x03a,1617MT_EE_RSSI_OFFSET_2G = 0x046,18MT_EE_WIFI_RF_SETTING = 0x048,19MT_EE_RSSI_OFFSET_5G = 0x04a,2021MT_EE_TX_POWER_DELTA_BW40 = 0x050,22MT_EE_TX_POWER_DELTA_BW80 = 0x052,2324MT_EE_TX_POWER_EXT_PA_5G = 0x054,2526MT_EE_TEMP_SENSOR_CAL = 0x055,2728MT_EE_TX_POWER_0_START_2G = 0x056,29MT_EE_TX_POWER_1_START_2G = 0x05c,3031/* used as byte arrays */32#define MT_TX_POWER_GROUP_SIZE_5G 533#define MT_TX_POWER_GROUPS_5G 634MT_EE_TX_POWER_0_START_5G = 0x062,3536MT_EE_TX_POWER_0_GRP3_TX_POWER_DELTA = 0x074,37MT_EE_TX_POWER_0_GRP4_TSSI_SLOPE = 0x076,3839MT_EE_TX_POWER_1_START_5G = 0x080,4041MT_EE_TX_POWER_CCK = 0x0a0,42MT_EE_TX_POWER_OFDM_2G_6M = 0x0a2,43MT_EE_TX_POWER_OFDM_2G_24M = 0x0a4,44MT_EE_TX_POWER_OFDM_2G_54M = 0x0a6,45MT_EE_TX_POWER_HT_BPSK_QPSK = 0x0a8,46MT_EE_TX_POWER_HT_16_64_QAM = 0x0aa,47MT_EE_TX_POWER_HT_64_QAM = 0x0ac,4849MT_EE_ELAN_RX_MODE_GAIN = 0x0c0,50MT_EE_ELAN_RX_MODE_NF = 0x0c1,51MT_EE_ELAN_RX_MODE_P1DB = 0x0c2,5253MT_EE_ELAN_BYPASS_MODE_GAIN = 0x0c3,54MT_EE_ELAN_BYPASS_MODE_NF = 0x0c4,55MT_EE_ELAN_BYPASS_MODE_P1DB = 0x0c5,5657MT_EE_STEP_NUM_NEG_6_7 = 0x0c6,58MT_EE_STEP_NUM_NEG_4_5 = 0x0c8,59MT_EE_STEP_NUM_NEG_2_3 = 0x0ca,60MT_EE_STEP_NUM_NEG_0_1 = 0x0cc,6162MT_EE_REF_STEP_24G = 0x0ce,6364MT_EE_STEP_NUM_PLUS_1_2 = 0x0d0,65MT_EE_STEP_NUM_PLUS_3_4 = 0x0d2,66MT_EE_STEP_NUM_PLUS_5_6 = 0x0d4,67MT_EE_STEP_NUM_PLUS_7 = 0x0d6,6869MT_EE_CP_FT_VERSION = 0x0f0,7071MT_EE_TX_POWER_TSSI_OFF = 0x0f2,7273MT_EE_XTAL_FREQ_OFFSET = 0x0f4,74MT_EE_XTAL_TRIM_2_COMP = 0x0f5,75MT_EE_XTAL_TRIM_3_COMP = 0x0f6,76MT_EE_XTAL_WF_RFCAL = 0x0f7,7778__MT_EE_MAX79};8081enum mt7603_eeprom_source {82MT_EE_SRC_PROM,83MT_EE_SRC_EFUSE,84MT_EE_SRC_FLASH,85};8687#define MT_EE_NIC_CONF_0_RX_PATH GENMASK(3, 0)88#define MT_EE_NIC_CONF_0_TX_PATH GENMASK(7, 4)8990#endif919293