Path: blob/main/sys/contrib/dev/mediatek/mt76/mt7615/mt7615.h
48526 views
/* SPDX-License-Identifier: ISC */1/* Copyright (C) 2019 MediaTek Inc. */23#ifndef __MT7615_H4#define __MT7615_H56#include <linux/completion.h>7#include <linux/interrupt.h>8#include <linux/ktime.h>9#include <linux/regmap.h>10#include "../mt76_connac_mcu.h"11#include "regs.h"1213#define MT7615_MAX_INTERFACES 1614#define MT7615_MAX_WMM_SETS 415#define MT7663_WTBL_SIZE 3216#define MT7615_WTBL_SIZE 12817#define MT7615_WTBL_RESERVED (mt7615_wtbl_size(dev) - 1)18#define MT7615_WTBL_STA (MT7615_WTBL_RESERVED - \19MT7615_MAX_INTERFACES)2021#define MT7615_PM_TIMEOUT (HZ / 12)22#define MT7615_HW_SCAN_TIMEOUT (HZ / 10)23#define MT7615_RESET_TIMEOUT (30 * HZ)24#define MT7615_RATE_RETRY 22526#define MT7615_TX_RING_SIZE 102427#define MT7615_TX_MGMT_RING_SIZE 12828#define MT7615_TX_MCU_RING_SIZE 12829#define MT7615_TX_FWDL_RING_SIZE 1283031#define MT7615_RX_RING_SIZE 102432#define MT7615_RX_MCU_RING_SIZE 5123334#define MT7615_DRV_OWN_RETRY_COUNT 103536#define MT7615_FIRMWARE_CR4 "mediatek/mt7615_cr4.bin"37#define MT7615_FIRMWARE_N9 "mediatek/mt7615_n9.bin"38#define MT7615_ROM_PATCH "mediatek/mt7615_rom_patch.bin"3940#define MT7622_FIRMWARE_N9 "mediatek/mt7622_n9.bin"41#define MT7622_ROM_PATCH "mediatek/mt7622_rom_patch.bin"4243#define MT7615_FIRMWARE_V1 144#define MT7615_FIRMWARE_V2 245#define MT7615_FIRMWARE_V3 34647#define MT7663_OFFLOAD_ROM_PATCH "mediatek/mt7663pr2h.bin"48#define MT7663_OFFLOAD_FIRMWARE_N9 "mediatek/mt7663_n9_v3.bin"49#define MT7663_ROM_PATCH "mediatek/mt7663pr2h_rebb.bin"50#define MT7663_FIRMWARE_N9 "mediatek/mt7663_n9_rebb.bin"5152#define MT7615_EEPROM_SIZE 102453#define MT7663_EEPROM_SIZE 153654#define MT7615_TOKEN_SIZE 40965556#define MT_FRAC_SCALE 1257#define MT_FRAC(val, div) (((val) << MT_FRAC_SCALE) / (div))5859#define MT_CHFREQ_VALID BIT(7)60#define MT_CHFREQ_DBDC_IDX BIT(6)61#define MT_CHFREQ_SEQ GENMASK(5, 0)6263#define MT7615_BAR_RATE_DEFAULT 0x4b /* OFDM 6M */64#define MT7615_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */65#define MT7615_CFEND_RATE_11B 0x03 /* 11B LP, 11M */6667struct mt7615_vif;68struct mt7615_sta;69struct mt7615_dfs_pulse;70struct mt7615_dfs_pattern;71enum mt7615_cipher_type;7273enum mt7615_hw_txq_id {74MT7615_TXQ_MAIN,75MT7615_TXQ_EXT,76MT7615_TXQ_MCU,77MT7615_TXQ_FWDL,78};7980enum mt7622_hw_txq_id {81MT7622_TXQ_AC0,82MT7622_TXQ_AC1,83MT7622_TXQ_AC2,84MT7622_TXQ_FWDL = MT7615_TXQ_FWDL,85MT7622_TXQ_AC3,86MT7622_TXQ_MGMT,87MT7622_TXQ_MCU = 15,88};8990struct mt7615_rate_set {91struct ieee80211_tx_rate probe_rate;92struct ieee80211_tx_rate rates[4];93};9495struct mt7615_rate_desc {96bool rateset;97u16 probe_val;98u16 val[4];99u8 bw_idx;100u8 bw;101};102103struct mt7615_wtbl_rate_desc {104struct list_head node;105106struct mt7615_rate_desc rate;107struct mt7615_sta *sta;108};109110struct mt7663s_intr {111u32 isr;112struct {113u32 wtqcr[8];114} tx;115struct {116u16 num[2];117u16 len[2][16];118} rx;119u32 rec_mb[2];120} __packed;121122struct mt7615_sta {123struct mt76_wcid wcid; /* must be first */124125struct mt7615_vif *vif;126127u32 airtime_ac[8];128129struct ieee80211_tx_rate rates[4];130131struct mt7615_rate_set rateset[2];132u32 rate_set_tsf;133134u8 rate_count;135u8 n_rates;136137u8 rate_probe;138};139140struct mt7615_vif {141struct mt76_vif_link mt76; /* must be first */142struct mt7615_sta sta;143bool sta_added;144};145146struct mib_stats {147u32 ack_fail_cnt;148u32 fcs_err_cnt;149u32 rts_cnt;150u32 rts_retries_cnt;151u32 ba_miss_cnt;152unsigned long aggr_per;153};154155struct mt7615_phy {156struct mt76_phy *mt76;157struct mt7615_dev *dev;158159struct ieee80211_vif *monitor_vif;160161u8 n_beacon_vif;162163u32 rxfilter;164u64 omac_mask;165166u16 noise;167168bool scs_en;169170unsigned long last_cca_adj;171int false_cca_ofdm, false_cca_cck;172s8 ofdm_sensitivity;173s8 cck_sensitivity;174175s16 coverage_class;176u8 slottime;177178u8 chfreq;179u8 rdd_state;180181u32 rx_ampdu_ts;182u32 ampdu_ref;183184struct mib_stats mib;185186struct sk_buff_head scan_event_list;187struct delayed_work scan_work;188189struct work_struct roc_work;190struct timer_list roc_timer;191wait_queue_head_t roc_wait;192bool roc_grant;193194#ifdef CONFIG_NL80211_TESTMODE195struct {196u32 *reg_backup;197198s16 last_freq_offset;199u8 last_rcpi[4];200s8 last_ib_rssi[4];201s8 last_wb_rssi[4];202} test;203#endif204};205206#define mt7615_mcu_add_tx_ba(dev, ...) (dev)->mcu_ops->add_tx_ba((dev), __VA_ARGS__)207#define mt7615_mcu_add_rx_ba(dev, ...) (dev)->mcu_ops->add_rx_ba((dev), __VA_ARGS__)208#define mt7615_mcu_sta_add(phy, ...) ((phy)->dev)->mcu_ops->sta_add((phy), __VA_ARGS__)209#define mt7615_mcu_add_dev_info(phy, ...) ((phy)->dev)->mcu_ops->add_dev_info((phy), __VA_ARGS__)210#define mt7615_mcu_add_bss_info(phy, ...) ((phy)->dev)->mcu_ops->add_bss_info((phy), __VA_ARGS__)211#define mt7615_mcu_add_beacon(dev, ...) (dev)->mcu_ops->add_beacon_offload((dev), __VA_ARGS__)212#define mt7615_mcu_set_pm(dev, ...) (dev)->mcu_ops->set_pm_state((dev), __VA_ARGS__)213#define mt7615_mcu_set_drv_ctrl(dev) (dev)->mcu_ops->set_drv_ctrl((dev))214#define mt7615_mcu_set_fw_ctrl(dev) (dev)->mcu_ops->set_fw_ctrl((dev))215#define mt7615_mcu_set_sta_decap_offload(dev, ...) (dev)->mcu_ops->set_sta_decap_offload((dev), __VA_ARGS__)216struct mt7615_mcu_ops {217int (*add_tx_ba)(struct mt7615_dev *dev,218struct ieee80211_ampdu_params *params,219bool enable);220int (*add_rx_ba)(struct mt7615_dev *dev,221struct ieee80211_ampdu_params *params,222bool enable);223int (*sta_add)(struct mt7615_phy *phy, struct ieee80211_vif *vif,224struct ieee80211_sta *sta, bool enable);225int (*add_dev_info)(struct mt7615_phy *phy, struct ieee80211_vif *vif,226bool enable);227int (*add_bss_info)(struct mt7615_phy *phy, struct ieee80211_vif *vif,228struct ieee80211_sta *sta, bool enable);229int (*add_beacon_offload)(struct mt7615_dev *dev,230struct ieee80211_hw *hw,231struct ieee80211_vif *vif, bool enable);232int (*set_pm_state)(struct mt7615_dev *dev, int band, int state);233int (*set_drv_ctrl)(struct mt7615_dev *dev);234int (*set_fw_ctrl)(struct mt7615_dev *dev);235int (*set_sta_decap_offload)(struct mt7615_dev *dev,236struct ieee80211_vif *vif,237struct ieee80211_sta *sta);238};239240struct mt7615_dev {241union { /* must be first */242struct mt76_dev mt76;243struct mt76_phy mphy;244};245246const struct mt76_bus_ops *bus_ops;247struct mt7615_phy phy;248u64 omac_mask;249250u16 chainmask;251252struct ieee80211_ops *ops;253const struct mt7615_mcu_ops *mcu_ops;254struct regmap *infracfg;255const u32 *reg_map;256257struct work_struct mcu_work;258259struct work_struct reset_work;260wait_queue_head_t reset_wait;261u32 reset_state;262263struct {264u8 n_pulses;265u32 period;266u16 width;267s16 power;268} radar_pattern;269u32 hw_pattern;270271bool fw_debug;272bool flash_eeprom;273bool dbdc_support;274275u8 fw_ver;276277struct work_struct rate_work;278struct list_head wrd_head;279280u32 debugfs_rf_wf;281u32 debugfs_rf_reg;282283u32 muar_mask;284285struct mt76_connac_pm pm;286struct mt76_connac_coredump coredump;287};288289enum tx_pkt_queue_idx {290MT_LMAC_AC00,291MT_LMAC_AC01,292MT_LMAC_AC02,293MT_LMAC_AC03,294MT_LMAC_ALTX0 = 0x10,295MT_LMAC_BMC0,296MT_LMAC_BCN0,297MT_LMAC_PSMP0,298MT_LMAC_ALTX1,299MT_LMAC_BMC1,300MT_LMAC_BCN1,301MT_LMAC_PSMP1,302};303304enum {305MT_RX_SEL0,306MT_RX_SEL1,307};308309enum mt7615_rdd_cmd {310RDD_STOP,311RDD_START,312RDD_DET_MODE,313RDD_DET_STOP,314RDD_CAC_START,315RDD_CAC_END,316RDD_NORMAL_START,317RDD_DISABLE_DFS_CAL,318RDD_PULSE_DBG,319RDD_READ_PULSE,320RDD_RESUME_BF,321};322323static inline struct mt7615_phy *324mt7615_hw_phy(struct ieee80211_hw *hw)325{326struct mt76_phy *phy = hw->priv;327328return phy->priv;329}330331static inline struct mt7615_dev *332mt7615_hw_dev(struct ieee80211_hw *hw)333{334struct mt76_phy *phy = hw->priv;335336return container_of(phy->dev, struct mt7615_dev, mt76);337}338339static inline struct mt7615_phy *340mt7615_ext_phy(struct mt7615_dev *dev)341{342struct mt76_phy *phy = dev->mt76.phys[MT_BAND1];343344if (!phy)345return NULL;346347return phy->priv;348}349350extern struct ieee80211_rate mt7615_rates[12];351extern const struct ieee80211_ops mt7615_ops;352extern const u32 mt7615e_reg_map[__MT_BASE_MAX];353extern const u32 mt7663e_reg_map[__MT_BASE_MAX];354extern const u32 mt7663_usb_sdio_reg_map[__MT_BASE_MAX];355extern struct pci_driver mt7615_pci_driver;356extern struct platform_driver mt7622_wmac_driver;357extern const struct mt76_testmode_ops mt7615_testmode_ops;358359#ifdef CONFIG_MT7622_WMAC360int mt7622_wmac_init(struct mt7615_dev *dev);361#else362static inline int mt7622_wmac_init(struct mt7615_dev *dev)363{364return 0;365}366#endif367368int mt7615_thermal_init(struct mt7615_dev *dev);369int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base,370int irq, const u32 *map);371u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr);372373u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr);374int mt7615_led_set_blink(struct led_classdev *led_cdev,375unsigned long *delay_on,376unsigned long *delay_off);377void mt7615_led_set_brightness(struct led_classdev *led_cdev,378enum led_brightness brightness);379void mt7615_init_device(struct mt7615_dev *dev);380int mt7615_register_device(struct mt7615_dev *dev);381void mt7615_unregister_device(struct mt7615_dev *dev);382int mt7615_register_ext_phy(struct mt7615_dev *dev);383void mt7615_unregister_ext_phy(struct mt7615_dev *dev);384int mt7615_eeprom_init(struct mt7615_dev *dev, u32 addr);385int mt7615_eeprom_get_target_power_index(struct mt7615_dev *dev,386struct ieee80211_channel *chan,387u8 chain_idx);388int mt7615_eeprom_get_power_delta_index(struct mt7615_dev *dev,389enum nl80211_band band);390int mt7615_wait_pdma_busy(struct mt7615_dev *dev);391int mt7615_dma_init(struct mt7615_dev *dev);392void mt7615_dma_start(struct mt7615_dev *dev);393void mt7615_dma_cleanup(struct mt7615_dev *dev);394int mt7615_mcu_init(struct mt7615_dev *dev);395bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev);396void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta,397struct ieee80211_tx_rate *probe_rate,398struct ieee80211_tx_rate *rates);399void mt7615_pm_wake_work(struct work_struct *work);400void mt7615_pm_power_save_work(struct work_struct *work);401int mt7615_mcu_set_chan_info(struct mt7615_phy *phy, int cmd);402int mt7615_mcu_set_wmm(struct mt7615_dev *dev, u8 queue,403const struct ieee80211_tx_queue_params *params);404void mt7615_mcu_rx_event(struct mt7615_dev *dev, struct sk_buff *skb);405int mt7615_mcu_rdd_send_pattern(struct mt7615_dev *dev);406int mt7615_mcu_fw_log_2_host(struct mt7615_dev *dev, u8 ctrl);407408static inline bool mt7615_firmware_offload(struct mt7615_dev *dev)409{410return dev->fw_ver > MT7615_FIRMWARE_V2;411}412413static inline u16 mt7615_wtbl_size(struct mt7615_dev *dev)414{415if (is_mt7663(&dev->mt76) && mt7615_firmware_offload(dev))416return MT7663_WTBL_SIZE;417else418return MT7615_WTBL_SIZE;419}420421#define mt7615_mutex_acquire(dev) \422mt76_connac_mutex_acquire(&(dev)->mt76, &(dev)->pm)423#define mt7615_mutex_release(dev) \424mt76_connac_mutex_release(&(dev)->mt76, &(dev)->pm)425426static inline u8 mt7615_lmac_mapping(struct mt7615_dev *dev, u8 ac)427{428static const u8 lmac_queue_map[] = {429[IEEE80211_AC_BK] = MT_LMAC_AC00,430[IEEE80211_AC_BE] = MT_LMAC_AC01,431[IEEE80211_AC_VI] = MT_LMAC_AC02,432[IEEE80211_AC_VO] = MT_LMAC_AC03,433};434435if (WARN_ON_ONCE(ac >= ARRAY_SIZE(lmac_queue_map)))436return MT_LMAC_AC01; /* BE */437438return lmac_queue_map[ac];439}440441static inline u32 mt7615_tx_mcu_int_mask(struct mt7615_dev *dev)442{443return MT_INT_TX_DONE(dev->mt76.q_mcu[MT_MCUQ_WM]->hw_idx);444}445446static inline unsigned long447mt7615_get_macwork_timeout(struct mt7615_dev *dev)448{449return dev->pm.enable ? HZ / 3 : HZ / 10;450}451452void mt7615_dma_reset(struct mt7615_dev *dev);453void mt7615_scan_work(struct work_struct *work);454void mt7615_roc_work(struct work_struct *work);455void mt7615_roc_timer(struct timer_list *timer);456void mt7615_init_txpower(struct mt7615_dev *dev,457struct ieee80211_supported_band *sband);458int mt7615_set_channel(struct mt76_phy *mphy);459void mt7615_init_work(struct mt7615_dev *dev);460461int mt7615_mcu_restart(struct mt76_dev *dev);462void mt7615_update_channel(struct mt76_phy *mphy);463bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask);464void mt7615_mac_reset_counters(struct mt7615_phy *phy);465void mt7615_mac_cca_stats_reset(struct mt7615_phy *phy);466void mt7615_mac_set_scs(struct mt7615_phy *phy, bool enable);467void mt7615_mac_enable_nf(struct mt7615_dev *dev, bool ext_phy);468void mt7615_mac_enable_rtscts(struct mt7615_dev *dev,469struct ieee80211_vif *vif, bool enable);470void mt7615_mac_sta_poll(struct mt7615_dev *dev);471int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi,472struct sk_buff *skb, struct mt76_wcid *wcid,473struct ieee80211_sta *sta, int pid,474struct ieee80211_key_conf *key,475enum mt76_txq_id qid, bool beacon);476void mt7615_mac_set_timing(struct mt7615_phy *phy);477int __mt7615_mac_wtbl_set_key(struct mt7615_dev *dev,478struct mt76_wcid *wcid,479struct ieee80211_key_conf *key);480int mt7615_mac_wtbl_set_key(struct mt7615_dev *dev, struct mt76_wcid *wcid,481struct ieee80211_key_conf *key);482void mt7615_mac_reset_work(struct work_struct *work);483u32 mt7615_mac_get_sta_tid_sn(struct mt7615_dev *dev, int wcid, u8 tid);484485int mt7615_mcu_parse_response(struct mt76_dev *mdev, int cmd,486struct sk_buff *skb, int seq);487u32 mt7615_rf_rr(struct mt7615_dev *dev, u32 wf, u32 reg);488int mt7615_rf_wr(struct mt7615_dev *dev, u32 wf, u32 reg, u32 val);489int mt7615_mcu_set_dbdc(struct mt7615_dev *dev);490int mt7615_mcu_set_eeprom(struct mt7615_dev *dev);491int mt7615_mcu_get_temperature(struct mt7615_dev *dev);492int mt7615_mcu_set_tx_power(struct mt7615_phy *phy);493void mt7615_mcu_exit(struct mt7615_dev *dev);494void mt7615_mcu_fill_msg(struct mt7615_dev *dev, struct sk_buff *skb,495int cmd, int *wait_seq);496497int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,498enum mt76_txq_id qid, struct mt76_wcid *wcid,499struct ieee80211_sta *sta,500struct mt76_tx_info *tx_info);501502void mt7615_tx_worker(struct mt76_worker *w);503void mt7615_tx_token_put(struct mt7615_dev *dev);504bool mt7615_rx_check(struct mt76_dev *mdev, void *data, int len);505void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,506struct sk_buff *skb, u32 *info);507int mt7615_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,508struct ieee80211_sta *sta);509void mt7615_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,510struct ieee80211_sta *sta);511void mt7615_mac_work(struct work_struct *work);512int mt7615_mcu_set_rx_hdr_trans_blacklist(struct mt7615_dev *dev);513int mt7615_mcu_set_fcc5_lpn(struct mt7615_dev *dev, int val);514int mt7615_mcu_set_pulse_th(struct mt7615_dev *dev,515const struct mt7615_dfs_pulse *pulse);516int mt7615_mcu_set_radar_th(struct mt7615_dev *dev, int index,517const struct mt7615_dfs_pattern *pattern);518int mt7615_mcu_set_test_param(struct mt7615_dev *dev, u8 param, bool test_mode,519u32 val);520int mt7615_mcu_set_sku_en(struct mt7615_phy *phy, bool enable);521int mt7615_mcu_apply_rx_dcoc(struct mt7615_phy *phy);522int mt7615_mcu_apply_tx_dpd(struct mt7615_phy *phy);523int mt7615_dfs_init_radar_detector(struct mt7615_phy *phy);524525int mt7615_mcu_set_roc(struct mt7615_phy *phy, struct ieee80211_vif *vif,526struct ieee80211_channel *chan, int duration);527528int mt7615_init_debugfs(struct mt7615_dev *dev);529int mt7615_mcu_wait_response(struct mt7615_dev *dev, int cmd, int seq);530531int mt7615_mac_set_beacon_filter(struct mt7615_phy *phy,532struct ieee80211_vif *vif,533bool enable);534int mt7615_mcu_set_bss_pm(struct mt7615_dev *dev, struct ieee80211_vif *vif,535bool enable);536int __mt7663_load_firmware(struct mt7615_dev *dev);537void mt7615_coredump_work(struct work_struct *work);538539void mt7622_trigger_hif_int(struct mt7615_dev *dev, bool en);540541/* usb */542int mt7663_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,543enum mt76_txq_id qid, struct mt76_wcid *wcid,544struct ieee80211_sta *sta,545struct mt76_tx_info *tx_info);546bool mt7663_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update);547void mt7663_usb_sdio_tx_complete_skb(struct mt76_dev *mdev,548struct mt76_queue_entry *e);549int mt7663_usb_sdio_register_device(struct mt7615_dev *dev);550int mt7663u_mcu_init(struct mt7615_dev *dev);551int mt7663u_mcu_power_on(struct mt7615_dev *dev);552553/* sdio */554int mt7663s_mcu_init(struct mt7615_dev *dev);555556#endif557558559