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freebsd
GitHub Repository: freebsd/freebsd-src
Path: blob/main/sys/contrib/dev/mediatek/mt76/mt76_connac_mac.c
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// SPDX-License-Identifier: BSD-3-Clause-Clear
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/* Copyright (C) 2020 MediaTek Inc. */
3
4
#include "mt76_connac.h"
5
#include "mt76_connac2_mac.h"
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#include "dma.h"
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8
#define HE_BITS(f) cpu_to_le16(IEEE80211_RADIOTAP_HE_##f)
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#define HE_PREP(f, m, v) le16_encode_bits(le32_get_bits(v, MT_CRXV_HE_##m),\
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IEEE80211_RADIOTAP_HE_##f)
11
12
void mt76_connac_gen_ppe_thresh(u8 *he_ppet, int nss, enum nl80211_band band)
13
{
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static const u8 ppet16_ppet8_ru3_ru0[] = { 0x1c, 0xc7, 0x71 };
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u8 i, ppet_bits, ppet_size, ru_bit_mask = 0xf;
16
17
if (band == NL80211_BAND_2GHZ)
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ru_bit_mask = 0x3;
19
20
he_ppet[0] = FIELD_PREP(IEEE80211_PPE_THRES_NSS_MASK, nss - 1) |
21
FIELD_PREP(IEEE80211_PPE_THRES_RU_INDEX_BITMASK_MASK,
22
ru_bit_mask);
23
24
ppet_bits = IEEE80211_PPE_THRES_INFO_PPET_SIZE *
25
nss * hweight8(ru_bit_mask) * 2;
26
ppet_size = DIV_ROUND_UP(ppet_bits, 8);
27
28
for (i = 0; i < ppet_size - 1; i++)
29
he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3];
30
31
he_ppet[i + 1] = ppet16_ppet8_ru3_ru0[i % 3] &
32
(0xff >> (8 - (ppet_bits - 1) % 8));
33
}
34
EXPORT_SYMBOL_GPL(mt76_connac_gen_ppe_thresh);
35
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int mt76_connac_pm_wake(struct mt76_phy *phy, struct mt76_connac_pm *pm)
37
{
38
struct mt76_dev *dev = phy->dev;
39
40
if (mt76_is_usb(dev))
41
return 0;
42
43
cancel_delayed_work_sync(&pm->ps_work);
44
if (!test_bit(MT76_STATE_PM, &phy->state))
45
return 0;
46
47
if (pm->suspended)
48
return 0;
49
50
queue_work(dev->wq, &pm->wake_work);
51
if (!wait_event_timeout(pm->wait,
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!test_bit(MT76_STATE_PM, &phy->state),
53
3 * HZ)) {
54
ieee80211_wake_queues(phy->hw);
55
return -ETIMEDOUT;
56
}
57
58
return 0;
59
}
60
EXPORT_SYMBOL_GPL(mt76_connac_pm_wake);
61
62
void mt76_connac_power_save_sched(struct mt76_phy *phy,
63
struct mt76_connac_pm *pm)
64
{
65
struct mt76_dev *dev = phy->dev;
66
67
if (mt76_is_usb(dev))
68
return;
69
70
if (!pm->enable)
71
return;
72
73
if (pm->suspended)
74
return;
75
76
pm->last_activity = jiffies;
77
78
if (!test_bit(MT76_STATE_PM, &phy->state)) {
79
cancel_delayed_work(&phy->mac_work);
80
queue_delayed_work(dev->wq, &pm->ps_work, pm->idle_timeout);
81
}
82
}
83
EXPORT_SYMBOL_GPL(mt76_connac_power_save_sched);
84
85
void mt76_connac_free_pending_tx_skbs(struct mt76_connac_pm *pm,
86
struct mt76_wcid *wcid)
87
{
88
int i;
89
90
spin_lock_bh(&pm->txq_lock);
91
for (i = 0; i < IEEE80211_NUM_ACS; i++) {
92
if (wcid && pm->tx_q[i].wcid != wcid)
93
continue;
94
95
dev_kfree_skb(pm->tx_q[i].skb);
96
pm->tx_q[i].skb = NULL;
97
}
98
spin_unlock_bh(&pm->txq_lock);
99
}
100
EXPORT_SYMBOL_GPL(mt76_connac_free_pending_tx_skbs);
101
102
void mt76_connac_pm_queue_skb(struct ieee80211_hw *hw,
103
struct mt76_connac_pm *pm,
104
struct mt76_wcid *wcid,
105
struct sk_buff *skb)
106
{
107
int qid = skb_get_queue_mapping(skb);
108
struct mt76_phy *phy = hw->priv;
109
110
spin_lock_bh(&pm->txq_lock);
111
if (!pm->tx_q[qid].skb) {
112
ieee80211_stop_queues(hw);
113
pm->tx_q[qid].wcid = wcid;
114
pm->tx_q[qid].skb = skb;
115
queue_work(phy->dev->wq, &pm->wake_work);
116
} else {
117
dev_kfree_skb(skb);
118
}
119
spin_unlock_bh(&pm->txq_lock);
120
}
121
EXPORT_SYMBOL_GPL(mt76_connac_pm_queue_skb);
122
123
void mt76_connac_pm_dequeue_skbs(struct mt76_phy *phy,
124
struct mt76_connac_pm *pm)
125
{
126
int i;
127
128
spin_lock_bh(&pm->txq_lock);
129
for (i = 0; i < IEEE80211_NUM_ACS; i++) {
130
struct mt76_wcid *wcid = pm->tx_q[i].wcid;
131
struct ieee80211_sta *sta = NULL;
132
133
if (!pm->tx_q[i].skb)
134
continue;
135
136
if (wcid && wcid->sta)
137
sta = container_of((void *)wcid, struct ieee80211_sta,
138
drv_priv);
139
140
mt76_tx(phy, sta, wcid, pm->tx_q[i].skb);
141
pm->tx_q[i].skb = NULL;
142
}
143
spin_unlock_bh(&pm->txq_lock);
144
145
mt76_worker_schedule(&phy->dev->tx_worker);
146
}
147
EXPORT_SYMBOL_GPL(mt76_connac_pm_dequeue_skbs);
148
149
void mt76_connac_tx_complete_skb(struct mt76_dev *mdev,
150
struct mt76_queue_entry *e)
151
{
152
if (!e->txwi) {
153
dev_kfree_skb_any(e->skb);
154
return;
155
}
156
157
if (e->skb)
158
mt76_tx_complete_skb(mdev, e->wcid, e->skb);
159
}
160
EXPORT_SYMBOL_GPL(mt76_connac_tx_complete_skb);
161
162
void mt76_connac_write_hw_txp(struct mt76_dev *dev,
163
struct mt76_tx_info *tx_info,
164
void *txp_ptr, u32 id)
165
{
166
struct mt76_connac_hw_txp *txp = txp_ptr;
167
struct mt76_connac_txp_ptr *ptr = &txp->ptr[0];
168
int i, nbuf = tx_info->nbuf - 1;
169
u32 last_mask;
170
171
tx_info->buf[0].len = MT_TXD_SIZE + sizeof(*txp);
172
tx_info->nbuf = 1;
173
174
txp->msdu_id[0] = cpu_to_le16(id | MT_MSDU_ID_VALID);
175
176
if (is_mt7663(dev) || is_mt7921(dev) || is_mt7925(dev))
177
last_mask = MT_TXD_LEN_LAST;
178
else
179
last_mask = MT_TXD_LEN_AMSDU_LAST |
180
MT_TXD_LEN_MSDU_LAST;
181
182
for (i = 0; i < nbuf; i++) {
183
u16 len = tx_info->buf[i + 1].len & MT_TXD_LEN_MASK;
184
u32 addr = tx_info->buf[i + 1].addr;
185
186
if (i == nbuf - 1)
187
len |= last_mask;
188
189
if (i & 1) {
190
ptr->buf1 = cpu_to_le32(addr);
191
ptr->len1 = cpu_to_le16(len);
192
ptr++;
193
} else {
194
ptr->buf0 = cpu_to_le32(addr);
195
ptr->len0 = cpu_to_le16(len);
196
}
197
}
198
}
199
EXPORT_SYMBOL_GPL(mt76_connac_write_hw_txp);
200
201
static void
202
mt76_connac_txp_skb_unmap_fw(struct mt76_dev *mdev,
203
struct mt76_connac_fw_txp *txp)
204
{
205
struct device *dev = is_connac_v1(mdev) ? mdev->dev : mdev->dma_dev;
206
int i;
207
208
for (i = 0; i < txp->nbuf; i++)
209
dma_unmap_single(dev, le32_to_cpu(txp->buf[i]),
210
le16_to_cpu(txp->len[i]), DMA_TO_DEVICE);
211
}
212
213
static void
214
mt76_connac_txp_skb_unmap_hw(struct mt76_dev *dev,
215
struct mt76_connac_hw_txp *txp)
216
{
217
u32 last_mask;
218
int i;
219
220
if (is_mt7663(dev) || is_mt7921(dev) || is_mt7925(dev))
221
last_mask = MT_TXD_LEN_LAST;
222
else
223
last_mask = MT_TXD_LEN_MSDU_LAST;
224
225
for (i = 0; i < ARRAY_SIZE(txp->ptr); i++) {
226
struct mt76_connac_txp_ptr *ptr = &txp->ptr[i];
227
bool last;
228
u16 len;
229
230
len = le16_to_cpu(ptr->len0);
231
last = len & last_mask;
232
len &= MT_TXD_LEN_MASK;
233
dma_unmap_single(dev->dev, le32_to_cpu(ptr->buf0), len,
234
DMA_TO_DEVICE);
235
if (last)
236
break;
237
238
len = le16_to_cpu(ptr->len1);
239
last = len & last_mask;
240
len &= MT_TXD_LEN_MASK;
241
dma_unmap_single(dev->dev, le32_to_cpu(ptr->buf1), len,
242
DMA_TO_DEVICE);
243
if (last)
244
break;
245
}
246
}
247
248
void mt76_connac_txp_skb_unmap(struct mt76_dev *dev,
249
struct mt76_txwi_cache *t)
250
{
251
struct mt76_connac_txp_common *txp;
252
253
txp = mt76_connac_txwi_to_txp(dev, t);
254
if (is_mt76_fw_txp(dev))
255
mt76_connac_txp_skb_unmap_fw(dev, &txp->fw);
256
else
257
mt76_connac_txp_skb_unmap_hw(dev, &txp->hw);
258
}
259
EXPORT_SYMBOL_GPL(mt76_connac_txp_skb_unmap);
260
261
int mt76_connac_init_tx_queues(struct mt76_phy *phy, int idx, int n_desc,
262
int ring_base, void *wed, u32 flags)
263
{
264
int i, err;
265
266
err = mt76_init_tx_queue(phy, 0, idx, n_desc, ring_base,
267
wed, flags);
268
if (err < 0)
269
return err;
270
271
for (i = 1; i <= MT_TXQ_PSD; i++)
272
phy->q_tx[i] = phy->q_tx[0];
273
274
return 0;
275
}
276
EXPORT_SYMBOL_GPL(mt76_connac_init_tx_queues);
277
278
#define __bitrate_mask_check(_mcs, _mode) \
279
({ \
280
u8 i = 0; \
281
for (nss = 0; i < ARRAY_SIZE(mask->control[band]._mcs); i++) { \
282
if (!mask->control[band]._mcs[i]) \
283
continue; \
284
if (hweight16(mask->control[band]._mcs[i]) == 1) { \
285
mode = MT_PHY_TYPE_##_mode; \
286
rateidx = ffs(mask->control[band]._mcs[i]) - 1; \
287
if (mode == MT_PHY_TYPE_HT) \
288
rateidx += 8 * i; \
289
else \
290
nss = i + 1; \
291
goto out; \
292
} \
293
} \
294
})
295
296
u16 mt76_connac2_mac_tx_rate_val(struct mt76_phy *mphy,
297
struct ieee80211_bss_conf *conf,
298
bool beacon, bool mcast)
299
{
300
u8 nss = 0, mode = 0, band = NL80211_BAND_2GHZ;
301
int rateidx = 0, offset = 0, mcast_rate;
302
struct cfg80211_chan_def *chandef;
303
struct mt76_vif_link *mvif;
304
305
if (!conf)
306
goto legacy;
307
308
mvif = mt76_vif_conf_link(mphy->dev, conf->vif, conf);
309
chandef = mvif->ctx ? &mvif->ctx->def : &mphy->chandef;
310
band = chandef->chan->band;
311
312
if (is_mt7921(mphy->dev)) {
313
rateidx = ffs(conf->basic_rates) - 1;
314
goto legacy;
315
}
316
317
if (beacon) {
318
struct cfg80211_bitrate_mask *mask;
319
320
mask = &conf->beacon_tx_rate;
321
322
__bitrate_mask_check(he_mcs, HE_SU);
323
__bitrate_mask_check(vht_mcs, VHT);
324
__bitrate_mask_check(ht_mcs, HT);
325
326
if (hweight32(mask->control[band].legacy) == 1) {
327
rateidx = ffs(mask->control[band].legacy) - 1;
328
goto legacy;
329
}
330
}
331
332
mcast_rate = conf->mcast_rate[band];
333
if (mcast && mcast_rate > 0)
334
rateidx = mcast_rate - 1;
335
else
336
rateidx = ffs(conf->basic_rates) - 1;
337
338
legacy:
339
if (band != NL80211_BAND_2GHZ)
340
offset = 4;
341
342
/* pick the lowest rate for hidden nodes */
343
if (rateidx < 0)
344
rateidx = 0;
345
346
rateidx += offset;
347
if (rateidx >= ARRAY_SIZE(mt76_rates))
348
rateidx = offset;
349
350
rateidx = mt76_rates[rateidx].hw_value;
351
mode = rateidx >> 8;
352
rateidx &= GENMASK(7, 0);
353
out:
354
return FIELD_PREP(MT_TX_RATE_NSS, nss) |
355
FIELD_PREP(MT_TX_RATE_IDX, rateidx) |
356
FIELD_PREP(MT_TX_RATE_MODE, mode);
357
}
358
EXPORT_SYMBOL_GPL(mt76_connac2_mac_tx_rate_val);
359
360
static void
361
mt76_connac2_mac_write_txwi_8023(__le32 *txwi, struct sk_buff *skb,
362
struct mt76_wcid *wcid)
363
{
364
u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK;
365
u8 fc_type, fc_stype;
366
u16 ethertype;
367
bool wmm = false;
368
u32 val;
369
370
if (wcid->sta) {
371
struct ieee80211_sta *sta;
372
373
sta = container_of((void *)wcid, struct ieee80211_sta, drv_priv);
374
wmm = sta->wme;
375
}
376
377
val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_3) |
378
FIELD_PREP(MT_TXD1_TID, tid);
379
380
ethertype = get_unaligned_be16(&skb->data[12]);
381
if (ethertype >= ETH_P_802_3_MIN)
382
val |= MT_TXD1_ETH_802_3;
383
384
txwi[1] |= cpu_to_le32(val);
385
386
fc_type = IEEE80211_FTYPE_DATA >> 2;
387
fc_stype = wmm ? IEEE80211_STYPE_QOS_DATA >> 4 : 0;
388
389
val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) |
390
FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype);
391
392
txwi[2] |= cpu_to_le32(val);
393
394
val = FIELD_PREP(MT_TXD7_TYPE, fc_type) |
395
FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype);
396
397
txwi[7] |= cpu_to_le32(val);
398
}
399
400
static void
401
mt76_connac2_mac_write_txwi_80211(struct mt76_dev *dev, __le32 *txwi,
402
struct sk_buff *skb,
403
struct ieee80211_key_conf *key)
404
{
405
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
406
struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
407
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
408
bool multicast = is_multicast_ether_addr(hdr->addr1);
409
u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK;
410
__le16 fc = hdr->frame_control;
411
__le16 sc = hdr->seq_ctrl;
412
u8 fc_type, fc_stype;
413
u32 val;
414
415
if (ieee80211_is_action(fc) &&
416
mgmt->u.action.category == WLAN_CATEGORY_BACK &&
417
mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ) {
418
u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab);
419
420
txwi[5] |= cpu_to_le32(MT_TXD5_ADD_BA);
421
tid = (capab >> 2) & IEEE80211_QOS_CTL_TID_MASK;
422
} else if (ieee80211_is_back_req(hdr->frame_control)) {
423
struct ieee80211_bar *bar = (struct ieee80211_bar *)hdr;
424
u16 control = le16_to_cpu(bar->control);
425
426
tid = FIELD_GET(IEEE80211_BAR_CTRL_TID_INFO_MASK, control);
427
}
428
429
val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_11) |
430
FIELD_PREP(MT_TXD1_HDR_INFO,
431
ieee80211_get_hdrlen_from_skb(skb) / 2) |
432
FIELD_PREP(MT_TXD1_TID, tid);
433
434
txwi[1] |= cpu_to_le32(val);
435
436
fc_type = (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE) >> 2;
437
fc_stype = (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE) >> 4;
438
439
val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) |
440
FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype) |
441
FIELD_PREP(MT_TXD2_MULTICAST, multicast);
442
443
if (key && multicast && ieee80211_is_robust_mgmt_frame(skb) &&
444
key->cipher == WLAN_CIPHER_SUITE_AES_CMAC) {
445
val |= MT_TXD2_BIP;
446
txwi[3] &= ~cpu_to_le32(MT_TXD3_PROTECT_FRAME);
447
}
448
449
if (!ieee80211_is_data(fc) || multicast ||
450
info->flags & IEEE80211_TX_CTL_USE_MINRATE)
451
val |= MT_TXD2_FIX_RATE;
452
453
if (ieee80211_has_morefrags(fc) && ieee80211_is_first_frag(sc))
454
val |= FIELD_PREP(MT_TXD2_FRAG, MT_TX_FRAG_FIRST);
455
else if (ieee80211_has_morefrags(fc) && !ieee80211_is_first_frag(sc))
456
val |= FIELD_PREP(MT_TXD2_FRAG, MT_TX_FRAG_MID);
457
else if (!ieee80211_has_morefrags(fc) && !ieee80211_is_first_frag(sc))
458
val |= FIELD_PREP(MT_TXD2_FRAG, MT_TX_FRAG_LAST);
459
460
txwi[2] |= cpu_to_le32(val);
461
462
if (ieee80211_is_beacon(fc)) {
463
txwi[3] &= ~cpu_to_le32(MT_TXD3_SW_POWER_MGMT);
464
txwi[3] |= cpu_to_le32(MT_TXD3_REM_TX_COUNT);
465
}
466
467
if (info->flags & IEEE80211_TX_CTL_INJECTED) {
468
u16 seqno = le16_to_cpu(sc);
469
470
if (ieee80211_is_back_req(hdr->frame_control)) {
471
struct ieee80211_bar *bar;
472
473
bar = (struct ieee80211_bar *)skb->data;
474
seqno = le16_to_cpu(bar->start_seq_num);
475
}
476
477
val = MT_TXD3_SN_VALID |
478
FIELD_PREP(MT_TXD3_SEQ, IEEE80211_SEQ_TO_SN(seqno));
479
txwi[3] |= cpu_to_le32(val);
480
txwi[7] &= ~cpu_to_le32(MT_TXD7_HW_AMSDU);
481
}
482
483
if (mt76_is_mmio(dev)) {
484
val = FIELD_PREP(MT_TXD7_TYPE, fc_type) |
485
FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype);
486
txwi[7] |= cpu_to_le32(val);
487
} else {
488
val = FIELD_PREP(MT_TXD8_L_TYPE, fc_type) |
489
FIELD_PREP(MT_TXD8_L_SUB_TYPE, fc_stype);
490
txwi[8] |= cpu_to_le32(val);
491
}
492
}
493
494
void mt76_connac2_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi,
495
struct sk_buff *skb, struct mt76_wcid *wcid,
496
struct ieee80211_key_conf *key, int pid,
497
enum mt76_txq_id qid, u32 changed)
498
{
499
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
500
u8 phy_idx = (info->hw_queue & MT_TX_HW_QUEUE_PHY) >> 2;
501
struct ieee80211_vif *vif = info->control.vif;
502
struct mt76_phy *mphy = &dev->phy;
503
u8 p_fmt, q_idx, omac_idx = 0, wmm_idx = 0, band_idx = 0;
504
u32 val, sz_txd = mt76_is_mmio(dev) ? MT_TXD_SIZE : MT_SDIO_TXD_SIZE;
505
bool is_8023 = info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP;
506
bool beacon = !!(changed & (BSS_CHANGED_BEACON |
507
BSS_CHANGED_BEACON_ENABLED));
508
bool inband_disc = !!(changed & (BSS_CHANGED_UNSOL_BCAST_PROBE_RESP |
509
BSS_CHANGED_FILS_DISCOVERY));
510
bool amsdu_en = wcid->amsdu;
511
512
if (vif) {
513
struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv;
514
515
omac_idx = mvif->omac_idx;
516
wmm_idx = mvif->wmm_idx;
517
band_idx = mvif->band_idx;
518
}
519
520
if (phy_idx && dev->phys[MT_BAND1])
521
mphy = dev->phys[MT_BAND1];
522
523
if (inband_disc) {
524
p_fmt = MT_TX_TYPE_FW;
525
q_idx = MT_LMAC_ALTX0;
526
} else if (beacon) {
527
p_fmt = MT_TX_TYPE_FW;
528
q_idx = MT_LMAC_BCN0;
529
} else if (qid >= MT_TXQ_PSD) {
530
p_fmt = mt76_is_mmio(dev) ? MT_TX_TYPE_CT : MT_TX_TYPE_SF;
531
q_idx = MT_LMAC_ALTX0;
532
} else {
533
p_fmt = mt76_is_mmio(dev) ? MT_TX_TYPE_CT : MT_TX_TYPE_SF;
534
q_idx = wmm_idx * MT76_CONNAC_MAX_WMM_SETS +
535
mt76_connac_lmac_mapping(skb_get_queue_mapping(skb));
536
537
/* mt7915 WA only counts WED path */
538
if (is_mt7915(dev) && mtk_wed_device_active(&dev->mmio.wed))
539
wcid->stats.tx_packets++;
540
}
541
542
val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + sz_txd) |
543
FIELD_PREP(MT_TXD0_PKT_FMT, p_fmt) |
544
FIELD_PREP(MT_TXD0_Q_IDX, q_idx);
545
txwi[0] = cpu_to_le32(val);
546
547
val = MT_TXD1_LONG_FORMAT |
548
FIELD_PREP(MT_TXD1_WLAN_IDX, wcid->idx) |
549
FIELD_PREP(MT_TXD1_OWN_MAC, omac_idx);
550
if (!is_mt7921(dev))
551
val |= MT_TXD1_VTA;
552
if (phy_idx || band_idx)
553
val |= MT_TXD1_TGID;
554
555
txwi[1] = cpu_to_le32(val);
556
txwi[2] = 0;
557
558
val = FIELD_PREP(MT_TXD3_REM_TX_COUNT, 15);
559
if (!is_mt7921(dev))
560
val |= MT_TXD3_SW_POWER_MGMT;
561
if (key)
562
val |= MT_TXD3_PROTECT_FRAME;
563
if (info->flags & IEEE80211_TX_CTL_NO_ACK)
564
val |= MT_TXD3_NO_ACK;
565
566
txwi[3] = cpu_to_le32(val);
567
txwi[4] = 0;
568
569
val = FIELD_PREP(MT_TXD5_PID, pid);
570
if (pid >= MT_PACKET_ID_FIRST) {
571
val |= MT_TXD5_TX_STATUS_HOST;
572
amsdu_en = 0;
573
}
574
575
txwi[5] = cpu_to_le32(val);
576
txwi[6] = 0;
577
txwi[7] = amsdu_en ? cpu_to_le32(MT_TXD7_HW_AMSDU) : 0;
578
579
if (is_8023)
580
mt76_connac2_mac_write_txwi_8023(txwi, skb, wcid);
581
else
582
mt76_connac2_mac_write_txwi_80211(dev, txwi, skb, key);
583
584
if (txwi[2] & cpu_to_le32(MT_TXD2_FIX_RATE)) {
585
/* Fixed rata is available just for 802.11 txd */
586
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
587
bool multicast = ieee80211_is_data(hdr->frame_control) &&
588
is_multicast_ether_addr(hdr->addr1);
589
u16 rate = mt76_connac2_mac_tx_rate_val(mphy,
590
vif ? &vif->bss_conf : NULL,
591
beacon, multicast);
592
u32 val = MT_TXD6_FIXED_BW;
593
594
/* hardware won't add HTC for mgmt/ctrl frame */
595
txwi[2] |= cpu_to_le32(MT_TXD2_HTC_VLD);
596
597
val |= FIELD_PREP(MT_TXD6_TX_RATE, rate);
598
txwi[6] |= cpu_to_le32(val);
599
txwi[3] |= cpu_to_le32(MT_TXD3_BA_DISABLE);
600
601
if (!is_mt7921(dev)) {
602
u8 spe_idx = mt76_connac_spe_idx(mphy->antenna_mask);
603
604
if (!spe_idx)
605
spe_idx = 24 + phy_idx;
606
txwi[7] |= cpu_to_le32(FIELD_PREP(MT_TXD7_SPE_IDX, spe_idx));
607
}
608
609
txwi[7] &= ~cpu_to_le32(MT_TXD7_HW_AMSDU);
610
}
611
}
612
EXPORT_SYMBOL_GPL(mt76_connac2_mac_write_txwi);
613
614
bool mt76_connac2_mac_fill_txs(struct mt76_dev *dev, struct mt76_wcid *wcid,
615
__le32 *txs_data)
616
{
617
struct mt76_sta_stats *stats = &wcid->stats;
618
struct ieee80211_supported_band *sband;
619
struct mt76_phy *mphy;
620
struct rate_info rate = {};
621
bool cck = false;
622
u32 txrate, txs, mode, stbc;
623
624
txs = le32_to_cpu(txs_data[0]);
625
626
/* PPDU based reporting */
627
if (mtk_wed_device_active(&dev->mmio.wed) &&
628
FIELD_GET(MT_TXS0_TXS_FORMAT, txs) > 1) {
629
stats->tx_bytes +=
630
le32_get_bits(txs_data[5], MT_TXS5_MPDU_TX_BYTE) -
631
le32_get_bits(txs_data[7], MT_TXS7_MPDU_RETRY_BYTE);
632
stats->tx_failed +=
633
le32_get_bits(txs_data[6], MT_TXS6_MPDU_FAIL_CNT);
634
stats->tx_retries +=
635
le32_get_bits(txs_data[7], MT_TXS7_MPDU_RETRY_CNT);
636
637
if (wcid->sta) {
638
struct ieee80211_sta *sta;
639
u8 tid;
640
641
sta = container_of((void *)wcid, struct ieee80211_sta,
642
drv_priv);
643
tid = FIELD_GET(MT_TXS0_TID, txs);
644
645
ieee80211_refresh_tx_agg_session_timer(sta, tid);
646
}
647
}
648
649
txrate = FIELD_GET(MT_TXS0_TX_RATE, txs);
650
651
rate.mcs = FIELD_GET(MT_TX_RATE_IDX, txrate);
652
rate.nss = FIELD_GET(MT_TX_RATE_NSS, txrate) + 1;
653
stbc = FIELD_GET(MT_TX_RATE_STBC, txrate);
654
655
if (stbc && rate.nss > 1)
656
rate.nss >>= 1;
657
658
if (rate.nss - 1 < ARRAY_SIZE(stats->tx_nss))
659
stats->tx_nss[rate.nss - 1]++;
660
if (rate.mcs < ARRAY_SIZE(stats->tx_mcs))
661
stats->tx_mcs[rate.mcs]++;
662
663
mode = FIELD_GET(MT_TX_RATE_MODE, txrate);
664
switch (mode) {
665
case MT_PHY_TYPE_CCK:
666
cck = true;
667
fallthrough;
668
case MT_PHY_TYPE_OFDM:
669
mphy = &dev->phy;
670
if (wcid->phy_idx == MT_BAND1 && dev->phys[MT_BAND1])
671
mphy = dev->phys[MT_BAND1];
672
673
if (mphy->chandef.chan->band == NL80211_BAND_5GHZ)
674
sband = &mphy->sband_5g.sband;
675
else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ)
676
sband = &mphy->sband_6g.sband;
677
else
678
sband = &mphy->sband_2g.sband;
679
680
rate.mcs = mt76_get_rate(mphy->dev, sband, rate.mcs, cck);
681
rate.legacy = sband->bitrates[rate.mcs].bitrate;
682
break;
683
case MT_PHY_TYPE_HT:
684
case MT_PHY_TYPE_HT_GF:
685
if (rate.mcs > 31)
686
return false;
687
688
rate.flags = RATE_INFO_FLAGS_MCS;
689
if (wcid->rate.flags & RATE_INFO_FLAGS_SHORT_GI)
690
rate.flags |= RATE_INFO_FLAGS_SHORT_GI;
691
break;
692
case MT_PHY_TYPE_VHT:
693
if (rate.mcs > 9)
694
return false;
695
696
rate.flags = RATE_INFO_FLAGS_VHT_MCS;
697
break;
698
case MT_PHY_TYPE_HE_SU:
699
case MT_PHY_TYPE_HE_EXT_SU:
700
case MT_PHY_TYPE_HE_TB:
701
case MT_PHY_TYPE_HE_MU:
702
if (rate.mcs > 11)
703
return false;
704
705
rate.he_gi = wcid->rate.he_gi;
706
rate.he_dcm = FIELD_GET(MT_TX_RATE_DCM, txrate);
707
rate.flags = RATE_INFO_FLAGS_HE_MCS;
708
break;
709
default:
710
return false;
711
}
712
713
stats->tx_mode[mode]++;
714
715
switch (FIELD_GET(MT_TXS0_BW, txs)) {
716
case IEEE80211_STA_RX_BW_160:
717
rate.bw = RATE_INFO_BW_160;
718
stats->tx_bw[3]++;
719
break;
720
case IEEE80211_STA_RX_BW_80:
721
rate.bw = RATE_INFO_BW_80;
722
stats->tx_bw[2]++;
723
break;
724
case IEEE80211_STA_RX_BW_40:
725
rate.bw = RATE_INFO_BW_40;
726
stats->tx_bw[1]++;
727
break;
728
default:
729
rate.bw = RATE_INFO_BW_20;
730
stats->tx_bw[0]++;
731
break;
732
}
733
wcid->rate = rate;
734
735
return true;
736
}
737
EXPORT_SYMBOL_GPL(mt76_connac2_mac_fill_txs);
738
739
bool mt76_connac2_mac_add_txs_skb(struct mt76_dev *dev, struct mt76_wcid *wcid,
740
int pid, __le32 *txs_data)
741
{
742
struct sk_buff_head list;
743
struct sk_buff *skb;
744
745
if (le32_get_bits(txs_data[0], MT_TXS0_TXS_FORMAT) == MT_TXS_PPDU_FMT)
746
return false;
747
748
mt76_tx_status_lock(dev, &list);
749
skb = mt76_tx_status_skb_get(dev, wcid, pid, &list);
750
if (skb) {
751
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
752
753
if (!(le32_to_cpu(txs_data[0]) & MT_TXS0_ACK_ERROR_MASK))
754
info->flags |= IEEE80211_TX_STAT_ACK;
755
756
info->status.ampdu_len = 1;
757
info->status.ampdu_ack_len =
758
!!(info->flags & IEEE80211_TX_STAT_ACK);
759
info->status.rates[0].idx = -1;
760
761
mt76_connac2_mac_fill_txs(dev, wcid, txs_data);
762
mt76_tx_status_skb_done(dev, skb, &list);
763
}
764
mt76_tx_status_unlock(dev, &list);
765
766
return !!skb;
767
}
768
EXPORT_SYMBOL_GPL(mt76_connac2_mac_add_txs_skb);
769
770
static void
771
mt76_connac2_mac_decode_he_radiotap_ru(struct mt76_rx_status *status,
772
struct ieee80211_radiotap_he *he,
773
__le32 *rxv)
774
{
775
u32 ru_h, ru_l;
776
u8 ru, offs = 0;
777
778
ru_l = le32_get_bits(rxv[0], MT_PRXV_HE_RU_ALLOC_L);
779
ru_h = le32_get_bits(rxv[1], MT_PRXV_HE_RU_ALLOC_H);
780
ru = (u8)(ru_l | ru_h << 4);
781
782
status->bw = RATE_INFO_BW_HE_RU;
783
784
switch (ru) {
785
case 0 ... 36:
786
status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_26;
787
offs = ru;
788
break;
789
case 37 ... 52:
790
status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_52;
791
offs = ru - 37;
792
break;
793
case 53 ... 60:
794
status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_106;
795
offs = ru - 53;
796
break;
797
case 61 ... 64:
798
status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_242;
799
offs = ru - 61;
800
break;
801
case 65 ... 66:
802
status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_484;
803
offs = ru - 65;
804
break;
805
case 67:
806
status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_996;
807
break;
808
case 68:
809
status->he_ru = NL80211_RATE_INFO_HE_RU_ALLOC_2x996;
810
break;
811
}
812
813
he->data1 |= HE_BITS(DATA1_BW_RU_ALLOC_KNOWN);
814
he->data2 |= HE_BITS(DATA2_RU_OFFSET_KNOWN) |
815
le16_encode_bits(offs,
816
IEEE80211_RADIOTAP_HE_DATA2_RU_OFFSET);
817
}
818
819
static void
820
mt76_connac2_mac_decode_he_mu_radiotap(struct mt76_dev *dev, struct sk_buff *skb,
821
__le32 *rxv)
822
{
823
struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
824
static struct ieee80211_radiotap_he_mu mu_known = {
825
.flags1 = HE_BITS(MU_FLAGS1_SIG_B_MCS_KNOWN) |
826
HE_BITS(MU_FLAGS1_SIG_B_DCM_KNOWN) |
827
HE_BITS(MU_FLAGS1_CH1_RU_KNOWN) |
828
HE_BITS(MU_FLAGS1_SIG_B_SYMS_USERS_KNOWN),
829
.flags2 = HE_BITS(MU_FLAGS2_BW_FROM_SIG_A_BW_KNOWN),
830
};
831
struct ieee80211_radiotap_he_mu *he_mu;
832
833
if (is_mt7921(dev)) {
834
mu_known.flags1 |= HE_BITS(MU_FLAGS1_SIG_B_COMP_KNOWN);
835
mu_known.flags2 |= HE_BITS(MU_FLAGS2_PUNC_FROM_SIG_A_BW_KNOWN);
836
}
837
838
status->flag |= RX_FLAG_RADIOTAP_HE_MU;
839
840
he_mu = skb_push(skb, sizeof(mu_known));
841
memcpy(he_mu, &mu_known, sizeof(mu_known));
842
843
#define MU_PREP(f, v) le16_encode_bits(v, IEEE80211_RADIOTAP_HE_MU_##f)
844
845
he_mu->flags1 |= MU_PREP(FLAGS1_SIG_B_MCS, status->rate_idx);
846
if (status->he_dcm)
847
he_mu->flags1 |= MU_PREP(FLAGS1_SIG_B_DCM, status->he_dcm);
848
849
he_mu->flags2 |= MU_PREP(FLAGS2_BW_FROM_SIG_A_BW, status->bw) |
850
MU_PREP(FLAGS2_SIG_B_SYMS_USERS,
851
le32_get_bits(rxv[2], MT_CRXV_HE_NUM_USER));
852
853
he_mu->ru_ch1[0] = le32_get_bits(rxv[3], MT_CRXV_HE_RU0);
854
855
if (status->bw >= RATE_INFO_BW_40) {
856
he_mu->flags1 |= HE_BITS(MU_FLAGS1_CH2_RU_KNOWN);
857
he_mu->ru_ch2[0] =
858
le32_get_bits(rxv[3], MT_CRXV_HE_RU1);
859
}
860
861
if (status->bw >= RATE_INFO_BW_80) {
862
he_mu->ru_ch1[1] =
863
le32_get_bits(rxv[3], MT_CRXV_HE_RU2);
864
he_mu->ru_ch2[1] =
865
le32_get_bits(rxv[3], MT_CRXV_HE_RU3);
866
}
867
}
868
869
void mt76_connac2_mac_decode_he_radiotap(struct mt76_dev *dev,
870
struct sk_buff *skb,
871
__le32 *rxv, u32 mode)
872
{
873
struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
874
static const struct ieee80211_radiotap_he known = {
875
.data1 = HE_BITS(DATA1_DATA_MCS_KNOWN) |
876
HE_BITS(DATA1_DATA_DCM_KNOWN) |
877
HE_BITS(DATA1_STBC_KNOWN) |
878
HE_BITS(DATA1_CODING_KNOWN) |
879
HE_BITS(DATA1_LDPC_XSYMSEG_KNOWN) |
880
HE_BITS(DATA1_DOPPLER_KNOWN) |
881
HE_BITS(DATA1_SPTL_REUSE_KNOWN) |
882
HE_BITS(DATA1_BSS_COLOR_KNOWN),
883
.data2 = HE_BITS(DATA2_GI_KNOWN) |
884
HE_BITS(DATA2_TXBF_KNOWN) |
885
HE_BITS(DATA2_PE_DISAMBIG_KNOWN) |
886
HE_BITS(DATA2_TXOP_KNOWN),
887
};
888
u32 ltf_size = le32_get_bits(rxv[2], MT_CRXV_HE_LTF_SIZE) + 1;
889
struct ieee80211_radiotap_he *he;
890
891
status->flag |= RX_FLAG_RADIOTAP_HE;
892
893
he = skb_push(skb, sizeof(known));
894
memcpy(he, &known, sizeof(known));
895
896
he->data3 = HE_PREP(DATA3_BSS_COLOR, BSS_COLOR, rxv[14]) |
897
HE_PREP(DATA3_LDPC_XSYMSEG, LDPC_EXT_SYM, rxv[2]);
898
he->data4 = HE_PREP(DATA4_SU_MU_SPTL_REUSE, SR_MASK, rxv[11]);
899
he->data5 = HE_PREP(DATA5_PE_DISAMBIG, PE_DISAMBIG, rxv[2]) |
900
le16_encode_bits(ltf_size,
901
IEEE80211_RADIOTAP_HE_DATA5_LTF_SIZE);
902
if (le32_to_cpu(rxv[0]) & MT_PRXV_TXBF)
903
he->data5 |= HE_BITS(DATA5_TXBF);
904
he->data6 = HE_PREP(DATA6_TXOP, TXOP_DUR, rxv[14]) |
905
HE_PREP(DATA6_DOPPLER, DOPPLER, rxv[14]);
906
907
switch (mode) {
908
case MT_PHY_TYPE_HE_SU:
909
he->data1 |= HE_BITS(DATA1_FORMAT_SU) |
910
HE_BITS(DATA1_UL_DL_KNOWN) |
911
HE_BITS(DATA1_BEAM_CHANGE_KNOWN) |
912
HE_BITS(DATA1_BW_RU_ALLOC_KNOWN);
913
914
he->data3 |= HE_PREP(DATA3_BEAM_CHANGE, BEAM_CHNG, rxv[14]) |
915
HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]);
916
break;
917
case MT_PHY_TYPE_HE_EXT_SU:
918
he->data1 |= HE_BITS(DATA1_FORMAT_EXT_SU) |
919
HE_BITS(DATA1_UL_DL_KNOWN) |
920
HE_BITS(DATA1_BW_RU_ALLOC_KNOWN);
921
922
he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]);
923
break;
924
case MT_PHY_TYPE_HE_MU:
925
he->data1 |= HE_BITS(DATA1_FORMAT_MU) |
926
HE_BITS(DATA1_UL_DL_KNOWN);
927
928
he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]);
929
he->data4 |= HE_PREP(DATA4_MU_STA_ID, MU_AID, rxv[7]);
930
931
mt76_connac2_mac_decode_he_radiotap_ru(status, he, rxv);
932
mt76_connac2_mac_decode_he_mu_radiotap(dev, skb, rxv);
933
break;
934
case MT_PHY_TYPE_HE_TB:
935
he->data1 |= HE_BITS(DATA1_FORMAT_TRIG) |
936
HE_BITS(DATA1_SPTL_REUSE2_KNOWN) |
937
HE_BITS(DATA1_SPTL_REUSE3_KNOWN) |
938
HE_BITS(DATA1_SPTL_REUSE4_KNOWN);
939
940
he->data4 |= HE_PREP(DATA4_TB_SPTL_REUSE1, SR_MASK, rxv[11]) |
941
HE_PREP(DATA4_TB_SPTL_REUSE2, SR1_MASK, rxv[11]) |
942
HE_PREP(DATA4_TB_SPTL_REUSE3, SR2_MASK, rxv[11]) |
943
HE_PREP(DATA4_TB_SPTL_REUSE4, SR3_MASK, rxv[11]);
944
945
mt76_connac2_mac_decode_he_radiotap_ru(status, he, rxv);
946
break;
947
default:
948
break;
949
}
950
}
951
EXPORT_SYMBOL_GPL(mt76_connac2_mac_decode_he_radiotap);
952
953
/* The HW does not translate the mac header to 802.3 for mesh point */
954
int mt76_connac2_reverse_frag0_hdr_trans(struct ieee80211_vif *vif,
955
struct sk_buff *skb, u16 hdr_offset)
956
{
957
struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
958
struct ethhdr *eth_hdr = (struct ethhdr *)(skb->data + hdr_offset);
959
__le32 *rxd = (__le32 *)skb->data;
960
struct ieee80211_sta *sta;
961
struct ieee80211_hdr hdr;
962
u16 frame_control;
963
964
if (le32_get_bits(rxd[3], MT_RXD3_NORMAL_ADDR_TYPE) !=
965
MT_RXD3_NORMAL_U2M)
966
return -EINVAL;
967
968
if (!(le32_to_cpu(rxd[1]) & MT_RXD1_NORMAL_GROUP_4))
969
return -EINVAL;
970
971
sta = container_of((void *)status->wcid, struct ieee80211_sta, drv_priv);
972
973
/* store the info from RXD and ethhdr to avoid being overridden */
974
frame_control = le32_get_bits(rxd[6], MT_RXD6_FRAME_CONTROL);
975
hdr.frame_control = cpu_to_le16(frame_control);
976
hdr.seq_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_SEQ_CTRL));
977
hdr.duration_id = 0;
978
979
ether_addr_copy(hdr.addr1, vif->addr);
980
ether_addr_copy(hdr.addr2, sta->addr);
981
switch (frame_control & (IEEE80211_FCTL_TODS |
982
IEEE80211_FCTL_FROMDS)) {
983
case 0:
984
ether_addr_copy(hdr.addr3, vif->bss_conf.bssid);
985
break;
986
case IEEE80211_FCTL_FROMDS:
987
ether_addr_copy(hdr.addr3, eth_hdr->h_source);
988
break;
989
case IEEE80211_FCTL_TODS:
990
ether_addr_copy(hdr.addr3, eth_hdr->h_dest);
991
break;
992
case IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS:
993
ether_addr_copy(hdr.addr3, eth_hdr->h_dest);
994
ether_addr_copy(hdr.addr4, eth_hdr->h_source);
995
break;
996
default:
997
return -EINVAL;
998
}
999
1000
skb_pull(skb, hdr_offset + sizeof(struct ethhdr) - 2);
1001
if (eth_hdr->h_proto == cpu_to_be16(ETH_P_AARP) ||
1002
eth_hdr->h_proto == cpu_to_be16(ETH_P_IPX))
1003
ether_addr_copy(skb_push(skb, ETH_ALEN), bridge_tunnel_header);
1004
else if (be16_to_cpu(eth_hdr->h_proto) >= ETH_P_802_3_MIN)
1005
ether_addr_copy(skb_push(skb, ETH_ALEN), rfc1042_header);
1006
else
1007
skb_pull(skb, 2);
1008
1009
if (ieee80211_has_order(hdr.frame_control))
1010
memcpy(skb_push(skb, IEEE80211_HT_CTL_LEN), &rxd[9],
1011
IEEE80211_HT_CTL_LEN);
1012
if (ieee80211_is_data_qos(hdr.frame_control)) {
1013
__le16 qos_ctrl;
1014
1015
qos_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_QOS_CTL));
1016
memcpy(skb_push(skb, IEEE80211_QOS_CTL_LEN), &qos_ctrl,
1017
IEEE80211_QOS_CTL_LEN);
1018
}
1019
1020
if (ieee80211_has_a4(hdr.frame_control))
1021
memcpy(skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr));
1022
else
1023
memcpy(skb_push(skb, sizeof(hdr) - 6), &hdr, sizeof(hdr) - 6);
1024
1025
return 0;
1026
}
1027
EXPORT_SYMBOL_GPL(mt76_connac2_reverse_frag0_hdr_trans);
1028
1029
int mt76_connac2_mac_fill_rx_rate(struct mt76_dev *dev,
1030
struct mt76_rx_status *status,
1031
struct ieee80211_supported_band *sband,
1032
__le32 *rxv, u8 *mode)
1033
{
1034
u32 v0, v2;
1035
u8 stbc, gi, bw, dcm, nss;
1036
int i, idx;
1037
bool cck = false;
1038
1039
v0 = le32_to_cpu(rxv[0]);
1040
v2 = le32_to_cpu(rxv[2]);
1041
1042
idx = i = FIELD_GET(MT_PRXV_TX_RATE, v0);
1043
nss = FIELD_GET(MT_PRXV_NSTS, v0) + 1;
1044
1045
if (!is_mt7915(dev)) {
1046
stbc = FIELD_GET(MT_PRXV_HT_STBC, v0);
1047
gi = FIELD_GET(MT_PRXV_HT_SGI, v0);
1048
*mode = FIELD_GET(MT_PRXV_TX_MODE, v0);
1049
if (is_mt7921(dev))
1050
dcm = !!(idx & MT_PRXV_TX_DCM);
1051
else
1052
dcm = FIELD_GET(MT_PRXV_DCM, v0);
1053
bw = FIELD_GET(MT_PRXV_FRAME_MODE, v0);
1054
} else {
1055
stbc = FIELD_GET(MT_CRXV_HT_STBC, v2);
1056
gi = FIELD_GET(MT_CRXV_HT_SHORT_GI, v2);
1057
*mode = FIELD_GET(MT_CRXV_TX_MODE, v2);
1058
dcm = !!(idx & GENMASK(3, 0) & MT_PRXV_TX_DCM);
1059
bw = FIELD_GET(MT_CRXV_FRAME_MODE, v2);
1060
}
1061
1062
switch (*mode) {
1063
case MT_PHY_TYPE_CCK:
1064
cck = true;
1065
fallthrough;
1066
case MT_PHY_TYPE_OFDM:
1067
i = mt76_get_rate(dev, sband, i, cck);
1068
break;
1069
case MT_PHY_TYPE_HT_GF:
1070
case MT_PHY_TYPE_HT:
1071
status->encoding = RX_ENC_HT;
1072
if (gi)
1073
status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1074
if (i > 31)
1075
return -EINVAL;
1076
break;
1077
case MT_PHY_TYPE_VHT:
1078
status->nss = nss;
1079
status->encoding = RX_ENC_VHT;
1080
if (gi)
1081
status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1082
if (i > 11)
1083
return -EINVAL;
1084
break;
1085
case MT_PHY_TYPE_HE_MU:
1086
case MT_PHY_TYPE_HE_SU:
1087
case MT_PHY_TYPE_HE_EXT_SU:
1088
case MT_PHY_TYPE_HE_TB:
1089
status->nss = nss;
1090
status->encoding = RX_ENC_HE;
1091
i &= GENMASK(3, 0);
1092
1093
if (gi <= NL80211_RATE_INFO_HE_GI_3_2)
1094
status->he_gi = gi;
1095
1096
status->he_dcm = dcm;
1097
break;
1098
default:
1099
return -EINVAL;
1100
}
1101
status->rate_idx = i;
1102
1103
switch (bw) {
1104
case IEEE80211_STA_RX_BW_20:
1105
break;
1106
case IEEE80211_STA_RX_BW_40:
1107
if (*mode & MT_PHY_TYPE_HE_EXT_SU &&
1108
(idx & MT_PRXV_TX_ER_SU_106T)) {
1109
status->bw = RATE_INFO_BW_HE_RU;
1110
status->he_ru =
1111
NL80211_RATE_INFO_HE_RU_ALLOC_106;
1112
} else {
1113
status->bw = RATE_INFO_BW_40;
1114
}
1115
break;
1116
case IEEE80211_STA_RX_BW_80:
1117
status->bw = RATE_INFO_BW_80;
1118
break;
1119
case IEEE80211_STA_RX_BW_160:
1120
status->bw = RATE_INFO_BW_160;
1121
break;
1122
default:
1123
return -EINVAL;
1124
}
1125
1126
status->enc_flags |= RX_ENC_FLAG_STBC_MASK * stbc;
1127
if (*mode < MT_PHY_TYPE_HE_SU && gi)
1128
status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1129
1130
return 0;
1131
}
1132
EXPORT_SYMBOL_GPL(mt76_connac2_mac_fill_rx_rate);
1133
1134
void mt76_connac2_tx_check_aggr(struct ieee80211_sta *sta, __le32 *txwi)
1135
{
1136
struct mt76_wcid *wcid;
1137
u16 fc, tid;
1138
u32 val;
1139
1140
if (!sta ||
1141
!(sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he))
1142
return;
1143
1144
tid = le32_get_bits(txwi[1], MT_TXD1_TID);
1145
if (tid >= 6) /* skip VO queue */
1146
return;
1147
1148
val = le32_to_cpu(txwi[2]);
1149
fc = FIELD_GET(MT_TXD2_FRAME_TYPE, val) << 2 |
1150
FIELD_GET(MT_TXD2_SUB_TYPE, val) << 4;
1151
if (unlikely(fc != (IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_DATA)))
1152
return;
1153
1154
wcid = (struct mt76_wcid *)sta->drv_priv;
1155
if (!test_and_set_bit(tid, &wcid->ampdu_state))
1156
ieee80211_start_tx_ba_session(sta, tid, 0);
1157
}
1158
EXPORT_SYMBOL_GPL(mt76_connac2_tx_check_aggr);
1159
1160
void mt76_connac2_txwi_free(struct mt76_dev *dev, struct mt76_txwi_cache *t,
1161
struct ieee80211_sta *sta,
1162
struct list_head *free_list)
1163
{
1164
struct mt76_wcid *wcid;
1165
__le32 *txwi;
1166
u16 wcid_idx;
1167
1168
mt76_connac_txp_skb_unmap(dev, t);
1169
if (!t->skb)
1170
goto out;
1171
1172
txwi = (__le32 *)mt76_get_txwi_ptr(dev, t);
1173
if (sta) {
1174
wcid = (struct mt76_wcid *)sta->drv_priv;
1175
wcid_idx = wcid->idx;
1176
} else {
1177
wcid_idx = le32_get_bits(txwi[1], MT_TXD1_WLAN_IDX);
1178
wcid = __mt76_wcid_ptr(dev, wcid_idx);
1179
1180
if (wcid && wcid->sta) {
1181
sta = container_of((void *)wcid, struct ieee80211_sta,
1182
drv_priv);
1183
mt76_wcid_add_poll(dev, wcid);
1184
}
1185
}
1186
1187
if (sta && likely(t->skb->protocol != cpu_to_be16(ETH_P_PAE)))
1188
mt76_connac2_tx_check_aggr(sta, txwi);
1189
1190
__mt76_tx_complete_skb(dev, wcid_idx, t->skb, free_list);
1191
out:
1192
t->skb = NULL;
1193
mt76_put_txwi(dev, t);
1194
}
1195
EXPORT_SYMBOL_GPL(mt76_connac2_txwi_free);
1196
1197
void mt76_connac2_tx_token_put(struct mt76_dev *dev)
1198
{
1199
struct mt76_txwi_cache *txwi;
1200
int id;
1201
1202
spin_lock_bh(&dev->token_lock);
1203
idr_for_each_entry(&dev->token, txwi, id) {
1204
mt76_connac2_txwi_free(dev, txwi, NULL, NULL);
1205
dev->token_count--;
1206
}
1207
spin_unlock_bh(&dev->token_lock);
1208
idr_destroy(&dev->token);
1209
}
1210
EXPORT_SYMBOL_GPL(mt76_connac2_tx_token_put);
1211
1212