Path: blob/main/sys/contrib/dev/mediatek/mt76/mt76x02.h
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/* SPDX-License-Identifier: ISC */1/*2* Copyright (C) 2016 Felix Fietkau <[email protected]>3* Copyright (C) 2018 Stanislaw Gruszka <[email protected]>4*/56#ifndef __MT76x02_H7#define __MT76x02_H89#include <linux/kfifo.h>1011#include "mt76.h"12#include "mt76x02_regs.h"13#include "mt76x02_mac.h"14#include "mt76x02_dfs.h"15#include "mt76x02_dma.h"1617#define MT76x02_TX_RING_SIZE 51218#define MT76x02_PSD_RING_SIZE 12819#define MT76x02_N_WCIDS 12820#define MT_CALIBRATE_INTERVAL HZ21#define MT_MAC_WORK_INTERVAL (HZ / 10)2223#define MT_WATCHDOG_TIME (HZ / 10)24#define MT_TX_HANG_TH 102526#define MT_MAX_CHAINS 227struct mt76x02_rx_freq_cal {28s8 high_gain[MT_MAX_CHAINS];29s8 rssi_offset[MT_MAX_CHAINS];30s8 lna_gain;31u32 mcu_gain;32s16 temp_offset;33u8 freq_offset;34};3536struct mt76x02_calibration {37struct mt76x02_rx_freq_cal rx;3839u8 agc_gain_init[MT_MAX_CHAINS];40u8 agc_gain_cur[MT_MAX_CHAINS];4142u16 false_cca;43s8 avg_rssi_all;44s8 agc_gain_adjust;45s8 agc_lowest_gain;46s8 low_gain;4748s8 temp_vco;49s8 temp;5051bool init_cal_done;52bool tssi_cal_done;53bool tssi_comp_pending;54bool dpd_cal_done;55bool channel_cal_done;56bool gain_init_done;5758int tssi_target;59s8 tssi_dc;60};6162struct mt76x02_beacon_ops {63unsigned int nslots;64unsigned int slot_size;65void (*pre_tbtt_enable)(struct mt76x02_dev *dev, bool en);66void (*beacon_enable)(struct mt76x02_dev *dev, bool en);67};6869#define mt76x02_beacon_enable(dev, enable) \70(dev)->beacon_ops->beacon_enable(dev, enable)71#define mt76x02_pre_tbtt_enable(dev, enable) \72(dev)->beacon_ops->pre_tbtt_enable(dev, enable)7374struct mt76x02_rate_power {75union {76struct {77s8 cck[4];78s8 ofdm[8];79s8 ht[16];80s8 vht[2];81};82s8 all[30];83};84};8586struct mt76x02_dev {87union { /* must be first */88struct mt76_dev mt76;89struct mt76_phy mphy;90};9192struct mac_address macaddr_list[8];9394struct mutex phy_mutex;9596u8 txdone_seq;97DECLARE_KFIFO_PTR(txstatus_fifo, struct mt76x02_tx_status);98spinlock_t txstatus_fifo_lock;99u32 tx_airtime;100u32 ampdu_ref;101102struct sk_buff *rx_head;103104struct delayed_work cal_work;105struct delayed_work wdt_work;106107struct hrtimer pre_tbtt_timer;108struct work_struct pre_tbtt_work;109110const struct mt76x02_beacon_ops *beacon_ops;111112u8 beacon_data_count;113114u8 tbtt_count;115116u32 tx_hang_reset;117u8 tx_hang_check[4];118u8 beacon_hang_check;119u8 mcu_timeout;120121struct mt76x02_rate_power rate_power;122123struct mt76x02_calibration cal;124125int txpower_conf;126s8 target_power;127s8 target_power_delta[2];128bool enable_tpc;129130bool no_2ghz;131132s16 coverage_class;133u8 slottime;134135struct mt76x02_dfs_pattern_detector dfs_pd;136137/* edcca monitor */138unsigned long ed_trigger_timeout;139bool ed_tx_blocked;140bool ed_monitor;141u8 ed_monitor_enabled;142u8 ed_monitor_learning;143u8 ed_trigger;144u8 ed_silent;145ktime_t ed_time;146};147148extern struct ieee80211_rate mt76x02_rates[12];149150int mt76x02_init_device(struct mt76x02_dev *dev);151void mt76x02_configure_filter(struct ieee80211_hw *hw,152unsigned int changed_flags,153unsigned int *total_flags, u64 multicast);154int mt76x02_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,155struct ieee80211_sta *sta);156void mt76x02_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,157struct ieee80211_sta *sta);158159void mt76x02_config_mac_addr_list(struct mt76x02_dev *dev);160161int mt76x02_add_interface(struct ieee80211_hw *hw,162struct ieee80211_vif *vif);163void mt76x02_remove_interface(struct ieee80211_hw *hw,164struct ieee80211_vif *vif);165166int mt76x02_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,167struct ieee80211_ampdu_params *params);168int mt76x02_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,169struct ieee80211_vif *vif, struct ieee80211_sta *sta,170struct ieee80211_key_conf *key);171int mt76x02_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,172unsigned int link_id, u16 queue,173const struct ieee80211_tx_queue_params *params);174void mt76x02_sta_rate_tbl_update(struct ieee80211_hw *hw,175struct ieee80211_vif *vif,176struct ieee80211_sta *sta);177s8 mt76x02_tx_get_max_txpwr_adj(struct mt76x02_dev *dev,178const struct ieee80211_tx_rate *rate);179s8 mt76x02_tx_get_txpwr_adj(struct mt76x02_dev *dev, s8 txpwr,180s8 max_txpwr_adj);181void mt76x02_wdt_work(struct work_struct *work);182void mt76x02_tx_set_txpwr_auto(struct mt76x02_dev *dev, s8 txpwr);183void mt76x02_set_tx_ackto(struct mt76x02_dev *dev);184void mt76x02_set_coverage_class(struct ieee80211_hw *hw,185int radio_idx, s16 coverage_class);186int mt76x02_set_rts_threshold(struct ieee80211_hw *hw, int radio_idx, u32 val);187void mt76x02_remove_hdr_pad(struct sk_buff *skb, int len);188bool mt76x02_tx_status_data(struct mt76_dev *mdev, u8 *update);189void mt76x02_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,190struct sk_buff *skb, u32 *info);191void mt76x02_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q);192irqreturn_t mt76x02_irq_handler(int irq, void *dev_instance);193void mt76x02_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control,194struct sk_buff *skb);195int mt76x02_tx_prepare_skb(struct mt76_dev *mdev, void *txwi,196enum mt76_txq_id qid, struct mt76_wcid *wcid,197struct ieee80211_sta *sta,198struct mt76_tx_info *tx_info);199void mt76x02_sw_scan_complete(struct ieee80211_hw *hw,200struct ieee80211_vif *vif);201void mt76x02_sta_ps(struct mt76_dev *dev, struct ieee80211_sta *sta, bool ps);202void mt76x02_bss_info_changed(struct ieee80211_hw *hw,203struct ieee80211_vif *vif,204struct ieee80211_bss_conf *info, u64 changed);205void mt76x02_reconfig_complete(struct ieee80211_hw *hw,206enum ieee80211_reconfig_type reconfig_type);207208struct beacon_bc_data {209struct mt76x02_dev *dev;210struct sk_buff_head q;211struct sk_buff *tail[8];212};213214void mt76x02_init_beacon_config(struct mt76x02_dev *dev);215void mt76x02e_init_beacon_config(struct mt76x02_dev *dev);216void mt76x02_resync_beacon_timer(struct mt76x02_dev *dev);217void mt76x02_update_beacon_iter(void *priv, u8 *mac, struct ieee80211_vif *vif);218void mt76x02_enqueue_buffered_bc(struct mt76x02_dev *dev,219struct beacon_bc_data *data,220int max_nframes);221222void mt76x02_mac_start(struct mt76x02_dev *dev);223224void mt76x02_init_debugfs(struct mt76x02_dev *dev);225226static inline bool is_mt76x0(struct mt76x02_dev *dev)227{228return mt76_chip(&dev->mt76) == 0x7610 ||229mt76_chip(&dev->mt76) == 0x7630 ||230mt76_chip(&dev->mt76) == 0x7650;231}232233static inline bool is_mt76x2(struct mt76x02_dev *dev)234{235return mt76_chip(&dev->mt76) == 0x7612 ||236mt76_chip(&dev->mt76) == 0x7632 ||237mt76_chip(&dev->mt76) == 0x7662 ||238mt76_chip(&dev->mt76) == 0x7602;239}240241static inline void mt76x02_irq_enable(struct mt76x02_dev *dev, u32 mask)242{243mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, 0, mask);244}245246static inline void mt76x02_irq_disable(struct mt76x02_dev *dev, u32 mask)247{248mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0);249}250251static inline bool252mt76x02_wait_for_txrx_idle(struct mt76_dev *dev)253{254return __mt76_poll_msec(dev, MT_MAC_STATUS,255MT_MAC_STATUS_TX | MT_MAC_STATUS_RX,2560, 100);257}258259static inline struct mt76x02_sta *260mt76x02_rx_get_sta(struct mt76_dev *dev, u8 idx)261{262struct mt76_wcid *wcid;263264wcid = __mt76_wcid_ptr(dev, idx);265if (!wcid)266return NULL;267268return container_of(wcid, struct mt76x02_sta, wcid);269}270271static inline struct mt76_wcid *272mt76x02_rx_get_sta_wcid(struct mt76x02_sta *sta, bool unicast)273{274if (!sta)275return NULL;276277if (unicast)278return &sta->wcid;279else280return &sta->vif->group_wcid;281}282283#endif /* __MT76x02_H */284285286