Book a Demo!
CoCalc Logo Icon
StoreFeaturesDocsShareSupportNewsAboutPoliciesSign UpSign In
freebsd
GitHub Repository: freebsd/freebsd-src
Path: blob/main/sys/contrib/dev/mediatek/mt76/mt7915/init.c
48525 views
1
// SPDX-License-Identifier: ISC
2
/* Copyright (C) 2020 MediaTek Inc. */
3
4
#include <linux/etherdevice.h>
5
#include <linux/hwmon.h>
6
#include <linux/hwmon-sysfs.h>
7
#include <linux/of.h>
8
#include <linux/thermal.h>
9
#if defined(__FreeBSD__)
10
#include <linux/delay.h>
11
#endif
12
#include "mt7915.h"
13
#include "mac.h"
14
#include "mcu.h"
15
#include "coredump.h"
16
#include "eeprom.h"
17
18
static const struct ieee80211_iface_limit if_limits[] = {
19
{
20
.max = 1,
21
.types = BIT(NL80211_IFTYPE_ADHOC)
22
}, {
23
.max = 16,
24
.types = BIT(NL80211_IFTYPE_AP)
25
#ifdef CONFIG_MAC80211_MESH
26
| BIT(NL80211_IFTYPE_MESH_POINT)
27
#endif
28
}, {
29
.max = MT7915_MAX_INTERFACES,
30
.types = BIT(NL80211_IFTYPE_STATION)
31
}
32
};
33
34
static const struct ieee80211_iface_combination if_comb[] = {
35
{
36
.limits = if_limits,
37
.n_limits = ARRAY_SIZE(if_limits),
38
.max_interfaces = MT7915_MAX_INTERFACES,
39
.num_different_channels = 1,
40
.beacon_int_infra_match = true,
41
.radar_detect_widths = BIT(NL80211_CHAN_WIDTH_20_NOHT) |
42
BIT(NL80211_CHAN_WIDTH_20) |
43
BIT(NL80211_CHAN_WIDTH_40) |
44
BIT(NL80211_CHAN_WIDTH_80) |
45
BIT(NL80211_CHAN_WIDTH_160),
46
}
47
};
48
49
#if defined(__linux__)
50
static ssize_t mt7915_thermal_temp_show(struct device *dev,
51
struct device_attribute *attr,
52
char *buf)
53
{
54
struct mt7915_phy *phy = dev_get_drvdata(dev);
55
int i = to_sensor_dev_attr(attr)->index;
56
int temperature;
57
58
switch (i) {
59
case 0:
60
mutex_lock(&phy->dev->mt76.mutex);
61
temperature = mt7915_mcu_get_temperature(phy);
62
mutex_unlock(&phy->dev->mt76.mutex);
63
if (temperature < 0)
64
return temperature;
65
/* display in millidegree celcius */
66
return sprintf(buf, "%u\n", temperature * 1000);
67
case 1:
68
case 2:
69
return sprintf(buf, "%u\n",
70
phy->throttle_temp[i - 1] * 1000);
71
case 3:
72
return sprintf(buf, "%hhu\n", phy->throttle_state);
73
default:
74
return -EINVAL;
75
}
76
}
77
78
static ssize_t mt7915_thermal_temp_store(struct device *dev,
79
struct device_attribute *attr,
80
const char *buf, size_t count)
81
{
82
struct mt7915_phy *phy = dev_get_drvdata(dev);
83
int ret, i = to_sensor_dev_attr(attr)->index;
84
long val;
85
86
ret = kstrtol(buf, 10, &val);
87
if (ret < 0)
88
return ret;
89
90
mutex_lock(&phy->dev->mt76.mutex);
91
val = DIV_ROUND_CLOSEST(clamp_val(val, 60 * 1000, 130 * 1000), 1000);
92
93
if ((i - 1 == MT7915_CRIT_TEMP_IDX &&
94
val > phy->throttle_temp[MT7915_MAX_TEMP_IDX]) ||
95
(i - 1 == MT7915_MAX_TEMP_IDX &&
96
val < phy->throttle_temp[MT7915_CRIT_TEMP_IDX])) {
97
dev_err(phy->dev->mt76.dev,
98
"temp1_max shall be greater than temp1_crit.");
99
mutex_unlock(&phy->dev->mt76.mutex);
100
return -EINVAL;
101
}
102
103
phy->throttle_temp[i - 1] = val;
104
ret = mt7915_mcu_set_thermal_protect(phy);
105
mutex_unlock(&phy->dev->mt76.mutex);
106
if (ret)
107
return ret;
108
109
return count;
110
}
111
112
static SENSOR_DEVICE_ATTR_RO(temp1_input, mt7915_thermal_temp, 0);
113
static SENSOR_DEVICE_ATTR_RW(temp1_crit, mt7915_thermal_temp, 1);
114
static SENSOR_DEVICE_ATTR_RW(temp1_max, mt7915_thermal_temp, 2);
115
static SENSOR_DEVICE_ATTR_RO(throttle1, mt7915_thermal_temp, 3);
116
117
static struct attribute *mt7915_hwmon_attrs[] = {
118
&sensor_dev_attr_temp1_input.dev_attr.attr,
119
&sensor_dev_attr_temp1_crit.dev_attr.attr,
120
&sensor_dev_attr_temp1_max.dev_attr.attr,
121
&sensor_dev_attr_throttle1.dev_attr.attr,
122
NULL,
123
};
124
ATTRIBUTE_GROUPS(mt7915_hwmon);
125
126
static int
127
mt7915_thermal_get_max_throttle_state(struct thermal_cooling_device *cdev,
128
unsigned long *state)
129
{
130
*state = MT7915_CDEV_THROTTLE_MAX;
131
132
return 0;
133
}
134
135
static int
136
mt7915_thermal_get_cur_throttle_state(struct thermal_cooling_device *cdev,
137
unsigned long *state)
138
{
139
struct mt7915_phy *phy = cdev->devdata;
140
141
*state = phy->cdev_state;
142
143
return 0;
144
}
145
146
static int
147
mt7915_thermal_set_cur_throttle_state(struct thermal_cooling_device *cdev,
148
unsigned long state)
149
{
150
struct mt7915_phy *phy = cdev->devdata;
151
u8 throttling = MT7915_THERMAL_THROTTLE_MAX - state;
152
int ret;
153
154
if (state > MT7915_CDEV_THROTTLE_MAX) {
155
dev_err(phy->dev->mt76.dev,
156
"please specify a valid throttling state\n");
157
return -EINVAL;
158
}
159
160
if (state == phy->cdev_state)
161
return 0;
162
163
/*
164
* cooling_device convention: 0 = no cooling, more = more cooling
165
* mcu convention: 1 = max cooling, more = less cooling
166
*/
167
mutex_lock(&phy->dev->mt76.mutex);
168
ret = mt7915_mcu_set_thermal_throttling(phy, throttling);
169
mutex_unlock(&phy->dev->mt76.mutex);
170
if (ret)
171
return ret;
172
173
phy->cdev_state = state;
174
175
return 0;
176
}
177
178
static const struct thermal_cooling_device_ops mt7915_thermal_ops = {
179
.get_max_state = mt7915_thermal_get_max_throttle_state,
180
.get_cur_state = mt7915_thermal_get_cur_throttle_state,
181
.set_cur_state = mt7915_thermal_set_cur_throttle_state,
182
};
183
184
static void mt7915_unregister_thermal(struct mt7915_phy *phy)
185
{
186
struct wiphy *wiphy = phy->mt76->hw->wiphy;
187
188
if (!phy->cdev)
189
return;
190
191
sysfs_remove_link(&wiphy->dev.kobj, "cooling_device");
192
thermal_cooling_device_unregister(phy->cdev);
193
}
194
#endif
195
196
static int mt7915_thermal_init(struct mt7915_phy *phy)
197
{
198
#if defined(__linux__)
199
struct wiphy *wiphy = phy->mt76->hw->wiphy;
200
struct thermal_cooling_device *cdev;
201
struct device *hwmon;
202
const char *name;
203
204
name = devm_kasprintf(&wiphy->dev, GFP_KERNEL, "mt7915_%s",
205
wiphy_name(wiphy));
206
if (!name)
207
return -ENOMEM;
208
209
cdev = thermal_cooling_device_register(name, phy, &mt7915_thermal_ops);
210
if (!IS_ERR(cdev)) {
211
if (sysfs_create_link(&wiphy->dev.kobj, &cdev->device.kobj,
212
"cooling_device") < 0)
213
thermal_cooling_device_unregister(cdev);
214
else
215
phy->cdev = cdev;
216
}
217
218
/* initialize critical/maximum high temperature */
219
phy->throttle_temp[MT7915_CRIT_TEMP_IDX] = MT7915_CRIT_TEMP;
220
phy->throttle_temp[MT7915_MAX_TEMP_IDX] = MT7915_MAX_TEMP;
221
222
if (!IS_REACHABLE(CONFIG_HWMON))
223
return 0;
224
225
hwmon = devm_hwmon_device_register_with_groups(&wiphy->dev, name, phy,
226
mt7915_hwmon_groups);
227
return PTR_ERR_OR_ZERO(hwmon);
228
#elif defined(__FreeBSD__)
229
return 0;
230
#endif
231
}
232
233
#if defined(CONFIG_MT76_LEDS)
234
static void mt7915_led_set_config(struct led_classdev *led_cdev,
235
u8 delay_on, u8 delay_off)
236
{
237
struct mt7915_dev *dev;
238
struct mt76_phy *mphy;
239
u32 val;
240
241
mphy = container_of(led_cdev, struct mt76_phy, leds.cdev);
242
dev = container_of(mphy->dev, struct mt7915_dev, mt76);
243
244
/* set PWM mode */
245
val = FIELD_PREP(MT_LED_STATUS_DURATION, 0xffff) |
246
FIELD_PREP(MT_LED_STATUS_OFF, delay_off) |
247
FIELD_PREP(MT_LED_STATUS_ON, delay_on);
248
mt76_wr(dev, MT_LED_STATUS_0(mphy->band_idx), val);
249
mt76_wr(dev, MT_LED_STATUS_1(mphy->band_idx), val);
250
251
/* enable LED */
252
mt76_wr(dev, MT_LED_EN(mphy->band_idx), 1);
253
254
/* control LED */
255
val = MT_LED_CTRL_KICK;
256
if (dev->mphy.leds.al)
257
val |= MT_LED_CTRL_POLARITY;
258
if (mphy->band_idx)
259
val |= MT_LED_CTRL_BAND;
260
261
mt76_wr(dev, MT_LED_CTRL(mphy->band_idx), val);
262
mt76_clear(dev, MT_LED_CTRL(mphy->band_idx), MT_LED_CTRL_KICK);
263
}
264
#endif
265
266
static int mt7915_led_set_blink(struct led_classdev *led_cdev,
267
unsigned long *delay_on,
268
unsigned long *delay_off)
269
{
270
#if defined(CONFIG_MT76_LEDS)
271
u16 delta_on = 0, delta_off = 0;
272
273
#define HW_TICK 10
274
#define TO_HW_TICK(_t) (((_t) > HW_TICK) ? ((_t) / HW_TICK) : HW_TICK)
275
276
if (*delay_on)
277
delta_on = TO_HW_TICK(*delay_on);
278
if (*delay_off)
279
delta_off = TO_HW_TICK(*delay_off);
280
281
mt7915_led_set_config(led_cdev, delta_on, delta_off);
282
#endif
283
284
return 0;
285
}
286
287
static void mt7915_led_set_brightness(struct led_classdev *led_cdev,
288
enum led_brightness brightness)
289
{
290
#if defined(CONFIG_MT76_LEDS)
291
if (!brightness)
292
mt7915_led_set_config(led_cdev, 0, 0xff);
293
else
294
mt7915_led_set_config(led_cdev, 0xff, 0);
295
#endif
296
}
297
298
static void __mt7915_init_txpower(struct mt7915_phy *phy,
299
struct ieee80211_supported_band *sband)
300
{
301
struct mt7915_dev *dev = phy->dev;
302
int i, n_chains = hweight16(phy->mt76->chainmask);
303
int path_delta = mt76_tx_power_path_delta(n_chains);
304
int pwr_delta = mt7915_eeprom_get_power_delta(dev, sband->band);
305
struct mt76_power_limits limits;
306
307
for (i = 0; i < sband->n_channels; i++) {
308
struct ieee80211_channel *chan = &sband->channels[i];
309
u32 target_power = 0;
310
int j;
311
312
for (j = 0; j < n_chains; j++) {
313
u32 val;
314
315
val = mt7915_eeprom_get_target_power(dev, chan, j);
316
target_power = max(target_power, val);
317
}
318
319
target_power += pwr_delta;
320
target_power = mt76_get_rate_power_limits(phy->mt76, chan,
321
&limits,
322
target_power);
323
target_power += path_delta;
324
target_power = DIV_ROUND_UP(target_power, 2);
325
chan->max_power = min_t(int, chan->max_reg_power,
326
target_power);
327
chan->orig_mpwr = target_power;
328
}
329
}
330
331
void mt7915_init_txpower(struct mt7915_phy *phy)
332
{
333
if (!phy)
334
return;
335
336
if (phy->mt76->cap.has_2ghz)
337
__mt7915_init_txpower(phy, &phy->mt76->sband_2g.sband);
338
if (phy->mt76->cap.has_5ghz)
339
__mt7915_init_txpower(phy, &phy->mt76->sband_5g.sband);
340
if (phy->mt76->cap.has_6ghz)
341
__mt7915_init_txpower(phy, &phy->mt76->sband_6g.sband);
342
}
343
344
static void
345
mt7915_regd_notifier(struct wiphy *wiphy,
346
struct regulatory_request *request)
347
{
348
struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
349
struct mt7915_dev *dev = mt7915_hw_dev(hw);
350
struct mt76_phy *mphy = hw->priv;
351
struct mt7915_phy *phy = mphy->priv;
352
353
memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2));
354
dev->mt76.region = request->dfs_region;
355
356
if (dev->mt76.region == NL80211_DFS_UNSET)
357
mt7915_mcu_rdd_background_enable(phy, NULL);
358
359
mt7915_init_txpower(phy);
360
361
mphy->dfs_state = MT_DFS_STATE_UNKNOWN;
362
mt7915_dfs_init_radar_detector(phy);
363
}
364
365
static void
366
mt7915_init_wiphy(struct mt7915_phy *phy)
367
{
368
struct mt76_phy *mphy = phy->mt76;
369
struct ieee80211_hw *hw = mphy->hw;
370
struct mt76_dev *mdev = &phy->dev->mt76;
371
struct wiphy *wiphy = hw->wiphy;
372
struct mt7915_dev *dev = phy->dev;
373
374
hw->queues = 4;
375
hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE;
376
hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE;
377
hw->netdev_features = NETIF_F_RXCSUM;
378
379
if (mtk_wed_device_active(&mdev->mmio.wed))
380
hw->netdev_features |= NETIF_F_HW_TC;
381
382
hw->radiotap_timestamp.units_pos =
383
IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US;
384
385
phy->slottime = 9;
386
387
hw->sta_data_size = sizeof(struct mt7915_sta);
388
hw->vif_data_size = sizeof(struct mt7915_vif);
389
390
wiphy->iface_combinations = if_comb;
391
wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
392
wiphy->reg_notifier = mt7915_regd_notifier;
393
wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH;
394
wiphy->mbssid_max_interfaces = 16;
395
396
wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BSS_COLOR);
397
wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS);
398
wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_LEGACY);
399
wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HT);
400
wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_VHT);
401
wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HE);
402
wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_UNSOL_BCAST_PROBE_RESP);
403
wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_FILS_DISCOVERY);
404
wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_ACK_SIGNAL_SUPPORT);
405
wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
406
407
if (!is_mt7915(&dev->mt76))
408
wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_STA_TX_PWR);
409
410
if (mt7915_eeprom_has_background_radar(phy->dev) &&
411
#if defined(CONFIG_OF)
412
(!mdev->dev->of_node ||
413
!of_property_read_bool(mdev->dev->of_node,
414
"mediatek,disable-radar-background")))
415
#else
416
1)
417
#endif
418
wiphy_ext_feature_set(wiphy,
419
NL80211_EXT_FEATURE_RADAR_BACKGROUND);
420
421
ieee80211_hw_set(hw, HAS_RATE_CONTROL);
422
ieee80211_hw_set(hw, SUPPORTS_TX_ENCAP_OFFLOAD);
423
ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD);
424
ieee80211_hw_set(hw, SUPPORTS_MULTI_BSSID);
425
ieee80211_hw_set(hw, WANT_MONITOR_VIF);
426
ieee80211_hw_set(hw, SUPPORTS_TX_FRAG);
427
428
hw->max_tx_fragments = 4;
429
430
if (phy->mt76->cap.has_2ghz) {
431
phy->mt76->sband_2g.sband.ht_cap.cap |=
432
IEEE80211_HT_CAP_LDPC_CODING |
433
IEEE80211_HT_CAP_MAX_AMSDU;
434
if (is_mt7915(&dev->mt76))
435
phy->mt76->sband_2g.sband.ht_cap.ampdu_density =
436
IEEE80211_HT_MPDU_DENSITY_4;
437
else
438
phy->mt76->sband_2g.sband.ht_cap.ampdu_density =
439
IEEE80211_HT_MPDU_DENSITY_2;
440
}
441
442
if (phy->mt76->cap.has_5ghz) {
443
struct ieee80211_sta_vht_cap *vht_cap;
444
445
vht_cap = &phy->mt76->sband_5g.sband.vht_cap;
446
phy->mt76->sband_5g.sband.ht_cap.cap |=
447
IEEE80211_HT_CAP_LDPC_CODING |
448
IEEE80211_HT_CAP_MAX_AMSDU;
449
450
if (is_mt7915(&dev->mt76)) {
451
phy->mt76->sband_5g.sband.ht_cap.ampdu_density =
452
IEEE80211_HT_MPDU_DENSITY_4;
453
454
vht_cap->cap |=
455
IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991 |
456
IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
457
458
if (!dev->dbdc_support)
459
vht_cap->cap |=
460
IEEE80211_VHT_CAP_SHORT_GI_160 |
461
FIELD_PREP(IEEE80211_VHT_CAP_EXT_NSS_BW_MASK, 1);
462
} else {
463
phy->mt76->sband_5g.sband.ht_cap.ampdu_density =
464
IEEE80211_HT_MPDU_DENSITY_2;
465
466
vht_cap->cap |=
467
IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
468
IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK;
469
470
/* mt7916 dbdc with 2g 2x2 bw40 and 5g 2x2 bw160c */
471
vht_cap->cap |=
472
IEEE80211_VHT_CAP_SHORT_GI_160 |
473
IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ;
474
}
475
476
if (!is_mt7915(&dev->mt76) || !dev->dbdc_support)
477
ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW);
478
}
479
480
mt76_set_stream_caps(phy->mt76, true);
481
mt7915_set_stream_vht_txbf_caps(phy);
482
mt7915_set_stream_he_caps(phy);
483
mt7915_init_txpower(phy);
484
485
wiphy->available_antennas_rx = phy->mt76->antenna_mask;
486
wiphy->available_antennas_tx = phy->mt76->antenna_mask;
487
488
/* init led callbacks */
489
if (IS_ENABLED(CONFIG_MT76_LEDS)) {
490
mphy->leds.cdev.brightness_set = mt7915_led_set_brightness;
491
mphy->leds.cdev.blink_set = mt7915_led_set_blink;
492
}
493
}
494
495
static void
496
mt7915_mac_init_band(struct mt7915_dev *dev, u8 band)
497
{
498
u32 mask, set;
499
500
mt76_rmw_field(dev, MT_TMAC_CTCR0(band),
501
MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
502
mt76_set(dev, MT_TMAC_CTCR0(band),
503
MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
504
MT_TMAC_CTCR0_INS_DDLMT_EN);
505
506
mask = MT_MDP_RCFR0_MCU_RX_MGMT |
507
MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR |
508
MT_MDP_RCFR0_MCU_RX_CTL_BAR;
509
set = FIELD_PREP(MT_MDP_RCFR0_MCU_RX_MGMT, MT_MDP_TO_HIF) |
510
FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR, MT_MDP_TO_HIF) |
511
FIELD_PREP(MT_MDP_RCFR0_MCU_RX_CTL_BAR, MT_MDP_TO_HIF);
512
mt76_rmw(dev, MT_MDP_BNRCFR0(band), mask, set);
513
514
mask = MT_MDP_RCFR1_MCU_RX_BYPASS |
515
MT_MDP_RCFR1_RX_DROPPED_UCAST |
516
MT_MDP_RCFR1_RX_DROPPED_MCAST;
517
set = FIELD_PREP(MT_MDP_RCFR1_MCU_RX_BYPASS, MT_MDP_TO_HIF) |
518
FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_UCAST, MT_MDP_TO_HIF) |
519
FIELD_PREP(MT_MDP_RCFR1_RX_DROPPED_MCAST, MT_MDP_TO_HIF);
520
mt76_rmw(dev, MT_MDP_BNRCFR1(band), mask, set);
521
522
mt76_rmw_field(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_MAX_RX_LEN, 0x680);
523
524
/* mt7915: disable rx rate report by default due to hw issues */
525
mt76_clear(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_RXD_G5_EN);
526
527
/* clear estimated value of EIFS for Rx duration & OBSS time */
528
mt76_wr(dev, MT_WF_RMAC_RSVD0(band), MT_WF_RMAC_RSVD0_EIFS_CLR);
529
530
/* clear backoff time for Rx duration */
531
mt76_clear(dev, MT_WF_RMAC_MIB_AIRTIME1(band),
532
MT_WF_RMAC_MIB_NONQOSD_BACKOFF);
533
mt76_clear(dev, MT_WF_RMAC_MIB_AIRTIME3(band),
534
MT_WF_RMAC_MIB_QOS01_BACKOFF);
535
mt76_clear(dev, MT_WF_RMAC_MIB_AIRTIME4(band),
536
MT_WF_RMAC_MIB_QOS23_BACKOFF);
537
538
/* clear backoff time for Tx duration */
539
mt76_clear(dev, MT_WTBLOFF_TOP_ACR(band),
540
MT_WTBLOFF_TOP_ADM_BACKOFFTIME);
541
542
/* exclude estimated backoff time for Tx duration on MT7915 */
543
if (is_mt7915(&dev->mt76))
544
mt76_set(dev, MT_AGG_ATCR0(band),
545
MT_AGG_ATCR_MAC_BFF_TIME_EN);
546
547
/* clear backoff time and set software compensation for OBSS time */
548
mask = MT_WF_RMAC_MIB_OBSS_BACKOFF | MT_WF_RMAC_MIB_ED_OFFSET;
549
set = FIELD_PREP(MT_WF_RMAC_MIB_OBSS_BACKOFF, 0) |
550
FIELD_PREP(MT_WF_RMAC_MIB_ED_OFFSET, 4);
551
mt76_rmw(dev, MT_WF_RMAC_MIB_AIRTIME0(band), mask, set);
552
553
/* filter out non-resp frames and get instanstaeous signal reporting */
554
mask = MT_WTBLOFF_TOP_RSCR_RCPI_MODE | MT_WTBLOFF_TOP_RSCR_RCPI_PARAM;
555
set = FIELD_PREP(MT_WTBLOFF_TOP_RSCR_RCPI_MODE, 0) |
556
FIELD_PREP(MT_WTBLOFF_TOP_RSCR_RCPI_PARAM, 0x3);
557
mt76_rmw(dev, MT_WTBLOFF_TOP_RSCR(band), mask, set);
558
559
/* MT_TXD5_TX_STATUS_HOST (MPDU format) has higher priority than
560
* MT_AGG_ACR_PPDU_TXS2H (PPDU format) even though ACR bit is set.
561
*/
562
if (mtk_wed_device_active(&dev->mt76.mmio.wed))
563
mt76_set(dev, MT_AGG_ACR4(band), MT_AGG_ACR_PPDU_TXS2H);
564
}
565
566
static void
567
mt7915_init_led_mux(struct mt7915_dev *dev)
568
{
569
if (!IS_ENABLED(CONFIG_MT76_LEDS))
570
return;
571
572
if (dev->dbdc_support) {
573
switch (mt76_chip(&dev->mt76)) {
574
case 0x7915:
575
mt76_rmw_field(dev, MT_LED_GPIO_MUX2,
576
GENMASK(11, 8), 4);
577
mt76_rmw_field(dev, MT_LED_GPIO_MUX3,
578
GENMASK(11, 8), 4);
579
break;
580
case 0x7986:
581
mt76_rmw_field(dev, MT_LED_GPIO_MUX0,
582
GENMASK(7, 4), 1);
583
mt76_rmw_field(dev, MT_LED_GPIO_MUX0,
584
GENMASK(11, 8), 1);
585
break;
586
case 0x7916:
587
mt76_rmw_field(dev, MT_LED_GPIO_MUX1,
588
GENMASK(27, 24), 3);
589
mt76_rmw_field(dev, MT_LED_GPIO_MUX1,
590
GENMASK(31, 28), 3);
591
break;
592
default:
593
break;
594
}
595
} else if (dev->mphy.leds.pin) {
596
switch (mt76_chip(&dev->mt76)) {
597
case 0x7915:
598
mt76_rmw_field(dev, MT_LED_GPIO_MUX3,
599
GENMASK(11, 8), 4);
600
break;
601
case 0x7986:
602
mt76_rmw_field(dev, MT_LED_GPIO_MUX0,
603
GENMASK(11, 8), 1);
604
break;
605
case 0x7916:
606
mt76_rmw_field(dev, MT_LED_GPIO_MUX1,
607
GENMASK(31, 28), 3);
608
break;
609
default:
610
break;
611
}
612
} else {
613
switch (mt76_chip(&dev->mt76)) {
614
case 0x7915:
615
mt76_rmw_field(dev, MT_LED_GPIO_MUX2,
616
GENMASK(11, 8), 4);
617
break;
618
case 0x7986:
619
mt76_rmw_field(dev, MT_LED_GPIO_MUX0,
620
GENMASK(7, 4), 1);
621
break;
622
case 0x7916:
623
mt76_rmw_field(dev, MT_LED_GPIO_MUX1,
624
GENMASK(27, 24), 3);
625
break;
626
default:
627
break;
628
}
629
}
630
}
631
632
void mt7915_mac_init(struct mt7915_dev *dev)
633
{
634
int i;
635
u32 rx_len = is_mt7915(&dev->mt76) ? 0x400 : 0x680;
636
637
/* config pse qid6 wfdma port selection */
638
if (!is_mt7915(&dev->mt76) && dev->hif2)
639
mt76_rmw(dev, MT_WF_PP_TOP_RXQ_WFDMA_CF_5, 0,
640
MT_WF_PP_TOP_RXQ_QID6_WFDMA_HIF_SEL_MASK);
641
642
mt76_rmw_field(dev, MT_MDP_DCR1, MT_MDP_DCR1_MAX_RX_LEN, rx_len);
643
644
if (!is_mt7915(&dev->mt76))
645
mt76_clear(dev, MT_MDP_DCR2, MT_MDP_DCR2_RX_TRANS_SHORT);
646
else
647
mt76_clear(dev, MT_PLE_HOST_RPT0, MT_PLE_HOST_RPT0_TX_LATENCY);
648
649
/* enable hardware de-agg */
650
mt76_set(dev, MT_MDP_DCR0, MT_MDP_DCR0_DAMSDU_EN);
651
652
for (i = 0; i < mt7915_wtbl_size(dev); i++)
653
mt7915_mac_wtbl_update(dev, i,
654
MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
655
for (i = 0; i < 2; i++)
656
mt7915_mac_init_band(dev, i);
657
658
mt7915_init_led_mux(dev);
659
}
660
661
int mt7915_txbf_init(struct mt7915_dev *dev)
662
{
663
int ret;
664
665
if (dev->dbdc_support) {
666
ret = mt7915_mcu_set_txbf(dev, MT_BF_MODULE_UPDATE);
667
if (ret)
668
return ret;
669
}
670
671
/* trigger sounding packets */
672
ret = mt7915_mcu_set_txbf(dev, MT_BF_SOUNDING_ON);
673
if (ret)
674
return ret;
675
676
/* enable eBF */
677
return mt7915_mcu_set_txbf(dev, MT_BF_TYPE_UPDATE);
678
}
679
680
static struct mt7915_phy *
681
mt7915_alloc_ext_phy(struct mt7915_dev *dev)
682
{
683
struct mt7915_phy *phy;
684
struct mt76_phy *mphy;
685
686
if (!dev->dbdc_support)
687
return NULL;
688
689
mphy = mt76_alloc_phy(&dev->mt76, sizeof(*phy), &mt7915_ops, MT_BAND1);
690
if (!mphy)
691
return ERR_PTR(-ENOMEM);
692
693
phy = mphy->priv;
694
phy->dev = dev;
695
phy->mt76 = mphy;
696
697
/* Bind main phy to band0 and ext_phy to band1 for dbdc case */
698
phy->mt76->band_idx = 1;
699
700
return phy;
701
}
702
703
static int
704
mt7915_register_ext_phy(struct mt7915_dev *dev, struct mt7915_phy *phy)
705
{
706
struct mt76_phy *mphy = phy->mt76;
707
int ret;
708
709
INIT_DELAYED_WORK(&mphy->mac_work, mt7915_mac_work);
710
711
mt7915_eeprom_parse_hw_cap(dev, phy);
712
713
#if defined(__linux__)
714
memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR2,
715
#elif defined(__FreeBSD__)
716
memcpy(mphy->macaddr, (u8 *)dev->mt76.eeprom.data + MT_EE_MAC_ADDR2,
717
#endif
718
ETH_ALEN);
719
/* Make the secondary PHY MAC address local without overlapping with
720
* the usual MAC address allocation scheme on multiple virtual interfaces
721
*/
722
if (!is_valid_ether_addr(mphy->macaddr)) {
723
#if defined(__linux__)
724
memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
725
#elif defined(__FreeBSD__)
726
memcpy(mphy->macaddr, (u8 *)dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
727
#endif
728
ETH_ALEN);
729
mphy->macaddr[0] |= 2;
730
mphy->macaddr[0] ^= BIT(7);
731
}
732
mt76_eeprom_override(mphy);
733
734
/* init wiphy according to mphy and phy */
735
mt7915_init_wiphy(phy);
736
737
ret = mt76_register_phy(mphy, true, mt76_rates,
738
ARRAY_SIZE(mt76_rates));
739
if (ret)
740
return ret;
741
742
ret = mt7915_thermal_init(phy);
743
if (ret)
744
goto unreg;
745
746
#if !defined(__FreeBSD__) || defined(CONFIG_MT7915_DEBUGFS)
747
mt7915_init_debugfs(phy);
748
#endif
749
750
return 0;
751
752
unreg:
753
mt76_unregister_phy(mphy);
754
return ret;
755
}
756
757
static void mt7915_init_work(struct work_struct *work)
758
{
759
struct mt7915_dev *dev = container_of(work, struct mt7915_dev,
760
init_work);
761
762
mt7915_mcu_set_eeprom(dev);
763
mt7915_mac_init(dev);
764
mt7915_txbf_init(dev);
765
}
766
767
void mt7915_wfsys_reset(struct mt7915_dev *dev)
768
{
769
#define MT_MCU_DUMMY_RANDOM GENMASK(15, 0)
770
#define MT_MCU_DUMMY_DEFAULT GENMASK(31, 16)
771
772
if (is_mt7915(&dev->mt76)) {
773
u32 val = MT_TOP_PWR_KEY | MT_TOP_PWR_SW_PWR_ON | MT_TOP_PWR_PWR_ON;
774
775
mt76_wr(dev, MT_MCU_WFDMA0_DUMMY_CR, MT_MCU_DUMMY_RANDOM);
776
777
/* change to software control */
778
val |= MT_TOP_PWR_SW_RST;
779
mt76_wr(dev, MT_TOP_PWR_CTRL, val);
780
781
/* reset wfsys */
782
val &= ~MT_TOP_PWR_SW_RST;
783
mt76_wr(dev, MT_TOP_PWR_CTRL, val);
784
785
/* release wfsys then mcu re-executes romcode */
786
val |= MT_TOP_PWR_SW_RST;
787
mt76_wr(dev, MT_TOP_PWR_CTRL, val);
788
789
/* switch to hw control */
790
val &= ~MT_TOP_PWR_SW_RST;
791
val |= MT_TOP_PWR_HW_CTRL;
792
mt76_wr(dev, MT_TOP_PWR_CTRL, val);
793
794
/* check whether mcu resets to default */
795
if (!mt76_poll_msec(dev, MT_MCU_WFDMA0_DUMMY_CR,
796
MT_MCU_DUMMY_DEFAULT, MT_MCU_DUMMY_DEFAULT,
797
1000)) {
798
dev_err(dev->mt76.dev, "wifi subsystem reset failure\n");
799
return;
800
}
801
802
/* wfsys reset won't clear host registers */
803
mt76_clear(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE);
804
805
msleep(100);
806
} else if (is_mt798x(&dev->mt76)) {
807
mt7986_wmac_disable(dev);
808
msleep(20);
809
810
mt7986_wmac_enable(dev);
811
msleep(20);
812
} else {
813
mt76_set(dev, MT_WF_SUBSYS_RST, 0x1);
814
msleep(20);
815
816
mt76_clear(dev, MT_WF_SUBSYS_RST, 0x1);
817
msleep(20);
818
}
819
}
820
821
static bool mt7915_band_config(struct mt7915_dev *dev)
822
{
823
bool ret = true;
824
825
dev->phy.mt76->band_idx = 0;
826
827
if (is_mt798x(&dev->mt76)) {
828
u32 sku = mt7915_check_adie(dev, true);
829
830
/*
831
* for mt7986, dbdc support is determined by the number
832
* of adie chips and the main phy is bound to band1 when
833
* dbdc is disabled.
834
*/
835
if (sku == MT7975_ONE_ADIE || sku == MT7976_ONE_ADIE) {
836
dev->phy.mt76->band_idx = 1;
837
ret = false;
838
}
839
} else {
840
ret = is_mt7915(&dev->mt76) ?
841
!!(mt76_rr(dev, MT_HW_BOUND) & BIT(5)) : true;
842
}
843
844
return ret;
845
}
846
847
static int
848
mt7915_init_hardware(struct mt7915_dev *dev, struct mt7915_phy *phy2)
849
{
850
int ret, idx;
851
852
mt76_wr(dev, MT_INT_MASK_CSR, 0);
853
mt76_wr(dev, MT_INT_SOURCE_CSR, ~0);
854
855
INIT_WORK(&dev->init_work, mt7915_init_work);
856
857
ret = mt7915_dma_init(dev, phy2);
858
if (ret)
859
return ret;
860
861
set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state);
862
863
ret = mt7915_mcu_init(dev);
864
if (ret)
865
return ret;
866
867
ret = mt7915_eeprom_init(dev);
868
if (ret < 0)
869
return ret;
870
871
if (dev->cal) {
872
ret = mt7915_mcu_apply_group_cal(dev);
873
if (ret)
874
return ret;
875
}
876
877
/* Beacon and mgmt frames should occupy wcid 0 */
878
idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7915_WTBL_STA);
879
if (idx)
880
return -ENOSPC;
881
882
dev->mt76.global_wcid.idx = idx;
883
dev->mt76.global_wcid.hw_key_idx = -1;
884
dev->mt76.global_wcid.tx_info |= MT_WCID_TX_INFO_SET;
885
rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid);
886
887
return 0;
888
}
889
890
void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy)
891
{
892
int sts;
893
u32 *cap;
894
895
if (!phy->mt76->cap.has_5ghz)
896
return;
897
898
sts = hweight8(phy->mt76->chainmask);
899
cap = &phy->mt76->sband_5g.sband.vht_cap.cap;
900
901
*cap |= IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
902
IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
903
FIELD_PREP(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK,
904
sts - 1);
905
906
*cap &= ~(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK |
907
IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE |
908
IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE);
909
910
if (sts < 2)
911
return;
912
913
*cap |= IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE |
914
IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE |
915
FIELD_PREP(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,
916
sts - 1);
917
}
918
919
static void
920
mt7915_set_stream_he_txbf_caps(struct mt7915_phy *phy,
921
struct ieee80211_sta_he_cap *he_cap, int vif)
922
{
923
struct mt7915_dev *dev = phy->dev;
924
struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem;
925
int sts = hweight8(phy->mt76->chainmask);
926
u8 c, sts_160 = sts;
927
928
/* Can do 1/2 of STS in 160Mhz mode for mt7915 */
929
if (is_mt7915(&dev->mt76)) {
930
if (!dev->dbdc_support)
931
sts_160 /= 2;
932
else
933
sts_160 = 0;
934
}
935
936
#ifdef CONFIG_MAC80211_MESH
937
if (vif == NL80211_IFTYPE_MESH_POINT)
938
return;
939
#endif
940
941
elem->phy_cap_info[3] &= ~IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
942
elem->phy_cap_info[4] &= ~IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
943
944
c = IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK;
945
if (sts_160)
946
c |= IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK;
947
elem->phy_cap_info[5] &= ~c;
948
949
c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
950
IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB;
951
elem->phy_cap_info[6] &= ~c;
952
953
elem->phy_cap_info[7] &= ~IEEE80211_HE_PHY_CAP7_MAX_NC_MASK;
954
955
c = IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US;
956
if (!is_mt7915(&dev->mt76))
957
c |= IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO;
958
elem->phy_cap_info[2] |= c;
959
960
c = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
961
IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_4;
962
if (sts_160)
963
c |= IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_4;
964
elem->phy_cap_info[4] |= c;
965
966
/* do not support NG16 due to spec D4.0 changes subcarrier idx */
967
c = IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU |
968
IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU;
969
970
if (vif == NL80211_IFTYPE_STATION)
971
c |= IEEE80211_HE_PHY_CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO;
972
973
elem->phy_cap_info[6] |= c;
974
975
if (sts < 2)
976
return;
977
978
/* the maximum cap is 4 x 3, (Nr, Nc) = (3, 2) */
979
elem->phy_cap_info[7] |= min_t(int, sts - 1, 2) << 3;
980
981
if (vif != NL80211_IFTYPE_AP && vif != NL80211_IFTYPE_STATION)
982
return;
983
984
elem->phy_cap_info[3] |= IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER;
985
986
c = FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,
987
sts - 1);
988
if (sts_160)
989
c |= FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK,
990
sts_160 - 1);
991
elem->phy_cap_info[5] |= c;
992
993
if (vif != NL80211_IFTYPE_AP)
994
return;
995
996
elem->phy_cap_info[4] |= IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER;
997
998
c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB |
999
IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB;
1000
elem->phy_cap_info[6] |= c;
1001
1002
if (!is_mt7915(&dev->mt76)) {
1003
c = IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ |
1004
IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ;
1005
elem->phy_cap_info[7] |= c;
1006
}
1007
}
1008
1009
static int
1010
mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band,
1011
struct ieee80211_sband_iftype_data *data)
1012
{
1013
struct mt7915_dev *dev = phy->dev;
1014
int i, idx = 0, nss = hweight8(phy->mt76->antenna_mask);
1015
u16 mcs_map = 0;
1016
u16 mcs_map_160 = 0;
1017
u8 nss_160;
1018
1019
if (!is_mt7915(&dev->mt76))
1020
nss_160 = nss;
1021
else if (!dev->dbdc_support)
1022
/* Can do 1/2 of NSS streams in 160Mhz mode for mt7915 */
1023
nss_160 = nss / 2;
1024
else
1025
/* Can't do 160MHz with mt7915 dbdc */
1026
nss_160 = 0;
1027
1028
for (i = 0; i < 8; i++) {
1029
if (i < nss)
1030
mcs_map |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2));
1031
else
1032
mcs_map |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2));
1033
1034
if (i < nss_160)
1035
mcs_map_160 |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2));
1036
else
1037
mcs_map_160 |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2));
1038
}
1039
1040
for (i = 0; i < NUM_NL80211_IFTYPES; i++) {
1041
struct ieee80211_sta_he_cap *he_cap = &data[idx].he_cap;
1042
struct ieee80211_he_cap_elem *he_cap_elem =
1043
&he_cap->he_cap_elem;
1044
struct ieee80211_he_mcs_nss_supp *he_mcs =
1045
&he_cap->he_mcs_nss_supp;
1046
1047
switch (i) {
1048
case NL80211_IFTYPE_STATION:
1049
case NL80211_IFTYPE_AP:
1050
#ifdef CONFIG_MAC80211_MESH
1051
case NL80211_IFTYPE_MESH_POINT:
1052
#endif
1053
break;
1054
default:
1055
continue;
1056
}
1057
1058
data[idx].types_mask = BIT(i);
1059
he_cap->has_he = true;
1060
1061
he_cap_elem->mac_cap_info[0] =
1062
IEEE80211_HE_MAC_CAP0_HTC_HE;
1063
he_cap_elem->mac_cap_info[3] =
1064
IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
1065
IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_EXT_3;
1066
he_cap_elem->mac_cap_info[4] =
1067
IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU;
1068
1069
if (band == NL80211_BAND_2GHZ)
1070
he_cap_elem->phy_cap_info[0] =
1071
IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G;
1072
else if (nss_160)
1073
he_cap_elem->phy_cap_info[0] =
1074
IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
1075
IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G;
1076
else
1077
he_cap_elem->phy_cap_info[0] =
1078
IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G;
1079
1080
he_cap_elem->phy_cap_info[1] =
1081
IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD;
1082
he_cap_elem->phy_cap_info[2] =
1083
IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ |
1084
IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ;
1085
1086
switch (i) {
1087
case NL80211_IFTYPE_AP:
1088
he_cap_elem->mac_cap_info[0] |=
1089
IEEE80211_HE_MAC_CAP0_TWT_RES;
1090
he_cap_elem->mac_cap_info[2] |=
1091
IEEE80211_HE_MAC_CAP2_BSR;
1092
he_cap_elem->mac_cap_info[4] |=
1093
IEEE80211_HE_MAC_CAP4_BQR;
1094
he_cap_elem->mac_cap_info[5] |=
1095
IEEE80211_HE_MAC_CAP5_OM_CTRL_UL_MU_DATA_DIS_RX;
1096
he_cap_elem->phy_cap_info[3] |=
1097
IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK |
1098
IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK;
1099
he_cap_elem->phy_cap_info[6] |=
1100
IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE |
1101
IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT;
1102
he_cap_elem->phy_cap_info[9] |=
1103
IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU |
1104
IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU;
1105
break;
1106
case NL80211_IFTYPE_STATION:
1107
he_cap_elem->mac_cap_info[1] |=
1108
IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US;
1109
1110
if (band == NL80211_BAND_2GHZ)
1111
he_cap_elem->phy_cap_info[0] |=
1112
IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G;
1113
else
1114
he_cap_elem->phy_cap_info[0] |=
1115
IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G;
1116
1117
he_cap_elem->phy_cap_info[1] |=
1118
IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
1119
IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US;
1120
he_cap_elem->phy_cap_info[3] |=
1121
IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_QPSK |
1122
IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_QPSK;
1123
he_cap_elem->phy_cap_info[6] |=
1124
IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB |
1125
IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE |
1126
IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT;
1127
he_cap_elem->phy_cap_info[7] |=
1128
IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_SUPP |
1129
IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI;
1130
he_cap_elem->phy_cap_info[8] |=
1131
IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G |
1132
IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_484;
1133
if (nss_160)
1134
he_cap_elem->phy_cap_info[8] |=
1135
IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
1136
IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU;
1137
he_cap_elem->phy_cap_info[9] |=
1138
IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM |
1139
IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK |
1140
IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU |
1141
IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU |
1142
IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
1143
IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB;
1144
break;
1145
}
1146
1147
memset(he_mcs, 0, sizeof(*he_mcs));
1148
he_mcs->rx_mcs_80 = cpu_to_le16(mcs_map);
1149
he_mcs->tx_mcs_80 = cpu_to_le16(mcs_map);
1150
he_mcs->rx_mcs_160 = cpu_to_le16(mcs_map_160);
1151
he_mcs->tx_mcs_160 = cpu_to_le16(mcs_map_160);
1152
1153
mt7915_set_stream_he_txbf_caps(phy, he_cap, i);
1154
1155
memset(he_cap->ppe_thres, 0, sizeof(he_cap->ppe_thres));
1156
if (he_cap_elem->phy_cap_info[6] &
1157
IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT) {
1158
mt76_connac_gen_ppe_thresh(he_cap->ppe_thres, nss, band);
1159
} else {
1160
he_cap_elem->phy_cap_info[9] |=
1161
u8_encode_bits(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US,
1162
IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK);
1163
}
1164
1165
if (band == NL80211_BAND_6GHZ) {
1166
u16 cap = IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS |
1167
IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS;
1168
1169
cap |= u16_encode_bits(IEEE80211_HT_MPDU_DENSITY_2,
1170
IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) |
1171
u16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K,
1172
IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) |
1173
u16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
1174
IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN);
1175
1176
data[idx].he_6ghz_capa.capa = cpu_to_le16(cap);
1177
}
1178
1179
idx++;
1180
}
1181
1182
return idx;
1183
}
1184
1185
void mt7915_set_stream_he_caps(struct mt7915_phy *phy)
1186
{
1187
struct ieee80211_sband_iftype_data *data;
1188
struct ieee80211_supported_band *band;
1189
int n;
1190
1191
if (phy->mt76->cap.has_2ghz) {
1192
data = phy->iftype[NL80211_BAND_2GHZ];
1193
n = mt7915_init_he_caps(phy, NL80211_BAND_2GHZ, data);
1194
1195
band = &phy->mt76->sband_2g.sband;
1196
_ieee80211_set_sband_iftype_data(band, data, n);
1197
}
1198
1199
if (phy->mt76->cap.has_5ghz) {
1200
data = phy->iftype[NL80211_BAND_5GHZ];
1201
n = mt7915_init_he_caps(phy, NL80211_BAND_5GHZ, data);
1202
1203
band = &phy->mt76->sband_5g.sband;
1204
_ieee80211_set_sband_iftype_data(band, data, n);
1205
}
1206
1207
if (phy->mt76->cap.has_6ghz) {
1208
data = phy->iftype[NL80211_BAND_6GHZ];
1209
n = mt7915_init_he_caps(phy, NL80211_BAND_6GHZ, data);
1210
1211
band = &phy->mt76->sband_6g.sband;
1212
_ieee80211_set_sband_iftype_data(band, data, n);
1213
}
1214
}
1215
1216
static void mt7915_unregister_ext_phy(struct mt7915_dev *dev)
1217
{
1218
struct mt7915_phy *phy = mt7915_ext_phy(dev);
1219
struct mt76_phy *mphy = dev->mt76.phys[MT_BAND1];
1220
1221
if (!phy)
1222
return;
1223
1224
#if defined(__linux__)
1225
mt7915_unregister_thermal(phy);
1226
#endif
1227
mt76_unregister_phy(mphy);
1228
ieee80211_free_hw(mphy->hw);
1229
}
1230
1231
static void mt7915_stop_hardware(struct mt7915_dev *dev)
1232
{
1233
mt7915_mcu_exit(dev);
1234
mt76_connac2_tx_token_put(&dev->mt76);
1235
mt7915_dma_cleanup(dev);
1236
tasklet_disable(&dev->mt76.irq_tasklet);
1237
1238
if (is_mt798x(&dev->mt76))
1239
mt7986_wmac_disable(dev);
1240
}
1241
1242
int mt7915_register_device(struct mt7915_dev *dev)
1243
{
1244
struct mt7915_phy *phy2;
1245
int ret;
1246
1247
dev->phy.dev = dev;
1248
dev->phy.mt76 = &dev->mt76.phy;
1249
dev->mt76.phy.priv = &dev->phy;
1250
INIT_WORK(&dev->rc_work, mt7915_mac_sta_rc_work);
1251
INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7915_mac_work);
1252
INIT_LIST_HEAD(&dev->sta_rc_list);
1253
INIT_LIST_HEAD(&dev->twt_list);
1254
1255
init_waitqueue_head(&dev->reset_wait);
1256
INIT_WORK(&dev->reset_work, mt7915_mac_reset_work);
1257
INIT_WORK(&dev->dump_work, mt7915_mac_dump_work);
1258
mutex_init(&dev->dump_mutex);
1259
1260
dev->dbdc_support = mt7915_band_config(dev);
1261
1262
phy2 = mt7915_alloc_ext_phy(dev);
1263
if (IS_ERR(phy2))
1264
return PTR_ERR(phy2);
1265
1266
ret = mt7915_init_hardware(dev, phy2);
1267
if (ret)
1268
goto free_phy2;
1269
1270
mt7915_init_wiphy(&dev->phy);
1271
1272
#ifdef CONFIG_NL80211_TESTMODE
1273
dev->mt76.test_ops = &mt7915_testmode_ops;
1274
#endif
1275
1276
ret = mt76_register_device(&dev->mt76, true, mt76_rates,
1277
ARRAY_SIZE(mt76_rates));
1278
if (ret)
1279
goto stop_hw;
1280
1281
ret = mt7915_thermal_init(&dev->phy);
1282
if (ret)
1283
goto unreg_dev;
1284
1285
if (phy2) {
1286
ret = mt7915_register_ext_phy(dev, phy2);
1287
if (ret)
1288
goto unreg_thermal;
1289
}
1290
1291
ieee80211_queue_work(mt76_hw(dev), &dev->init_work);
1292
1293
dev->recovery.hw_init_done = true;
1294
1295
#if !defined(__FreeBSD__) || defined(CONFIG_MT7915_DEBUGFS)
1296
ret = mt7915_init_debugfs(&dev->phy);
1297
if (ret)
1298
goto unreg_thermal;
1299
#endif
1300
1301
ret = mt7915_coredump_register(dev);
1302
if (ret)
1303
goto unreg_thermal;
1304
1305
return 0;
1306
1307
unreg_thermal:
1308
#if defined(__linux__)
1309
mt7915_unregister_thermal(&dev->phy);
1310
#endif
1311
unreg_dev:
1312
mt76_unregister_device(&dev->mt76);
1313
stop_hw:
1314
mt7915_stop_hardware(dev);
1315
free_phy2:
1316
if (phy2)
1317
ieee80211_free_hw(phy2->mt76->hw);
1318
return ret;
1319
}
1320
1321
void mt7915_unregister_device(struct mt7915_dev *dev)
1322
{
1323
mt7915_unregister_ext_phy(dev);
1324
mt7915_coredump_unregister(dev);
1325
#if defined(__linux__)
1326
mt7915_unregister_thermal(&dev->phy);
1327
#endif
1328
mt76_unregister_device(&dev->mt76);
1329
mt7915_stop_hardware(dev);
1330
1331
mt76_free_device(&dev->mt76);
1332
}
1333
1334