Path: blob/main/sys/contrib/dev/mediatek/mt76/mt7915/mcu.c
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// SPDX-License-Identifier: BSD-3-Clause-Clear1/* Copyright (C) 2020 MediaTek Inc. */23#if defined(__FreeBSD__)4#define LINUXKPI_PARAM_PREFIX mt7915_5#endif67#include <linux/fs.h>8#include "mt7915.h"9#include "mcu.h"10#include "mac.h"11#include "eeprom.h"1213#define fw_name(_dev, name, ...) ({ \14char *_fw; \15switch (mt76_chip(&(_dev)->mt76)) { \16case 0x7915: \17_fw = MT7915_##name; \18break; \19case 0x7981: \20_fw = MT7981_##name; \21break; \22case 0x7986: \23_fw = MT7986_##name##__VA_ARGS__; \24break; \25default: \26_fw = MT7916_##name; \27break; \28} \29_fw; \30})3132#define fw_name_var(_dev, name) (mt7915_check_adie(dev, false) ? \33fw_name(_dev, name) : \34fw_name(_dev, name, _MT7975))3536#define MCU_PATCH_ADDRESS 0x2000003738#define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p)39#define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m)4041static bool sr_scene_detect = true;42module_param(sr_scene_detect, bool, 0644);43MODULE_PARM_DESC(sr_scene_detect, "Enable firmware scene detection algorithm");4445static u846mt7915_mcu_get_sta_nss(u16 mcs_map)47{48u8 nss;4950for (nss = 8; nss > 0; nss--) {51u8 nss_mcs = (mcs_map >> (2 * (nss - 1))) & 3;5253if (nss_mcs != IEEE80211_VHT_MCS_NOT_SUPPORTED)54break;55}5657return nss - 1;58}5960static void61mt7915_mcu_set_sta_he_mcs(struct ieee80211_sta *sta, __le16 *he_mcs,62u16 mcs_map)63{64struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;65struct mt7915_dev *dev = msta->vif->phy->dev;66enum nl80211_band band = msta->vif->phy->mt76->chandef.chan->band;67const u16 *mask = msta->vif->bitrate_mask.control[band].he_mcs;68int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;6970for (nss = 0; nss < max_nss; nss++) {71int mcs;7273switch ((mcs_map >> (2 * nss)) & 0x3) {74case IEEE80211_HE_MCS_SUPPORT_0_11:75mcs = GENMASK(11, 0);76break;77case IEEE80211_HE_MCS_SUPPORT_0_9:78mcs = GENMASK(9, 0);79break;80case IEEE80211_HE_MCS_SUPPORT_0_7:81mcs = GENMASK(7, 0);82break;83default:84mcs = 0;85}8687mcs = mcs ? fls(mcs & mask[nss]) - 1 : -1;8889switch (mcs) {90case 0 ... 7:91mcs = IEEE80211_HE_MCS_SUPPORT_0_7;92break;93case 8 ... 9:94mcs = IEEE80211_HE_MCS_SUPPORT_0_9;95break;96case 10 ... 11:97mcs = IEEE80211_HE_MCS_SUPPORT_0_11;98break;99default:100mcs = IEEE80211_HE_MCS_NOT_SUPPORTED;101break;102}103mcs_map &= ~(0x3 << (nss * 2));104mcs_map |= mcs << (nss * 2);105106/* only support 2ss on 160MHz for mt7915 */107if (is_mt7915(&dev->mt76) && nss > 1 &&108sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)109break;110}111112*he_mcs = cpu_to_le16(mcs_map);113}114115static void116mt7915_mcu_set_sta_vht_mcs(struct ieee80211_sta *sta, __le16 *vht_mcs,117const u16 *mask)118{119struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;120struct mt7915_dev *dev = msta->vif->phy->dev;121u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map);122int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;123u16 mcs;124125for (nss = 0; nss < max_nss; nss++, mcs_map >>= 2) {126switch (mcs_map & 0x3) {127case IEEE80211_VHT_MCS_SUPPORT_0_9:128mcs = GENMASK(9, 0);129break;130case IEEE80211_VHT_MCS_SUPPORT_0_8:131mcs = GENMASK(8, 0);132break;133case IEEE80211_VHT_MCS_SUPPORT_0_7:134mcs = GENMASK(7, 0);135break;136default:137mcs = 0;138}139140vht_mcs[nss] = cpu_to_le16(mcs & mask[nss]);141142/* only support 2ss on 160MHz for mt7915 */143if (is_mt7915(&dev->mt76) && nss > 1 &&144sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)145break;146}147}148149static void150mt7915_mcu_set_sta_ht_mcs(struct ieee80211_sta *sta, u8 *ht_mcs,151const u8 *mask)152{153int nss, max_nss = sta->deflink.rx_nss > 3 ? 4 : sta->deflink.rx_nss;154155for (nss = 0; nss < max_nss; nss++)156ht_mcs[nss] = sta->deflink.ht_cap.mcs.rx_mask[nss] & mask[nss];157}158159static int160mt7915_mcu_parse_response(struct mt76_dev *mdev, int cmd,161struct sk_buff *skb, int seq)162{163struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76);164struct mt76_connac2_mcu_rxd *rxd;165int ret = 0;166167if (!skb) {168dev_err(mdev->dev, "Message %08x (seq %d) timeout\n",169cmd, seq);170171if (!test_and_set_bit(MT76_MCU_RESET, &dev->mphy.state)) {172dev->recovery.restart = true;173wake_up(&dev->mt76.mcu.wait);174queue_work(dev->mt76.wq, &dev->reset_work);175wake_up(&dev->reset_wait);176}177178return -ETIMEDOUT;179}180181rxd = (struct mt76_connac2_mcu_rxd *)skb->data;182if (seq != rxd->seq &&183!(rxd->eid == MCU_CMD_EXT_CID &&184rxd->ext_eid == MCU_EXT_EVENT_WA_TX_STAT))185return -EAGAIN;186187if (cmd == MCU_CMD(PATCH_SEM_CONTROL)) {188skb_pull(skb, sizeof(*rxd) - 4);189ret = *skb->data;190} else if (cmd == MCU_EXT_CMD(THERMAL_CTRL)) {191skb_pull(skb, sizeof(*rxd) + 4);192ret = le32_to_cpu(*(__le32 *)skb->data);193} else {194skb_pull(skb, sizeof(struct mt76_connac2_mcu_rxd));195}196197return ret;198}199200static void201mt7915_mcu_set_timeout(struct mt76_dev *mdev, int cmd)202{203mdev->mcu.timeout = 5 * HZ;204205if ((cmd & __MCU_CMD_FIELD_ID) != MCU_CMD_EXT_CID)206return;207208switch (FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd)) {209case MCU_EXT_CMD_THERMAL_CTRL:210case MCU_EXT_CMD_GET_MIB_INFO:211case MCU_EXT_CMD_PHY_STAT_INFO:212case MCU_EXT_CMD_STA_REC_UPDATE:213case MCU_EXT_CMD_BSS_INFO_UPDATE:214mdev->mcu.timeout = 2 * HZ;215return;216case MCU_EXT_CMD_EFUSE_BUFFER_MODE:217mdev->mcu.timeout = 10 * HZ;218return;219default:220break;221}222}223224static int225mt7915_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,226int cmd, int *wait_seq)227{228struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76);229enum mt76_mcuq_id qid;230231if (cmd == MCU_CMD(FW_SCATTER))232qid = MT_MCUQ_FWDL;233else if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state))234qid = MT_MCUQ_WA;235else236qid = MT_MCUQ_WM;237238mt7915_mcu_set_timeout(mdev, cmd);239240return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[qid], skb, 0);241}242243int mt7915_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3)244{245struct {246__le32 args[3];247} req = {248.args = {249cpu_to_le32(a1),250cpu_to_le32(a2),251cpu_to_le32(a3),252},253};254255return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), false);256}257258static void259mt7915_mcu_csa_finish(void *priv, u8 *mac, struct ieee80211_vif *vif)260{261if (!vif->bss_conf.csa_active || vif->type == NL80211_IFTYPE_STATION)262return;263264ieee80211_csa_finish(vif, 0);265}266267static void268mt7915_mcu_rx_csa_notify(struct mt7915_dev *dev, struct sk_buff *skb)269{270struct mt76_phy *mphy = &dev->mt76.phy;271struct mt7915_mcu_csa_notify *c;272273c = (struct mt7915_mcu_csa_notify *)skb->data;274275if (c->band_idx > MT_BAND1)276return;277278if ((c->band_idx && !dev->phy.mt76->band_idx) &&279dev->mt76.phys[MT_BAND1])280mphy = dev->mt76.phys[MT_BAND1];281282ieee80211_iterate_active_interfaces_atomic(mphy->hw,283IEEE80211_IFACE_ITER_RESUME_ALL,284mt7915_mcu_csa_finish, mphy->hw);285}286287static void288mt7915_mcu_rx_thermal_notify(struct mt7915_dev *dev, struct sk_buff *skb)289{290struct mt76_phy *mphy = &dev->mt76.phy;291struct mt7915_mcu_thermal_notify *t;292struct mt7915_phy *phy;293294t = (struct mt7915_mcu_thermal_notify *)skb->data;295if (t->ctrl.ctrl_id != THERMAL_PROTECT_ENABLE)296return;297298if (t->ctrl.band_idx > MT_BAND1)299return;300301if ((t->ctrl.band_idx && !dev->phy.mt76->band_idx) &&302dev->mt76.phys[MT_BAND1])303mphy = dev->mt76.phys[MT_BAND1];304305phy = mphy->priv;306phy->throttle_state = t->ctrl.duty.duty_cycle;307}308309static void310mt7915_mcu_rx_radar_detected(struct mt7915_dev *dev, struct sk_buff *skb)311{312struct mt76_phy *mphy = &dev->mt76.phy;313struct mt7915_mcu_rdd_report *r;314u32 sku;315316r = (struct mt7915_mcu_rdd_report *)skb->data;317318switch (r->rdd_idx) {319case MT_RDD_IDX_BAND0:320break;321case MT_RDD_IDX_BAND1:322sku = mt7915_check_adie(dev, true);323/* the main phy is bound to band 1 for this sku */324if (is_mt7986(&dev->mt76) &&325(sku == MT7975_ONE_ADIE || sku == MT7976_ONE_ADIE))326break;327mphy = dev->mt76.phys[MT_BAND1];328break;329case MT_RDD_IDX_BACKGROUND:330if (!dev->rdd2_phy)331return;332mphy = dev->rdd2_phy->mt76;333break;334default:335dev_err(dev->mt76.dev, "Unknown RDD idx %d\n", r->rdd_idx);336return;337}338339if (!mphy)340return;341342if (r->rdd_idx == MT_RDD_IDX_BACKGROUND)343cfg80211_background_radar_event(mphy->hw->wiphy,344&dev->rdd2_chandef,345GFP_ATOMIC);346else347ieee80211_radar_detected(mphy->hw, NULL);348dev->hw_pattern++;349}350351static void352mt7915_mcu_rx_log_message(struct mt7915_dev *dev, struct sk_buff *skb)353{354struct mt76_connac2_mcu_rxd *rxd;355int len = skb->len - sizeof(*rxd);356const char *data, *type;357358rxd = (struct mt76_connac2_mcu_rxd *)skb->data;359data = (char *)&rxd[1];360361switch (rxd->s2d_index) {362case 0:363#if !defined(__FreeBSD__) || defined(CONFIG_MT7915_DEBUGFS)364if (mt7915_debugfs_rx_log(dev, data, len))365return;366#endif367368type = "WM";369break;370case 2:371type = "WA";372break;373default:374type = "unknown";375break;376}377378wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, len, data);379}380381static void382mt7915_mcu_cca_finish(void *priv, u8 *mac, struct ieee80211_vif *vif)383{384if (!vif->bss_conf.color_change_active || vif->type == NL80211_IFTYPE_STATION)385return;386387ieee80211_color_change_finish(vif, 0);388}389390static void391mt7915_mcu_rx_bcc_notify(struct mt7915_dev *dev, struct sk_buff *skb)392{393struct mt76_phy *mphy = &dev->mt76.phy;394struct mt7915_mcu_bcc_notify *b;395396b = (struct mt7915_mcu_bcc_notify *)skb->data;397398if (b->band_idx > MT_BAND1)399return;400401if ((b->band_idx && !dev->phy.mt76->band_idx) &&402dev->mt76.phys[MT_BAND1])403mphy = dev->mt76.phys[MT_BAND1];404405ieee80211_iterate_active_interfaces_atomic(mphy->hw,406IEEE80211_IFACE_ITER_RESUME_ALL,407mt7915_mcu_cca_finish, mphy->hw);408}409410static void411mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb)412{413struct mt76_connac2_mcu_rxd *rxd;414415rxd = (struct mt76_connac2_mcu_rxd *)skb->data;416switch (rxd->ext_eid) {417case MCU_EXT_EVENT_THERMAL_PROTECT:418mt7915_mcu_rx_thermal_notify(dev, skb);419break;420case MCU_EXT_EVENT_RDD_REPORT:421mt7915_mcu_rx_radar_detected(dev, skb);422break;423case MCU_EXT_EVENT_CSA_NOTIFY:424mt7915_mcu_rx_csa_notify(dev, skb);425break;426case MCU_EXT_EVENT_FW_LOG_2_HOST:427mt7915_mcu_rx_log_message(dev, skb);428break;429case MCU_EXT_EVENT_BCC_NOTIFY:430mt7915_mcu_rx_bcc_notify(dev, skb);431break;432default:433break;434}435}436437static void438mt7915_mcu_rx_unsolicited_event(struct mt7915_dev *dev, struct sk_buff *skb)439{440struct mt76_connac2_mcu_rxd *rxd;441442rxd = (struct mt76_connac2_mcu_rxd *)skb->data;443switch (rxd->eid) {444case MCU_EVENT_EXT:445mt7915_mcu_rx_ext_event(dev, skb);446break;447default:448break;449}450dev_kfree_skb(skb);451}452453void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb)454{455struct mt76_connac2_mcu_rxd *rxd;456457rxd = (struct mt76_connac2_mcu_rxd *)skb->data;458if ((rxd->ext_eid == MCU_EXT_EVENT_THERMAL_PROTECT ||459rxd->ext_eid == MCU_EXT_EVENT_FW_LOG_2_HOST ||460rxd->ext_eid == MCU_EXT_EVENT_ASSERT_DUMP ||461rxd->ext_eid == MCU_EXT_EVENT_PS_SYNC ||462rxd->ext_eid == MCU_EXT_EVENT_BCC_NOTIFY ||463!rxd->seq) &&464!(rxd->eid == MCU_CMD_EXT_CID &&465rxd->ext_eid == MCU_EXT_EVENT_WA_TX_STAT))466mt7915_mcu_rx_unsolicited_event(dev, skb);467else468mt76_mcu_rx_event(&dev->mt76, skb);469}470471static struct tlv *472mt7915_mcu_add_nested_subtlv(struct sk_buff *skb, int sub_tag, int sub_len,473__le16 *sub_ntlv, __le16 *len)474{475struct tlv *ptlv, tlv = {476.tag = cpu_to_le16(sub_tag),477.len = cpu_to_le16(sub_len),478};479480ptlv = skb_put_zero(skb, sub_len);481memcpy(ptlv, &tlv, sizeof(tlv));482483le16_add_cpu(sub_ntlv, 1);484le16_add_cpu(len, sub_len);485486return ptlv;487}488489/** bss info **/490struct mt7915_he_obss_narrow_bw_ru_data {491bool tolerated;492};493494static void mt7915_check_he_obss_narrow_bw_ru_iter(struct wiphy *wiphy,495struct cfg80211_bss *bss,496void *_data)497{498struct mt7915_he_obss_narrow_bw_ru_data *data = _data;499const struct element *elem;500501rcu_read_lock();502elem = ieee80211_bss_get_elem(bss, WLAN_EID_EXT_CAPABILITY);503504if (!elem || elem->datalen <= 10 ||505!(elem->data[10] &506WLAN_EXT_CAPA10_OBSS_NARROW_BW_RU_TOLERANCE_SUPPORT))507data->tolerated = false;508509rcu_read_unlock();510}511512static bool mt7915_check_he_obss_narrow_bw_ru(struct ieee80211_hw *hw,513struct ieee80211_vif *vif)514{515struct mt7915_he_obss_narrow_bw_ru_data iter_data = {516.tolerated = true,517};518519if (!(vif->bss_conf.chanreq.oper.chan->flags & IEEE80211_CHAN_RADAR))520return false;521522cfg80211_bss_iter(hw->wiphy, &vif->bss_conf.chanreq.oper,523mt7915_check_he_obss_narrow_bw_ru_iter,524&iter_data);525526/*527* If there is at least one AP on radar channel that cannot528* tolerate 26-tone RU UL OFDMA transmissions using HE TB PPDU.529*/530return !iter_data.tolerated;531}532533static void534mt7915_mcu_bss_rfch_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,535struct mt7915_phy *phy)536{537struct cfg80211_chan_def *chandef = &phy->mt76->chandef;538struct bss_info_rf_ch *ch;539struct tlv *tlv;540int freq1 = chandef->center_freq1;541542tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_RF_CH, sizeof(*ch));543544ch = (struct bss_info_rf_ch *)tlv;545ch->pri_ch = chandef->chan->hw_value;546ch->center_ch0 = ieee80211_frequency_to_channel(freq1);547ch->bw = mt76_connac_chan_bw(chandef);548549if (chandef->width == NL80211_CHAN_WIDTH_80P80) {550int freq2 = chandef->center_freq2;551552ch->center_ch1 = ieee80211_frequency_to_channel(freq2);553}554555if (vif->bss_conf.he_support && vif->type == NL80211_IFTYPE_STATION) {556struct mt76_phy *mphy = phy->mt76;557558ch->he_ru26_block =559mt7915_check_he_obss_narrow_bw_ru(mphy->hw, vif);560ch->he_all_disable = false;561} else {562ch->he_all_disable = true;563}564}565566static void567mt7915_mcu_bss_ra_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,568struct mt7915_phy *phy)569{570int max_nss = hweight8(phy->mt76->antenna_mask);571struct bss_info_ra *ra;572struct tlv *tlv;573574tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_RA, sizeof(*ra));575576ra = (struct bss_info_ra *)tlv;577ra->op_mode = vif->type == NL80211_IFTYPE_AP;578ra->adhoc_en = vif->type == NL80211_IFTYPE_ADHOC;579ra->short_preamble = true;580ra->tx_streams = max_nss;581ra->rx_streams = max_nss;582ra->algo = 4;583ra->train_up_rule = 2;584ra->train_up_high_thres = 110;585ra->train_up_rule_rssi = -70;586ra->low_traffic_thres = 2;587ra->phy_cap = cpu_to_le32(0xfdf);588ra->interval = cpu_to_le32(500);589ra->fast_interval = cpu_to_le32(100);590}591592static void593mt7915_mcu_bss_he_tlv(struct sk_buff *skb, struct ieee80211_vif *vif,594struct mt7915_phy *phy)595{596#define DEFAULT_HE_PE_DURATION 4597#define DEFAULT_HE_DURATION_RTS_THRES 1023598const struct ieee80211_sta_he_cap *cap;599struct bss_info_he *he;600struct tlv *tlv;601602cap = mt76_connac_get_he_phy_cap(phy->mt76, vif);603604tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_HE_BASIC, sizeof(*he));605606he = (struct bss_info_he *)tlv;607he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext;608if (!he->he_pe_duration)609he->he_pe_duration = DEFAULT_HE_PE_DURATION;610611he->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th);612if (!he->he_rts_thres)613he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES);614615he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80;616he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160;617he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80;618}619620static void621mt7915_mcu_bss_hw_amsdu_tlv(struct sk_buff *skb)622{623#define TXD_CMP_MAP1 GENMASK(15, 0)624#define TXD_CMP_MAP2 (GENMASK(31, 0) & ~BIT(23))625struct bss_info_hw_amsdu *amsdu;626struct tlv *tlv;627628tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_HW_AMSDU, sizeof(*amsdu));629630amsdu = (struct bss_info_hw_amsdu *)tlv;631amsdu->cmp_bitmap_0 = cpu_to_le32(TXD_CMP_MAP1);632amsdu->cmp_bitmap_1 = cpu_to_le32(TXD_CMP_MAP2);633amsdu->trig_thres = cpu_to_le16(2);634amsdu->enable = true;635}636637static void638mt7915_mcu_bss_bmc_tlv(struct sk_buff *skb, struct mt7915_phy *phy)639{640struct bss_info_bmc_rate *bmc;641struct cfg80211_chan_def *chandef = &phy->mt76->chandef;642enum nl80211_band band = chandef->chan->band;643struct tlv *tlv;644645tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BMC_RATE, sizeof(*bmc));646647bmc = (struct bss_info_bmc_rate *)tlv;648if (band == NL80211_BAND_2GHZ) {649bmc->short_preamble = true;650} else {651bmc->bc_trans = cpu_to_le16(0x2000);652bmc->mc_trans = cpu_to_le16(0x2080);653}654}655656static int657mt7915_mcu_muar_config(struct mt7915_phy *phy, struct ieee80211_vif *vif,658bool bssid, bool enable)659{660struct mt7915_dev *dev = phy->dev;661struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;662u32 idx = mvif->mt76.omac_idx - REPEATER_BSSID_START;663u32 mask = phy->omac_mask >> 32 & ~BIT(idx);664const u8 *addr = vif->addr;665struct {666u8 mode;667u8 force_clear;668u8 clear_bitmap[8];669u8 entry_count;670u8 write;671u8 band;672673u8 index;674u8 bssid;675u8 addr[ETH_ALEN];676} __packed req = {677.mode = !!mask || enable,678.entry_count = 1,679.write = 1,680.band = phy->mt76->band_idx,681.index = idx * 2 + bssid,682};683684if (bssid)685addr = vif->bss_conf.bssid;686687if (enable)688ether_addr_copy(req.addr, addr);689690return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MUAR_UPDATE), &req,691sizeof(req), true);692}693694int mt7915_mcu_add_bss_info(struct mt7915_phy *phy,695struct ieee80211_vif *vif, int enable)696{697struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;698struct mt7915_dev *dev = phy->dev;699struct sk_buff *skb;700701if (mvif->mt76.omac_idx >= REPEATER_BSSID_START) {702mt7915_mcu_muar_config(phy, vif, false, enable);703mt7915_mcu_muar_config(phy, vif, true, enable);704}705706skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, NULL,707MT7915_BSS_UPDATE_MAX_SIZE);708if (IS_ERR(skb))709return PTR_ERR(skb);710711/* bss_omac must be first */712if (enable)713mt76_connac_mcu_bss_omac_tlv(skb, vif);714715mt76_connac_mcu_bss_basic_tlv(skb, vif, NULL, phy->mt76,716mvif->sta.wcid.idx, enable);717718if (vif->type == NL80211_IFTYPE_MONITOR)719goto out;720721if (enable) {722mt7915_mcu_bss_rfch_tlv(skb, vif, phy);723mt7915_mcu_bss_bmc_tlv(skb, phy);724mt7915_mcu_bss_ra_tlv(skb, vif, phy);725mt7915_mcu_bss_hw_amsdu_tlv(skb);726727if (vif->bss_conf.he_support)728mt7915_mcu_bss_he_tlv(skb, vif, phy);729730if (mvif->mt76.omac_idx >= EXT_BSSID_START &&731mvif->mt76.omac_idx < REPEATER_BSSID_START)732mt76_connac_mcu_bss_ext_tlv(skb, &mvif->mt76);733}734out:735return mt76_mcu_skb_send_msg(&dev->mt76, skb,736MCU_EXT_CMD(BSS_INFO_UPDATE), true);737}738739/** starec & wtbl **/740int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev,741struct ieee80211_ampdu_params *params,742bool enable)743{744struct mt7915_sta *msta = (struct mt7915_sta *)params->sta->drv_priv;745struct mt7915_vif *mvif = msta->vif;746int ret;747748mt76_worker_disable(&dev->mt76.tx_worker);749if (enable && !params->amsdu)750msta->wcid.amsdu = false;751ret = mt76_connac_mcu_sta_ba(&dev->mt76, &mvif->mt76, params,752MCU_EXT_CMD(STA_REC_UPDATE),753enable, true);754mt76_worker_enable(&dev->mt76.tx_worker);755756return ret;757}758759int mt7915_mcu_add_rx_ba(struct mt7915_dev *dev,760struct ieee80211_ampdu_params *params,761bool enable)762{763struct mt7915_sta *msta = (struct mt7915_sta *)params->sta->drv_priv;764struct mt7915_vif *mvif = msta->vif;765766return mt76_connac_mcu_sta_ba(&dev->mt76, &mvif->mt76, params,767MCU_EXT_CMD(STA_REC_UPDATE),768enable, false);769}770771static void772mt7915_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta,773struct ieee80211_vif *vif)774{775struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;776struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem;777struct ieee80211_he_mcs_nss_supp mcs_map;778struct sta_rec_he *he;779struct tlv *tlv;780u32 cap = 0;781782if (!sta->deflink.he_cap.has_he)783return;784785tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE, sizeof(*he));786787he = (struct sta_rec_he *)tlv;788789if (elem->mac_cap_info[0] & IEEE80211_HE_MAC_CAP0_HTC_HE)790cap |= STA_REC_HE_CAP_HTC;791792if (elem->mac_cap_info[2] & IEEE80211_HE_MAC_CAP2_BSR)793cap |= STA_REC_HE_CAP_BSR;794795if (elem->mac_cap_info[3] & IEEE80211_HE_MAC_CAP3_OMI_CONTROL)796cap |= STA_REC_HE_CAP_OM;797798if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU)799cap |= STA_REC_HE_CAP_AMSDU_IN_AMPDU;800801if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_BQR)802cap |= STA_REC_HE_CAP_BQR;803804if (elem->phy_cap_info[0] &805(IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G |806IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G))807cap |= STA_REC_HE_CAP_BW20_RU242_SUPPORT;808809if (mvif->cap.he_ldpc &&810(elem->phy_cap_info[1] &811IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD))812cap |= STA_REC_HE_CAP_LDPC;813814if (elem->phy_cap_info[1] &815IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US)816cap |= STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI;817818if (elem->phy_cap_info[2] &819IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US)820cap |= STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI;821822if (elem->phy_cap_info[2] &823IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ)824cap |= STA_REC_HE_CAP_LE_EQ_80M_TX_STBC;825826if (elem->phy_cap_info[2] &827IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ)828cap |= STA_REC_HE_CAP_LE_EQ_80M_RX_STBC;829830if (elem->phy_cap_info[6] &831IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB)832cap |= STA_REC_HE_CAP_TRIG_CQI_FK;833834if (elem->phy_cap_info[6] &835IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE)836cap |= STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE;837838if (elem->phy_cap_info[7] &839IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI)840cap |= STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI;841842if (elem->phy_cap_info[7] &843IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ)844cap |= STA_REC_HE_CAP_GT_80M_TX_STBC;845846if (elem->phy_cap_info[7] &847IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ)848cap |= STA_REC_HE_CAP_GT_80M_RX_STBC;849850if (elem->phy_cap_info[8] &851IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI)852cap |= STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI;853854if (elem->phy_cap_info[8] &855IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI)856cap |= STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI;857858if (elem->phy_cap_info[9] &859IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU)860cap |= STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242;861862if (elem->phy_cap_info[9] &863IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU)864cap |= STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242;865866he->he_cap = cpu_to_le32(cap);867868mcs_map = sta->deflink.he_cap.he_mcs_nss_supp;869switch (sta->deflink.bandwidth) {870case IEEE80211_STA_RX_BW_160:871if (elem->phy_cap_info[0] &872IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G)873mt7915_mcu_set_sta_he_mcs(sta,874&he->max_nss_mcs[CMD_HE_MCS_BW8080],875le16_to_cpu(mcs_map.rx_mcs_80p80));876877mt7915_mcu_set_sta_he_mcs(sta,878&he->max_nss_mcs[CMD_HE_MCS_BW160],879le16_to_cpu(mcs_map.rx_mcs_160));880fallthrough;881default:882mt7915_mcu_set_sta_he_mcs(sta,883&he->max_nss_mcs[CMD_HE_MCS_BW80],884le16_to_cpu(mcs_map.rx_mcs_80));885break;886}887888he->t_frame_dur =889HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]);890he->max_ampdu_exp =891HE_MAC(CAP3_MAX_AMPDU_LEN_EXP_MASK, elem->mac_cap_info[3]);892893he->bw_set =894HE_PHY(CAP0_CHANNEL_WIDTH_SET_MASK, elem->phy_cap_info[0]);895he->device_class =896HE_PHY(CAP1_DEVICE_CLASS_A, elem->phy_cap_info[1]);897he->punc_pream_rx =898HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]);899900he->dcm_tx_mode =901HE_PHY(CAP3_DCM_MAX_CONST_TX_MASK, elem->phy_cap_info[3]);902he->dcm_tx_max_nss =903HE_PHY(CAP3_DCM_MAX_TX_NSS_2, elem->phy_cap_info[3]);904he->dcm_rx_mode =905HE_PHY(CAP3_DCM_MAX_CONST_RX_MASK, elem->phy_cap_info[3]);906he->dcm_rx_max_nss =907HE_PHY(CAP3_DCM_MAX_RX_NSS_2, elem->phy_cap_info[3]);908he->dcm_rx_max_nss =909HE_PHY(CAP8_DCM_MAX_RU_MASK, elem->phy_cap_info[8]);910911he->pkt_ext = 2;912}913914static void915mt7915_mcu_sta_muru_tlv(struct mt7915_dev *dev, struct sk_buff *skb,916struct ieee80211_sta *sta, struct ieee80211_vif *vif)917{918struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;919struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem;920struct sta_rec_muru *muru;921struct tlv *tlv;922923if (vif->type != NL80211_IFTYPE_STATION &&924vif->type != NL80211_IFTYPE_AP)925return;926927tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru));928929muru = (struct sta_rec_muru *)tlv;930931muru->cfg.mimo_dl_en = mvif->cap.he_mu_ebfer ||932mvif->cap.vht_mu_ebfer ||933mvif->cap.vht_mu_ebfee;934if (!is_mt7915(&dev->mt76))935muru->cfg.mimo_ul_en = true;936muru->cfg.ofdma_dl_en = true;937938if (sta->deflink.vht_cap.vht_supported)939muru->mimo_dl.vht_mu_bfee =940!!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE);941942if (!sta->deflink.he_cap.has_he)943return;944945muru->mimo_dl.partial_bw_dl_mimo =946HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]);947948muru->mimo_ul.full_ul_mimo =949HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]);950muru->mimo_ul.partial_ul_mimo =951HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]);952953muru->ofdma_dl.punc_pream_rx =954HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]);955muru->ofdma_dl.he_20m_in_40m_2g =956HE_PHY(CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G, elem->phy_cap_info[8]);957muru->ofdma_dl.he_20m_in_160m =958HE_PHY(CAP8_20MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);959muru->ofdma_dl.he_80m_in_160m =960HE_PHY(CAP8_80MHZ_IN_160MHZ_HE_PPDU, elem->phy_cap_info[8]);961962muru->ofdma_ul.t_frame_dur =963HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]);964muru->ofdma_ul.mu_cascading =965HE_MAC(CAP2_MU_CASCADING, elem->mac_cap_info[2]);966muru->ofdma_ul.uo_ra =967HE_MAC(CAP3_OFDMA_RA, elem->mac_cap_info[3]);968muru->ofdma_ul.rx_ctrl_frame_to_mbss =969HE_MAC(CAP3_RX_CTRL_FRAME_TO_MULTIBSS, elem->mac_cap_info[3]);970}971972static void973mt7915_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)974{975struct sta_rec_ht *ht;976struct tlv *tlv;977978if (!sta->deflink.ht_cap.ht_supported)979return;980981tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht));982983ht = (struct sta_rec_ht *)tlv;984ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap);985}986987static void988mt7915_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta)989{990struct sta_rec_vht *vht;991struct tlv *tlv;992993if (!sta->deflink.vht_cap.vht_supported)994return;995996tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht));997998vht = (struct sta_rec_vht *)tlv;999vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap);1000vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map;1001vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map;1002}10031004static void1005mt7915_mcu_sta_amsdu_tlv(struct mt7915_dev *dev, struct sk_buff *skb,1006struct ieee80211_vif *vif, struct ieee80211_sta *sta)1007{1008struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;1009struct sta_rec_amsdu *amsdu;1010struct tlv *tlv;10111012if (vif->type != NL80211_IFTYPE_STATION &&1013vif->type != NL80211_IFTYPE_AP)1014return;10151016if (!sta->deflink.agg.max_amsdu_len)1017return;10181019tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu));1020amsdu = (struct sta_rec_amsdu *)tlv;1021amsdu->max_amsdu_num = 8;1022amsdu->amsdu_en = true;1023msta->wcid.amsdu = true;10241025switch (sta->deflink.agg.max_amsdu_len) {1026case IEEE80211_MAX_MPDU_LEN_VHT_11454:1027if (!is_mt7915(&dev->mt76)) {1028amsdu->max_mpdu_size =1029IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;1030return;1031}1032fallthrough;1033case IEEE80211_MAX_MPDU_LEN_HT_7935:1034case IEEE80211_MAX_MPDU_LEN_VHT_7991:1035amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;1036return;1037default:1038amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;1039return;1040}1041}10421043static int1044mt7915_mcu_sta_wtbl_tlv(struct mt7915_dev *dev, struct sk_buff *skb,1045struct ieee80211_vif *vif, struct ieee80211_sta *sta)1046{1047struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;1048struct mt7915_sta *msta;1049struct wtbl_req_hdr *wtbl_hdr;1050struct mt76_wcid *wcid;1051struct tlv *tlv;10521053msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta;1054wcid = sta ? &msta->wcid : NULL;10551056tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, sizeof(struct tlv));1057wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid,1058WTBL_RESET_AND_SET, tlv,1059&skb);1060if (IS_ERR(wtbl_hdr))1061return PTR_ERR(wtbl_hdr);10621063mt76_connac_mcu_wtbl_generic_tlv(&dev->mt76, skb, vif, sta, tlv,1064wtbl_hdr);1065mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, tlv, wtbl_hdr);1066if (sta)1067mt76_connac_mcu_wtbl_ht_tlv(&dev->mt76, skb, sta, tlv,1068wtbl_hdr, mvif->cap.ht_ldpc,1069mvif->cap.vht_ldpc);10701071return 0;1072}10731074static inline bool1075mt7915_is_ebf_supported(struct mt7915_phy *phy, struct ieee80211_vif *vif,1076struct ieee80211_sta *sta, bool bfee)1077{1078struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;1079int sts = hweight16(phy->mt76->chainmask);10801081if (vif->type != NL80211_IFTYPE_STATION &&1082vif->type != NL80211_IFTYPE_AP)1083return false;10841085if (!bfee && sts < 2)1086return false;10871088if (sta->deflink.he_cap.has_he) {1089struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem;10901091if (bfee)1092return mvif->cap.he_su_ebfee &&1093HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]);1094else1095return mvif->cap.he_su_ebfer &&1096HE_PHY(CAP4_SU_BEAMFORMEE, pe->phy_cap_info[4]);1097}10981099if (sta->deflink.vht_cap.vht_supported) {1100u32 cap = sta->deflink.vht_cap.cap;11011102if (bfee)1103return mvif->cap.vht_su_ebfee &&1104(cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE);1105else1106return mvif->cap.vht_su_ebfer &&1107(cap & IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE);1108}11091110return false;1111}11121113static void1114mt7915_mcu_sta_sounding_rate(struct sta_rec_bf *bf)1115{1116bf->sounding_phy = MT_PHY_TYPE_OFDM;1117bf->ndp_rate = 0; /* mcs0 */1118bf->ndpa_rate = MT7915_CFEND_RATE_DEFAULT; /* ofdm 24m */1119bf->rept_poll_rate = MT7915_CFEND_RATE_DEFAULT; /* ofdm 24m */1120}11211122static void1123mt7915_mcu_sta_bfer_ht(struct ieee80211_sta *sta, struct mt7915_phy *phy,1124struct sta_rec_bf *bf)1125{1126struct ieee80211_mcs_info *mcs = &sta->deflink.ht_cap.mcs;1127u8 n = 0;11281129bf->tx_mode = MT_PHY_TYPE_HT;11301131if ((mcs->tx_params & IEEE80211_HT_MCS_TX_RX_DIFF) &&1132(mcs->tx_params & IEEE80211_HT_MCS_TX_DEFINED))1133n = FIELD_GET(IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK,1134mcs->tx_params);1135else if (mcs->rx_mask[3])1136n = 3;1137else if (mcs->rx_mask[2])1138n = 2;1139else if (mcs->rx_mask[1])1140n = 1;11411142bf->nrow = hweight8(phy->mt76->chainmask) - 1;1143bf->ncol = min_t(u8, bf->nrow, n);1144bf->ibf_ncol = n;1145}11461147static void1148mt7915_mcu_sta_bfer_vht(struct ieee80211_sta *sta, struct mt7915_phy *phy,1149struct sta_rec_bf *bf, bool explicit)1150{1151struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap;1152struct ieee80211_sta_vht_cap *vc = &phy->mt76->sband_5g.sband.vht_cap;1153u16 mcs_map = le16_to_cpu(pc->vht_mcs.rx_mcs_map);1154u8 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map);1155u8 tx_ant = hweight8(phy->mt76->chainmask) - 1;11561157bf->tx_mode = MT_PHY_TYPE_VHT;11581159if (explicit) {1160u8 sts, snd_dim;11611162mt7915_mcu_sta_sounding_rate(bf);11631164sts = FIELD_GET(IEEE80211_VHT_CAP_BEAMFORMEE_STS_MASK,1165pc->cap);1166snd_dim = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,1167vc->cap);1168bf->nrow = min_t(u8, min_t(u8, snd_dim, sts), tx_ant);1169bf->ncol = min_t(u8, nss_mcs, bf->nrow);1170bf->ibf_ncol = bf->ncol;11711172if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)1173bf->nrow = 1;1174} else {1175bf->nrow = tx_ant;1176bf->ncol = min_t(u8, nss_mcs, bf->nrow);1177bf->ibf_ncol = nss_mcs;11781179if (sta->deflink.bandwidth == IEEE80211_STA_RX_BW_160)1180bf->ibf_nrow = 1;1181}1182}11831184static void1185mt7915_mcu_sta_bfer_he(struct ieee80211_sta *sta, struct ieee80211_vif *vif,1186struct mt7915_phy *phy, struct sta_rec_bf *bf)1187{1188struct ieee80211_sta_he_cap *pc = &sta->deflink.he_cap;1189struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem;1190const struct ieee80211_sta_he_cap *vc =1191mt76_connac_get_he_phy_cap(phy->mt76, vif);1192const struct ieee80211_he_cap_elem *ve = &vc->he_cap_elem;1193u16 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80);1194u8 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map);1195u8 snd_dim, sts;11961197bf->tx_mode = MT_PHY_TYPE_HE_SU;11981199mt7915_mcu_sta_sounding_rate(bf);12001201bf->trigger_su = HE_PHY(CAP6_TRIG_SU_BEAMFORMING_FB,1202pe->phy_cap_info[6]);1203bf->trigger_mu = HE_PHY(CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB,1204pe->phy_cap_info[6]);1205snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,1206ve->phy_cap_info[5]);1207sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_MASK,1208pe->phy_cap_info[4]);1209bf->nrow = min_t(u8, snd_dim, sts);1210bf->ncol = min_t(u8, nss_mcs, bf->nrow);1211bf->ibf_ncol = bf->ncol;12121213if (sta->deflink.bandwidth != IEEE80211_STA_RX_BW_160)1214return;12151216/* go over for 160MHz and 80p80 */1217if (pe->phy_cap_info[0] &1218IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G) {1219mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_160);1220nss_mcs = mt7915_mcu_get_sta_nss(mcs_map);12211222bf->ncol_gt_bw80 = nss_mcs;1223}12241225if (pe->phy_cap_info[0] &1226IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) {1227mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80p80);1228nss_mcs = mt7915_mcu_get_sta_nss(mcs_map);12291230if (bf->ncol_gt_bw80)1231bf->ncol_gt_bw80 = min_t(u8, bf->ncol_gt_bw80, nss_mcs);1232else1233bf->ncol_gt_bw80 = nss_mcs;1234}12351236snd_dim = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK,1237ve->phy_cap_info[5]);1238sts = HE_PHY(CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_MASK,1239pe->phy_cap_info[4]);12401241bf->nrow_gt_bw80 = min_t(int, snd_dim, sts);1242}12431244static void1245mt7915_mcu_sta_bfer_tlv(struct mt7915_dev *dev, struct sk_buff *skb,1246struct ieee80211_vif *vif, struct ieee80211_sta *sta)1247{1248struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;1249struct mt7915_phy *phy = mvif->phy;1250int tx_ant = hweight8(phy->mt76->chainmask) - 1;1251struct sta_rec_bf *bf;1252struct tlv *tlv;1253static const u8 matrix[4][4] = {1254{0, 0, 0, 0},1255{1, 1, 0, 0}, /* 2x1, 2x2, 2x3, 2x4 */1256{2, 4, 4, 0}, /* 3x1, 3x2, 3x3, 3x4 */1257{3, 5, 6, 0} /* 4x1, 4x2, 4x3, 4x4 */1258};1259bool ebf;12601261if (!(sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he))1262return;12631264ebf = mt7915_is_ebf_supported(phy, vif, sta, false);1265if (!ebf && !dev->ibf)1266return;12671268tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf));1269bf = (struct sta_rec_bf *)tlv;12701271/* he: eBF only, in accordance with spec1272* vht: support eBF and iBF1273* ht: iBF only, since mac80211 lacks of eBF support1274*/1275if (sta->deflink.he_cap.has_he && ebf)1276mt7915_mcu_sta_bfer_he(sta, vif, phy, bf);1277else if (sta->deflink.vht_cap.vht_supported)1278mt7915_mcu_sta_bfer_vht(sta, phy, bf, ebf);1279else if (sta->deflink.ht_cap.ht_supported)1280mt7915_mcu_sta_bfer_ht(sta, phy, bf);1281else1282return;12831284bf->bf_cap = ebf ? ebf : dev->ibf << 1;1285bf->bw = sta->deflink.bandwidth;1286bf->ibf_dbw = sta->deflink.bandwidth;1287bf->ibf_nrow = tx_ant;12881289if (!ebf && sta->deflink.bandwidth <= IEEE80211_STA_RX_BW_40 && !bf->ncol)1290bf->ibf_timeout = 0x48;1291else1292bf->ibf_timeout = 0x18;12931294if (ebf && bf->nrow != tx_ant)1295bf->mem_20m = matrix[tx_ant][bf->ncol];1296else1297bf->mem_20m = matrix[bf->nrow][bf->ncol];12981299switch (sta->deflink.bandwidth) {1300case IEEE80211_STA_RX_BW_160:1301case IEEE80211_STA_RX_BW_80:1302bf->mem_total = bf->mem_20m * 2;1303break;1304case IEEE80211_STA_RX_BW_40:1305bf->mem_total = bf->mem_20m;1306break;1307case IEEE80211_STA_RX_BW_20:1308default:1309break;1310}1311}13121313static void1314mt7915_mcu_sta_bfee_tlv(struct mt7915_dev *dev, struct sk_buff *skb,1315struct ieee80211_vif *vif, struct ieee80211_sta *sta)1316{1317struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;1318struct mt7915_phy *phy = mvif->phy;1319int tx_ant = hweight8(phy->mt76->chainmask) - 1;1320struct sta_rec_bfee *bfee;1321struct tlv *tlv;1322u8 nrow = 0;13231324if (!(sta->deflink.vht_cap.vht_supported || sta->deflink.he_cap.has_he))1325return;13261327if (!mt7915_is_ebf_supported(phy, vif, sta, true))1328return;13291330tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee));1331bfee = (struct sta_rec_bfee *)tlv;13321333if (sta->deflink.he_cap.has_he) {1334struct ieee80211_he_cap_elem *pe = &sta->deflink.he_cap.he_cap_elem;13351336nrow = HE_PHY(CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK,1337pe->phy_cap_info[5]);1338} else if (sta->deflink.vht_cap.vht_supported) {1339struct ieee80211_sta_vht_cap *pc = &sta->deflink.vht_cap;13401341nrow = FIELD_GET(IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK,1342pc->cap);1343}13441345/* reply with identity matrix to avoid 2x2 BF negative gain */1346bfee->fb_identity_matrix = (nrow == 1 && tx_ant == 2);1347}13481349static enum mcu_mmps_mode1350mt7915_mcu_get_mmps_mode(enum ieee80211_smps_mode smps)1351{1352switch (smps) {1353case IEEE80211_SMPS_OFF:1354return MCU_MMPS_DISABLE;1355case IEEE80211_SMPS_STATIC:1356return MCU_MMPS_STATIC;1357case IEEE80211_SMPS_DYNAMIC:1358return MCU_MMPS_DYNAMIC;1359default:1360return MCU_MMPS_DISABLE;1361}1362}13631364int mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev *dev,1365struct ieee80211_vif *vif,1366struct ieee80211_sta *sta,1367void *data, u32 field)1368{1369struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;1370struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;1371struct sta_phy *phy = data;1372struct sta_rec_ra_fixed *ra;1373struct sk_buff *skb;1374struct tlv *tlv;13751376skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,1377&msta->wcid);1378if (IS_ERR(skb))1379return PTR_ERR(skb);13801381tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA_UPDATE, sizeof(*ra));1382ra = (struct sta_rec_ra_fixed *)tlv;13831384switch (field) {1385case RATE_PARAM_AUTO:1386break;1387case RATE_PARAM_FIXED:1388case RATE_PARAM_FIXED_MCS:1389case RATE_PARAM_FIXED_GI:1390case RATE_PARAM_FIXED_HE_LTF:1391if (phy)1392ra->phy = *phy;1393break;1394case RATE_PARAM_MMPS_UPDATE:1395ra->mmps_mode = mt7915_mcu_get_mmps_mode(sta->deflink.smps_mode);1396break;1397case RATE_PARAM_SPE_UPDATE:1398ra->spe_idx = *(u8 *)data;1399break;1400default:1401break;1402}1403ra->field = cpu_to_le32(field);14041405return mt76_mcu_skb_send_msg(&dev->mt76, skb,1406MCU_EXT_CMD(STA_REC_UPDATE), true);1407}14081409int mt7915_mcu_add_smps(struct mt7915_dev *dev, struct ieee80211_vif *vif,1410struct ieee80211_sta *sta)1411{1412struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;1413struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;1414struct wtbl_req_hdr *wtbl_hdr;1415struct tlv *sta_wtbl;1416struct sk_buff *skb;1417int ret;14181419skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,1420&msta->wcid);1421if (IS_ERR(skb))1422return PTR_ERR(skb);14231424sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL,1425sizeof(struct tlv));1426wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid,1427WTBL_SET, sta_wtbl, &skb);1428if (IS_ERR(wtbl_hdr))1429return PTR_ERR(wtbl_hdr);14301431mt76_connac_mcu_wtbl_smps_tlv(skb, sta, sta_wtbl, wtbl_hdr);14321433ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,1434MCU_EXT_CMD(STA_REC_UPDATE), true);1435if (ret)1436return ret;14371438return mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, NULL,1439RATE_PARAM_MMPS_UPDATE);1440}14411442static int1443mt7915_mcu_set_spe_idx(struct mt7915_dev *dev, struct ieee80211_vif *vif,1444struct ieee80211_sta *sta)1445{1446struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;1447struct mt76_phy *mphy = mvif->phy->mt76;1448u8 spe_idx = mt76_connac_spe_idx(mphy->antenna_mask);14491450return mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &spe_idx,1451RATE_PARAM_SPE_UPDATE);1452}14531454static int1455mt7915_mcu_add_rate_ctrl_fixed(struct mt7915_dev *dev,1456struct ieee80211_vif *vif,1457struct ieee80211_sta *sta)1458{1459struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;1460struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef;1461struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask;1462enum nl80211_band band = chandef->chan->band;1463struct sta_phy phy = {};1464int ret, nrates = 0;14651466#define __sta_phy_bitrate_mask_check(_mcs, _gi, _ht, _he) \1467do { \1468u8 i, gi = mask->control[band]._gi; \1469gi = (_he) ? gi : gi == NL80211_TXRATE_FORCE_SGI; \1470for (i = 0; i <= sta->deflink.bandwidth; i++) { \1471phy.sgi |= gi << (i << (_he)); \1472phy.he_ltf |= mask->control[band].he_ltf << (i << (_he));\1473} \1474for (i = 0; i < ARRAY_SIZE(mask->control[band]._mcs); i++) { \1475if (!mask->control[band]._mcs[i]) \1476continue; \1477nrates += hweight16(mask->control[band]._mcs[i]); \1478phy.mcs = ffs(mask->control[band]._mcs[i]) - 1; \1479if (_ht) \1480phy.mcs += 8 * i; \1481} \1482} while (0)14831484if (sta->deflink.he_cap.has_he) {1485__sta_phy_bitrate_mask_check(he_mcs, he_gi, 0, 1);1486} else if (sta->deflink.vht_cap.vht_supported) {1487__sta_phy_bitrate_mask_check(vht_mcs, gi, 0, 0);1488} else if (sta->deflink.ht_cap.ht_supported) {1489__sta_phy_bitrate_mask_check(ht_mcs, gi, 1, 0);1490} else {1491nrates = hweight32(mask->control[band].legacy);1492phy.mcs = ffs(mask->control[band].legacy) - 1;1493}1494#undef __sta_phy_bitrate_mask_check14951496/* fall back to auto rate control */1497if (mask->control[band].gi == NL80211_TXRATE_DEFAULT_GI &&1498mask->control[band].he_gi == GENMASK(7, 0) &&1499mask->control[band].he_ltf == GENMASK(7, 0) &&1500nrates != 1)1501return 0;15021503/* fixed single rate */1504if (nrates == 1) {1505ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy,1506RATE_PARAM_FIXED_MCS);1507if (ret)1508return ret;1509}15101511/* fixed GI */1512if (mask->control[band].gi != NL80211_TXRATE_DEFAULT_GI ||1513mask->control[band].he_gi != GENMASK(7, 0)) {1514struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;1515u32 addr;15161517/* firmware updates only TXCMD but doesn't take WTBL into1518* account, so driver should update here to reflect the1519* actual txrate hardware sends out.1520*/1521addr = mt7915_mac_wtbl_lmac_addr(dev, msta->wcid.idx, 7);1522if (sta->deflink.he_cap.has_he)1523mt76_rmw_field(dev, addr, GENMASK(31, 24), phy.sgi);1524else1525mt76_rmw_field(dev, addr, GENMASK(15, 12), phy.sgi);15261527ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy,1528RATE_PARAM_FIXED_GI);1529if (ret)1530return ret;1531}15321533/* fixed HE_LTF */1534if (mask->control[band].he_ltf != GENMASK(7, 0)) {1535ret = mt7915_mcu_set_fixed_rate_ctrl(dev, vif, sta, &phy,1536RATE_PARAM_FIXED_HE_LTF);1537if (ret)1538return ret;1539}15401541return mt7915_mcu_set_spe_idx(dev, vif, sta);1542}15431544static void1545mt7915_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7915_dev *dev,1546struct ieee80211_vif *vif, struct ieee80211_sta *sta)1547{1548struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;1549struct mt76_phy *mphy = mvif->phy->mt76;1550struct cfg80211_chan_def *chandef = &mphy->chandef;1551struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask;1552enum nl80211_band band = chandef->chan->band;1553struct sta_rec_ra *ra;1554struct tlv *tlv;1555u32 supp_rate = sta->deflink.supp_rates[band];1556u32 cap = sta->wme ? STA_CAP_WMM : 0;15571558tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra));1559ra = (struct sta_rec_ra *)tlv;15601561ra->valid = true;1562ra->auto_rate = true;1563ra->phy_mode = mt76_connac_get_phy_mode(mphy, vif, band, &sta->deflink);1564ra->channel = chandef->chan->hw_value;1565ra->bw = sta->deflink.bandwidth;1566ra->phy.bw = sta->deflink.bandwidth;1567ra->mmps_mode = mt7915_mcu_get_mmps_mode(sta->deflink.smps_mode);15681569if (supp_rate) {1570supp_rate &= mask->control[band].legacy;1571ra->rate_len = hweight32(supp_rate);15721573if (band == NL80211_BAND_2GHZ) {1574ra->supp_mode = MODE_CCK;1575ra->supp_cck_rate = supp_rate & GENMASK(3, 0);15761577if (ra->rate_len > 4) {1578ra->supp_mode |= MODE_OFDM;1579ra->supp_ofdm_rate = supp_rate >> 4;1580}1581} else {1582ra->supp_mode = MODE_OFDM;1583ra->supp_ofdm_rate = supp_rate;1584}1585}15861587if (sta->deflink.ht_cap.ht_supported) {1588ra->supp_mode |= MODE_HT;1589ra->af = sta->deflink.ht_cap.ampdu_factor;1590ra->ht_gf = !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD);15911592cap |= STA_CAP_HT;1593if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20)1594cap |= STA_CAP_SGI_20;1595if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40)1596cap |= STA_CAP_SGI_40;1597if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_TX_STBC)1598cap |= STA_CAP_TX_STBC;1599if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)1600cap |= STA_CAP_RX_STBC;1601if (mvif->cap.ht_ldpc &&1602(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING))1603cap |= STA_CAP_LDPC;16041605mt7915_mcu_set_sta_ht_mcs(sta, ra->ht_mcs,1606mask->control[band].ht_mcs);1607ra->supp_ht_mcs = *(__le32 *)ra->ht_mcs;1608}16091610if (sta->deflink.vht_cap.vht_supported) {1611u8 af;16121613ra->supp_mode |= MODE_VHT;1614af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK,1615sta->deflink.vht_cap.cap);1616ra->af = max_t(u8, ra->af, af);16171618cap |= STA_CAP_VHT;1619if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80)1620cap |= STA_CAP_VHT_SGI_80;1621if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160)1622cap |= STA_CAP_VHT_SGI_160;1623if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_TXSTBC)1624cap |= STA_CAP_VHT_TX_STBC;1625if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_1)1626cap |= STA_CAP_VHT_RX_STBC;1627if (mvif->cap.vht_ldpc &&1628(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC))1629cap |= STA_CAP_VHT_LDPC;16301631mt7915_mcu_set_sta_vht_mcs(sta, ra->supp_vht_mcs,1632mask->control[band].vht_mcs);1633}16341635if (sta->deflink.he_cap.has_he) {1636ra->supp_mode |= MODE_HE;1637cap |= STA_CAP_HE;16381639if (sta->deflink.he_6ghz_capa.capa)1640ra->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa,1641IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP);1642}16431644ra->sta_cap = cpu_to_le32(cap);1645}16461647int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif,1648struct ieee80211_sta *sta, bool changed)1649{1650struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;1651struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;1652struct sk_buff *skb;1653int ret;16541655skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,1656&msta->wcid);1657if (IS_ERR(skb))1658return PTR_ERR(skb);16591660/* firmware rc algorithm refers to sta_rec_he for HE control.1661* once dev->rc_work changes the settings driver should also1662* update sta_rec_he here.1663*/1664if (changed)1665mt7915_mcu_sta_he_tlv(skb, sta, vif);16661667/* sta_rec_ra accommodates BW, NSS and only MCS range format1668* i.e 0-{7,8,9} for VHT.1669*/1670mt7915_mcu_sta_rate_ctrl_tlv(skb, dev, vif, sta);16711672ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,1673MCU_EXT_CMD(STA_REC_UPDATE), true);1674if (ret)1675return ret;16761677/* sta_rec_ra_fixed accommodates single rate, (HE)GI and HE_LTE,1678* and updates as peer fixed rate parameters, which overrides1679* sta_rec_ra and firmware rate control algorithm.1680*/1681return mt7915_mcu_add_rate_ctrl_fixed(dev, vif, sta);1682}16831684static int1685mt7915_mcu_add_group(struct mt7915_dev *dev, struct ieee80211_vif *vif,1686struct ieee80211_sta *sta)1687{1688#define MT_STA_BSS_GROUP 11689struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;1690struct mt7915_sta *msta;1691struct {1692__le32 action;1693u8 wlan_idx_lo;1694u8 status;1695u8 wlan_idx_hi;1696u8 rsv0[5];1697__le32 val;1698u8 rsv1[8];1699} __packed req = {1700.action = cpu_to_le32(MT_STA_BSS_GROUP),1701.val = cpu_to_le32(mvif->mt76.idx % 16),1702};17031704msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta;1705req.wlan_idx_lo = to_wcid_lo(msta->wcid.idx);1706req.wlan_idx_hi = to_wcid_hi(msta->wcid.idx);17071708return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_DRR_CTRL), &req,1709sizeof(req), true);1710}17111712int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif,1713struct ieee80211_sta *sta, int conn_state, bool newly)1714{1715struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;1716struct ieee80211_link_sta *link_sta;1717struct mt7915_sta *msta;1718struct sk_buff *skb;1719int ret;17201721msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta;1722link_sta = sta ? &sta->deflink : NULL;17231724skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,1725&msta->wcid);1726if (IS_ERR(skb))1727return PTR_ERR(skb);17281729/* starec basic */1730mt76_connac_mcu_sta_basic_tlv(&dev->mt76, skb, &vif->bss_conf, link_sta,1731conn_state, newly);1732/* tag order is in accordance with firmware dependency. */1733if (sta && conn_state != CONN_STATE_DISCONNECT) {1734/* starec bfer */1735mt7915_mcu_sta_bfer_tlv(dev, skb, vif, sta);1736/* starec ht */1737mt7915_mcu_sta_ht_tlv(skb, sta);1738/* starec vht */1739mt7915_mcu_sta_vht_tlv(skb, sta);1740/* starec uapsd */1741mt76_connac_mcu_sta_uapsd(skb, vif, sta);1742}17431744if (newly || conn_state != CONN_STATE_DISCONNECT) {1745ret = mt7915_mcu_sta_wtbl_tlv(dev, skb, vif, sta);1746if (ret) {1747dev_kfree_skb(skb);1748return ret;1749}1750}17511752if (conn_state == CONN_STATE_DISCONNECT)1753goto out;17541755if (sta) {1756/* starec amsdu */1757mt7915_mcu_sta_amsdu_tlv(dev, skb, vif, sta);1758/* starec he */1759mt7915_mcu_sta_he_tlv(skb, sta, vif);1760/* starec muru */1761mt7915_mcu_sta_muru_tlv(dev, skb, sta, vif);1762/* starec bfee */1763mt7915_mcu_sta_bfee_tlv(dev, skb, vif, sta);1764}17651766ret = mt7915_mcu_add_group(dev, vif, sta);1767if (ret) {1768dev_kfree_skb(skb);1769return ret;1770}1771out:1772ret = mt76_connac_mcu_sta_wed_update(&dev->mt76, skb);1773if (ret)1774return ret;17751776return mt76_mcu_skb_send_msg(&dev->mt76, skb,1777MCU_EXT_CMD(STA_REC_UPDATE), true);1778}17791780int mt7915_mcu_wed_enable_rx_stats(struct mt7915_dev *dev)1781{1782#ifdef CONFIG_NET_MEDIATEK_SOC_WED1783struct mtk_wed_device *wed = &dev->mt76.mmio.wed;1784struct {1785__le32 args[2];1786} req = {1787.args[0] = cpu_to_le32(1),1788.args[1] = cpu_to_le32(6),1789};17901791return mtk_wed_device_update_msg(wed, MTK_WED_WO_CMD_RXCNT_CTRL,1792&req, sizeof(req));1793#else1794return 0;1795#endif1796}17971798int mt7915_mcu_add_dev_info(struct mt7915_phy *phy,1799struct ieee80211_vif *vif, bool enable)1800{1801struct mt7915_dev *dev = phy->dev;1802struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;1803struct {1804struct req_hdr {1805u8 omac_idx;1806u8 band_idx;1807__le16 tlv_num;1808u8 is_tlv_append;1809u8 rsv[3];1810} __packed hdr;1811struct req_tlv {1812__le16 tag;1813__le16 len;1814u8 active;1815u8 band_idx;1816u8 omac_addr[ETH_ALEN];1817} __packed tlv;1818} data = {1819.hdr = {1820.omac_idx = mvif->mt76.omac_idx,1821.band_idx = mvif->mt76.band_idx,1822.tlv_num = cpu_to_le16(1),1823.is_tlv_append = 1,1824},1825.tlv = {1826.tag = cpu_to_le16(DEV_INFO_ACTIVE),1827.len = cpu_to_le16(sizeof(struct req_tlv)),1828.active = enable,1829.band_idx = mvif->mt76.band_idx,1830},1831};18321833if (mvif->mt76.omac_idx >= REPEATER_BSSID_START)1834return mt7915_mcu_muar_config(phy, vif, false, enable);18351836memcpy(data.tlv.omac_addr, vif->addr, ETH_ALEN);1837return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(DEV_INFO_UPDATE),1838&data, sizeof(data), true);1839}18401841static void1842mt7915_mcu_beacon_cntdwn(struct ieee80211_vif *vif, struct sk_buff *rskb,1843struct sk_buff *skb, struct bss_info_bcn *bcn,1844struct ieee80211_mutable_offsets *offs)1845{1846struct bss_info_bcn_cntdwn *info;1847struct tlv *tlv;1848int sub_tag;18491850if (!offs->cntdwn_counter_offs[0])1851return;18521853sub_tag = vif->bss_conf.csa_active ? BSS_INFO_BCN_CSA : BSS_INFO_BCN_BCC;1854tlv = mt7915_mcu_add_nested_subtlv(rskb, sub_tag, sizeof(*info),1855&bcn->sub_ntlv, &bcn->len);1856info = (struct bss_info_bcn_cntdwn *)tlv;1857info->cnt = skb->data[offs->cntdwn_counter_offs[0]];1858}18591860static void1861mt7915_mcu_beacon_mbss(struct sk_buff *rskb, struct sk_buff *skb,1862struct ieee80211_vif *vif, struct bss_info_bcn *bcn,1863struct ieee80211_mutable_offsets *offs)1864{1865struct bss_info_bcn_mbss *mbss;1866const struct element *elem;1867struct tlv *tlv;18681869if (!vif->bss_conf.bssid_indicator)1870return;18711872tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_MBSSID,1873sizeof(*mbss), &bcn->sub_ntlv,1874&bcn->len);18751876mbss = (struct bss_info_bcn_mbss *)tlv;1877mbss->offset[0] = cpu_to_le16(offs->tim_offset);1878mbss->bitmap = cpu_to_le32(1);18791880for_each_element_id(elem, WLAN_EID_MULTIPLE_BSSID,1881&skb->data[offs->mbssid_off],1882skb->len - offs->mbssid_off) {1883const struct element *sub_elem;18841885if (elem->datalen < 2)1886continue;18871888for_each_element(sub_elem, elem->data + 1, elem->datalen - 1) {1889const struct ieee80211_bssid_index *idx;1890const u8 *idx_ie;18911892if (sub_elem->id || sub_elem->datalen < 4)1893continue; /* not a valid BSS profile */18941895/* Find WLAN_EID_MULTI_BSSID_IDX1896* in the merged nontransmitted profile1897*/1898idx_ie = cfg80211_find_ie(WLAN_EID_MULTI_BSSID_IDX,1899sub_elem->data,1900sub_elem->datalen);1901if (!idx_ie || idx_ie[1] < sizeof(*idx))1902continue;19031904#if defined(__linux__)1905idx = (void *)(idx_ie + 2);1906#elif defined(__FreeBSD__)1907idx = (const void *)(idx_ie + 2);1908#endif1909if (!idx->bssid_index || idx->bssid_index > 31)1910continue;19111912mbss->offset[idx->bssid_index] =1913cpu_to_le16(idx_ie - skb->data);1914mbss->bitmap |= cpu_to_le32(BIT(idx->bssid_index));1915}1916}1917}19181919static void1920mt7915_mcu_beacon_cont(struct mt7915_dev *dev, struct ieee80211_vif *vif,1921struct sk_buff *rskb, struct sk_buff *skb,1922struct bss_info_bcn *bcn,1923struct ieee80211_mutable_offsets *offs)1924{1925struct mt76_wcid *wcid = &dev->mt76.global_wcid;1926struct bss_info_bcn_cont *cont;1927struct tlv *tlv;1928u8 *buf;1929int len = sizeof(*cont) + MT_TXD_SIZE + skb->len;19301931len = (len & 0x3) ? ((len | 0x3) + 1) : len;1932tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_CONTENT,1933len, &bcn->sub_ntlv, &bcn->len);19341935cont = (struct bss_info_bcn_cont *)tlv;1936cont->pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len);1937cont->tim_ofs = cpu_to_le16(offs->tim_offset);19381939if (offs->cntdwn_counter_offs[0]) {1940u16 offset = offs->cntdwn_counter_offs[0];19411942if (vif->bss_conf.csa_active)1943cont->csa_ofs = cpu_to_le16(offset - 4);1944if (vif->bss_conf.color_change_active)1945cont->bcc_ofs = cpu_to_le16(offset - 3);1946}19471948buf = (u8 *)tlv + sizeof(*cont);1949mt7915_mac_write_txwi(&dev->mt76, (__le32 *)buf, skb, wcid, 0, NULL,19500, BSS_CHANGED_BEACON);1951memcpy(buf + MT_TXD_SIZE, skb->data, skb->len);1952}19531954int1955mt7915_mcu_add_inband_discov(struct mt7915_dev *dev, struct ieee80211_vif *vif,1956u32 changed)1957{1958#define OFFLOAD_TX_MODE_SU BIT(0)1959#define OFFLOAD_TX_MODE_MU BIT(1)1960struct ieee80211_hw *hw = mt76_hw(dev);1961struct mt7915_phy *phy = mt7915_hw_phy(hw);1962struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;1963struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef;1964enum nl80211_band band = chandef->chan->band;1965struct mt76_wcid *wcid = &dev->mt76.global_wcid;1966struct bss_info_bcn *bcn;1967struct bss_info_inband_discovery *discov;1968struct ieee80211_tx_info *info;1969struct sk_buff *rskb, *skb = NULL;1970struct tlv *tlv, *sub_tlv;1971bool ext_phy = phy != &dev->phy;1972u8 *buf, interval;1973int len;19741975if (vif->bss_conf.nontransmitted)1976return 0;19771978rskb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, NULL,1979MT7915_MAX_BSS_OFFLOAD_SIZE);1980if (IS_ERR(rskb))1981return PTR_ERR(rskb);19821983tlv = mt76_connac_mcu_add_tlv(rskb, BSS_INFO_OFFLOAD, sizeof(*bcn));1984bcn = (struct bss_info_bcn *)tlv;1985bcn->enable = true;19861987if (changed & BSS_CHANGED_FILS_DISCOVERY) {1988interval = vif->bss_conf.fils_discovery.max_interval;1989skb = ieee80211_get_fils_discovery_tmpl(hw, vif);1990} else if (changed & BSS_CHANGED_UNSOL_BCAST_PROBE_RESP &&1991vif->bss_conf.unsol_bcast_probe_resp_interval) {1992interval = vif->bss_conf.unsol_bcast_probe_resp_interval;1993skb = ieee80211_get_unsol_bcast_probe_resp_tmpl(hw, vif);1994}19951996if (!skb) {1997dev_kfree_skb(rskb);1998return -EINVAL;1999}20002001info = IEEE80211_SKB_CB(skb);2002info->control.vif = vif;2003info->band = band;2004info->hw_queue |= FIELD_PREP(MT_TX_HW_QUEUE_PHY, ext_phy);20052006len = sizeof(*discov) + MT_TXD_SIZE + skb->len;2007len = (len & 0x3) ? ((len | 0x3) + 1) : len;20082009if (skb->len > MT7915_MAX_BEACON_SIZE) {2010dev_err(dev->mt76.dev, "inband discovery size limit exceed\n");2011dev_kfree_skb(rskb);2012dev_kfree_skb(skb);2013return -EINVAL;2014}20152016sub_tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_DISCOV,2017len, &bcn->sub_ntlv, &bcn->len);2018discov = (struct bss_info_inband_discovery *)sub_tlv;2019discov->tx_mode = OFFLOAD_TX_MODE_SU;2020/* 0: UNSOL PROBE RESP, 1: FILS DISCOV */2021discov->tx_type = !!(changed & BSS_CHANGED_FILS_DISCOVERY);2022discov->tx_interval = interval;2023discov->prob_rsp_len = cpu_to_le16(MT_TXD_SIZE + skb->len);2024discov->enable = !!interval;20252026buf = (u8 *)sub_tlv + sizeof(*discov);20272028mt7915_mac_write_txwi(&dev->mt76, (__le32 *)buf, skb, wcid, 0, NULL,20290, changed);2030memcpy(buf + MT_TXD_SIZE, skb->data, skb->len);20312032dev_kfree_skb(skb);20332034return mt76_mcu_skb_send_msg(&phy->dev->mt76, rskb,2035MCU_EXT_CMD(BSS_INFO_UPDATE), true);2036}20372038int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif,2039int en, u32 changed)2040{2041struct mt7915_dev *dev = mt7915_hw_dev(hw);2042struct mt7915_phy *phy = mt7915_hw_phy(hw);2043struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;2044struct ieee80211_mutable_offsets offs;2045struct ieee80211_tx_info *info;2046struct sk_buff *skb, *rskb;2047struct tlv *tlv;2048struct bss_info_bcn *bcn;2049int len = MT7915_MAX_BSS_OFFLOAD_SIZE;2050bool ext_phy = phy != &dev->phy;20512052if (vif->bss_conf.nontransmitted)2053return 0;20542055rskb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,2056NULL, len);2057if (IS_ERR(rskb))2058return PTR_ERR(rskb);20592060tlv = mt76_connac_mcu_add_tlv(rskb, BSS_INFO_OFFLOAD, sizeof(*bcn));2061bcn = (struct bss_info_bcn *)tlv;2062bcn->enable = en;20632064if (!en)2065goto out;20662067skb = ieee80211_beacon_get_template(hw, vif, &offs, 0);2068if (!skb) {2069dev_kfree_skb(rskb);2070return -EINVAL;2071}20722073if (skb->len > MT7915_MAX_BEACON_SIZE) {2074dev_err(dev->mt76.dev, "Bcn size limit exceed\n");2075dev_kfree_skb(rskb);2076dev_kfree_skb(skb);2077return -EINVAL;2078}20792080info = IEEE80211_SKB_CB(skb);2081info->hw_queue = FIELD_PREP(MT_TX_HW_QUEUE_PHY, ext_phy);20822083mt7915_mcu_beacon_cntdwn(vif, rskb, skb, bcn, &offs);2084mt7915_mcu_beacon_mbss(rskb, skb, vif, bcn, &offs);2085mt7915_mcu_beacon_cont(dev, vif, rskb, skb, bcn, &offs);2086dev_kfree_skb(skb);20872088out:2089return mt76_mcu_skb_send_msg(&phy->dev->mt76, rskb,2090MCU_EXT_CMD(BSS_INFO_UPDATE), true);2091}20922093static int mt7915_driver_own(struct mt7915_dev *dev, u8 band)2094{2095mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(band), MT_TOP_LPCR_HOST_DRV_OWN);2096if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND(band),2097MT_TOP_LPCR_HOST_FW_OWN_STAT, 0, 500)) {2098dev_err(dev->mt76.dev, "Timeout for driver own\n");2099return -EIO;2100}21012102/* clear irq when the driver own success */2103mt76_wr(dev, MT_TOP_LPCR_HOST_BAND_IRQ_STAT(band),2104MT_TOP_LPCR_HOST_BAND_STAT);21052106return 0;2107}21082109static int2110mt7915_firmware_state(struct mt7915_dev *dev, bool wa)2111{2112u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE,2113wa ? FW_STATE_RDY : FW_STATE_FW_DOWNLOAD);21142115if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE,2116state, 1000)) {2117dev_err(dev->mt76.dev, "Timeout for initializing firmware\n");2118return -EIO;2119}2120return 0;2121}21222123static int mt7915_load_firmware(struct mt7915_dev *dev)2124{2125int ret;21262127/* Release Semaphore if taken by previous failed attempt */2128ret = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, false);2129if (ret != PATCH_REL_SEM_SUCCESS) {2130dev_err(dev->mt76.dev, "Could not release semaphore\n");2131/* Continue anyways */2132}21332134/* Always restart MCU firmware */2135mt76_connac_mcu_restart(&dev->mt76);21362137/* Check if MCU is ready */2138ret = mt7915_firmware_state(dev, false);2139if (ret) {2140dev_err(dev->mt76.dev, "Firmware did not enter download state\n");2141return ret;2142}21432144ret = mt76_connac2_load_patch(&dev->mt76, fw_name_var(dev, ROM_PATCH));2145if (ret)2146return ret;21472148ret = mt76_connac2_load_ram(&dev->mt76, fw_name_var(dev, FIRMWARE_WM),2149fw_name(dev, FIRMWARE_WA));2150if (ret)2151return ret;21522153ret = mt7915_firmware_state(dev, true);2154if (ret)2155return ret;21562157mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false);21582159dev_dbg(dev->mt76.dev, "Firmware init done\n");21602161return 0;2162}21632164int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl)2165{2166struct {2167u8 ctrl_val;2168u8 pad[3];2169} data = {2170.ctrl_val = ctrl2171};21722173if (type == MCU_FW_LOG_WA)2174return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(FW_LOG_2_HOST),2175&data, sizeof(data), true);21762177return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(FW_LOG_2_HOST), &data,2178sizeof(data), true);2179}21802181int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level)2182{2183struct {2184u8 ver;2185u8 pad;2186__le16 len;2187u8 level;2188u8 rsv[3];2189__le32 module_idx;2190} data = {2191.module_idx = cpu_to_le32(module),2192.level = level,2193};21942195return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(FW_DBG_CTRL), &data,2196sizeof(data), false);2197}21982199int mt7915_mcu_muru_debug_set(struct mt7915_dev *dev, bool enabled)2200{2201struct {2202__le32 cmd;2203u8 enable;2204} data = {2205.cmd = cpu_to_le32(MURU_SET_TXC_TX_STATS_EN),2206.enable = enabled,2207};22082209return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &data,2210sizeof(data), false);2211}22122213int mt7915_mcu_muru_debug_get(struct mt7915_phy *phy)2214{2215struct mt7915_dev *dev = phy->dev;2216struct sk_buff *skb;2217struct mt7915_mcu_muru_stats *mu_stats;2218int ret;22192220struct {2221__le32 cmd;2222u8 band_idx;2223} req = {2224.cmd = cpu_to_le32(MURU_GET_TXC_TX_STATS),2225.band_idx = phy->mt76->band_idx,2226};22272228ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL),2229&req, sizeof(req), true, &skb);2230if (ret)2231return ret;22322233mu_stats = (struct mt7915_mcu_muru_stats *)(skb->data);22342235/* accumulate stats, these are clear-on-read */2236#define __dl_u32(s) phy->mib.dl_##s += le32_to_cpu(mu_stats->dl.s)2237#define __ul_u32(s) phy->mib.ul_##s += le32_to_cpu(mu_stats->ul.s)2238__dl_u32(cck_cnt);2239__dl_u32(ofdm_cnt);2240__dl_u32(htmix_cnt);2241__dl_u32(htgf_cnt);2242__dl_u32(vht_su_cnt);2243__dl_u32(vht_2mu_cnt);2244__dl_u32(vht_3mu_cnt);2245__dl_u32(vht_4mu_cnt);2246__dl_u32(he_su_cnt);2247__dl_u32(he_2ru_cnt);2248__dl_u32(he_2mu_cnt);2249__dl_u32(he_3ru_cnt);2250__dl_u32(he_3mu_cnt);2251__dl_u32(he_4ru_cnt);2252__dl_u32(he_4mu_cnt);2253__dl_u32(he_5to8ru_cnt);2254__dl_u32(he_9to16ru_cnt);2255__dl_u32(he_gtr16ru_cnt);22562257__ul_u32(hetrig_su_cnt);2258__ul_u32(hetrig_2ru_cnt);2259__ul_u32(hetrig_3ru_cnt);2260__ul_u32(hetrig_4ru_cnt);2261__ul_u32(hetrig_5to8ru_cnt);2262__ul_u32(hetrig_9to16ru_cnt);2263__ul_u32(hetrig_gtr16ru_cnt);2264__ul_u32(hetrig_2mu_cnt);2265__ul_u32(hetrig_3mu_cnt);2266__ul_u32(hetrig_4mu_cnt);2267#undef __dl_u322268#undef __ul_u3222692270dev_kfree_skb(skb);22712272return 0;2273}22742275static int mt7915_mcu_set_mwds(struct mt7915_dev *dev, bool enabled)2276{2277struct {2278u8 enable;2279u8 _rsv[3];2280} __packed req = {2281.enable = enabled2282};22832284return mt76_mcu_send_msg(&dev->mt76, MCU_WA_EXT_CMD(MWDS_SUPPORT), &req,2285sizeof(req), false);2286}22872288int mt7915_mcu_set_muru_ctrl(struct mt7915_dev *dev, u32 cmd, u32 val)2289{2290struct {2291__le32 cmd;2292u8 val[4];2293} __packed req = {2294.cmd = cpu_to_le32(cmd),2295};22962297put_unaligned_le32(val, req.val);22982299return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), &req,2300sizeof(req), false);2301}23022303static int2304mt7915_mcu_init_rx_airtime(struct mt7915_dev *dev)2305{2306#define RX_AIRTIME_FEATURE_CTRL 12307#define RX_AIRTIME_BITWISE_CTRL 22308#define RX_AIRTIME_CLEAR_EN 12309struct {2310__le16 field;2311__le16 sub_field;2312__le32 set_status;2313__le32 get_status;2314u8 _rsv[12];23152316bool airtime_en;2317bool mibtime_en;2318bool earlyend_en;2319u8 _rsv1[9];23202321bool airtime_clear;2322bool mibtime_clear;2323u8 _rsv2[98];2324} __packed req = {2325.field = cpu_to_le16(RX_AIRTIME_BITWISE_CTRL),2326.sub_field = cpu_to_le16(RX_AIRTIME_CLEAR_EN),2327.airtime_clear = true,2328};2329int ret;23302331ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_AIRTIME_CTRL), &req,2332sizeof(req), true);2333if (ret)2334return ret;23352336req.field = cpu_to_le16(RX_AIRTIME_FEATURE_CTRL);2337req.sub_field = cpu_to_le16(RX_AIRTIME_CLEAR_EN);2338req.airtime_en = true;23392340return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_AIRTIME_CTRL), &req,2341sizeof(req), true);2342}23432344static int mt7915_red_set_watermark(struct mt7915_dev *dev)2345{2346#define RED_GLOBAL_TOKEN_WATERMARK 22347struct {2348__le32 args[3];2349u8 cmd;2350u8 version;2351u8 __rsv1[4];2352__le16 len;2353__le16 high_mark;2354__le16 low_mark;2355u8 __rsv2[12];2356} __packed req = {2357.args[0] = cpu_to_le32(MCU_WA_PARAM_RED_SETTING),2358.cmd = RED_GLOBAL_TOKEN_WATERMARK,2359.len = cpu_to_le16(sizeof(req) - sizeof(req.args)),2360.high_mark = cpu_to_le16(MT7915_HW_TOKEN_SIZE - 256),2361.low_mark = cpu_to_le16(MT7915_HW_TOKEN_SIZE - 256 - 1536),2362};23632364return mt76_mcu_send_msg(&dev->mt76, MCU_WA_PARAM_CMD(SET), &req,2365sizeof(req), false);2366}23672368static int mt7915_mcu_set_red(struct mt7915_dev *dev, bool enabled)2369{2370#define RED_DISABLE 02371#define RED_BY_WA_ENABLE 22372int ret;2373u32 red_type = enabled ? RED_BY_WA_ENABLE : RED_DISABLE;2374__le32 req = cpu_to_le32(red_type);23752376if (enabled) {2377ret = mt7915_red_set_watermark(dev);2378if (ret < 0)2379return ret;2380}23812382ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RED_ENABLE), &req,2383sizeof(req), false);2384if (ret < 0)2385return ret;23862387return mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(SET),2388MCU_WA_PARAM_RED, enabled, 0);2389}23902391int mt7915_mcu_init_firmware(struct mt7915_dev *dev)2392{2393int ret;23942395/* force firmware operation mode into normal state,2396* which should be set before firmware download stage.2397*/2398mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE);23992400ret = mt7915_driver_own(dev, 0);2401if (ret)2402return ret;2403/* set driver own for band1 when two hif exist */2404if (dev->hif2) {2405ret = mt7915_driver_own(dev, 1);2406if (ret)2407return ret;2408}24092410ret = mt7915_load_firmware(dev);2411if (ret)2412return ret;24132414set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);2415ret = mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0);2416if (ret)2417return ret;24182419ret = mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0);2420if (ret)2421return ret;24222423mt76_connac_mcu_del_wtbl_all(&dev->mt76);24242425if ((mtk_wed_device_active(&dev->mt76.mmio.wed) &&2426is_mt7915(&dev->mt76)) ||2427!mtk_wed_get_rx_capa(&dev->mt76.mmio.wed))2428mt7915_mcu_wa_cmd(dev, MCU_WA_PARAM_CMD(CAPABILITY), 0, 0, 0);24292430ret = mt7915_mcu_set_mwds(dev, 1);2431if (ret)2432return ret;24332434ret = mt7915_mcu_set_muru_ctrl(dev, MURU_SET_PLATFORM_TYPE,2435MURU_PLATFORM_TYPE_PERF_LEVEL_2);2436if (ret)2437return ret;24382439ret = mt7915_mcu_init_rx_airtime(dev);2440if (ret)2441return ret;24422443return mt7915_mcu_set_red(dev, mtk_wed_device_active(&dev->mt76.mmio.wed));2444}24452446int mt7915_mcu_init(struct mt7915_dev *dev)2447{2448static const struct mt76_mcu_ops mt7915_mcu_ops = {2449.max_retry = 1,2450.headroom = sizeof(struct mt76_connac2_mcu_txd),2451.mcu_skb_prepare_msg = mt76_connac2_mcu_fill_message,2452.mcu_skb_send_msg = mt7915_mcu_send_message,2453.mcu_parse_response = mt7915_mcu_parse_response,2454};24552456dev->mt76.mcu_ops = &mt7915_mcu_ops;24572458return mt7915_mcu_init_firmware(dev);2459}24602461void mt7915_mcu_exit(struct mt7915_dev *dev)2462{2463mt76_connac_mcu_restart(&dev->mt76);2464if (mt7915_firmware_state(dev, false)) {2465dev_err(dev->mt76.dev, "Failed to exit mcu\n");2466goto out;2467}24682469mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(0), MT_TOP_LPCR_HOST_FW_OWN);2470if (dev->hif2)2471mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(1),2472MT_TOP_LPCR_HOST_FW_OWN);2473out:2474skb_queue_purge(&dev->mt76.mcu.res_q);2475}24762477static int2478mt7915_mcu_set_rx_hdr_trans_blacklist(struct mt7915_dev *dev, int band)2479{2480struct {2481u8 operation;2482u8 count;2483u8 _rsv[2];2484u8 index;2485u8 enable;2486__le16 etype;2487} req = {2488.operation = 1,2489.count = 1,2490.enable = 1,2491.etype = cpu_to_le16(ETH_P_PAE),2492};24932494return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_HDR_TRANS),2495&req, sizeof(req), false);2496}24972498int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band,2499bool enable, bool hdr_trans)2500{2501struct {2502u8 operation;2503u8 enable;2504u8 check_bssid;2505u8 insert_vlan;2506u8 remove_vlan;2507u8 tid;2508u8 mode;2509u8 rsv;2510} __packed req_trans = {2511.enable = hdr_trans,2512};2513struct {2514u8 enable;2515u8 band;2516u8 rsv[2];2517} __packed req_mac = {2518.enable = enable,2519.band = band,2520};2521int ret;25222523ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RX_HDR_TRANS),2524&req_trans, sizeof(req_trans), false);2525if (ret)2526return ret;25272528if (hdr_trans)2529mt7915_mcu_set_rx_hdr_trans_blacklist(dev, band);25302531return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(MAC_INIT_CTRL),2532&req_mac, sizeof(req_mac), true);2533}25342535int mt7915_mcu_update_edca(struct mt7915_dev *dev, void *param)2536{2537struct mt7915_mcu_tx *req = (struct mt7915_mcu_tx *)param;2538u8 num = req->total;2539size_t len = sizeof(*req) -2540(IEEE80211_NUM_ACS - num) * sizeof(struct edca);25412542return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(EDCA_UPDATE), req,2543len, true);2544}25452546int mt7915_mcu_set_tx(struct mt7915_dev *dev, struct ieee80211_vif *vif)2547{2548#define TX_CMD_MODE 12549struct mt7915_mcu_tx req = {2550.valid = true,2551.mode = TX_CMD_MODE,2552.total = IEEE80211_NUM_ACS,2553};2554struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;2555int ac;25562557for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {2558struct ieee80211_tx_queue_params *q = &mvif->queue_params[ac];2559struct edca *e = &req.edca[ac];25602561e->set = WMM_PARAM_SET;2562e->queue = ac + mvif->mt76.wmm_idx * MT76_CONNAC_MAX_WMM_SETS;2563e->aifs = q->aifs;2564e->txop = cpu_to_le16(q->txop);25652566if (q->cw_min)2567e->cw_min = fls(q->cw_min);2568else2569e->cw_min = 5;25702571if (q->cw_max)2572e->cw_max = cpu_to_le16(fls(q->cw_max));2573else2574e->cw_max = cpu_to_le16(10);2575}25762577return mt7915_mcu_update_edca(dev, &req);2578}25792580int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val)2581{2582struct {2583__le32 tag;2584__le16 min_lpn;2585u8 rsv[2];2586} __packed req = {2587.tag = cpu_to_le32(0x1),2588.min_lpn = cpu_to_le16(val),2589};25902591return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req,2592sizeof(req), true);2593}25942595int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev,2596const struct mt7915_dfs_pulse *pulse)2597{2598struct {2599__le32 tag;26002601__le32 max_width; /* us */2602__le32 max_pwr; /* dbm */2603__le32 min_pwr; /* dbm */2604__le32 min_stgr_pri; /* us */2605__le32 max_stgr_pri; /* us */2606__le32 min_cr_pri; /* us */2607__le32 max_cr_pri; /* us */2608} __packed req = {2609.tag = cpu_to_le32(0x3),26102611#define __req_field(field) .field = cpu_to_le32(pulse->field)2612__req_field(max_width),2613__req_field(max_pwr),2614__req_field(min_pwr),2615__req_field(min_stgr_pri),2616__req_field(max_stgr_pri),2617__req_field(min_cr_pri),2618__req_field(max_cr_pri),2619#undef __req_field2620};26212622return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req,2623sizeof(req), true);2624}26252626int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index,2627const struct mt7915_dfs_pattern *pattern)2628{2629struct {2630__le32 tag;2631__le16 radar_type;26322633u8 enb;2634u8 stgr;2635u8 min_crpn;2636u8 max_crpn;2637u8 min_crpr;2638u8 min_pw;2639__le32 min_pri;2640__le32 max_pri;2641u8 max_pw;2642u8 min_crbn;2643u8 max_crbn;2644u8 min_stgpn;2645u8 max_stgpn;2646u8 min_stgpr;2647u8 rsv[2];2648__le32 min_stgpr_diff;2649} __packed req = {2650.tag = cpu_to_le32(0x2),2651.radar_type = cpu_to_le16(index),26522653#define __req_field_u8(field) .field = pattern->field2654#define __req_field_u32(field) .field = cpu_to_le32(pattern->field)2655__req_field_u8(enb),2656__req_field_u8(stgr),2657__req_field_u8(min_crpn),2658__req_field_u8(max_crpn),2659__req_field_u8(min_crpr),2660__req_field_u8(min_pw),2661__req_field_u32(min_pri),2662__req_field_u32(max_pri),2663__req_field_u8(max_pw),2664__req_field_u8(min_crbn),2665__req_field_u8(max_crbn),2666__req_field_u8(min_stgpn),2667__req_field_u8(max_stgpn),2668__req_field_u8(min_stgpr),2669__req_field_u32(min_stgpr_diff),2670#undef __req_field_u82671#undef __req_field_u322672};26732674return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_TH), &req,2675sizeof(req), true);2676}26772678static int2679mt7915_mcu_background_chain_ctrl(struct mt7915_phy *phy,2680struct cfg80211_chan_def *chandef,2681int cmd)2682{2683struct mt7915_dev *dev = phy->dev;2684struct mt76_phy *mphy = phy->mt76;2685struct ieee80211_channel *chan = mphy->chandef.chan;2686int freq = mphy->chandef.center_freq1;2687struct mt7915_mcu_background_chain_ctrl req = {2688.monitor_scan_type = 2, /* simple rx */2689};26902691if (!chandef && cmd != CH_SWITCH_BACKGROUND_SCAN_STOP)2692return -EINVAL;26932694if (!cfg80211_chandef_valid(&mphy->chandef))2695return -EINVAL;26962697switch (cmd) {2698case CH_SWITCH_BACKGROUND_SCAN_START: {2699req.chan = chan->hw_value;2700req.central_chan = ieee80211_frequency_to_channel(freq);2701req.bw = mt76_connac_chan_bw(&mphy->chandef);2702req.monitor_chan = chandef->chan->hw_value;2703req.monitor_central_chan =2704ieee80211_frequency_to_channel(chandef->center_freq1);2705req.monitor_bw = mt76_connac_chan_bw(chandef);2706req.band_idx = phy->mt76->band_idx;2707req.scan_mode = 1;2708break;2709}2710case CH_SWITCH_BACKGROUND_SCAN_RUNNING:2711req.monitor_chan = chandef->chan->hw_value;2712req.monitor_central_chan =2713ieee80211_frequency_to_channel(chandef->center_freq1);2714req.band_idx = phy->mt76->band_idx;2715req.scan_mode = 2;2716break;2717case CH_SWITCH_BACKGROUND_SCAN_STOP:2718req.chan = chan->hw_value;2719req.central_chan = ieee80211_frequency_to_channel(freq);2720req.bw = mt76_connac_chan_bw(&mphy->chandef);2721req.tx_stream = hweight8(mphy->antenna_mask);2722req.rx_stream = mphy->antenna_mask;2723break;2724default:2725return -EINVAL;2726}2727req.band = chandef ? chandef->chan->band == NL80211_BAND_5GHZ : 1;27282729return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(OFFCH_SCAN_CTRL),2730&req, sizeof(req), false);2731}27322733int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy,2734struct cfg80211_chan_def *chandef)2735{2736struct mt7915_dev *dev = phy->dev;2737int err, region, rdd_idx;27382739rdd_idx = mt7915_get_rdd_idx(phy, true);2740if (rdd_idx < 0)2741return -EINVAL;27422743if (!chandef) { /* disable offchain */2744err = mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_STOP, rdd_idx, 0, 0);2745if (err)2746return err;27472748return mt7915_mcu_background_chain_ctrl(phy, NULL,2749CH_SWITCH_BACKGROUND_SCAN_STOP);2750}27512752err = mt7915_mcu_background_chain_ctrl(phy, chandef,2753CH_SWITCH_BACKGROUND_SCAN_START);2754if (err)2755return err;27562757switch (dev->mt76.region) {2758case NL80211_DFS_ETSI:2759region = 0;2760break;2761case NL80211_DFS_JP:2762region = 2;2763break;2764case NL80211_DFS_FCC:2765default:2766region = 1;2767break;2768}27692770return mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_START, rdd_idx, 0, region);2771}27722773int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd)2774{2775static const u8 ch_band[] = {2776[NL80211_BAND_2GHZ] = 0,2777[NL80211_BAND_5GHZ] = 1,2778[NL80211_BAND_6GHZ] = 2,2779};2780struct mt7915_dev *dev = phy->dev;2781struct cfg80211_chan_def *chandef = &phy->mt76->chandef;2782int freq1 = chandef->center_freq1;2783u8 band = phy->mt76->band_idx;2784struct {2785u8 control_ch;2786u8 center_ch;2787u8 bw;2788u8 tx_path_num;2789u8 rx_path; /* mask or num */2790u8 switch_reason;2791u8 band_idx;2792u8 center_ch2; /* for 80+80 only */2793__le16 cac_case;2794u8 channel_band;2795u8 rsv0;2796__le32 outband_freq;2797u8 txpower_drop;2798u8 ap_bw;2799u8 ap_center_ch;2800u8 rsv1[57];2801} __packed req = {2802.control_ch = chandef->chan->hw_value,2803.center_ch = ieee80211_frequency_to_channel(freq1),2804.bw = mt76_connac_chan_bw(chandef),2805.tx_path_num = hweight16(phy->mt76->chainmask),2806.rx_path = phy->mt76->chainmask >> (dev->chainshift * band),2807.band_idx = band,2808.channel_band = ch_band[chandef->chan->band],2809};28102811#ifdef CONFIG_NL80211_TESTMODE2812if (phy->mt76->test.tx_antenna_mask &&2813mt76_testmode_enabled(phy->mt76)) {2814req.tx_path_num = fls(phy->mt76->test.tx_antenna_mask);2815req.rx_path = phy->mt76->test.tx_antenna_mask;2816}2817#endif28182819if (mt76_connac_spe_idx(phy->mt76->antenna_mask))2820req.tx_path_num = fls(phy->mt76->antenna_mask);28212822if (phy->mt76->hw->conf.flags & IEEE80211_CONF_MONITOR)2823req.switch_reason = CH_SWITCH_NORMAL;2824else if (phy->mt76->offchannel ||2825phy->mt76->hw->conf.flags & IEEE80211_CONF_IDLE)2826req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD;2827else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef,2828NL80211_IFTYPE_AP))2829req.switch_reason = CH_SWITCH_DFS;2830else2831req.switch_reason = CH_SWITCH_NORMAL;28322833if (cmd == MCU_EXT_CMD(CHANNEL_SWITCH))2834req.rx_path = hweight8(req.rx_path);28352836if (chandef->width == NL80211_CHAN_WIDTH_80P80) {2837int freq2 = chandef->center_freq2;28382839req.center_ch2 = ieee80211_frequency_to_channel(freq2);2840}28412842return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), true);2843}28442845static int mt7915_mcu_set_eeprom_flash(struct mt7915_dev *dev)2846{2847#define MAX_PAGE_IDX_MASK GENMASK(7, 5)2848#define PAGE_IDX_MASK GENMASK(4, 2)2849#define PER_PAGE_SIZE 0x4002850struct mt7915_mcu_eeprom req = { .buffer_mode = EE_MODE_BUFFER };2851u16 eeprom_size = mt7915_eeprom_size(dev);2852u8 total = DIV_ROUND_UP(eeprom_size, PER_PAGE_SIZE);2853u8 *eep = (u8 *)dev->mt76.eeprom.data;2854int eep_len;2855int i;28562857for (i = 0; i < total; i++, eep += eep_len) {2858struct sk_buff *skb;2859int ret;28602861if (i == total - 1 && !!(eeprom_size % PER_PAGE_SIZE))2862eep_len = eeprom_size % PER_PAGE_SIZE;2863else2864eep_len = PER_PAGE_SIZE;28652866skb = mt76_mcu_msg_alloc(&dev->mt76, NULL,2867sizeof(req) + eep_len);2868if (!skb)2869return -ENOMEM;28702871req.format = FIELD_PREP(MAX_PAGE_IDX_MASK, total - 1) |2872FIELD_PREP(PAGE_IDX_MASK, i) | EE_FORMAT_WHOLE;2873req.len = cpu_to_le16(eep_len);28742875skb_put_data(skb, &req, sizeof(req));2876skb_put_data(skb, eep, eep_len);28772878ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,2879MCU_EXT_CMD(EFUSE_BUFFER_MODE), true);2880if (ret)2881return ret;2882}28832884return 0;2885}28862887int mt7915_mcu_set_eeprom(struct mt7915_dev *dev)2888{2889struct mt7915_mcu_eeprom req = {2890.buffer_mode = EE_MODE_EFUSE,2891.format = EE_FORMAT_WHOLE,2892};28932894if (dev->flash_mode)2895return mt7915_mcu_set_eeprom_flash(dev);28962897return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(EFUSE_BUFFER_MODE),2898&req, sizeof(req), true);2899}29002901int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset, u8 *read_buf)2902{2903struct mt7915_mcu_eeprom_info req = {2904.addr = cpu_to_le32(round_down(offset,2905MT7915_EEPROM_BLOCK_SIZE)),2906};2907struct mt7915_mcu_eeprom_info *res;2908struct sk_buff *skb;2909u8 *buf = read_buf;2910int ret;29112912ret = mt76_mcu_send_and_get_msg(&dev->mt76,2913MCU_EXT_QUERY(EFUSE_ACCESS),2914&req, sizeof(req), true, &skb);2915if (ret)2916return ret;29172918res = (struct mt7915_mcu_eeprom_info *)skb->data;2919if (!buf)2920#if defined(__linux__)2921buf = dev->mt76.eeprom.data + le32_to_cpu(res->addr);2922#elif defined(__FreeBSD__)2923buf = (u8 *)dev->mt76.eeprom.data + le32_to_cpu(res->addr);2924#endif2925memcpy(buf, res->data, MT7915_EEPROM_BLOCK_SIZE);29262927dev_kfree_skb(skb);29282929return 0;2930}29312932int mt7915_mcu_get_eeprom_free_block(struct mt7915_dev *dev, u8 *block_num)2933{2934struct {2935u8 _rsv;2936u8 version;2937u8 die_idx;2938u8 _rsv2;2939} __packed req = {2940.version = 1,2941};2942struct sk_buff *skb;2943int ret;29442945ret = mt76_mcu_send_and_get_msg(&dev->mt76,2946MCU_EXT_QUERY(EFUSE_FREE_BLOCK),2947&req, sizeof(req), true, &skb);2948if (ret)2949return ret;29502951*block_num = *(u8 *)skb->data;2952dev_kfree_skb(skb);29532954return 0;2955}29562957static int mt7915_mcu_set_pre_cal(struct mt7915_dev *dev, u8 idx,2958u8 *data, u32 len, int cmd)2959{2960struct {2961u8 dir;2962u8 valid;2963__le16 bitmap;2964s8 precal;2965u8 action;2966u8 band;2967u8 idx;2968u8 rsv[4];2969__le32 len;2970} req = {};2971struct sk_buff *skb;29722973skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, sizeof(req) + len);2974if (!skb)2975return -ENOMEM;29762977req.idx = idx;2978req.len = cpu_to_le32(len);2979skb_put_data(skb, &req, sizeof(req));2980skb_put_data(skb, data, len);29812982return mt76_mcu_skb_send_msg(&dev->mt76, skb, cmd, false);2983}29842985int mt7915_mcu_apply_group_cal(struct mt7915_dev *dev)2986{2987u8 idx = 0, *cal = dev->cal, *eep = dev->mt76.eeprom.data;2988u32 total = mt7915_get_cal_group_size(dev);2989u32 offs = is_mt7915(&dev->mt76) ? MT_EE_DO_PRE_CAL : MT_EE_DO_PRE_CAL_V2;29902991if (!(eep[offs] & MT_EE_WIFI_CAL_GROUP))2992return 0;29932994/*2995* Items: Rx DCOC, RSSI DCOC, Tx TSSI DCOC, Tx LPFG2996* Tx FDIQ, Tx DCIQ, Rx FDIQ, Rx FIIQ, ADCDCOC2997*/2998while (total > 0) {2999int ret, len;30003001len = min_t(u32, total, MT_EE_CAL_UNIT);30023003ret = mt7915_mcu_set_pre_cal(dev, idx, cal, len,3004MCU_EXT_CMD(GROUP_PRE_CAL_INFO));3005if (ret)3006return ret;30073008total -= len;3009cal += len;3010idx++;3011}30123013return 0;3014}30153016static int mt7915_find_freq_idx(const u16 *freqs, int n_freqs, u16 cur)3017{3018int i;30193020for (i = 0; i < n_freqs; i++)3021if (cur == freqs[i])3022return i;30233024return -1;3025}30263027static int mt7915_dpd_freq_idx(struct mt7915_dev *dev, u16 freq, u8 bw)3028{3029static const u16 freq_list_v1[] = {30305180, 5200, 5220, 5240,30315260, 5280, 5300, 5320,30325500, 5520, 5540, 5560,30335580, 5600, 5620, 5640,30345660, 5680, 5700, 5745,30355765, 5785, 5805, 58253036};3037static const u16 freq_list_v2[] = {3038/* 6G BW20*/30395955, 5975, 5995, 6015,30406035, 6055, 6075, 6095,30416115, 6135, 6155, 6175,30426195, 6215, 6235, 6255,30436275, 6295, 6315, 6335,30446355, 6375, 6395, 6415,30456435, 6455, 6475, 6495,30466515, 6535, 6555, 6575,30476595, 6615, 6635, 6655,30486675, 6695, 6715, 6735,30496755, 6775, 6795, 6815,30506835, 6855, 6875, 6895,30516915, 6935, 6955, 6975,30526995, 7015, 7035, 7055,30537075, 7095, 7115,3054/* 6G BW160 */30556025, 6185, 6345, 6505,30566665, 6825, 6985,3057/* 5G BW20 */30585180, 5200, 5220, 5240,30595260, 5280, 5300, 5320,30605500, 5520, 5540, 5560,30615580, 5600, 5620, 5640,30625660, 5680, 5700, 5720,30635745, 5765, 5785, 5805,30645825, 5845, 5865, 5885,3065/* 5G BW160 */30665250, 5570, 58153067};3068const u16 *freq_list;3069int idx, n_freqs;30703071if (!is_mt7915(&dev->mt76)) {3072freq_list = freq_list_v2;3073n_freqs = ARRAY_SIZE(freq_list_v2);3074} else {3075freq_list = freq_list_v1;3076n_freqs = ARRAY_SIZE(freq_list_v1);3077}30783079if (freq < 4000) {3080if (freq < 2432)3081return n_freqs;3082if (freq < 2457)3083return n_freqs + 1;30843085return n_freqs + 2;3086}30873088if (bw == NL80211_CHAN_WIDTH_80P80)3089return -1;30903091if (bw != NL80211_CHAN_WIDTH_20) {3092idx = mt7915_find_freq_idx(freq_list, n_freqs, freq + 10);3093if (idx >= 0)3094return idx;30953096idx = mt7915_find_freq_idx(freq_list, n_freqs, freq - 10);3097if (idx >= 0)3098return idx;3099}31003101return mt7915_find_freq_idx(freq_list, n_freqs, freq);3102}31033104int mt7915_mcu_apply_tx_dpd(struct mt7915_phy *phy)3105{3106struct mt7915_dev *dev = phy->dev;3107struct cfg80211_chan_def *chandef = &phy->mt76->chandef;3108enum nl80211_band band = chandef->chan->band;3109u32 offs = is_mt7915(&dev->mt76) ? MT_EE_DO_PRE_CAL : MT_EE_DO_PRE_CAL_V2;3110u16 center_freq = chandef->center_freq1;3111u8 *cal = dev->cal, *eep = dev->mt76.eeprom.data;3112u8 dpd_mask, cal_num = is_mt7915(&dev->mt76) ? 2 : 3;3113int idx;31143115switch (band) {3116case NL80211_BAND_2GHZ:3117dpd_mask = MT_EE_WIFI_CAL_DPD_2G;3118break;3119case NL80211_BAND_5GHZ:3120dpd_mask = MT_EE_WIFI_CAL_DPD_5G;3121break;3122case NL80211_BAND_6GHZ:3123dpd_mask = MT_EE_WIFI_CAL_DPD_6G;3124break;3125default:3126dpd_mask = 0;3127break;3128}31293130if (!(eep[offs] & dpd_mask))3131return 0;31323133idx = mt7915_dpd_freq_idx(dev, center_freq, chandef->width);3134if (idx < 0)3135return -EINVAL;31363137/* Items: Tx DPD, Tx Flatness */3138idx = idx * cal_num;3139cal += mt7915_get_cal_group_size(dev) + (idx * MT_EE_CAL_UNIT);31403141while (cal_num--) {3142int ret;31433144ret = mt7915_mcu_set_pre_cal(dev, idx, cal, MT_EE_CAL_UNIT,3145MCU_EXT_CMD(DPD_PRE_CAL_INFO));3146if (ret)3147return ret;31483149idx++;3150cal += MT_EE_CAL_UNIT;3151}31523153return 0;3154}31553156int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch)3157{3158struct mt76_channel_state *state = phy->mt76->chan_state;3159struct mt76_channel_state *state_ts = &phy->state_ts;3160struct mt7915_dev *dev = phy->dev;3161struct mt7915_mcu_mib *res, req[5];3162struct sk_buff *skb;3163static const u32 *offs;3164int i, ret, len, offs_cc;3165u64 cc_tx;31663167/* strict order */3168if (is_mt7915(&dev->mt76)) {3169static const u32 chip_offs[] = {3170MIB_NON_WIFI_TIME,3171MIB_TX_TIME,3172MIB_RX_TIME,3173MIB_OBSS_AIRTIME,3174MIB_TXOP_INIT_COUNT,3175};3176len = ARRAY_SIZE(chip_offs);3177offs = chip_offs;3178offs_cc = 20;3179} else {3180static const u32 chip_offs[] = {3181MIB_NON_WIFI_TIME_V2,3182MIB_TX_TIME_V2,3183MIB_RX_TIME_V2,3184MIB_OBSS_AIRTIME_V23185};3186len = ARRAY_SIZE(chip_offs);3187offs = chip_offs;3188offs_cc = 0;3189}31903191for (i = 0; i < len; i++) {3192req[i].band = cpu_to_le32(phy->mt76->band_idx);3193req[i].offs = cpu_to_le32(offs[i]);3194}31953196ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(GET_MIB_INFO),3197req, len * sizeof(req[0]), true, &skb);3198if (ret)3199return ret;32003201res = (struct mt7915_mcu_mib *)(skb->data + offs_cc);32023203#define __res_u64(s) le64_to_cpu(res[s].data)3204/* subtract Tx backoff time from Tx duration for MT7915 */3205if (is_mt7915(&dev->mt76)) {3206u64 backoff = (__res_u64(4) & 0xffff) * 79; /* 16us + 9us * 7 */3207cc_tx = __res_u64(1) - backoff;3208} else {3209cc_tx = __res_u64(1);3210}32113212if (chan_switch)3213goto out;32143215state->cc_tx += cc_tx - state_ts->cc_tx;3216state->cc_bss_rx += __res_u64(2) - state_ts->cc_bss_rx;3217state->cc_rx += __res_u64(2) + __res_u64(3) - state_ts->cc_rx;3218state->cc_busy += __res_u64(0) + cc_tx + __res_u64(2) + __res_u64(3) -3219state_ts->cc_busy;32203221out:3222state_ts->cc_tx = cc_tx;3223state_ts->cc_bss_rx = __res_u64(2);3224state_ts->cc_rx = __res_u64(2) + __res_u64(3);3225state_ts->cc_busy = __res_u64(0) + cc_tx + __res_u64(2) + __res_u64(3);3226#undef __res_u6432273228dev_kfree_skb(skb);32293230return 0;3231}32323233int mt7915_mcu_get_temperature(struct mt7915_phy *phy)3234{3235struct mt7915_dev *dev = phy->dev;3236struct {3237u8 ctrl_id;3238u8 action;3239u8 band_idx;3240u8 rsv[5];3241} req = {3242.ctrl_id = THERMAL_SENSOR_TEMP_QUERY,3243.band_idx = phy->mt76->band_idx,3244};32453246return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_CTRL), &req,3247sizeof(req), true);3248}32493250int mt7915_mcu_set_thermal_throttling(struct mt7915_phy *phy, u8 state)3251{3252struct mt7915_dev *dev = phy->dev;3253struct mt7915_mcu_thermal_ctrl req = {3254.band_idx = phy->mt76->band_idx,3255.ctrl_id = THERMAL_PROTECT_DUTY_CONFIG,3256};3257int level, ret;32583259/* set duty cycle and level */3260for (level = 0; level < 4; level++) {3261req.duty.duty_level = level;3262req.duty.duty_cycle = state;3263state /= 2;32643265ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT),3266&req, sizeof(req), false);3267if (ret)3268return ret;3269}3270return 0;3271}32723273int mt7915_mcu_set_thermal_protect(struct mt7915_phy *phy)3274{3275struct mt7915_dev *dev = phy->dev;3276struct {3277struct mt7915_mcu_thermal_ctrl ctrl;32783279__le32 trigger_temp;3280__le32 restore_temp;3281__le16 sustain_time;3282u8 rsv[2];3283} __packed req = {3284.ctrl = {3285.band_idx = phy->mt76->band_idx,3286.type.protect_type = 1,3287.type.trigger_type = 1,3288},3289};3290int ret;32913292req.ctrl.ctrl_id = THERMAL_PROTECT_DISABLE;3293ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT),3294&req, sizeof(req.ctrl), false);32953296if (ret)3297return ret;32983299/* set high-temperature trigger threshold */3300req.ctrl.ctrl_id = THERMAL_PROTECT_ENABLE;3301/* add a safety margin ~10 */3302req.restore_temp = cpu_to_le32(phy->throttle_temp[0] - 10);3303req.trigger_temp = cpu_to_le32(phy->throttle_temp[1]);3304req.sustain_time = cpu_to_le16(10);33053306return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_PROT),3307&req, sizeof(req), false);3308}33093310int mt7915_mcu_set_txpower_frame_min(struct mt7915_phy *phy, s8 txpower)3311{3312struct mt7915_dev *dev = phy->dev;3313struct {3314u8 format_id;3315u8 rsv;3316u8 band_idx;3317s8 txpower_min;3318} __packed req = {3319.format_id = TX_POWER_LIMIT_FRAME_MIN,3320.band_idx = phy->mt76->band_idx,3321.txpower_min = txpower * 2, /* 0.5db */3322};33233324return mt76_mcu_send_msg(&dev->mt76,3325MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req,3326sizeof(req), true);3327}33283329int mt7915_mcu_set_txpower_frame(struct mt7915_phy *phy,3330struct ieee80211_vif *vif,3331struct ieee80211_sta *sta, s8 txpower)3332{3333struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;3334struct mt7915_dev *dev = phy->dev;3335struct mt76_phy *mphy = phy->mt76;3336struct {3337u8 format_id;3338u8 rsv[3];3339u8 band_idx;3340s8 txpower_max;3341__le16 wcid;3342s8 txpower_offs[48];3343} __packed req = {3344.format_id = TX_POWER_LIMIT_FRAME,3345.band_idx = phy->mt76->band_idx,3346.txpower_max = DIV_ROUND_UP(mphy->txpower_cur, 2),3347.wcid = cpu_to_le16(msta->wcid.idx),3348};3349int ret;3350s8 txpower_sku[MT7915_SKU_RATE_NUM];33513352ret = mt7915_mcu_get_txpower_sku(phy, txpower_sku, sizeof(txpower_sku),3353TX_POWER_INFO_RATE);3354if (ret)3355return ret;33563357txpower = mt76_get_power_bound(mphy, txpower);3358if (txpower > mphy->txpower_cur || txpower < 0)3359return -EINVAL;33603361if (txpower) {3362u32 offs, len, i;33633364if (sta->deflink.ht_cap.ht_supported) {3365const u8 *sku_len = mt7915_sku_group_len;33663367offs = sku_len[SKU_CCK] + sku_len[SKU_OFDM];3368len = sku_len[SKU_HT_BW20] + sku_len[SKU_HT_BW40];33693370if (sta->deflink.vht_cap.vht_supported) {3371offs += len;3372len = sku_len[SKU_VHT_BW20] * 4;33733374if (sta->deflink.he_cap.has_he) {3375offs += len + sku_len[SKU_HE_RU26] * 3;3376len = sku_len[SKU_HE_RU242] * 4;3377}3378}3379} else {3380return -EINVAL;3381}33823383for (i = 0; i < len; i++, offs++)3384req.txpower_offs[i] =3385DIV_ROUND_UP(txpower - txpower_sku[offs], 2);3386}33873388return mt76_mcu_send_msg(&dev->mt76,3389MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req,3390sizeof(req), true);3391}33923393static void3394mt7915_update_txpower(struct mt7915_phy *phy, int tx_power)3395{3396struct mt76_phy *mphy = phy->mt76;3397struct ieee80211_channel *chan = mphy->main_chandef.chan;3398int chain_idx, val, e2p_power_limit = 0;33993400if (!chan) {3401mphy->txpower_cur = tx_power;3402return;3403}34043405for (chain_idx = 0; chain_idx < hweight16(mphy->chainmask); chain_idx++) {3406val = mt7915_eeprom_get_target_power(phy->dev, chan, chain_idx);3407val += mt7915_eeprom_get_power_delta(phy->dev, chan->band);34083409e2p_power_limit = max_t(int, e2p_power_limit, val);3410}34113412if (phy->sku_limit_en)3413mphy->txpower_cur = min_t(int, e2p_power_limit, tx_power);3414else3415mphy->txpower_cur = e2p_power_limit;3416}34173418int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy)3419{3420#define TX_POWER_LIMIT_TABLE_RATE 03421#define TX_POWER_LIMIT_TABLE_PATH 13422struct mt7915_dev *dev = phy->dev;3423struct mt76_phy *mphy = phy->mt76;3424struct ieee80211_hw *hw = mphy->hw;3425struct mt7915_sku_val {3426u8 format_id;3427u8 limit_type;3428u8 band_idx;3429} __packed hdr = {3430.format_id = TX_POWER_LIMIT_TABLE,3431.limit_type = TX_POWER_LIMIT_TABLE_RATE,3432.band_idx = phy->mt76->band_idx,3433};3434int i, ret, tx_power;3435const u8 *len = mt7915_sku_group_len;3436struct mt76_power_limits la = {};3437struct sk_buff *skb;34383439tx_power = mt76_get_power_bound(mphy, hw->conf.power_level);3440if (phy->sku_limit_en) {3441tx_power = mt76_get_rate_power_limits(mphy, mphy->chandef.chan,3442&la, tx_power);3443mt7915_update_txpower(phy, tx_power);3444} else {3445mt7915_update_txpower(phy, tx_power);3446return 0;3447}34483449skb = mt76_mcu_msg_alloc(&dev->mt76, NULL,3450sizeof(hdr) + MT7915_SKU_RATE_NUM);3451if (!skb)3452return -ENOMEM;34533454skb_put_data(skb, &hdr, sizeof(hdr));3455skb_put_data(skb, &la.cck, len[SKU_CCK] + len[SKU_OFDM]);3456skb_put_data(skb, &la.mcs[0], len[SKU_HT_BW20]);3457skb_put_data(skb, &la.mcs[1], len[SKU_HT_BW40]);34583459/* vht */3460for (i = 0; i < 4; i++) {3461skb_put_data(skb, &la.mcs[i], sizeof(la.mcs[i]));3462skb_put_zero(skb, 2); /* padding */3463}34643465/* he */3466skb_put_data(skb, &la.ru[0], sizeof(la.ru));3467ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,3468MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), true);3469if (ret)3470return ret;34713472/* only set per-path power table when it's configured */3473if (!phy->sku_path_en)3474return 0;34753476skb = mt76_mcu_msg_alloc(&dev->mt76, NULL,3477sizeof(hdr) + MT7915_SKU_PATH_NUM);3478if (!skb)3479return -ENOMEM;34803481hdr.limit_type = TX_POWER_LIMIT_TABLE_PATH;3482skb_put_data(skb, &hdr, sizeof(hdr));3483skb_put_data(skb, &la.path.cck, sizeof(la.path.cck));3484skb_put_data(skb, &la.path.ofdm, sizeof(la.path.ofdm));3485skb_put_data(skb, &la.path.ofdm_bf[1], sizeof(la.path.ofdm_bf) - 1);34863487/* HT20 and HT40 */3488skb_put_data(skb, &la.path.ru[3], sizeof(la.path.ru[3]));3489skb_put_data(skb, &la.path.ru_bf[3][1], sizeof(la.path.ru_bf[3]) - 1);3490skb_put_data(skb, &la.path.ru[4], sizeof(la.path.ru[4]));3491skb_put_data(skb, &la.path.ru_bf[4][1], sizeof(la.path.ru_bf[4]) - 1);34923493/* start from non-bf and bf fields of3494* BW20/RU242, BW40/RU484, BW80/RU996, BW160/RU2x996,3495* RU26, RU52, and RU1063496*/34973498for (i = 0; i < 8; i++) {3499bool bf = i % 2;3500u8 idx = (i + 6) / 2;3501s8 *buf = bf ? la.path.ru_bf[idx] : la.path.ru[idx];3502/* The non-bf fields of RU26 to RU106 are special cases */3503if (bf)3504skb_put_data(skb, buf + 1, 9);3505else3506skb_put_data(skb, buf, 10);3507}35083509for (i = 0; i < 6; i++) {3510bool bf = i % 2;3511u8 idx = i / 2;3512s8 *buf = bf ? la.path.ru_bf[idx] : la.path.ru[idx];35133514skb_put_data(skb, buf, 10);3515}35163517return mt76_mcu_skb_send_msg(&dev->mt76, skb,3518MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), true);3519}35203521int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len,3522u8 category)3523{3524#define RATE_POWER_INFO 23525struct mt7915_dev *dev = phy->dev;3526struct {3527u8 format_id;3528u8 category;3529u8 band_idx;3530u8 _rsv;3531} __packed req = {3532.format_id = TX_POWER_LIMIT_INFO,3533.category = category,3534.band_idx = phy->mt76->band_idx,3535};3536struct sk_buff *skb;3537int ret, i;35383539ret = mt76_mcu_send_and_get_msg(&dev->mt76,3540MCU_EXT_CMD(TX_POWER_FEATURE_CTRL),3541&req, sizeof(req), true, &skb);3542if (ret)3543return ret;35443545if (category == TX_POWER_INFO_RATE) {3546s8 res[MT7915_SKU_RATE_NUM][2];35473548memcpy(res, skb->data + 4, sizeof(res));3549for (i = 0; i < len; i++)3550txpower[i] = res[i][req.band_idx];3551} else if (category == TX_POWER_INFO_PATH) {3552memcpy(txpower, skb->data + 4, len);3553}35543555dev_kfree_skb(skb);35563557return 0;3558}35593560int mt7915_mcu_set_test_param(struct mt7915_dev *dev, u8 param, bool test_mode,3561u8 en)3562{3563struct {3564u8 test_mode_en;3565u8 param_idx;3566u8 _rsv[2];35673568u8 enable;3569u8 _rsv2[3];35703571u8 pad[8];3572} __packed req = {3573.test_mode_en = test_mode,3574.param_idx = param,3575.enable = en,3576};35773578return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL), &req,3579sizeof(req), false);3580}35813582int mt7915_mcu_set_sku_en(struct mt7915_phy *phy)3583{3584struct mt7915_dev *dev = phy->dev;3585struct mt7915_sku {3586u8 format_id;3587u8 sku_enable;3588u8 band_idx;3589u8 rsv;3590} __packed req = {3591.band_idx = phy->mt76->band_idx,3592};3593int ret;35943595req.sku_enable = phy->sku_limit_en;3596req.format_id = TX_POWER_LIMIT_ENABLE;35973598ret = mt76_mcu_send_msg(&dev->mt76,3599MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req,3600sizeof(req), true);3601if (ret)3602return ret;36033604req.sku_enable = phy->sku_path_en;3605req.format_id = TX_POWER_LIMIT_PATH_ENABLE;36063607return mt76_mcu_send_msg(&dev->mt76,3608MCU_EXT_CMD(TX_POWER_FEATURE_CTRL), &req,3609sizeof(req), true);3610}36113612int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band)3613{3614struct {3615u8 action;3616u8 set;3617u8 band;3618u8 rsv;3619} req = {3620.action = action,3621.set = set,3622.band = band,3623};36243625return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SER_TRIGGER),3626&req, sizeof(req), false);3627}36283629int mt7915_mcu_set_txbf(struct mt7915_dev *dev, u8 action)3630{3631struct {3632u8 action;3633union {3634struct {3635u8 snd_mode;3636u8 sta_num;3637u8 rsv;3638u8 wlan_idx[4];3639__le32 snd_period; /* ms */3640} __packed snd;3641struct {3642bool ebf;3643bool ibf;3644u8 rsv;3645} __packed type;3646struct {3647u8 bf_num;3648u8 bf_bitmap;3649u8 bf_sel[8];3650u8 rsv[5];3651} __packed mod;3652};3653} __packed req = {3654.action = action,3655};36563657#define MT_BF_PROCESSING 43658switch (action) {3659case MT_BF_SOUNDING_ON:3660req.snd.snd_mode = MT_BF_PROCESSING;3661break;3662case MT_BF_TYPE_UPDATE:3663req.type.ebf = true;3664req.type.ibf = dev->ibf;3665break;3666case MT_BF_MODULE_UPDATE:3667req.mod.bf_num = 2;3668req.mod.bf_bitmap = GENMASK(1, 0);3669break;3670default:3671return -EINVAL;3672}36733674return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TXBF_ACTION), &req,3675sizeof(req), true);3676}36773678static int3679mt7915_mcu_enable_obss_spr(struct mt7915_phy *phy, u8 action, u8 val)3680{3681struct mt7915_dev *dev = phy->dev;3682struct mt7915_mcu_sr_ctrl req = {3683.action = action,3684.argnum = 1,3685.band_idx = phy->mt76->band_idx,3686.val = cpu_to_le32(val),3687};36883689return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req,3690sizeof(req), true);3691}36923693static int3694mt7915_mcu_set_obss_spr_pd(struct mt7915_phy *phy,3695struct ieee80211_he_obss_pd *he_obss_pd)3696{3697struct mt7915_dev *dev = phy->dev;3698struct {3699struct mt7915_mcu_sr_ctrl ctrl;3700struct {3701u8 pd_th_non_srg;3702u8 pd_th_srg;3703u8 period_offs;3704u8 rcpi_src;3705__le16 obss_pd_min;3706__le16 obss_pd_min_srg;3707u8 resp_txpwr_mode;3708u8 txpwr_restrict_mode;3709u8 txpwr_ref;3710u8 rsv[3];3711} __packed param;3712} __packed req = {3713.ctrl = {3714.action = SPR_SET_PARAM,3715.argnum = 9,3716.band_idx = phy->mt76->band_idx,3717},3718};3719int ret;3720u8 max_th = 82, non_srg_max_th = 62;37213722/* disable firmware dynamical PD asjustment */3723ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_DPD, false);3724if (ret)3725return ret;37263727if (he_obss_pd->sr_ctrl &3728IEEE80211_HE_SPR_NON_SRG_OBSS_PD_SR_DISALLOWED)3729req.param.pd_th_non_srg = max_th;3730else if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_NON_SRG_OFFSET_PRESENT)3731req.param.pd_th_non_srg = max_th - he_obss_pd->non_srg_max_offset;3732else3733req.param.pd_th_non_srg = non_srg_max_th;37343735if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_SRG_INFORMATION_PRESENT)3736req.param.pd_th_srg = max_th - he_obss_pd->max_offset;37373738req.param.obss_pd_min = cpu_to_le16(82);3739req.param.obss_pd_min_srg = cpu_to_le16(82);3740req.param.txpwr_restrict_mode = 2;3741req.param.txpwr_ref = 21;37423743return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req,3744sizeof(req), true);3745}37463747static int3748mt7915_mcu_set_obss_spr_siga(struct mt7915_phy *phy, struct ieee80211_vif *vif,3749struct ieee80211_he_obss_pd *he_obss_pd)3750{3751struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;3752struct mt7915_dev *dev = phy->dev;3753u8 omac = mvif->mt76.omac_idx;3754struct {3755struct mt7915_mcu_sr_ctrl ctrl;3756struct {3757u8 omac;3758u8 rsv[3];3759u8 flag[20];3760} __packed siga;3761} __packed req = {3762.ctrl = {3763.action = SPR_SET_SIGA,3764.argnum = 1,3765.band_idx = phy->mt76->band_idx,3766},3767.siga = {3768.omac = omac > HW_BSSID_MAX ? omac - 12 : omac,3769},3770};3771int ret;37723773if (he_obss_pd->sr_ctrl & IEEE80211_HE_SPR_HESIGA_SR_VAL15_ALLOWED)3774req.siga.flag[req.siga.omac] = 0xf;3775else3776return 0;37773778/* switch to normal AP mode */3779ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_MODE, 0);3780if (ret)3781return ret;37823783return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req,3784sizeof(req), true);3785}37863787static int3788mt7915_mcu_set_obss_spr_bitmap(struct mt7915_phy *phy,3789struct ieee80211_he_obss_pd *he_obss_pd)3790{3791struct mt7915_dev *dev = phy->dev;3792struct {3793struct mt7915_mcu_sr_ctrl ctrl;3794struct {3795__le32 color_l[2];3796__le32 color_h[2];3797__le32 bssid_l[2];3798__le32 bssid_h[2];3799} __packed bitmap;3800} __packed req = {3801.ctrl = {3802.action = SPR_SET_SRG_BITMAP,3803.argnum = 4,3804.band_idx = phy->mt76->band_idx,3805},3806};3807u32 bitmap;38083809memcpy(&bitmap, he_obss_pd->bss_color_bitmap, sizeof(bitmap));3810req.bitmap.color_l[req.ctrl.band_idx] = cpu_to_le32(bitmap);38113812memcpy(&bitmap, he_obss_pd->bss_color_bitmap + 4, sizeof(bitmap));3813req.bitmap.color_h[req.ctrl.band_idx] = cpu_to_le32(bitmap);38143815memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap, sizeof(bitmap));3816req.bitmap.bssid_l[req.ctrl.band_idx] = cpu_to_le32(bitmap);38173818memcpy(&bitmap, he_obss_pd->partial_bssid_bitmap + 4, sizeof(bitmap));3819req.bitmap.bssid_h[req.ctrl.band_idx] = cpu_to_le32(bitmap);38203821return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_SPR), &req,3822sizeof(req), true);3823}38243825int mt7915_mcu_add_obss_spr(struct mt7915_phy *phy, struct ieee80211_vif *vif,3826struct ieee80211_he_obss_pd *he_obss_pd)3827{3828int ret;38293830/* enable firmware scene detection algorithms */3831ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_SD, sr_scene_detect);3832if (ret)3833return ret;38343835/* firmware dynamically adjusts PD threshold so skip manual control */3836if (sr_scene_detect && !he_obss_pd->enable)3837return 0;38383839/* enable spatial reuse */3840ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE, he_obss_pd->enable);3841if (ret)3842return ret;38433844if (sr_scene_detect || !he_obss_pd->enable)3845return 0;38463847ret = mt7915_mcu_enable_obss_spr(phy, SPR_ENABLE_TX, true);3848if (ret)3849return ret;38503851/* set SRG/non-SRG OBSS PD threshold */3852ret = mt7915_mcu_set_obss_spr_pd(phy, he_obss_pd);3853if (ret)3854return ret;38553856/* Set SR prohibit */3857ret = mt7915_mcu_set_obss_spr_siga(phy, vif, he_obss_pd);3858if (ret)3859return ret;38603861/* set SRG BSS color/BSSID bitmap */3862return mt7915_mcu_set_obss_spr_bitmap(phy, he_obss_pd);3863}38643865int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif,3866struct ieee80211_sta *sta, struct rate_info *rate)3867{3868struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;3869struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv;3870struct mt7915_dev *dev = phy->dev;3871struct mt76_phy *mphy = phy->mt76;3872struct {3873u8 category;3874u8 band;3875__le16 wcid;3876} __packed req = {3877.category = MCU_PHY_STATE_CONTENTION_RX_RATE,3878.band = mvif->mt76.band_idx,3879.wcid = cpu_to_le16(msta->wcid.idx),3880};3881struct ieee80211_supported_band *sband;3882struct mt7915_mcu_phy_rx_info *res;3883struct sk_buff *skb;3884int ret;3885bool cck = false;38863887ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(PHY_STAT_INFO),3888&req, sizeof(req), true, &skb);3889if (ret)3890return ret;38913892res = (struct mt7915_mcu_phy_rx_info *)skb->data;38933894rate->mcs = res->rate;3895rate->nss = res->nsts + 1;38963897switch (res->mode) {3898case MT_PHY_TYPE_CCK:3899cck = true;3900fallthrough;3901case MT_PHY_TYPE_OFDM:3902if (mphy->chandef.chan->band == NL80211_BAND_5GHZ)3903sband = &mphy->sband_5g.sband;3904else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ)3905sband = &mphy->sband_6g.sband;3906else3907sband = &mphy->sband_2g.sband;39083909rate->mcs = mt76_get_rate(&dev->mt76, sband, rate->mcs, cck);3910rate->legacy = sband->bitrates[rate->mcs].bitrate;3911break;3912case MT_PHY_TYPE_HT:3913case MT_PHY_TYPE_HT_GF:3914if (rate->mcs > 31) {3915ret = -EINVAL;3916goto out;3917}39183919rate->flags = RATE_INFO_FLAGS_MCS;3920if (res->gi)3921rate->flags |= RATE_INFO_FLAGS_SHORT_GI;3922break;3923case MT_PHY_TYPE_VHT:3924if (rate->mcs > 9) {3925ret = -EINVAL;3926goto out;3927}39283929rate->flags = RATE_INFO_FLAGS_VHT_MCS;3930if (res->gi)3931rate->flags |= RATE_INFO_FLAGS_SHORT_GI;3932break;3933case MT_PHY_TYPE_HE_SU:3934case MT_PHY_TYPE_HE_EXT_SU:3935case MT_PHY_TYPE_HE_TB:3936case MT_PHY_TYPE_HE_MU:3937if (res->gi > NL80211_RATE_INFO_HE_GI_3_2 || rate->mcs > 11) {3938ret = -EINVAL;3939goto out;3940}3941rate->he_gi = res->gi;3942rate->flags = RATE_INFO_FLAGS_HE_MCS;3943break;3944default:3945ret = -EINVAL;3946goto out;3947}39483949switch (res->bw) {3950case IEEE80211_STA_RX_BW_160:3951rate->bw = RATE_INFO_BW_160;3952break;3953case IEEE80211_STA_RX_BW_80:3954rate->bw = RATE_INFO_BW_80;3955break;3956case IEEE80211_STA_RX_BW_40:3957rate->bw = RATE_INFO_BW_40;3958break;3959default:3960rate->bw = RATE_INFO_BW_20;3961break;3962}39633964out:3965dev_kfree_skb(skb);39663967return ret;3968}39693970int mt7915_mcu_update_bss_color(struct mt7915_dev *dev, struct ieee80211_vif *vif,3971struct cfg80211_he_bss_color *he_bss_color)3972{3973int len = sizeof(struct sta_req_hdr) + sizeof(struct bss_info_color);3974struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;3975struct bss_info_color *bss_color;3976struct sk_buff *skb;3977struct tlv *tlv;39783979skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76,3980NULL, len);3981if (IS_ERR(skb))3982return PTR_ERR(skb);39833984tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BSS_COLOR,3985sizeof(*bss_color));3986bss_color = (struct bss_info_color *)tlv;3987bss_color->disable = !he_bss_color->enabled;3988bss_color->color = he_bss_color->color;39893990return mt76_mcu_skb_send_msg(&dev->mt76, skb,3991MCU_EXT_CMD(BSS_INFO_UPDATE), true);3992}39933994#define TWT_AGRT_TRIGGER BIT(0)3995#define TWT_AGRT_ANNOUNCE BIT(1)3996#define TWT_AGRT_PROTECT BIT(2)39973998int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev,3999struct mt7915_vif *mvif,4000struct mt7915_twt_flow *flow,4001int cmd)4002{4003struct {4004u8 tbl_idx;4005u8 cmd;4006u8 own_mac_idx;4007u8 flowid; /* 0xff for group id */4008__le16 peer_id; /* specify the peer_id (msb=0)4009* or group_id (msb=1)4010*/4011u8 duration; /* 256 us */4012u8 bss_idx;4013__le64 start_tsf;4014__le16 mantissa;4015u8 exponent;4016u8 is_ap;4017u8 agrt_params;4018u8 rsv[23];4019} __packed req = {4020.tbl_idx = flow->table_id,4021.cmd = cmd,4022.own_mac_idx = mvif->mt76.omac_idx,4023.flowid = flow->id,4024.peer_id = cpu_to_le16(flow->wcid),4025.duration = flow->duration,4026.bss_idx = mvif->mt76.idx,4027.start_tsf = cpu_to_le64(flow->tsf),4028.mantissa = flow->mantissa,4029.exponent = flow->exp,4030.is_ap = true,4031};40324033if (flow->protection)4034req.agrt_params |= TWT_AGRT_PROTECT;4035if (!flow->flowtype)4036req.agrt_params |= TWT_AGRT_ANNOUNCE;4037if (flow->trigger)4038req.agrt_params |= TWT_AGRT_TRIGGER;40394040return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(TWT_AGRT_UPDATE),4041&req, sizeof(req), true);4042}40434044int mt7915_mcu_wed_wa_tx_stats(struct mt7915_dev *dev, u16 wlan_idx)4045{4046struct {4047__le32 cmd;4048__le32 arg0;4049__le32 arg1;4050__le16 arg2;4051} __packed req = {4052.cmd = cpu_to_le32(0x15),4053};4054struct mt7915_mcu_wa_tx_stat {4055__le16 wcid;4056u8 __rsv2[2];40574058/* tx_bytes is deprecated since WA byte counter uses u32,4059* which easily leads to overflow.4060*/4061__le32 tx_bytes;4062__le32 tx_packets;4063} __packed *res;4064struct mt76_wcid *wcid;4065struct sk_buff *skb;4066int ret, len;4067u16 ret_wcid;40684069if (is_mt7915(&dev->mt76)) {4070req.arg0 = cpu_to_le32(wlan_idx);4071len = sizeof(req) - sizeof(req.arg2);4072} else {4073req.arg0 = cpu_to_le32(1);4074req.arg2 = cpu_to_le16(wlan_idx);4075len = sizeof(req);4076}40774078ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_WA_PARAM_CMD(QUERY),4079&req, len, true, &skb);4080if (ret)4081return ret;40824083if (!is_mt7915(&dev->mt76))4084skb_pull(skb, 4);40854086res = (struct mt7915_mcu_wa_tx_stat *)skb->data;40874088ret_wcid = le16_to_cpu(res->wcid);4089if (is_mt7915(&dev->mt76))4090ret_wcid &= 0xff;40914092if (ret_wcid != wlan_idx) {4093ret = -EINVAL;4094goto out;4095}40964097rcu_read_lock();40984099wcid = mt76_wcid_ptr(dev, wlan_idx);4100if (wcid)4101wcid->stats.tx_packets += le32_to_cpu(res->tx_packets);4102else4103ret = -EINVAL;41044105rcu_read_unlock();4106out:4107dev_kfree_skb(skb);41084109return ret;4110}41114112int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set)4113{4114struct {4115__le32 idx;4116__le32 ofs;4117__le32 data;4118} __packed req = {4119.idx = cpu_to_le32(u32_get_bits(regidx, GENMASK(31, 24))),4120.ofs = cpu_to_le32(u32_get_bits(regidx, GENMASK(23, 0))),4121.data = set ? cpu_to_le32(*val) : 0,4122};4123struct sk_buff *skb;4124int ret;41254126if (set)4127return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(RF_REG_ACCESS),4128&req, sizeof(req), false);41294130ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_QUERY(RF_REG_ACCESS),4131&req, sizeof(req), true, &skb);4132if (ret)4133return ret;41344135*val = le32_to_cpu(*(__le32 *)(skb->data + 8));4136dev_kfree_skb(skb);41374138return 0;4139}414041414142