Path: blob/main/sys/contrib/dev/mediatek/mt76/mt7921/pci_mac.c
48525 views
// SPDX-License-Identifier: ISC1/* Copyright (C) 2021 MediaTek Inc. */23#include "mt7921.h"4#include "../dma.h"5#include "../mt76_connac2_mac.h"67int mt7921e_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,8enum mt76_txq_id qid, struct mt76_wcid *wcid,9struct ieee80211_sta *sta,10struct mt76_tx_info *tx_info)11{12struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);13struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb);14struct ieee80211_key_conf *key = info->control.hw_key;15struct mt76_connac_hw_txp *txp;16struct mt76_txwi_cache *t;17int id, pid;18u8 *txwi = (u8 *)txwi_ptr;1920if (unlikely(tx_info->skb->len <= ETH_HLEN))21return -EINVAL;2223if (!wcid)24wcid = &dev->mt76.global_wcid;2526t = (struct mt76_txwi_cache *)(txwi + mdev->drv->txwi_size);27t->skb = tx_info->skb;2829id = mt76_token_consume(mdev, &t);30if (id < 0)31return id;3233if (sta) {34struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv;3536if (time_after(jiffies, msta->deflink.last_txs + HZ / 4)) {37info->flags |= IEEE80211_TX_CTL_REQ_TX_STATUS;38msta->deflink.last_txs = jiffies;39}40}4142pid = mt76_tx_status_skb_add(mdev, wcid, tx_info->skb);43mt76_connac2_mac_write_txwi(mdev, txwi_ptr, tx_info->skb, wcid, key,44pid, qid, 0);4546txp = (struct mt76_connac_hw_txp *)(txwi + MT_TXD_SIZE);47memset(txp, 0, sizeof(struct mt76_connac_hw_txp));48mt76_connac_write_hw_txp(mdev, tx_info, txp, id);4950tx_info->skb = NULL;5152return 0;53}5455int mt7921e_mac_reset(struct mt792x_dev *dev)56{57int i, err;5859mt792xe_mcu_drv_pmctrl(dev);6061mt76_connac_free_pending_tx_skbs(&dev->pm, NULL);6263mt76_wr(dev, dev->irq_map->host_irq_enable, 0);64mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0x0);6566set_bit(MT76_MCU_RESET, &dev->mphy.state);67wake_up(&dev->mt76.mcu.wait);68skb_queue_purge(&dev->mt76.mcu.res_q);6970mt76_txq_schedule_all(&dev->mphy);7172mt76_worker_disable(&dev->mt76.tx_worker);73napi_disable(&dev->mt76.napi[MT_RXQ_MAIN]);74napi_disable(&dev->mt76.napi[MT_RXQ_MCU]);75napi_disable(&dev->mt76.napi[MT_RXQ_MCU_WA]);76napi_disable(&dev->mt76.tx_napi);7778mt76_connac2_tx_token_put(&dev->mt76);79idr_init(&dev->mt76.token);8081mt792x_wpdma_reset(dev, true);8283mt76_for_each_q_rx(&dev->mt76, i) {84napi_enable(&dev->mt76.napi[i]);85}8687local_bh_disable();88mt76_for_each_q_rx(&dev->mt76, i) {89napi_schedule(&dev->mt76.napi[i]);90}91local_bh_enable();9293dev->fw_assert = false;94clear_bit(MT76_MCU_RESET, &dev->mphy.state);9596mt76_wr(dev, dev->irq_map->host_irq_enable,97dev->irq_map->tx.all_complete_mask |98MT_INT_RX_DONE_ALL | MT_INT_MCU_CMD);99mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff);100101err = mt7921e_driver_own(dev);102if (err)103goto out;104105err = mt7921_run_firmware(dev);106if (err)107goto out;108109err = mt7921_mcu_set_eeprom(dev);110if (err)111goto out;112113err = mt7921_mac_init(dev);114if (err)115goto out;116117err = __mt7921_start(&dev->phy);118out:119120napi_enable(&dev->mt76.tx_napi);121local_bh_disable();122napi_schedule(&dev->mt76.tx_napi);123local_bh_enable();124125mt76_worker_enable(&dev->mt76.tx_worker);126127return err;128}129130131