Path: blob/main/sys/contrib/device-tree/Bindings/ata/ahci-platform.yaml
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# SPDX-License-Identifier: GPL-2.01%YAML 1.22---3$id: http://devicetree.org/schemas/ata/ahci-platform.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: AHCI SATA Controller78description: |9SATA nodes are defined to describe on-chip Serial ATA controllers.10Each SATA controller should have its own node.1112It is possible, but not required, to represent each port as a sub-node.13It allows to enable each port independently when dealing with multiple14PHYs.1516maintainers:17- Hans de Goede <hdegoede@redhat.com>18- Jens Axboe <axboe@kernel.dk>1920select:21properties:22compatible:23contains:24enum:25- brcm,iproc-ahci26- cavium,octeon-7130-ahci27- hisilicon,hisi-ahci28- ibm,476gtr-ahci29- marvell,armada-3700-ahci30- marvell,armada-8k-ahci31- marvell,berlin2q-ahci32- qcom,apq8064-ahci33- qcom,ipq806x-ahci34- socionext,uniphier-pro4-ahci35- socionext,uniphier-pxs2-ahci36- socionext,uniphier-pxs3-ahci37required:38- compatible3940properties:41compatible:42oneOf:43- items:44- enum:45- brcm,iproc-ahci46- marvell,armada-8k-ahci47- marvell,berlin2-ahci48- marvell,berlin2q-ahci49- qcom,apq8064-ahci50- qcom,ipq806x-ahci51- socionext,uniphier-pro4-ahci52- socionext,uniphier-pxs2-ahci53- socionext,uniphier-pxs3-ahci54- const: generic-ahci55- enum:56- cavium,octeon-7130-ahci57- hisilicon,hisi-ahci58- ibm,476gtr-ahci59- marvell,armada-3700-ahci6061reg:62minItems: 163maxItems: 26465reg-names:66maxItems: 16768clocks:69minItems: 170maxItems: 57172clock-names:73minItems: 174maxItems: 57576interrupts:77maxItems: 17879power-domains:80maxItems: 18182resets:83minItems: 184maxItems: 38586patternProperties:87"^sata-port@[0-9a-f]+$":88$ref: /schemas/ata/ahci-common.yaml#/$defs/ahci-port8990anyOf:91- required: [ phys ]92- required: [ target-supply ]9394unevaluatedProperties: false9596required:97- compatible98- reg99- interrupts100101allOf:102- $ref: ahci-common.yaml#103104- if:105properties:106compatible:107contains:108enum:109- qcom,apq8064-ahci110- qcom,ipq806x-ahci111then:112properties:113clocks:114minItems: 5115clock-names:116items:117- const: slave_iface118- const: iface119- const: core120- const: rxoob121- const: pmalive122required:123- phys124- phy-names125- clocks126- clock-names127128- if:129properties:130compatible:131contains:132const: socionext,uniphier-pro4-ahci133then:134properties:135resets:136items:137- description: reset line for the parent138- description: reset line for the glue logic139- description: reset line for the controller140required:141- resets142else:143if:144properties:145compatible:146contains:147enum:148- socionext,uniphier-pxs2-ahci149- socionext,uniphier-pxs3-ahci150then:151properties:152resets:153items:154- description: reset for the glue logic155- description: reset for the controller156required:157- resets158else:159properties:160resets:161maxItems: 1162163unevaluatedProperties: false164165examples:166- |167sata@ffe08000 {168compatible = "snps,spear-ahci";169reg = <0xffe08000 0x1000>;170interrupts = <115>;171};172- |173#include <dt-bindings/interrupt-controller/arm-gic.h>174#include <dt-bindings/clock/berlin2q.h>175#include <dt-bindings/ata/ahci.h>176177sata@f7e90000 {178compatible = "marvell,berlin2q-ahci", "generic-ahci";179reg = <0xf7e90000 0x1000>;180interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;181clocks = <&chip CLKID_SATA>;182#address-cells = <1>;183#size-cells = <0>;184185hba-cap = <HBA_SMPS>;186187sata0: sata-port@0 {188reg = <0>;189190phys = <&sata_phy 0>;191target-supply = <®_sata0>;192193hba-port-cap = <(HBA_PORT_FBSCP | HBA_PORT_ESP)>;194};195196sata1: sata-port@1 {197reg = <1>;198199phys = <&sata_phy 1>;200target-supply = <®_sata1>;201202hba-port-cap = <(HBA_PORT_HPCP | HBA_PORT_MPSP | HBA_PORT_FBSCP)>;203};204};205206207