Path: blob/main/sys/contrib/device-tree/Bindings/c6x/dscr.txt
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Device State Configuration Registers1------------------------------------23TI C6X SoCs contain a region of miscellaneous registers which provide various4function for SoC control or status. Details vary considerably among from SoC5to SoC with no two being alike.67In general, the Device State Configuration Registers (DSCR) will provide one or8more configuration registers often protected by a lock register where one or9more key values must be written to a lock register in order to unlock the10configuration register for writes. These configuration register may be used to11enable (and disable in some cases) SoC pin drivers, select peripheral clock12sources (internal or pin), etc. In some cases, a configuration register is13write once or the individual bits are write once. In addition to device config,14the DSCR block may provide registers which are used to reset peripherals,15provide device ID information, provide ethernet MAC addresses, as well as other16miscellaneous functions.1718For device state control (enable/disable), each device control is assigned an19id which is used by individual device drivers to control the state as needed.2021Required properties:2223- compatible: must be "ti,c64x+dscr"24- reg: register area base and size2526Optional properties:2728NOTE: These are optional in that not all SoCs will have all properties. For29SoCs which do support a given property, leaving the property out of the30device tree will result in reduced functionality or possibly driver31failure.3233- ti,dscr-devstat34offset of the devstat register3536- ti,dscr-silicon-rev37offset, start bit, and bitsize of silicon revision field3839- ti,dscr-rmii-resets40offset and bitmask of RMII reset field. May have multiple tuples if more41than one ethernet port is available.4243- ti,dscr-locked-regs44possibly multiple tuples describing registers which are write protected by45a lock register. Each tuple consists of the register offset, lock register46offsset, and the key value used to unlock the register.4748- ti,dscr-kick-regs49offset and key values of two "kick" registers used to write protect other50registers in DSCR. On SoCs using kick registers, the first key must be51written to the first kick register and the second key must be written to52the second register before other registers in the area are write-enabled.5354- ti,dscr-mac-fuse-regs55MAC addresses are contained in two registers. Each element of a MAC address56is contained in a single byte. This property has two tuples. Each tuple has57a register offset and four cells representing bytes in the register from58most significant to least. The value of these four cells is the MAC byte59index (1-6) of the byte within the register. A value of 0 means the byte60is unused in the MAC address.6162- ti,dscr-devstate-ctl-regs63This property describes the bitfields used to control the state of devices.64Each tuple describes a range of identical bitfields used to control one or65more devices (one bitfield per device). The layout of each tuple is:6667start_id num_ids reg enable disable start_bit nbits6869Where:70start_id is device id for the first device control in the range71num_ids is the number of device controls in the range72reg is the offset of the register holding the control bits73enable is the value to enable a device74disable is the value to disable a device (0xffffffff if cannot disable)75start_bit is the bit number of the first bit in the range76nbits is the number of bits per device control7778- ti,dscr-devstate-stat-regs79This property describes the bitfields used to provide device state status80for device states controlled by the DSCR. Each tuple describes a range of81identical bitfields used to provide status for one or more devices (one82bitfield per device). The layout of each tuple is:8384start_id num_ids reg enable disable start_bit nbits8586Where:87start_id is device id for the first device status in the range88num_ids is the number of devices covered by the range89reg is the offset of the register holding the status bits90enable is the value indicating device is enabled91disable is the value indicating device is disabled92start_bit is the bit number of the first bit in the range93nbits is the number of bits per device status9495- ti,dscr-privperm96Offset and default value for register used to set access privilege for97some SoC devices.9899100Example:101102device-state-config-regs@2a80000 {103compatible = "ti,c64x+dscr";104reg = <0x02a80000 0x41000>;105106ti,dscr-devstat = <0>;107ti,dscr-silicon-rev = <8 28 0xf>;108ti,dscr-rmii-resets = <0x40020 0x00040000>;109110ti,dscr-locked-regs = <0x40008 0x40004 0x0f0a0b00>;111ti,dscr-devstate-ctl-regs =112<0 12 0x40008 1 0 0 211312 1 0x40008 3 0 30 211413 2 0x4002c 1 0xffffffff 0 1>;115ti,dscr-devstate-stat-regs =116<0 10 0x40014 1 0 0 311710 2 0x40018 1 0 0 3>;118119ti,dscr-mac-fuse-regs = <0x700 1 2 3 41200x704 5 6 0 0>;121122ti,dscr-privperm = <0x41c 0xaaaaaaaa>;123124ti,dscr-kick-regs = <0x38 0x83E70B131250x3c 0x95A4F1E0>;126};127128129