Path: blob/main/sys/contrib/device-tree/Bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml
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# SPDX-License-Identifier: GPL-2.0+1%YAML 1.22---3$id: http://devicetree.org/schemas/clock/allwinner,sun8i-a83t-de2-clk.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Allwinner A83t Display Engine 2/3 Clock Controller78maintainers:9- Chen-Yu Tsai <wens@csie.org>10- Maxime Ripard <mripard@kernel.org>1112properties:13"#clock-cells":14const: 11516"#reset-cells":17const: 11819compatible:20oneOf:21- const: allwinner,sun8i-a83t-de2-clk22- const: allwinner,sun8i-h3-de2-clk23- const: allwinner,sun8i-v3s-de2-clk24- const: allwinner,sun50i-a64-de2-clk25- const: allwinner,sun50i-h5-de2-clk26- const: allwinner,sun50i-h6-de3-clk27- items:28- const: allwinner,sun8i-r40-de2-clk29- const: allwinner,sun8i-h3-de2-clk30- items:31- const: allwinner,sun20i-d1-de2-clk32- const: allwinner,sun50i-h5-de2-clk3334reg:35maxItems: 13637clocks:38items:39- description: Bus Clock40- description: Module Clock4142clock-names:43items:44- const: bus45- const: mod4647resets:48maxItems: 14950required:51- "#clock-cells"52- "#reset-cells"53- compatible54- reg55- clocks56- clock-names57- resets5859additionalProperties: false6061examples:62- |63#include <dt-bindings/clock/sun8i-h3-ccu.h>64#include <dt-bindings/reset/sun8i-h3-ccu.h>6566de2_clocks: clock@1000000 {67compatible = "allwinner,sun8i-h3-de2-clk";68reg = <0x01000000 0x100000>;69clocks = <&ccu CLK_BUS_DE>,70<&ccu CLK_DE>;71clock-names = "bus",72"mod";73resets = <&ccu RST_BUS_DE>;74#clock-cells = <1>;75#reset-cells = <1>;76};7778...798081