Path: blob/main/sys/contrib/device-tree/Bindings/cpufreq/ti-cpufreq.txt
48378 views
TI CPUFreq and OPP bindings1================================23Certain TI SoCs, like those in the am335x, am437x, am57xx, and dra7xx4families support different OPPs depending on the silicon variant in use.5The ti-cpufreq driver can use revision and an efuse value from the SoC to6provide the OPP framework with supported hardware information. This is7used to determine which OPPs from the operating-points-v2 table get enabled8when it is parsed by the OPP framework.910Required properties:11--------------------12In 'cpus' nodes:13- operating-points-v2: Phandle to the operating-points-v2 table to use.1415In 'operating-points-v2' table:16- compatible: Should be17- 'operating-points-v2-ti-cpu' for am335x, am43xx, and dra7xx/am57xx,18omap34xx, omap36xx and am3517 SoCs19- syscon: A phandle pointing to a syscon node representing the control module20register space of the SoC.2122Optional properties:23--------------------24- "vdd-supply", "vbb-supply": to define two regulators for dra7xx25- "cpu0-supply", "vbb-supply": to define two regulators for omap36xx2627For each opp entry in 'operating-points-v2' table:28- opp-supported-hw: Two bitfields indicating:291. Which revision of the SoC the OPP is supported by302. Which eFuse bits indicate this OPP is available3132A bitwise AND is performed against these values and if any bit33matches, the OPP gets enabled.3435Example:36--------3738/* From arch/arm/boot/dts/am33xx.dtsi */39cpus {40#address-cells = <1>;41#size-cells = <0>;42cpu@0 {43compatible = "arm,cortex-a8";44device_type = "cpu";45reg = <0>;4647operating-points-v2 = <&cpu0_opp_table>;4849clocks = <&dpll_mpu_ck>;50clock-names = "cpu";5152clock-latency = <300000>; /* From omap-cpufreq driver */53};54};5556/*57* cpu0 has different OPPs depending on SoC revision and some on revisions58* 0x2 and 0x4 have eFuse bits that indicate if they are available or not59*/60cpu0_opp_table: opp-table {61compatible = "operating-points-v2-ti-cpu";62syscon = <&scm_conf>;6364/*65* The three following nodes are marked with opp-suspend66* because they can not be enabled simultaneously on a67* single SoC.68*/69opp50-300000000 {70opp-hz = /bits/ 64 <300000000>;71opp-microvolt = <950000 931000 969000>;72opp-supported-hw = <0x06 0x0010>;73opp-suspend;74};7576opp100-275000000 {77opp-hz = /bits/ 64 <275000000>;78opp-microvolt = <1100000 1078000 1122000>;79opp-supported-hw = <0x01 0x00FF>;80opp-suspend;81};8283opp100-300000000 {84opp-hz = /bits/ 64 <300000000>;85opp-microvolt = <1100000 1078000 1122000>;86opp-supported-hw = <0x06 0x0020>;87opp-suspend;88};8990opp100-500000000 {91opp-hz = /bits/ 64 <500000000>;92opp-microvolt = <1100000 1078000 1122000>;93opp-supported-hw = <0x01 0xFFFF>;94};9596opp100-600000000 {97opp-hz = /bits/ 64 <600000000>;98opp-microvolt = <1100000 1078000 1122000>;99opp-supported-hw = <0x06 0x0040>;100};101102opp120-600000000 {103opp-hz = /bits/ 64 <600000000>;104opp-microvolt = <1200000 1176000 1224000>;105opp-supported-hw = <0x01 0xFFFF>;106};107108opp120-720000000 {109opp-hz = /bits/ 64 <720000000>;110opp-microvolt = <1200000 1176000 1224000>;111opp-supported-hw = <0x06 0x0080>;112};113114oppturbo-720000000 {115opp-hz = /bits/ 64 <720000000>;116opp-microvolt = <1260000 1234800 1285200>;117opp-supported-hw = <0x01 0xFFFF>;118};119120oppturbo-800000000 {121opp-hz = /bits/ 64 <800000000>;122opp-microvolt = <1260000 1234800 1285200>;123opp-supported-hw = <0x06 0x0100>;124};125126oppnitro-1000000000 {127opp-hz = /bits/ 64 <1000000000>;128opp-microvolt = <1325000 1298500 1351500>;129opp-supported-hw = <0x04 0x0200>;130};131};132133134