Path: blob/main/sys/contrib/device-tree/Bindings/crypto/fsl-sec2.txt
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Freescale SoC SEC Security Engines versions 1.x-2.x-3.x12Required properties:34- compatible : Should contain entries for this and backward compatible5SEC versions, high to low, e.g., "fsl,sec2.1", "fsl,sec2.0" (SEC2/3)6e.g., "fsl,sec1.2", "fsl,sec1.0" (SEC1)7warning: SEC1 and SEC2 are mutually exclusive8- reg : Offset and length of the register set for the device9- interrupts : the SEC's interrupt number10- fsl,num-channels : An integer representing the number of channels11available.12- fsl,channel-fifo-len : An integer representing the number of13descriptor pointers each channel fetch fifo can hold.14- fsl,exec-units-mask : The bitmask representing what execution units15(EUs) are available. It's a single 32-bit cell. EU information16should be encoded following the SEC's Descriptor Header Dword17EU_SEL0 field documentation, i.e. as follows:1819bit 0 = reserved - should be 020bit 1 = set if SEC has the ARC4 EU (AFEU)21bit 2 = set if SEC has the DES/3DES EU (DEU)22bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)23bit 4 = set if SEC has the random number generator EU (RNG)24bit 5 = set if SEC has the public key EU (PKEU)25bit 6 = set if SEC has the AES EU (AESU)26bit 7 = set if SEC has the Kasumi EU (KEU)27bit 8 = set if SEC has the CRC EU (CRCU)28bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)2930remaining bits are reserved for future SEC EUs.3132- fsl,descriptor-types-mask : The bitmask representing what descriptors33are available. It's a single 32-bit cell. Descriptor type information34should be encoded following the SEC's Descriptor Header Dword DESC_TYPE35field documentation, i.e. as follows:3637bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type38bit 1 = set if SEC supports the ipsec_esp descriptor type39bit 2 = set if SEC supports the common_nonsnoop desc. type40bit 3 = set if SEC supports the 802.11i AES ccmp desc. type41bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type42bit 5 = set if SEC supports the srtp descriptor type43bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type44bit 7 = set if SEC supports the pkeu_assemble descriptor type45bit 8 = set if SEC supports the aesu_key_expand_output desc.type46bit 9 = set if SEC supports the pkeu_ptmul descriptor type47bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type48bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type4950..and so on and so forth.5152Example:5354/* MPC8548E */55crypto@30000 {56compatible = "fsl,sec2.1", "fsl,sec2.0";57reg = <0x30000 0x10000>;58interrupts = <29 2>;59interrupt-parent = <&mpic>;60fsl,num-channels = <4>;61fsl,channel-fifo-len = <24>;62fsl,exec-units-mask = <0xfe>;63fsl,descriptor-types-mask = <0x12b0ebf>;64};656667