Path: blob/main/sys/contrib/device-tree/Bindings/display/exynos/exynos_hdmi.txt
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Device-Tree bindings for drm hdmi driver12Required properties:3- compatible: value should be one among the following:41) "samsung,exynos4210-hdmi"52) "samsung,exynos4212-hdmi"63) "samsung,exynos5420-hdmi"74) "samsung,exynos5433-hdmi"8- reg: physical base address of the hdmi and length of memory mapped9region.10- interrupts: interrupt number to the cpu.11- hpd-gpios: following information about the hotplug gpio pin.12a) phandle of the gpio controller node.13b) pin number within the gpio controller.14c) optional flags and pull up/down.15- ddc: phandle to the hdmi ddc node16- phy: phandle to the hdmi phy node17- samsung,syscon-phandle: phandle for system controller node for PMU.18- #sound-dai-cells: should be 0.1920Required properties for Exynos 4210, 4212, 5420 and 5433:21- clocks: list of clock IDs from SoC clock driver.22a) hdmi: Gate of HDMI IP bus clock.23b) sclk_hdmi: Gate of HDMI special clock.24c) sclk_pixel: Pixel special clock, one of the two possible inputs of25HDMI clock mux.26d) sclk_hdmiphy: HDMI PHY clock output, one of two possible inputs of27HDMI clock mux.28e) mout_hdmi: It is required by the driver to switch between the 229parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is stable30after configuration, parent is set to sclk_hdmiphy else31sclk_pixel.32- clock-names: aliases as per driver requirements for above clock IDs:33"hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy" and "mout_hdmi".3435Required properties for Exynos 5433:36- clocks: list of clock specifiers according to common clock bindings.37a) hdmi_pclk: Gate of HDMI IP APB bus.38b) hdmi_i_pclk: Gate of HDMI-PHY IP APB bus.39d) i_tmds_clk: Gate of HDMI TMDS clock.40e) i_pixel_clk: Gate of HDMI pixel clock.41f) i_spdif_clk: Gate of HDMI SPDIF clock.42g) oscclk: Oscillator clock, used as parent of following *_user clocks43in case HDMI-PHY is not operational.44h) tmds_clko: TMDS clock generated by HDMI-PHY.45i) tmds_clko_user: MUX used to switch between oscclk and tmds_clko,46respectively if HDMI-PHY is off and operational.47j) pixel_clko: Pixel clock generated by HDMI-PHY.48k) pixel_clko_user: MUX used to switch between oscclk and pixel_clko,49respectively if HDMI-PHY is off and operational.50- clock-names: aliases for above clock specfiers.51- samsung,sysreg: handle to syscon used to control the system registers.5253Example:5455hdmi {56compatible = "samsung,exynos4212-hdmi";57reg = <0x14530000 0x100000>;58interrupts = <0 95 0>;59hpd-gpios = <&gpx3 7 1>;60ddc = <&hdmi_ddc_node>;61phy = <&hdmi_phy_node>;62samsung,syscon-phandle = <&pmu_system_controller>;63};646566