Path: blob/main/sys/contrib/device-tree/Bindings/dma/fsl-edma.txt
48375 views
* Freescale enhanced Direct Memory Access(eDMA) Controller12The eDMA channels have multiplex capability by programmble memory-mapped3registers. channels are split into two groups, called DMAMUX0 and DMAMUX1,4specific DMA request source can only be multiplexed by any channel of certain5group, DMAMUX0 or DMAMUX1, but not both.67* eDMA Controller8Required properties:9- compatible :10- "fsl,vf610-edma" for eDMA used similar to that on Vybrid vf610 SoC11- "fsl,imx7ulp-edma" for eDMA2 used similar to that on i.mx7ulp12- "fsl,ls1028a-edma" followed by "fsl,vf610-edma" for eDMA used on the13LS1028A SoC.14- reg : Specifies base physical address(s) and size of the eDMA registers.15The 1st region is eDMA control register's address and size.16The 2nd and the 3rd regions are programmable channel multiplexing17control register's address and size.18- interrupts : A list of interrupt-specifiers, one for each entry in19interrupt-names on vf610 similar SoC. But for i.mx7ulp per channel20per transmission interrupt, total 16 channel interrupt and 121error interrupt(located in the last), no interrupt-names list on22i.mx7ulp for clean on dts.23- #dma-cells : Must be <2>.24The 1st cell specifies the DMAMUX(0 for DMAMUX0 and 1 for DMAMUX1).25Specific request source can only be multiplexed by specific channels26group called DMAMUX.27The 2nd cell specifies the request source(slot) ID.28See the SoC's reference manual for all the supported request sources.29- dma-channels : Number of channels supported by the controller30- clock-names : A list of channel group clock names. Should contain:31"dmamux0" - clock name of mux0 group32"dmamux1" - clock name of mux1 group33Note: No dmamux0 on i.mx7ulp, but another 'dma' clk added on i.mx7ulp.34- clocks : A list of phandle and clock-specifier pairs, one for each entry in35clock-names.3637Optional properties:38- big-endian: If present registers and hardware scatter/gather descriptors39of the eDMA are implemented in big endian mode, otherwise in little40mode.41- interrupt-names : Should contain the below on vf610 similar SoC but not used42on i.mx7ulp similar SoC:43"edma-tx" - the transmission interrupt44"edma-err" - the error interrupt454647Examples:4849edma0: dma-controller@40018000 {50#dma-cells = <2>;51compatible = "fsl,vf610-edma";52reg = <0x40018000 0x2000>,53<0x40024000 0x1000>,54<0x40025000 0x1000>;55interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>,56<0 9 IRQ_TYPE_LEVEL_HIGH>;57interrupt-names = "edma-tx", "edma-err";58dma-channels = <32>;59clock-names = "dmamux0", "dmamux1";60clocks = <&clks VF610_CLK_DMAMUX0>,61<&clks VF610_CLK_DMAMUX1>;62}; /* vf610 */6364edma1: dma-controller@40080000 {65#dma-cells = <2>;66compatible = "fsl,imx7ulp-edma";67reg = <0x40080000 0x2000>,68<0x40210000 0x1000>;69dma-channels = <32>;70interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,71<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,72<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,73<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,74<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,75<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,76<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,77<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,78<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,79<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,80<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,81<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,82<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,83<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,84<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,85<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,86/* last is eDMA2-ERR interrupt */87<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;88clock-names = "dma", "dmamux0";89clocks = <&pcc2 IMX7ULP_CLK_DMA1>,90<&pcc2 IMX7ULP_CLK_DMA_MUX1>;91}; /* i.mx7ulp */9293* DMA clients94DMA client drivers that uses the DMA function must use the format described95in the dma.txt file, using a two-cell specifier for each channel: the 1st96specifies the channel group(DMAMUX) in which this request can be multiplexed,97and the 2nd specifies the request source.9899Examples:100101sai2: sai@40031000 {102compatible = "fsl,vf610-sai";103reg = <0x40031000 0x1000>;104interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;105clock-names = "sai";106clocks = <&clks VF610_CLK_SAI2>;107dma-names = "tx", "rx";108dmas = <&edma0 0 21>,109<&edma0 0 20>;110};111112113