Path: blob/main/sys/contrib/device-tree/Bindings/dma/lpc1850-dmamux.txt
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NXP LPC18xx/43xx DMA MUX (DMA request router)12Required properties:3- compatible: "nxp,lpc1850-dmamux"4- reg: Memory map for accessing module5- #dma-cells: Should be set to <3>.6* 1st cell contain the master dma request signal7* 2nd cell contain the mux value (0-3) for the peripheral8* 3rd cell contain either 1 or 2 depending on the AHB9master used.10- dma-requests: Number of DMA requests for the mux11- dma-masters: phandle pointing to the DMA controller1213The DMA controller node need to have the following poroperties:14- dma-requests: Number of DMA requests the controller can handle1516Example:1718dmac: dma@40002000 {19compatible = "nxp,lpc1850-gpdma", "arm,pl080", "arm,primecell";20arm,primecell-periphid = <0x00041080>;21reg = <0x40002000 0x1000>;22interrupts = <2>;23clocks = <&ccu1 CLK_CPU_DMA>;24clock-names = "apb_pclk";25#dma-cells = <2>;26dma-channels = <8>;27dma-requests = <16>;28lli-bus-interface-ahb1;29lli-bus-interface-ahb2;30mem-bus-interface-ahb1;31mem-bus-interface-ahb2;32memcpy-burst-size = <256>;33memcpy-bus-width = <32>;34};3536dmamux: dma-mux {37compatible = "nxp,lpc1850-dmamux";38#dma-cells = <3>;39dma-requests = <64>;40dma-masters = <&dmac>;41};4243uart0: serial@40081000 {44compatible = "nxp,lpc1850-uart", "ns16550a";45reg = <0x40081000 0x1000>;46reg-shift = <2>;47interrupts = <24>;48clocks = <&ccu2 CLK_APB0_UART0>, <&ccu1 CLK_CPU_UART0>;49clock-names = "uartclk", "reg";50dmas = <&dmamux 1 1 251&dmamux 2 1 2>;52dma-names = "tx", "rx";53};545556