Path: blob/main/sys/contrib/device-tree/Bindings/eeprom/at25.txt
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EEPROMs (SPI) compatible with Atmel at25.12Required properties:3- compatible : Should be "<vendor>,<type>", and generic value "atmel,at25".4Example "<vendor>,<type>" values:5"anvo,anv32e61w"6"microchip,25lc040"7"st,m95m02"8"st,m95256"910- reg : chip select number11- spi-max-frequency : max spi frequency to use12- pagesize : size of the eeprom page13- size : total eeprom size in bytes14- address-width : number of address bits (one of 8, 9, 16, or 24).15For 9 bits, the MSB of the address is sent as bit 3 of the instruction16byte, before the address byte.1718Optional properties:19- spi-cpha : SPI shifted clock phase, as per spi-bus bindings.20- spi-cpol : SPI inverse clock polarity, as per spi-bus bindings.21- read-only : this parameter-less property disables writes to the eeprom22- wp-gpios : GPIO to which the write-protect pin of the chip is connected2324Obsolete legacy properties can be used in place of "size", "pagesize",25"address-width", and "read-only":26- at25,byte-len : total eeprom size in bytes27- at25,addr-mode : addr-mode flags, as defined in include/linux/spi/eeprom.h28- at25,page-size : size of the eeprom page2930Additional compatible properties are also allowed.3132Example:33eeprom@0 {34compatible = "st,m95256", "atmel,at25";35reg = <0>36spi-max-frequency = <5000000>;37spi-cpha;38spi-cpol;39wp-gpios = <&gpio1 3 0>;4041pagesize = <64>;42size = <32768>;43address-width = <16>;44};454647